platform/upstream/llvm.git
3 years ago[libc][NFC] Add fenv and string headers to x86_64 headers list.
Siva Chandra Reddy [Tue, 7 Sep 2021 20:55:08 +0000 (20:55 +0000)]
[libc][NFC] Add fenv and string headers to x86_64 headers list.

3 years agoRevert "[gn build] Add a file that should have been in cfe02847496b856aa"
Nico Weber [Tue, 7 Sep 2021 21:01:48 +0000 (17:01 -0400)]
Revert "[gn build] Add a file that should have been in cfe02847496b856aa"

This reverts commit 6be7f5c354557b661494f94be616d2a8c91a6a1d.
We'll need this file eventually, but it in fact shouldn't have been in
cfe02847496b856aa. It's currently unreferenced.

3 years ago[gn build] Try to fix win build after cfe02847496b856aa
Nico Weber [Tue, 7 Sep 2021 20:58:57 +0000 (16:58 -0400)]
[gn build] Try to fix win build after cfe02847496b856aa

3 years ago[Support] Implement getMainExecutable on Solaris
Rainer Orth [Tue, 7 Sep 2021 20:56:10 +0000 (22:56 +0200)]
[Support] Implement getMainExecutable on Solaris

Many `flang` tests currently `FAIL` on Solaris because the module files
aren't found.  I could trace this to `sys::fs::getMainExecutable` not being
implemented.

This patch does this and fixes all affected `flang` tests.

Tested on `amd64-pc-solaris2.11`.

Differential Revision: https://reviews.llvm.org/D109374

3 years ago[SCEV] Further clarify comments regarding UB and zero stride
Philip Reames [Tue, 7 Sep 2021 20:53:56 +0000 (13:53 -0700)]
[SCEV] Further clarify comments regarding UB and zero stride

Follow on to D109029. I realized we had no mention of mustprogrress in the comment (as it prexisted mustprogress in the codebase). In the process of adding it, I tweaked the preconditions into something I think is more clear. Note that mustprogress is checked in the code.

Differential Revision: https://reviews.llvm.org/D109091

3 years agoImprove error message when creating an op that isn't registered in the context
Mehdi Amini [Tue, 7 Sep 2021 17:30:25 +0000 (17:30 +0000)]
Improve error message when creating an op that isn't registered in the context

This prints a more helpful error for folks who aren't intrinsically
familiar with the system.

Differential Revision: https://reviews.llvm.org/D109378

3 years ago[MLIR][docs] Clarify language in pass restrictions
Geoffrey Martin-Noble [Tue, 7 Sep 2021 20:18:57 +0000 (13:18 -0700)]
[MLIR][docs] Clarify language in pass restrictions

Right now all but the last bullet are relying on applied "must not" that
isn't there and the last bullet is a "must".

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D109389

3 years ago[InstCombine] fold icmp equality with 'or' mask ops
Sanjay Patel [Tue, 7 Sep 2021 20:24:21 +0000 (16:24 -0400)]
[InstCombine] fold icmp equality with 'or' mask ops

This could go either direction since the instruction
count is the same either way, but there are a few
reasons to prefer this:
1. We already do the related transform with 'and'
   (see just above the new code).
2. We try (too hard) to compensate for not having this
   and possibly other folds in transformZExtICmp(),
   and that leads to bugs like https://llvm.org/PR51762 .
3. Codegen looks better across a variety of targets.

https://alive2.llvm.org/ce/z/uEgn4P

3 years ago[InstCombine] add tests for icmp with 'or' ops; NFC
Sanjay Patel [Tue, 7 Sep 2021 20:06:26 +0000 (16:06 -0400)]
[InstCombine] add tests for icmp with 'or' ops; NFC

3 years ago[X86] Move newly-added tests into the right file
Roman Lebedev [Tue, 7 Sep 2021 20:14:48 +0000 (23:14 +0300)]
[X86] Move newly-added tests into the right file

3 years ago[NFC][X86] Adjust multi-use tests in extract-lowbits.ll
Roman Lebedev [Tue, 7 Sep 2021 20:09:58 +0000 (23:09 +0300)]
[NFC][X86] Adjust multi-use tests in extract-lowbits.ll

3 years ago[AArch64][Global ISel] Add sext/zext of vector extract improvements
Irina Dobrescu [Tue, 7 Sep 2021 20:17:51 +0000 (21:17 +0100)]
[AArch64][Global ISel] Add sext/zext of vector extract improvements

This patch adds improvements for sext/zext of a vector extract in Global
ISel.

For example, this piece of code:

define i64 @si64(<4 x i32> %0, i32 %1) {
  %3 = extractelement <4 x i32> %0, i64 1
  %s = sext i32 %3 to i64
  ret i64 %s
}

Used to have this lowering:
si64:
  mov s0, v0.s[1]
  fmov w8, s0
  sxtw x0, w8
  ret

Whereas this patch makes it lower to this:
si64:
  smov x0, v0.h[0]
  ret

Differential Revision: https://reviews.llvm.org/D108137

3 years ago[NFC][X86] Adjust multi-use tests in clear-lowbits.ll, add 'misc' tests
Roman Lebedev [Tue, 7 Sep 2021 19:54:50 +0000 (22:54 +0300)]
[NFC][X86] Adjust multi-use tests in clear-lowbits.ll, add 'misc' tests

3 years ago[gn build] Try to fix mac/intel build after cfe02847496b
Nico Weber [Tue, 7 Sep 2021 19:52:59 +0000 (15:52 -0400)]
[gn build] Try to fix mac/intel build after cfe02847496b

The public header lldb/include/lldb/Host/XML.h includes libxml/xmlreader.h,
so this must be a public dep.

3 years ago[gn build] Try to fix mac/arm build after cfe02847496b856aa
Nico Weber [Tue, 7 Sep 2021 19:46:46 +0000 (15:46 -0400)]
[gn build] Try to fix mac/arm build after cfe02847496b856aa

3 years ago[NFC][X86] Adjust multi-use tests in clear-highbits.ll, add pat. d tests
Roman Lebedev [Tue, 7 Sep 2021 19:35:19 +0000 (22:35 +0300)]
[NFC][X86] Adjust multi-use tests in clear-highbits.ll, add pat. d tests

3 years ago[gn build] Add a file that should have been in cfe02847496b856aa
Nico Weber [Tue, 7 Sep 2021 19:37:24 +0000 (15:37 -0400)]
[gn build] Add a file that should have been in cfe02847496b856aa

3 years ago[gn build] Attempt to fix linux build after cfe02847496b856aa
Nico Weber [Tue, 7 Sep 2021 19:29:30 +0000 (15:29 -0400)]
[gn build] Attempt to fix linux build after cfe02847496b856aa

3 years ago[libc++][NFC] Add missing synopsis for node handles
Louis Dionne [Tue, 7 Sep 2021 19:25:41 +0000 (15:25 -0400)]
[libc++][NFC] Add missing synopsis for node handles

This was manually taken from https://llvm.org/D100311.

3 years ago[gn build] Add build files for LLDB
Nico Weber [Fri, 18 Jun 2021 20:00:27 +0000 (16:00 -0400)]
[gn build] Add build files for LLDB

This is enough to get the lit-based tests to pass on macOS.

Doesn't yet add build targets for:
- Any LLDB unit tests
- swig bindings
- various targets not needed by lit tests

LLDB has many dependency cycles, something GN doesn't allow. For
that reason, I've omitted some dependency edges. Hopefully we can
clean up the cycles one day.

LLDB has a public/private header distinction, but mostly ignores it.
Many libraries include private headers from other modules.

Since LLDB is the first target the LLVM/GN build that uses Objective-C++
code, add some machinery to the toolchain file to handle that.

Differential Revision: https://reviews.llvm.org/D109185

3 years agoDon't check if the result of hasAttrSomewhere is non-zero in CallBase::getReturnedArg...
Arthur Eubanks [Mon, 6 Sep 2021 19:28:28 +0000 (12:28 -0700)]
Don't check if the result of hasAttrSomewhere is non-zero in CallBase::getReturnedArgOperand()

Index is 0 when the return value has the returned attribute. But the
return value cannot have the returned attribute, so the check is
pointless.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D109334

3 years ago[X86] Don't clobber EBX in stackprobes
Elliot Saba [Tue, 7 Sep 2021 14:10:49 +0000 (10:10 -0400)]
[X86] Don't clobber EBX in stackprobes

On X86, the stackprobe emission code chooses the `R11D` register, which
is illegal on i686.  This ends up wrapping around to `EBX`, which does
not get properly callee-saved within the stack probing prologue,
clobbering the register for the callers.

We fix this by explicitly using `EAX` as the stack probe register.

Reviewed By: pengfei

Differential Revision: https://reviews.llvm.org/D109203

3 years ago[OpenMP][libomptarget][NFC] Change checkDeviceAndCtors return type to bool.
Ye Luo [Mon, 6 Sep 2021 04:41:53 +0000 (23:41 -0500)]
[OpenMP][libomptarget][NFC] Change checkDeviceAndCtors return type to bool.

What is exactly needed is only a boolean. Pulling OFFLOAD_SUCCESS/FAIL only adds confusion.

Differential Revision: https://reviews.llvm.org/D109303

3 years ago[UseListOrder] Fix use list order for function operands
Nikita Popov [Sat, 4 Sep 2021 20:38:46 +0000 (22:38 +0200)]
[UseListOrder] Fix use list order for function operands

Functions can have a personality function, as well as prefix and
prologue data as additional operands. Unused operands are assigned
a dummy value of i1* null. This patch addresses multiple issues in
use-list order preservation for these:

 * Fix verify-uselistorder to also enumerate the dummy values.
   This means that now use-list order values of these values are
   shuffled even if there is no other mention of i1* null in the
   module. This results in failures of Assembler/call-arg-is-callee.ll,
   Assembler/opaque-ptr.ll and Bitcode/use-list-order2.ll.
 * The use-list order prediction in ValueEnumerator does not take
   into account the fact that a global may use a value more than
   once and leaves uses in the same global effectively unordered.
   We should be comparing the operand number here, as we do for
   the more general case.
 * While we enumerate all operands of a function together (which
   seems sensible to me), the bitcode reader would first resolve
   prefix data for all function, then prologue data for all
   functions, then personality functions for all functions. Change
   this to resolve all operands for a given function together
   instead.

Differential Revision: https://reviews.llvm.org/D109282

3 years agoAdd missing overloads for Function::addRetAttr(s)
Arthur Eubanks [Tue, 7 Sep 2021 18:50:01 +0000 (11:50 -0700)]
Add missing overloads for Function::addRetAttr(s)

3 years ago[ConstFold] Support opaque pointers in constexpr GEPs
Nikita Popov [Tue, 20 Jul 2021 15:19:52 +0000 (17:19 +0200)]
[ConstFold] Support opaque pointers in constexpr GEPs

Support opaque pointers in SymbolicallyEvaluateGEP() by using the
value type of a GlobalValue base or falling back to i8 if there
isn't one. We don't unconditionally generate i8 GEPs here because
that would lose inrange attribues, and because some optimizations
on globals currently rely on GEP types (e.g. the globals SROA
mentioned in the comment).

Differential Revision: https://reviews.llvm.org/D109297

3 years agoCopy Elementtype Attribute to IR at Link step
Andy Kaylor [Sat, 4 Sep 2021 01:24:09 +0000 (18:24 -0700)]
Copy Elementtype Attribute to IR at Link step

Copying IR during linking causes a type mismatch due to the field being missing in IRMover/Valuemapper. Adds the full range of typed attributes including elementtype attribute in the copy functions.

Patch by Chenyang Liu

Differential Revision: https://reviews.llvm.org/D108796

3 years ago[ELF][test] Improve gitBitcodeMachineKind tests
Fangrui Song [Tue, 7 Sep 2021 18:38:43 +0000 (11:38 -0700)]
[ELF][test] Improve gitBitcodeMachineKind tests

3 years ago[llvm-objdump] Fix 'llvm-objdump -dr' for executables with relocations
Maksim Panchenko [Tue, 31 Aug 2021 18:53:54 +0000 (11:53 -0700)]
[llvm-objdump] Fix 'llvm-objdump -dr' for executables with relocations

Print relocations interleaved with disassembled instructions for
executables with relocatable sections, e.g. those built with "-Wl,-q".

Differential Revision: https://reviews.llvm.org/D109016

3 years ago[NFC][InstCombine] Make check for sret in a vararg function clearer
Arthur Eubanks [Mon, 6 Sep 2021 20:02:36 +0000 (13:02 -0700)]
[NFC][InstCombine] Make check for sret in a vararg function clearer

We're trying to get the parameter index of sret and see if it's part of
a function's varargs.

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D109335

3 years agoReland "[InstCombine] Recognize `((x * y) s/ x) !=/== y` as an signed multiplication...
Roman Lebedev [Tue, 7 Sep 2021 17:48:39 +0000 (20:48 +0300)]
Reland "[InstCombine] Recognize `((x * y) s/ x) !=/== y` as an signed multiplication overflow check (PR48769)"

This reverts commit 91f7a4fff75179e75d38b692715ae69471668b5e,
relanding commit 13ec913bdf500e2354cc55bf29e2f5d99e0c709e.

The original commit was reverted because of (essentially)
https://bugs.llvm.org/show_bug.cgi?id=35922
which has now been addressed by d0eeb64be5848a7832d13db9d69904db281d02e8.

3 years ago[libc++] Remove a stray `const` on ranges::data and ranges::ssize. NFCI.
Arthur O'Dwyer [Mon, 6 Sep 2021 16:40:05 +0000 (12:40 -0400)]
[libc++] Remove a stray `const` on ranges::data and ranges::ssize. NFCI.

These are specced as `inline constexpr auto`; the extra `const`
isn't doing anything except being inconsistent with the other CPOs.
Now all the implemented CPOs can be detected by
    git grep 'inline constexpr auto.*fn' ../libcxx/include/
and I think that's beautiful.

3 years ago[libc++] Fix std::to_address(array).
Arthur O'Dwyer [Mon, 6 Sep 2021 18:11:45 +0000 (14:11 -0400)]
[libc++] Fix std::to_address(array).

There were basically two bugs here:

When C++20 `to_address` is called on `int arr[10]`, then `const _Ptr&` becomes
a reference to a const array, and then we dispatch to `__to_address<const int(&)[10]>`,
which, oops, gives us a `const int*` result instead of an `int*` result.
Solution: We need to provide the two standard-specified overloads of
`std::to_address` in exactly the same way that we provide two overloads
of `__to_address`.

When `__to_address` is called on a pointer type, `__to_address(const _Ptr&)`
is disabled so we successfully avoid trying to instantiate pointer_traits of
that pointer type. But when it's called on an array type, it's not disabled
for array types, so we go ahead and instantiate pointer_traits<int[10]>,
which goes boom. Solution: We need to disable `__to_address(const _Ptr&)`
for both pointer and array types. Also disable it for function types,
so that they get the nice error message; and put a test on it.

Differential Revision: https://reviews.llvm.org/D109331

3 years ago[libc++][NFC] Test span is nothrow trivially destructible
Joe Loser [Tue, 7 Sep 2021 17:48:10 +0000 (13:48 -0400)]
[libc++][NFC] Test span is nothrow trivially destructible

Add tests showing `span` is trivially_destructible and nothrow_destructible.
Note that we do not need to explicitly default the destructor in `span`.

Reviewed By: ldionne, Mordante, #libc

Differential Revision: https://reviews.llvm.org/D109286

3 years ago[X86ISelLowering] avoid emitting libcalls to __mulodi4()
Nick Desaulniers [Tue, 7 Sep 2021 17:26:22 +0000 (10:26 -0700)]
[X86ISelLowering] avoid emitting libcalls to __mulodi4()

Similar to D108842, D108844, and D108926.

__has_builtin(builtin_mul_overflow) returns true for 32b x86 targets,
but Clang is deferring to compiler RT when encountering long long types.
This breaks ARCH=i386 + CONFIG_BLK_DEV_NBD=y builds of the Linux kernel
that are using builtin_mul_overflow with these types for these targets.

If the semantics of __has_builtin mean "the compiler resolves these,
always" then we shouldn't conditionally emit a libcall.

This will still need to be worked around in the Linux kernel in order to
continue to support these builds of the Linux kernel for this
target with older releases of clang.

Link: https://bugs.llvm.org/show_bug.cgi?id=28629
Link: https://bugs.llvm.org/show_bug.cgi?id=35922
Link: https://github.com/ClangBuiltLinux/linux/issues/1438
Reviewed By: lebedev.ri, RKSimon

Differential Revision: https://reviews.llvm.org/D108928

3 years ago[flang] evaluate: Fold SQRT, HYPOT, & CABS
peter klausler [Mon, 30 Aug 2021 16:36:33 +0000 (09:36 -0700)]
[flang] evaluate: Fold SQRT, HYPOT, & CABS

Implement IEEE Real::SQRT() operation, then use it to
also implement Real::HYPOT(), which can then be used directly
to implement Complex::ABS().

Differential Revision: https://reviews.llvm.org/D109250

3 years ago[lldb] Alphabetize some CMake files a bit better
Nico Weber [Tue, 7 Sep 2021 15:23:52 +0000 (11:23 -0400)]
[lldb] Alphabetize some CMake files a bit better

No observable behavior change, but makes the generated Plugins.def a bit easier
to read.

Differential Revision: https://reviews.llvm.org/D109367

3 years ago[mlir] Fix SplatOp lowering to the LLVM dialect
Alex Zinenko [Tue, 7 Sep 2021 12:27:48 +0000 (14:27 +0200)]
[mlir] Fix SplatOp lowering to the LLVM dialect

The lowering has been incorrectly using the operands of the original op instead
of rewritten operands provided to matchAndRewrite call. This may lead to
spurious materializations and generally invalid IR.

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D109355

3 years ago[Support] Automatically support `hash_value` when `HashBuilder` support is available.
Alexandre Rames [Tue, 7 Sep 2021 16:42:46 +0000 (09:42 -0700)]
[Support] Automatically support `hash_value` when `HashBuilder` support is available.

Use the `HBuilder` interface to provide default implementations of `llvm::hash_value`.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D109024

3 years agoGreedy set cover implementation of `Merger::Merge`
aristotelis [Tue, 7 Sep 2021 16:25:44 +0000 (09:25 -0700)]
Greedy set cover implementation of `Merger::Merge`

Extend the existing single-pass algorithm for `Merger::Merge` with an algorithm that gives better results. This new implementation can be used with a new **set_cover_merge=1** flag.

This greedy set cover implementation gives a substantially smaller final corpus (40%-80% less testcases) while preserving the same features/coverage. At the same time, the execution time penalty is not that significant (+50% for ~1M corpus files and far less for smaller corpora). These results were obtained by comparing several targets with varying size corpora.

Change `Merger::CrashResistantMergeInternalStep` to collect all features from each file and not just unique ones. This is needed for the set cover algorithm to work correctly. The implementation of the algorithm in `Merger::SetCoverMerge` uses a bitvector to store features that are covered by a file while performing the pass. Collisions while indexing the bitvector are ignored similarly to the fuzzer.

Reviewed By: morehouse

Differential Revision: https://reviews.llvm.org/D105284

3 years ago[NFC][support] Extract `IsHashableData` out of class
Alexandre Rames [Thu, 2 Sep 2021 23:13:28 +0000 (16:13 -0700)]
[NFC][support] Extract `IsHashableData` out of class

Extract `HashBuilder::IsHashableData` out of class; it does not depend on
template parametres.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D109205

3 years ago[X86] X86InstrAVX512.td - remove unused template parameters. NFC.
Simon Pilgrim [Tue, 7 Sep 2021 16:09:53 +0000 (17:09 +0100)]
[X86] X86InstrAVX512.td - remove unused template parameters. NFC.

Identified in D109359

3 years ago[OpenMP] Add interface for 5.1 scope construct
Hansang Bae [Fri, 11 Jun 2021 22:35:28 +0000 (17:35 -0500)]
[OpenMP] Add interface for 5.1 scope construct

The new interface only marks begin/end of a scope construct for
corresponding OMPT events, and we can use existing interfaces for
reduction operations.

Differential Revision: https://reviews.llvm.org/D108062

3 years ago[Analysis, Target, Transforms] Construct SmallVector with iterator ranges (NFC)
Kazu Hirata [Tue, 7 Sep 2021 16:19:33 +0000 (09:19 -0700)]
[Analysis, Target, Transforms] Construct SmallVector with iterator ranges (NFC)

3 years ago[RISCV] Fix "set but not used" warnings
Kazu Hirata [Tue, 7 Sep 2021 16:19:31 +0000 (09:19 -0700)]
[RISCV] Fix "set but not used" warnings

3 years ago[flang] Fix GetHostProcedure() for main program
peter klausler [Fri, 3 Sep 2021 20:55:18 +0000 (13:55 -0700)]
[flang] Fix GetHostProcedure() for main program

It only worked for internal procedures of subprograms,
but must also allow for internal procedures of the
main program.  This broke the use of host-associated
implicitly-typed symbols in specification expressions
of internal procedures.

Differential Revision: https://reviews.llvm.org/D109262

3 years ago[InstCombine] ror/rol(X, RotAmt) == C --> X == rol/ror(C, RotAmt) (PR51567)
Dávid Bolvanský [Tue, 7 Sep 2021 16:04:38 +0000 (18:04 +0200)]
[InstCombine] ror/rol(X, RotAmt) == C --> X == rol/ror(C, RotAmt)   (PR51567)

```
----------------------------------------
define i1 @src(i32 %0) {
%1:
  %2 = fshl i32 %0, i32 %0, i32 25
  %3 = icmp eq i32 %2, 5
  ret i1 %3
}
=>
define i1 @tgt(i32 %0) {
%1:
  %2 = icmp eq i32 %0, 640
  ret i1 %2
}
Transformation seems to be correct!
```

https://alive2.llvm.org/ce/z/GdY8Jm

Solves PR51567

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D109283

3 years ago[IROutliner] Adding outlining for single entry/single exit multiblock regions
Andrew Litteken [Wed, 28 Jul 2021 14:59:37 +0000 (07:59 -0700)]
[IROutliner] Adding outlining for single entry/single exit multiblock regions

Using the similarity found from the IRSimilarity Identifier, we take regions with structural similarity, and deduplicate them into a separate function. The Code Extractor is able to provide most of this functionality.

For simplicity, we start by only outlining regions with a single entry and single exit branch, this reduces the complexity in handling phi nodes outside the region, and handling many sets of outputs for each of the different exit blocks.

Reviewer: paquette

Differential Revision: https://reviews.llvm.org/D106990

3 years ago[PowerPC] Fixed the crash due to early if conversion with fixed CR fields
Victor Huang [Mon, 30 Aug 2021 15:52:06 +0000 (10:52 -0500)]
[PowerPC] Fixed the crash due to early if conversion with fixed CR fields

This patch adds a fix to do early if conversion to select when
conditional branch not using physical register to prevent the crash when
expanding ISEL instruction.

Reviewed By: lei, kamaub, PowerPC

Differential revision: https://reviews.llvm.org/D108302

3 years ago[libc++] Provide 'buildhost=<platform> feature for the tests.
Vladimir Vereschaka [Fri, 3 Sep 2021 19:25:16 +0000 (15:25 -0400)]
[libc++] Provide 'buildhost=<platform> feature for the tests.

The target platform could differ from the host platform for the cross
platform builds. Some tests are depended on the build host features and
they need to determine a proper platform environment.

This commit adds a build host platform name feature for the libc++ tests
in format `buildhost=<platform>`, such as `buildhost=linux`, `buildhost=darwin`,
`buildhost=windows`, etc.

The Windows host gets two features: one `buildhost=windows` and another based
on Windows "sub-system", such as `buildhost=win32`, `buildhost=cygwin`, etc.

Differential Revision: https://reviews.llvm.org/D102045

3 years ago[lldb] Add missing newline to stderr output on failed attach
David Spickett [Tue, 7 Sep 2021 15:48:35 +0000 (15:48 +0000)]
[lldb] Add missing newline to stderr output on failed attach

3 years ago[InstCombine] add tests for smear-a-set-bit; NFC
Sanjay Patel [Tue, 7 Sep 2021 14:34:15 +0000 (10:34 -0400)]
[InstCombine] add tests for smear-a-set-bit; NFC

Possible follow-ups from patterns discussed in D109155.

3 years ago[lldb] Update crashlog.py to accept multiple results from mdfind
Jonas Devlieghere [Tue, 7 Sep 2021 15:36:58 +0000 (08:36 -0700)]
[lldb] Update crashlog.py to accept multiple results from mdfind

mdfind can return multiple results, some of which are not even dSYM
bundles, but Xcode archives (.xcrachive).

Currently, we end up concatenating the paths, which is obviously bogus.
This patch not only fixes that, but now also skips paths that don't have
a Contents/Resources/DWARF subdirectory.

rdar://81270312

Differential revision: https://reviews.llvm.org/D109263

3 years ago[X86] Add missing domain to avx512_ord_cmp_sae comis sae patterns
Simon Pilgrim [Tue, 7 Sep 2021 14:54:12 +0000 (15:54 +0100)]
[X86] Add missing domain to avx512_ord_cmp_sae comis sae patterns

It doesn't appear to be possible to generate this from tests atm, but it matches what we do in sse12_ord_cmp

Fixes unused template arg identified in D109359

3 years ago[PowerPC] Guard XSRSP in P8 for FastISel
Jinsong Ji [Tue, 7 Sep 2021 15:16:36 +0000 (15:16 +0000)]
[PowerPC] Guard XSRSP in P8 for FastISel

This is exposed by enabling FastIsel on 64bit AIX.
We are generating XSRSP regardless of the arch,
which may be wrong when -mcpu=pwr7.

The fix is to guard the generation in P8 only.

Reviewed By: qiucf

Differential Revision: https://reviews.llvm.org/D109365

3 years ago[test] precommit a test for D109354
Jingu Kang [Tue, 7 Sep 2021 15:01:18 +0000 (16:01 +0100)]
[test] precommit a test for D109354

3 years agoAdd llvm-ml to LLVM_TOOLCHAIN_TOOLS (PR50536)
Hans Wennborg [Tue, 7 Sep 2021 12:34:32 +0000 (14:34 +0200)]
Add llvm-ml to LLVM_TOOLCHAIN_TOOLS (PR50536)

so that it gets installed in LLVM_INSTALL_TOOLCHAIN_ONLY builds,
such as used by the Windows installer.

Differential revision: https://reviews.llvm.org/D109358

3 years ago[Exegesis] Native clusterization: sub-partition by sched class id
Roman Lebedev [Tue, 7 Sep 2021 14:09:58 +0000 (17:09 +0300)]
[Exegesis] Native clusterization: sub-partition by sched class id

Currently native clusterization simply groups all benchmarks
by the opcode of key instruction, but that is suboptimal in certain cases,
e.g. where we can already tell that the particular instructions
already resolve into different sched classes.

3 years ago[NFC][exegesis] Add test for the following patch
Roman Lebedev [Tue, 7 Sep 2021 14:43:35 +0000 (17:43 +0300)]
[NFC][exegesis] Add test for the following patch

3 years ago[mlir] Fix GPU LaunchFunc conversion to the LLVM dialect
Alex Zinenko [Tue, 7 Sep 2021 12:28:23 +0000 (14:28 +0200)]
[mlir] Fix GPU LaunchFunc conversion to the LLVM dialect

The conversion has been incorrectly using the operands of the original
operation instead of the converted operands provided to the matchAndRewrite
call. This may lead to spurious materializations and generally invalid IR if
the producer of the original operands is deleted in the process of conversion.

Reviewed By: csigg

Differential Revision: https://reviews.llvm.org/D109356

3 years ago[AArch64][SVE] Improve extract_subvector for predicates.
Sander de Smalen [Tue, 7 Sep 2021 13:29:48 +0000 (14:29 +0100)]
[AArch64][SVE] Improve extract_subvector for predicates.

Using PUNPKLO/HI instead of ZIP1/ZIP2, because that avoids
having to generate a predicate with all lanes inactive (PFALSE).

Reviewed By: CarolineConcatto

Differential Revision: https://reviews.llvm.org/D109312

3 years ago[MC] Use local MCSubtargetInfo in writeNops
Peter Smith [Mon, 9 Aug 2021 10:40:22 +0000 (11:40 +0100)]
[MC] Use local MCSubtargetInfo in writeNops

On some architectures such as Arm and X86 the encoding for a nop may
change depending on the subtarget in operation at the time of
encoding. This change replaces the per module MCSubtargetInfo retained
by the targets AsmBackend in favour of passing through the local
MCSubtargetInfo in operation at the time.

On Arm using the architectural NOP instruction can have a performance
benefit on some implementations.

For Arm I've deleted the copy of the AsmBackend's MCSubtargetInfo to
limit the chances of this causing problems in the future. I've not
done this for other targets such as X86 as there is more frequent use
of the MCSubtargetInfo and it looks to be for stable properties that
we would not expect to vary per function.

This change required threading STI through MCNopsFragment and
MCBoundaryAlignFragment.

I've attempted to take into account the in tree experimental backends.

Differential Revision: https://reviews.llvm.org/D45962

3 years ago[MC] Add MCSubtargetInfo to MCAlignFragment
Peter Smith [Fri, 6 Aug 2021 16:42:12 +0000 (17:42 +0100)]
[MC] Add MCSubtargetInfo to MCAlignFragment

In preparation for passing the MCSubtargetInfo (STI) through to writeNops
so that it can use the STI in operation at the time, we need to record the
STI in operation when a MCAlignFragment may write nops as padding. The
STI is currently unused, a further patch will pass it through to
writeNops.

There are many places that can create an MCAlignFragment, in most cases
we can find out the STI in operation at the time. In a few places this
isn't possible as we are in initialisation or finalisation, or are
emitting constant pools. When possible I've tried to find the most
appropriate existing fragment to obtain the STI from, when none is
available use the per module STI.

For constant pools we don't actually need to use EmitCodeAlign as the
constant pools are data anyway so falling through into it via an
executable NOP is no better than falling through into data padding.

This is a prerequisite for D45962 which uses the STI to emit the
appropriate NOP for the STI. Which can differ per fragment.

Note that involves an interface change to InitSections. It is now
called initSections and requires a SubtargetInfo as a parameter.

Differential Revision: https://reviews.llvm.org/D45961

3 years ago[amdgpu] Enable selection of `s_cselect_b64`.
Michael Liao [Mon, 30 Aug 2021 05:42:18 +0000 (01:42 -0400)]
[amdgpu] Enable selection of `s_cselect_b64`.

Differential Revision: https://reviews.llvm.org/D109159

3 years ago[AMDGPU][GlobalISel] Legalize G_MUL for non-standard types
Mirko Brkusanin [Tue, 7 Sep 2021 14:25:04 +0000 (16:25 +0200)]
[AMDGPU][GlobalISel] Legalize G_MUL for non-standard types

Legalizing G_MUL for non-standard types (like i33) generated an error. Putting
minScalar and maxScalar instead of clampScalar. Also using new rule, instead
of widening to the next power of 2, widen to the next multiple of the passed
argument (32 in this case), so instead of widening i65 to i128, we widen it to
i96.

Patch by: Mateja Marjanovic

Differential Revision: https://reviews.llvm.org/D109228

3 years ago[AMDGPU][GlobalISel] Legalization of G_ROTL and G_ROTR
Mirko Brkusanin [Tue, 7 Sep 2021 14:18:19 +0000 (16:18 +0200)]
[AMDGPU][GlobalISel] Legalization of G_ROTL and G_ROTR

Add implementation for the legalization of G_ROTL and G_ROTR machine
instructions. They are very similar to funnel shift instructions, the only
difference is funnel shifts have 3 operands, whereas rotate instructions have
two operands, the first being the register that is being rotated and the second
being the number of shifts. The legalization of G_ROTL/G_ROTR is just lowering
them into funnel shift instructions if they are legal.

Patch by: Mateja Marjanovic

Differential Revision: https://reviews.llvm.org/D105347

3 years ago[X86] X86InstrSSE.td - remove unused template parameters. NFC.
Simon Pilgrim [Tue, 7 Sep 2021 14:13:05 +0000 (15:13 +0100)]
[X86] X86InstrSSE.td - remove unused template parameters. NFC.

Identified in D109359

3 years ago[X86] X86InstrVecCompiler.td - remove unused template parameters. NFC.
Simon Pilgrim [Tue, 7 Sep 2021 13:45:55 +0000 (14:45 +0100)]
[X86] X86InstrVecCompiler.td - remove unused template parameters. NFC.

Identified in D109359

3 years ago[X86] X86InstrFMA.td - remove unused template parameters. NFC.
Simon Pilgrim [Tue, 7 Sep 2021 13:45:25 +0000 (14:45 +0100)]
[X86] X86InstrFMA.td - remove unused template parameters. NFC.

Identified in D109359

3 years ago[AggressiveInstCombine] Add `AssumptionCache` to aggressive instcombine
Anton Afanasyev [Sun, 5 Sep 2021 11:00:04 +0000 (14:00 +0300)]
[AggressiveInstCombine] Add `AssumptionCache` to aggressive instcombine

Add support for @llvm.assume() to TruncInstCombine allowing
optimizations based on these intrinsics while computing known bits.

3 years ago[AggressiveInstCombine][Test] Add test for assumptions
Anton Afanasyev [Wed, 1 Sep 2021 22:00:37 +0000 (01:00 +0300)]
[AggressiveInstCombine][Test] Add test for assumptions

3 years ago[AggresiveInstCombine] Add wrapper calls for `KnownBits` computing
Anton Afanasyev [Sun, 5 Sep 2021 07:19:43 +0000 (10:19 +0300)]
[AggresiveInstCombine] Add wrapper calls for `KnownBits` computing

Precommit before `AssumptionCache` adding: reviews.llvm.org/D109141

Differential Revision: https://reviews.llvm.org/D109288

3 years ago[llvm-exegesis][x86] Limit llvm-exegesis analysis tests to x86_64 triple hosts
Simon Pilgrim [Tue, 7 Sep 2021 13:33:03 +0000 (14:33 +0100)]
[llvm-exegesis][x86] Limit llvm-exegesis analysis tests to x86_64 triple hosts

Attempting to fix an issue with test failures on arm m1 apple macintoshes reported on D109353

3 years ago[clang][Driver] Pick the last --driver-mode in case of multiple ones
Kadir Cetinkaya [Tue, 7 Sep 2021 13:15:21 +0000 (15:15 +0200)]
[clang][Driver] Pick the last --driver-mode in case of multiple ones

This was an accidental behaviour change in D106789 and this patch
restores it back to original state.

Differential Revision: https://reviews.llvm.org/D109361

3 years ago[AArch64][SVE] Implement all-inactive predicate with PFALSE.
Sander de Smalen [Tue, 7 Sep 2021 12:11:42 +0000 (13:11 +0100)]
[AArch64][SVE] Implement all-inactive predicate with PFALSE.

Instead of using a WHILE XZR, XZR instruction, just emit a PFALSE.

Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D109311

3 years ago[OpenMP] Change monotonicity of dynamic schedule
Nawrin Sultana [Tue, 31 Aug 2021 21:35:16 +0000 (16:35 -0500)]
[OpenMP] Change monotonicity of dynamic schedule

This patch changes the default monotonicity of dynamic schedule from
monotonic to non-monotonic when no modifier is specified.

Differential Revision: https://reviews.llvm.org/D109026

3 years ago[SVE][NFC] Add SVE cost model tests for gathers/scatters
David Sherwood [Wed, 1 Sep 2021 12:09:49 +0000 (13:09 +0100)]
[SVE][NFC] Add SVE cost model tests for gathers/scatters

We previously didn't have any tests to defend the cost model
for gathers and scatters using SVE without a vscale_range
attribute. I've added tests to existing files:

  Analysis/CostModel/AArch64/sve-gather.ll
  Analysis/CostModel/AArch64/sve-scatter.ll

Differential Revision: https://reviews.llvm.org/D109055

3 years ago[llvm-exegesis] Analysis tests should run even without libpfm (PR51687)
Simon Pilgrim [Tue, 7 Sep 2021 12:57:49 +0000 (13:57 +0100)]
[llvm-exegesis] Analysis tests should run even without libpfm (PR51687)

Move inverse_throughput, latency and uops to sub-directories (like we already do for lbr), which require libpfm, so we can relax the lit limits for analysis tests in the x86 root directory.

Differential Revision: https://reviews.llvm.org/D109353

3 years ago[NFC] Added test for stpcpy -> strcpy transformation with AS != 0
Dávid Bolvanský [Tue, 7 Sep 2021 12:29:59 +0000 (14:29 +0200)]
[NFC] Added test for stpcpy -> strcpy transformation with AS != 0

3 years agoMention OpenBSD in the documentation
Brad Smith [Tue, 7 Sep 2021 11:54:23 +0000 (07:54 -0400)]
Mention OpenBSD in the documentation

3 years ago[KnownBits] Add support for X*X self-multiplication
Simon Pilgrim [Tue, 7 Sep 2021 10:43:26 +0000 (11:43 +0100)]
[KnownBits] Add support for X*X self-multiplication

Add KnownBits handling and unit tests for X*X self-multiplication cases which guarantee that bit1 of their results will be zero - see PR48683.

https://alive2.llvm.org/ce/z/NN_eaR

The next step will be to add suitable test coverage so this can be enabled in ValueTracking/DAG/GlobalISel - currently only a single Analysis/ScalarEvolution test is affected.

Differential Revision: https://reviews.llvm.org/D108992

3 years ago[AMDGPU][GlobalISel] Legalize memcpy family of intrinsics
Mirko Brkusanin [Tue, 7 Sep 2021 09:30:11 +0000 (11:30 +0200)]
[AMDGPU][GlobalISel] Legalize memcpy family of intrinsics

Legalize G_MEMCPY, G_MEMMOVE, G_MEMSET and G_MEMCPY_INLINE.

Corresponding intrinsics are replaced by a loop that uses loads/stores in
AMDGPULowerIntrinsics pass unless their length is a constant lower then
MemIntrinsicExpandSizeThresholdOpt (default 1024). Any G_MEM* instruction that
reaches legalizer should have a const length argument and should be expanded
into appropriate number of loads + stores.

Differential Revision: https://reviews.llvm.org/D108357

3 years ago[RISCV][VP] Custom lower VP_STORE and VP_LOAD
Fraser Cormack [Tue, 31 Aug 2021 14:29:47 +0000 (15:29 +0100)]
[RISCV][VP] Custom lower VP_STORE and VP_LOAD

This patch adds support for the vector-predicated `VP_STORE` and
`VP_LOAD` nodes. We do this in the same way we lower `MSTORE` and
`MLOAD`: to regular load/store instructions via intrinsics.

One necessary change was made to `SelectionDAGLegalize` so that
`VP_STORE` nodes' operation actions are taken from the stored "value"
operands, in the same vein as `STORE` or `MSTORE`.

Reviewed By: craig.topper, rogfer01

Differential Revision: https://reviews.llvm.org/D108999

3 years ago[RISCV][VP] Custom lower VP_SCATTER and VP_GATHER
Fraser Cormack [Tue, 31 Aug 2021 11:43:12 +0000 (12:43 +0100)]
[RISCV][VP] Custom lower VP_SCATTER and VP_GATHER

This patch adds support for the `VP_SCATTER` and `VP_GATHER` nodes by
lowering them to RVV's `vsox`/`vlux` instructions, respectively. This
process is almost identical to the existing `MSCATTER`/`MGATHER` support.

One extra change was made to `SelectionDAGLegalize` so that
`VP_SCATTER`'s operation action is derived from its stored "value"
operand rather than its return type (which is always the chain).

Reviewed By: craig.topper, rogfer01

Differential Revision: https://reviews.llvm.org/D108987

3 years ago[exegesis][X86] ParallelSnippetGenerator: don't accidentally create serialized instru...
Roman Lebedev [Tue, 7 Sep 2021 08:47:20 +0000 (11:47 +0300)]
[exegesis][X86] ParallelSnippetGenerator: don't accidentally create serialized instructions

In the case of no tied variables, we pick random defs, and then random uses that don't alias with defs we just picked.
Sounds good, except that an X86 instruction may have implicit reg uses,
e.g. for `MULX` it's `EDX`/`RDX`: `Intel SDM, 4-162 Vol. 2B MULX — Unsigned Multiply Without Affecting Flags`
> Performs an unsigned multiplication of the implicit source operand (EDX/RDX) and the specified source operand
> (the third operand) and stores the low half of the result in the second destination (second operand), the high half
> of the result in the first destination operand (first operand), without reading or writing the arithmetic flags.

And indeed, every once in a while `llvm-exegesis` happened to pick EDX as a def while measuring throughput,
and producing garbage output:
```
$ ./bin/llvm-exegesis -num-repetitions=1000000 -mode=inverse_throughput -repetition-mode=min --loop-body-size=4096 -dump-object-to-disk=false -opcode-name=MULX32rr --max-configs-per-opcode=65536
---
mode:            inverse_throughput
key:
  instructions:
    - 'MULX32rr EDX R11D R12D'
  config:          ''
  register_initial_values:
    - 'R12D=0x0'
    - 'EDX=0x0'
cpu_name:        znver3
llvm_triple:     x86_64-unknown-linux-gnu
num_repetitions: 1000000
measurements:
  - { key: inverse_throughput, value: 4.00014, per_snippet_value: 4.00014 }
error:           ''
info:            instruction has no tied variables picking Uses different from defs
assembled_snippet: 415441BC00000000BA00000000C4C223F6D4C4C223F6D4C4C223F6D4C4C223F6D4415CC3415441BC00000000BA0000000049B80200000000000000C4C223F6D4C4C223F6D44983C0FF75F0415CC3
...
```
```
$ ./bin/llvm-exegesis -num-repetitions=1000000 -mode=inverse_throughput -repetition-mode=min --loop-body-size=4096 -dump-object-to-disk=false -opcode-name=MULX32rr --max-configs-per-opcode=65536
---
mode:            inverse_throughput
key:
  instructions:
    - 'MULX32rr R13D EDX ECX'
  config:          ''
  register_initial_values:
    - 'ECX=0x0'
    - 'EDX=0x0'
cpu_name:        znver3
llvm_triple:     x86_64-unknown-linux-gnu
num_repetitions: 1000000
measurements:
  - { key: inverse_throughput, value: 3.00013, per_snippet_value: 3.00013 }
error:           ''
info:            instruction has no tied variables picking Uses different from defs
assembled_snippet: 4155B900000000BA00000000C4626BF6E9C4626BF6E9C4626BF6E9C4626BF6E9415DC34155B900000000BA0000000049B80200000000000000C4626BF6E9C4626BF6E94983C0FF75F0415DC3
...
```
Oops! Not only does that not look fun, i did hit that pitfail during AMD Zen 3 enablement.
While i have since then addressed this in rGd4d459e7475b4bb0d15280f12ed669342fa5edcd,
i suspect there may be other buggy results lying around, so we should at least stop producing them.

Reviewed By: courbet

Differential Revision: https://reviews.llvm.org/D109275

3 years ago[OpenCL] Disallows static kernel functions in C++ for OpenCL
Justas Janickas [Thu, 2 Sep 2021 10:51:39 +0000 (11:51 +0100)]
[OpenCL] Disallows static kernel functions in C++ for OpenCL

It is disallowed in OpenCL C to declare static kernel functions and
C++ for OpenCL is expected to inherit such behaviour. Error is now
correctly reported in C++ for OpenCL when declaring a static kernel
function.

Differential Revision: https://reviews.llvm.org/D109150

3 years ago[AArch64] Avoid adding duplicate implicit operands when expanding pseudo insts.
Andrew Wei [Tue, 7 Sep 2021 09:05:39 +0000 (17:05 +0800)]
[AArch64] Avoid adding duplicate implicit operands when expanding pseudo insts.

When expanding pseudo insts, in order to create a new machine instr, we use BuildMI,
which will add implicit operands by default. And transferImpOps will also copy implicit
operands from old ones. Finally, duplicate implicit operands are added to the same inst.
Sometimes this can cause correctness issues. Like below inst,
    renamable $w18 = nsw SUBSWrr renamable $w30, renamable $w14, implicit-def dead $nzcv
After expanding, it will become
    $w18 = SUBSWrs renamable $w13, renamable $w14, 0, implicit-def $nzcv, implicit-def dead $nzcv
A redundant implicit-def $nzcv is added, but the dead flag is missing.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D109069

3 years ago[SelectionDAG][VP] Fix MemSDNode::getBasePtr
Fraser Cormack [Mon, 6 Sep 2021 09:23:56 +0000 (10:23 +0100)]
[SelectionDAG][VP] Fix MemSDNode::getBasePtr

Found while working on D108987. When interpreting VP nodes as
`MemSDNode` nodes, this function would return the incorrect indices.
This was due to `VP_GATHER` and having no "passthru", and both
`VP_GATHER` and `VP_SCATTER` having their mask operands *after* the base
pointer, unlike `MGATHER` and `MSCATTER`.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D109308

3 years ago[RuntimeDyld] Don't use bitwise operation on SymbolRef::Type
luxufan [Mon, 6 Sep 2021 02:48:56 +0000 (10:48 +0800)]
[RuntimeDyld] Don't use bitwise operation on SymbolRef::Type

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D109292

3 years agoMention OpenBSD in the documentation
Brad Smith [Tue, 7 Sep 2021 08:38:52 +0000 (04:38 -0400)]
Mention OpenBSD in the documentation

3 years ago[compiler-rt] Document that builtins is known to work on OpenBSD.
Frederic Cambus [Tue, 7 Sep 2021 08:25:12 +0000 (04:25 -0400)]
[compiler-rt] Document that builtins is known to work on OpenBSD.

Differential Revision: https://reviews.llvm.org/D109346

3 years ago[ARM] Implement target hook function to decide folding (mul (add x, c1), c2)
Ben Shi [Tue, 7 Sep 2021 02:21:38 +0000 (10:21 +0800)]
[ARM] Implement target hook function to decide folding (mul (add x, c1), c2)

Prevent the folding in DAGCombine if it leads to worse code.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D109124

3 years ago[ARM][test] Add new tests for (mul (add r, c0), c1)
Ben Shi [Wed, 1 Sep 2021 13:19:22 +0000 (21:19 +0800)]
[ARM][test] Add new tests for (mul (add r, c0), c1)

Reviewed By: RKSimon, dmgreen

Differential Revision: https://reviews.llvm.org/D109123

3 years ago[llvm-exegesis] Add unit test in preparation for DD109275
Clement Courbet [Tue, 7 Sep 2021 07:06:18 +0000 (09:06 +0200)]
[llvm-exegesis] Add unit test in preparation for DD109275

3 years ago[clangd] Omit default template arguments from type hints
Nathan Ridge [Tue, 31 Aug 2021 08:34:09 +0000 (04:34 -0400)]
[clangd] Omit default template arguments from type hints

Differential Revision: https://reviews.llvm.org/D108975

3 years ago[clangd] Omit type hints that are too long
Nathan Ridge [Tue, 31 Aug 2021 07:42:16 +0000 (03:42 -0400)]
[clangd] Omit type hints that are too long

Differential Revision: https://reviews.llvm.org/D108972

3 years ago[OpenMP][libomptarget] Change device vector elements to unique_ptr type
Ye Luo [Sat, 4 Sep 2021 19:07:41 +0000 (14:07 -0500)]
[OpenMP][libomptarget] Change device vector elements to unique_ptr type

Using std::vector<DeviceTy> requires implementing copy constructor and copied assign operator for DeviceTy.
Indeed DeviceTy should never be copied. After changing to std::vector<std::unique_ptr<DeviceTy>>,
All the unsafe copy constructor and copy assign operator implementations can be removed.
Compilers mark them deleted due to mutex or underlying objects and this is the desired behavior.

Differential Revision: https://reviews.llvm.org/D109276

3 years ago[clang] Add '-ast-dump-filter=' support
oToToT [Tue, 7 Sep 2021 02:39:01 +0000 (10:39 +0800)]
[clang] Add '-ast-dump-filter=' support

Before this patch, we only support syntax like
`clang -cc1 -ast-dump -ast-dump-filter main a.c`
or
`clang -Xclang -ast-dump -Xclang -ast-dump-filter -Xclang main a.c`
when using ast-dump-filter.

It is helpful to also support `-ast-dump-filter=` syntax, so we can do
something like
`clang -cc1 -ast-dump -ast-dump-filter=main a.c`
or
`clang -Xclang -ast-dump -Xclang -ast-dump-filter=main a.c`

It is more cleaner when passing arguments through `-Xclang` in this case.

Also, **clang-check** do support this syntax, and I think people might
be confiused when they found they can't use `ast-dump-filter` with
clang.

3 years ago[OpenMP][libomptarget] Change synchronize_ty return type to int32_t
Ye Luo [Tue, 7 Sep 2021 02:27:12 +0000 (21:27 -0500)]
[OpenMP][libomptarget] Change synchronize_ty return type to int32_t

Plugins always return int32_t. Stay consistent with other functions which return error status.

Differential Revision: https://reviews.llvm.org/D109341

3 years ago[RuntimeDyld] Guard UsedTLSStorage to x86 ELF only
Jinsong Ji [Tue, 7 Sep 2021 01:20:35 +0000 (01:20 +0000)]
[RuntimeDyld] Guard UsedTLSStorage to x86 ELF only

UsedTLSStorage is only used in allocateTLSSection,
guarded in x87 ELF only.
So clang will emit error with -Werror on.

.../llvm/tools/llvm-rtdyld/llvm-rtdyld.cpp:288:12:
error: private field 'UsedTLSStorage' is not used
[-Werror,-Wunused-private-field]
  unsigned UsedTLSStorage = 0;
           ^