platform/kernel/linux-starfive.git
4 years agomt76: mt7615: wake device before pushing frames in mt7615_tx
Lorenzo Bianconi [Fri, 3 Jul 2020 08:15:54 +0000 (10:15 +0200)]
mt76: mt7615: wake device before pushing frames in mt7615_tx

Queue frames pushed by mac80211 running mt7615_tx if the device is
low-power state. Run wake workqueue in order to swicth to full-power
before transmitting pending frames

Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt7615: wake device before pulling packets from mac80211 queues
Lorenzo Bianconi [Fri, 3 Jul 2020 08:15:53 +0000 (10:15 +0200)]
mt76: mt7615: wake device before pulling packets from mac80211 queues

Make sure the device is in full-power before pulling frames from
mac80211 queues

Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt7615: run mt7615_mcu_set_roc holding mt76 mutex
Lorenzo Bianconi [Fri, 3 Jul 2020 08:15:52 +0000 (10:15 +0200)]
mt76: mt7615: run mt7615_mcu_set_roc holding mt76 mutex

Make sure to run mt7615_mcu_set_roc() holding mt76 mutex in order to
wake the device from low power state and avoid races

Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt7615: run mt7615_mcu_set_wmm holding mt76 mutex
Lorenzo Bianconi [Fri, 3 Jul 2020 08:15:51 +0000 (10:15 +0200)]
mt76: mt7615: run mt7615_mcu_set_wmm holding mt76 mutex

Make sure to run mt7615_mcu_set_wmm() holding mt76 mutex in order to
wake the device from low power state and avoid races

Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt7615: add missing lock in mt7615_regd_notifier
Lorenzo Bianconi [Fri, 3 Jul 2020 08:15:50 +0000 (10:15 +0200)]
mt76: mt7615: add missing lock in mt7615_regd_notifier

Make sure to run mt7615_dfs_init_radar_detector in mt7615_regd_notifier
holding mt76 mutex in order to avoid races and set the device in full
power

Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt7615: wake device before performing freq scan
Lorenzo Bianconi [Fri, 3 Jul 2020 08:15:49 +0000 (10:15 +0200)]
mt76: mt7615: wake device before performing freq scan

Set device in full power before performing hw scan or hw scheduled scan

Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt7615: acquire driver_own before configuring device for suspend
Lorenzo Bianconi [Fri, 3 Jul 2020 08:15:48 +0000 (10:15 +0200)]
mt76: mt7615: acquire driver_own before configuring device for suspend

Make sure to wake the device in mt7615_pci_suspend in order to properly
configure device registers before suspend

Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt7615: wake device in mt7615_update_channel before access regmap
Lorenzo Bianconi [Fri, 3 Jul 2020 08:15:47 +0000 (10:15 +0200)]
mt76: mt7615: wake device in mt7615_update_channel before access regmap

Introduce mt7615_update_survey utility routine in order to compute
survey stats without waking up the device since it runs holding mt76 lock.
Run mt7615_pm_wake directly in mt7615_update_channel since it can run
with mt76.mutex held if called by mac80211

Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt7615: introduce pm_power_save delayed work
Lorenzo Bianconi [Fri, 3 Jul 2020 08:15:46 +0000 (10:15 +0200)]
mt76: mt7615: introduce pm_power_save delayed work

Introduce runtime-pm power_save delayed work used to enable
low-power after an inactivity period

Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt7615: wake device before configuring hw keys
Lorenzo Bianconi [Fri, 3 Jul 2020 08:15:45 +0000 (10:15 +0200)]
mt76: mt7615: wake device before configuring hw keys

Make sure the device is in full-power before uploading keys to the hw

Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt7615: wake device before accessing regmap in debugfs
Lorenzo Bianconi [Fri, 3 Jul 2020 08:15:44 +0000 (10:15 +0200)]
mt76: mt7615: wake device before accessing regmap in debugfs

Make sure the device is in full-power before reading regs in debugfs

Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt7615: introduce mt7615_mutex_{acquire,release} utilities
Lorenzo Bianconi [Fri, 3 Jul 2020 08:15:43 +0000 (10:15 +0200)]
mt76: mt7615: introduce mt7615_mutex_{acquire,release} utilities

Introduce mt7615_mutex_{acquire,release} utility routines in order to
switch in full-power/low-power before/after accessing device register-map

Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt7615: add mt7615_pm_wake utility routine
Lorenzo Bianconi [Fri, 3 Jul 2020 08:15:42 +0000 (10:15 +0200)]
mt76: mt7615: add mt7615_pm_wake utility routine

Introduce mt7615_pm_wake utility routine to wake the device from
runtime low-power state (lower-power state is currently supported by
offload firmware for pcie devices).

Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: move mt76 workqueue in common code
Lorenzo Bianconi [Fri, 3 Jul 2020 08:15:41 +0000 (10:15 +0200)]
mt76: move mt76 workqueue in common code

Move mt76 workqueue from usb to common code in order to be reused adding
low-power support for mt7663 chipset

Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt7615: avoid polling in fw_own for mt7663
Lorenzo Bianconi [Fri, 3 Jul 2020 08:15:40 +0000 (10:15 +0200)]
mt76: mt7615: avoid polling in fw_own for mt7663

According to the vendor sdk, mt7663 does not need to poll register after
firmware own. Since just mt7622 polls status register, set proper
timeout value according to the vendor sdk

Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt7915: avoid memcpy in rxv operation
Ryder Lee [Wed, 1 Jul 2020 08:13:07 +0000 (16:13 +0800)]
mt76: mt7915: avoid memcpy in rxv operation

Avoid memcpy in Rx hot path to slightly improve performance.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt76x2u: enable HC-M7662BU1
Lorenzo Bianconi [Mon, 29 Jun 2020 17:05:33 +0000 (19:05 +0200)]
mt76: mt76x2u: enable HC-M7662BU1

Enable support for HC-M7662BU1 module on mt76x2u driver

Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt76x2: fix pci suspend/resume on mt7612e
Lorenzo Bianconi [Mon, 29 Jun 2020 15:12:16 +0000 (17:12 +0200)]
mt76: mt76x2: fix pci suspend/resume on mt7612e

Fix the following mt7612e hw hangs during suspend/resume reported on
Dell Vostro 3360

mt76x2e 0000:01:00.0: MCU message 2 (seq 11) timed out
mt76x2e 0000:01:00.0: MCU message 30 (seq 12) timed out
mt76x2e 0000:01:00.0: MCU message 30 (seq 13) timed out
mt76x2e 0000:01:00.0: Firmware Version: 0.0.00
mt76x2e 0000:01:00.0: Build: 1
mt76x2e 0000:01:00.0: Build Time: 201507311614____
mt76x2e 0000:01:00.0: Firmware running!
ieee80211 phy0: Hardware restart was requested
mt76x2e 0000:01:00.0: MCU message 2 (seq 1) timed out
mt76x2e 0000:01:00.0: MCU message 30 (seq 2) timed out
mt76x2e 0000:01:00.0: MCU message 30 (seq 3) timed out
mt76x2e 0000:01:00.0: Firmware Version: 0.0.00
mt76x2e 0000:01:00.0: Build: 1
mt76x2e 0000:01:00.0: Build Time: 201507311614____
mt76x2e 0000:01:00.0: Firmware running!
ieee80211 phy0: Hardware restart was requested
mt76x2e 0000:01:00.0: MCU message 31 (seq 5) timed out
mt76x2e 0000:01:00.0: MCU message 31 (seq 6) timed out
mt76x2e 0000:01:00.0: MCU message 31 (seq 7) timed out
mt76x2e 0000:01:00.0: MCU message 31 (seq 8) timed out
mt76x2e 0000:01:00.0: MCU message 31 (seq 9) timed out
mt76x2e 0000:01:00.0: MCU message 31 (seq 10) timed out
mt76x2e 0000:01:00.0: MCU message 31 (seq 11) timed out
mt76x2e 0000:01:00.0: Firmware Version: 0.0.00
mt76x2e 0000:01:00.0: Build: 1
mt76x2e 0000:01:00.0: Build Time: 201507311614____
mt76x2e 0000:01:00.0: Firmware running!
ieee80211 phy0: Hardware restart was requested
------------[ cut here ]-----------
CPU: 3 PID: 11956 Comm: kworker/3:1 Not tainted 5.7.0-pf2 #1
Hardware name: Dell Inc.          Vostro 3360/0F5DWF, BIOS A18 09/25/2013
Workqueue: events_freezable ieee80211_restart_work [mac80211]
RIP: 0010:ieee80211_reconfig+0x234/0x1700 [mac80211]
RSP: 0018:ffffb803c23ffdf0 EFLAGS: 00010286
RAX: 00000000fffffff0 RBX: ffff9595a7564900 RCX: 0000000000000008
RDX: 0000000000000000 RSI: 0000000000000100 RDI: 0000000000000100
RBP: ffff9595a7ec07e0 R08: 0000000000000000 R09: 0000000000000001
R10: 0000000000000001 R11: 0000000000000000 R12: ffff9595a7ec18d0
R13: 00000000ffffffff R14: 0000000000000000 R15: 00000000fffffff0
FS:  0000000000000000(0000) GS:ffff9595af2c0000(0000) knlGS:0000000000000000
CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
CR2: 000055e56d7de000 CR3: 000000042200a001 CR4: 00000000001706e0
Call Trace:
 ieee80211_restart_work+0xb7/0xe0 [mac80211]
 process_one_work+0x1d4/0x3c0
 worker_thread+0x228/0x470
 ? process_one_work+0x3c0/0x3c0
 kthread+0x19c/0x1c0
 ? __kthread_init_worker+0x30/0x30
 ret_from_fork+0x35/0x40
wlp1s0:  Failed check-sdata-in-driver check, flags: 0x0
CPU: 3 PID: 11956 Comm: kworker/3:1 Tainted: G        W         5.7.0-pf2 #1
Hardware name: Dell Inc.          Vostro 3360/0F5DWF, BIOS A18 09/25/2013
Workqueue: events_freezable ieee80211_restart_work [mac80211]
RIP: 0010:drv_remove_interface+0x11f/0x130 [mac80211]
RSP: 0018:ffffb803c23ffc80 EFLAGS: 00010282
RAX: 0000000000000000 RBX: ffff9595a7564900 RCX: 0000000000000000
RDX: 0000000000000001 RSI: 0000000000000082 RDI: 00000000ffffffff
RBP: ffff9595a7ec1930 R08: 00000000000004b6 R09: 0000000000000001
R10: 0000000000000001 R11: 0000000000006f08 R12: ffff9595a7ec1000
R13: ffff9595a75654b8 R14: ffff9595a7ec0ca0 R15: ffff9595a7ec07e0
FS:  0000000000000000(0000) GS:ffff9595af2c0000(0000) knlGS:0000000000000000
CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
CR2: 000055e56d7de000 CR3: 000000042200a001 CR4: 00000000001706e0
Call Trace:
 ieee80211_do_stop+0x5af/0x8c0 [mac80211]
 ieee80211_stop+0x16/0x20 [mac80211]
 __dev_close_many+0xaa/0x120
 dev_close_many+0xa1/0x2b0
 dev_close+0x6d/0x90
 cfg80211_shutdown_all_interfaces+0x71/0xd0 [cfg80211]
 ieee80211_reconfig+0xa2/0x1700 [mac80211]
 ieee80211_restart_work+0xb7/0xe0 [mac80211]
 process_one_work+0x1d4/0x3c0
 worker_thread+0x228/0x470
 ? process_one_work+0x3c0/0x3c0
 kthread+0x19c/0x1c0
 ? __kthread_init_worker+0x30/0x30
 ret_from_fork+0x35/0x40

Fixes: 7bc04215a66b ("mt76: add driver code for MT76x2e")
Tested-by: Oleksandr Natalenko <oleksandr@redhat.com>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt7915: update HE capabilities
Ryder Lee [Wed, 24 Jun 2020 17:23:17 +0000 (01:23 +0800)]
mt76: mt7915: update HE capabilities

Sync from SDK to update HE capabilities.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt7615: implement testmode support
Felix Fietkau [Thu, 18 Jun 2020 19:14:43 +0000 (21:14 +0200)]
mt76: mt7615: implement testmode support

Supports sending a configurable number of packets with a specific rate
and configurable tx power levels / antenna settings, as well as displaying
rx statistics.

Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: add API for testmode support
Felix Fietkau [Thu, 18 Jun 2020 19:12:24 +0000 (21:12 +0200)]
mt76: add API for testmode support

This can be used for calibration in the manufacturing process.
It supports sending a configurable number of packets with a specific rate
and configurable tx power levels / antenna settings.
It also supports receiving packets and showing some statistics, including
packet counters and detailed RSSI information.
It will only be compiled in if CONFIG_NL80211_TESTMODE is enabled

Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: vif_mask to struct mt76_phy
Felix Fietkau [Thu, 11 Jun 2020 15:45:58 +0000 (17:45 +0200)]
mt76: vif_mask to struct mt76_phy

All drivers use this in pretty much the same way. Moving it to core helps with
some checks for the upcoming testmode support

Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt7615: use full on-chip memory address for WF_PHY registers
Felix Fietkau [Thu, 18 Jun 2020 18:38:45 +0000 (20:38 +0200)]
mt76: mt7615: use full on-chip memory address for WF_PHY registers

Now that the bus access functions can use mapping for accessing full
register addresses, use it for WF_PHY registers to keep them constant.
Needed for follow-up work on testmode support

Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt7615: add support for accessing RF registers via MCU
Felix Fietkau [Thu, 18 Jun 2020 18:33:32 +0000 (20:33 +0200)]
mt76: mt7615: add support for accessing RF registers via MCU

Includes debugfs files for testing it.
Will be used for testmode support.

Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt7615: add support for accessing mapped registers via bus ops
Felix Fietkau [Wed, 17 Jun 2020 18:44:23 +0000 (20:44 +0200)]
mt76: mt7615: add support for accessing mapped registers via bus ops

Makes it possible to read/write them via debugfs, similar to mt7603

Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt7615: schedule tx tasklet and sta poll on mac tx free
Felix Fietkau [Wed, 17 Jun 2020 13:21:39 +0000 (15:21 +0200)]
mt76: mt7615: schedule tx tasklet and sta poll on mac tx free

Unlike on earlier chips, DMA completion on MT7615 does not imply actually
having sent out any packets.
Since AQL will prevent filling the hardware queues and will only allow more
packets to be passed to the driver after tx completion, it makes much more
sense to schedule the tx tasklet there.
This is also needed for scheduling tx in testmode support

Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt76x2e: rename routines in pci.c
Lorenzo Bianconi [Thu, 18 Jun 2020 17:00:23 +0000 (19:00 +0200)]
mt76: mt76x2e: rename routines in pci.c

Rely on mt76x2e prefix in mt76x2/pci.c and align to the rest of
mt76 code

Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt7915: overwrite qid for non-bufferable mgmt frames
Ryder Lee [Mon, 22 Jun 2020 02:16:55 +0000 (10:16 +0800)]
mt76: mt7915: overwrite qid for non-bufferable mgmt frames

Overwrite hw queue id for non-bufferable management frames if the hw/fw
support always txq (altxq) in order to be in sync with mac txwi code

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt7915: use ieee80211_tx_queue_params to avoid open coded
Ryder Lee [Sun, 14 Jun 2020 18:23:36 +0000 (02:23 +0800)]
mt76: mt7915: use ieee80211_tx_queue_params to avoid open coded

This is easy to add MU EDCA parameters in the future. This patch
also fixes a wrong cw_min assignment.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt7915: add MU-MIMO support
Ryder Lee [Sun, 14 Jun 2020 18:23:35 +0000 (02:23 +0800)]
mt76: mt7915: add MU-MIMO support

Enable MU-MIMO DL/UL and add relative counters in debugfs.

Currently MU modules read WTBL first to notify BA changes to
other cross modules, so adjust mt7915_mcu_sta_ba() accordingly.

Tested-by: Evelyn Tsai <evelyn.tsai@mediatek.com>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt7915: add a fixed AC queue mapping
Ryder Lee [Sun, 14 Jun 2020 18:23:34 +0000 (02:23 +0800)]
mt76: mt7915: add a fixed AC queue mapping

In MT7915, hardware queue map is flexible. However, certain firmware modules
like MU and U-APSD presume a fixed queue order to adapt some devices that have
DMA scheduler with a strict order, so this patch can help in the long run.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt7615: add .set_tsf callback
Ryder Lee [Thu, 18 Jun 2020 04:41:48 +0000 (12:41 +0800)]
mt76: mt7615: add .set_tsf callback

It is useful for IBSS Mesh to adjust t_clockdrift.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: add U-APSD support on AP side
Lorenzo Bianconi [Fri, 12 Jun 2020 11:46:31 +0000 (13:46 +0200)]
mt76: add U-APSD support on AP side

Introduce U-APSD support in mt76 driver for AP interface

Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: rely on register macros
Lorenzo Bianconi [Fri, 12 Jun 2020 10:08:59 +0000 (12:08 +0200)]
mt76: rely on register macros

For consistency with the rest of the code always rely on defined
macros for register access

Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: fix include in pci.h
Markus Theil [Fri, 12 Jun 2020 08:05:23 +0000 (10:05 +0200)]
mt76: fix include in pci.h

kernel test robot <lkp@intel.com> found the following issue
and Kalle Valo forwarded it to Linux wireless.

drivers/net/wireless/mediatek/mt76/pci.c:8:6:
warning: no previous prototype for 'mt76_pci_disable_aspm'

Fix this by adding the missing include of mt76.h as Kalle
suggested.

Signed-off-by: Markus Theil <markus.theil@tu-ilmenau.de>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: allow more channels, allowed in ETSI domain
Markus Theil [Thu, 11 Jun 2020 12:40:22 +0000 (14:40 +0200)]
mt76: allow more channels, allowed in ETSI domain

While looking at the ETSI regulatory domain definitions
and a patch, which allows more channels for ath10k, I also
checked the channels allowed for mt76.

ETSI regulations would possibly allow to add channels 32, 68,
96, 144, 169 and 173. IEEE 802.11-2016 defines no operating class
for channels 32, 68 and 96. This leaves us channels 144, 169 and 173,
which are included in this patch.

I tested 169 and 173 with a mt76 based USB dongle (AVM AC 860) and they
worked fine. If I saw that right, these channels are also covered by
register definitions inside the driver.

Channel 144 should also work, but gets disabled by the kernel as of now.

Signed-off-by: Markus Theil <markus.theil@tu-ilmenau.de>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt7615: fix up typo in Kconfig for MT7663U
Sean Wang [Tue, 9 Jun 2020 15:42:21 +0000 (23:42 +0800)]
mt76: mt7615: fix up typo in Kconfig for MT7663U

Fix up typo in Kconfig with indicating MT7663U is an 802.11ac device

Fixes: eb99cc95c3b6 ("mt76: mt7615: introduce mt7663u support")
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt7663: introduce ARP filter offload
Sean Wang [Sun, 7 Jun 2020 09:34:40 +0000 (11:34 +0200)]
mt76: mt7663: introduce ARP filter offload

Introduce ARP filter offload

Co-developed-by: Wan-Feng Jiang <Wan-Feng.Jiang@mediatek.com>
Signed-off-by: Wan-Feng Jiang <Wan-Feng.Jiang@mediatek.com>
Co-developed-by: Soul Huang <Soul.Huang@mediatek.com>
Signed-off-by: Soul Huang <Soul.Huang@mediatek.com>
Co-developed-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: usb: rely on mt76_for_each_q_rx
Lorenzo Bianconi [Sat, 30 May 2020 21:48:56 +0000 (23:48 +0200)]
mt76: usb: rely on mt76_for_each_q_rx

Rely on mt76_for_each_q_rx whenever possible in order to simply the code

Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt7615: re-enable offloading of sequence number assignment
Felix Fietkau [Sat, 30 May 2020 15:19:45 +0000 (17:19 +0200)]
mt76: mt7615: re-enable offloading of sequence number assignment

Preparation for supporting more offload features

Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: overwrite qid for non-bufferable mgmt frames
Lorenzo Bianconi [Mon, 1 Jun 2020 07:45:33 +0000 (09:45 +0200)]
mt76: overwrite qid for non-bufferable mgmt frames

Overwrite hw queue id for non-bufferable management frames if the hw
support always txq (altxq) in order to be in sync with mac txwi code

Fixes: cdad4874057d ("mt76: mt7615: add dma and tx queue initialization for MT7622")
Fixes: f40ac0f3d3c0 ("mt76: mt7615: introduce mt7663e support")
Suggested-by: Felix Fietkau <nbd@nbd.name>
Tested-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt7615: fix hw queue mapping
Lorenzo Bianconi [Sat, 30 May 2020 22:32:04 +0000 (00:32 +0200)]
mt76: mt7615: fix hw queue mapping

mt7622/mt7663 chipsets rely on a fixed reverse queue map order respect
to mac80211 one:
- q(0): IEEE80211_AC_BK
- q(1): IEEE80211_AC_BE
- q(2): IEEE80211_AC_VI
- q(3): IEEE80211_AC_VO

Fixes: cdad4874057d ("mt76: mt7615: add dma and tx queue initialization for MT7622")
Fixes: f40ac0f3d3c0 ("mt76: mt7615: introduce mt7663e support")
Co-developed-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Co-developed-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: mt7615: fix lmac queue debugsfs entry
Lorenzo Bianconi [Sat, 30 May 2020 21:51:27 +0000 (23:51 +0200)]
mt76: mt7615: fix lmac queue debugsfs entry

acs and wmm index are swapped in mt7615_queues_acq respect to the hw
design

Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agomt76: add missing lock configuring coverage class
Lorenzo Bianconi [Tue, 2 Jun 2020 20:26:38 +0000 (22:26 +0200)]
mt76: add missing lock configuring coverage class

Coverage class callback can potentially run in parallel with other
routines (e.g. mt7615_set_channel) that configures timing registers.
Run coverage class callback holding mt76 mutex

Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
4 years agonet: dsa: use the ETH_MIN_MTU and ETH_DATA_LEN default values
Vladimir Oltean [Sat, 18 Jul 2020 18:04:18 +0000 (21:04 +0300)]
net: dsa: use the ETH_MIN_MTU and ETH_DATA_LEN default values

Now that DSA supports MTU configuration, undo the effects of commit
8b1efc0f83f1 ("net: remove MTU limits on a few ether_setup callers") and
let DSA interfaces use the default min_mtu and max_mtu specified by
ether_setup(). This is more important for min_mtu: since DSA is
Ethernet, the minimum MTU is the same as of any other Ethernet
interface, and definitely not zero. For the max_mtu, we have a callback
through which drivers can override that, if they want to.

Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: dsa: qca8k: implement the port MTU callbacks
Jonathan McDowell [Sat, 18 Jul 2020 16:32:14 +0000 (17:32 +0100)]
net: dsa: qca8k: implement the port MTU callbacks

This switch has a single max frame size configuration register, so we
track the requested MTU for each port and apply the largest.

v2:
- Address review feedback from Vladimir Oltean

Signed-off-by: Jonathan McDowell <noodles@earth.li>
Acked-by: Vladimir Oltean <olteanv@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: hsr: remove redundant null check
Wang Hai [Sat, 18 Jul 2020 12:53:38 +0000 (20:53 +0800)]
net: hsr: remove redundant null check

Because kfree_skb already checked NULL skb parameter,
so the additional checks are unnecessary, just remove them.

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Wang Hai <wanghai38@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet/fealnx: switch from 'pci_' to 'dma_' API
Christophe JAILLET [Sat, 18 Jul 2020 11:03:38 +0000 (13:03 +0200)]
net/fealnx: switch from 'pci_' to 'dma_' API

The wrappers in include/linux/pci-dma-compat.h should go away.

The patch has been generated with the coccinelle script below and has been
hand modified to replace GFP_ with a correct flag.
It has been compile tested.

When memory is allocated, GFP_KERNEL can be used because it is called from
the probe function (i.e. 'fealnx_init_one()') and no lock is taken.

@@
@@
-    PCI_DMA_BIDIRECTIONAL
+    DMA_BIDIRECTIONAL

@@
@@
-    PCI_DMA_TODEVICE
+    DMA_TO_DEVICE

@@
@@
-    PCI_DMA_FROMDEVICE
+    DMA_FROM_DEVICE

@@
@@
-    PCI_DMA_NONE
+    DMA_NONE

@@
expression e1, e2, e3;
@@
-    pci_alloc_consistent(e1, e2, e3)
+    dma_alloc_coherent(&e1->dev, e2, e3, GFP_)

@@
expression e1, e2, e3;
@@
-    pci_zalloc_consistent(e1, e2, e3)
+    dma_alloc_coherent(&e1->dev, e2, e3, GFP_)

@@
expression e1, e2, e3, e4;
@@
-    pci_free_consistent(e1, e2, e3, e4)
+    dma_free_coherent(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_map_single(e1, e2, e3, e4)
+    dma_map_single(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_unmap_single(e1, e2, e3, e4)
+    dma_unmap_single(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4, e5;
@@
-    pci_map_page(e1, e2, e3, e4, e5)
+    dma_map_page(&e1->dev, e2, e3, e4, e5)

@@
expression e1, e2, e3, e4;
@@
-    pci_unmap_page(e1, e2, e3, e4)
+    dma_unmap_page(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_map_sg(e1, e2, e3, e4)
+    dma_map_sg(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_unmap_sg(e1, e2, e3, e4)
+    dma_unmap_sg(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_single_for_cpu(e1, e2, e3, e4)
+    dma_sync_single_for_cpu(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_single_for_device(e1, e2, e3, e4)
+    dma_sync_single_for_device(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_sg_for_cpu(e1, e2, e3, e4)
+    dma_sync_sg_for_cpu(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_sg_for_device(e1, e2, e3, e4)
+    dma_sync_sg_for_device(&e1->dev, e2, e3, e4)

@@
expression e1, e2;
@@
-    pci_dma_mapping_error(e1, e2)
+    dma_mapping_error(&e1->dev, e2)

@@
expression e1, e2;
@@
-    pci_set_dma_mask(e1, e2)
+    dma_set_mask(&e1->dev, e2)

@@
expression e1, e2;
@@
-    pci_set_consistent_dma_mask(e1, e2)
+    dma_set_coherent_mask(&e1->dev, e2)

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agomISDN: switch from 'pci_' to 'dma_' API
Christophe JAILLET [Sat, 18 Jul 2020 10:30:33 +0000 (12:30 +0200)]
mISDN: switch from 'pci_' to 'dma_' API

The wrappers in include/linux/pci-dma-compat.h should go away.

The patch has been generated with the coccinelle script below and has been
hand modified to replace GFP_ with a correct flag.
It has been compile tested.

When memory is allocated in 'setup_hw()' (hfcpci.c) GFP_KERNEL can be used
because it is called from the probe function and no lock is taken.
The call chain is:
   hfc_probe()
   --> setup_card()
   --> setup_hw()

When memory is allocated in 'inittiger()' (netjet.c) GFP_ATOMIC must be
used because a spin_lock is taken by the caller (i.e. 'nj_init_card()')
This is also consistent with the other allocations done in the function.

@@
@@
-    PCI_DMA_BIDIRECTIONAL
+    DMA_BIDIRECTIONAL

@@
@@
-    PCI_DMA_TODEVICE
+    DMA_TO_DEVICE

@@
@@
-    PCI_DMA_FROMDEVICE
+    DMA_FROM_DEVICE

@@
@@
-    PCI_DMA_NONE
+    DMA_NONE

@@
expression e1, e2, e3;
@@
-    pci_alloc_consistent(e1, e2, e3)
+    dma_alloc_coherent(&e1->dev, e2, e3, GFP_)

@@
expression e1, e2, e3;
@@
-    pci_zalloc_consistent(e1, e2, e3)
+    dma_alloc_coherent(&e1->dev, e2, e3, GFP_)

@@
expression e1, e2, e3, e4;
@@
-    pci_free_consistent(e1, e2, e3, e4)
+    dma_free_coherent(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_map_single(e1, e2, e3, e4)
+    dma_map_single(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_unmap_single(e1, e2, e3, e4)
+    dma_unmap_single(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4, e5;
@@
-    pci_map_page(e1, e2, e3, e4, e5)
+    dma_map_page(&e1->dev, e2, e3, e4, e5)

@@
expression e1, e2, e3, e4;
@@
-    pci_unmap_page(e1, e2, e3, e4)
+    dma_unmap_page(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_map_sg(e1, e2, e3, e4)
+    dma_map_sg(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_unmap_sg(e1, e2, e3, e4)
+    dma_unmap_sg(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_single_for_cpu(e1, e2, e3, e4)
+    dma_sync_single_for_cpu(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_single_for_device(e1, e2, e3, e4)
+    dma_sync_single_for_device(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_sg_for_cpu(e1, e2, e3, e4)
+    dma_sync_sg_for_cpu(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_sg_for_device(e1, e2, e3, e4)
+    dma_sync_sg_for_device(&e1->dev, e2, e3, e4)

@@
expression e1, e2;
@@
-    pci_dma_mapping_error(e1, e2)
+    dma_mapping_error(&e1->dev, e2)

@@
expression e1, e2;
@@
-    pci_set_dma_mask(e1, e2)
+    dma_set_mask(&e1->dev, e2)

@@
expression e1, e2;
@@
-    pci_set_consistent_dma_mask(e1, e2)
+    dma_set_coherent_mask(&e1->dev, e2)

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agotc-testing: Add tdc to kselftests
Briana Oursler [Fri, 17 Jul 2020 21:54:39 +0000 (14:54 -0700)]
tc-testing: Add tdc to kselftests

Add tdc to existing kselftest infrastructure so that it can be run with
existing kselftests. TDC now generates objects in objdir/kselftest
without cluttering main objdir, leaves source directory clean, and
installs correctly in kselftest_install, properly adding itself to
run_kselftest.sh script.

Add tc-testing as a target of selftests/Makefile. Create tdc.sh to run
tdc.py targets with correct arguments. To support single target from
selftest/Makefile, combine tc-testing/bpf/Makefile and
tc-testing/Makefile. Move action.c up a directory to tc-testing/.

Tested with:
 make O=/tmp/{objdir} TARGETS="tc-testing" kselftest
 cd /tmp/{objdir}
 cd kselftest
 cd tc-testing
 ./tdc.sh

 make -C tools/testing/selftests/ TARGETS=tc-testing run_tests

 make TARGETS="tc-testing" kselftest
 cd tools/testing/selftests
 ./kselftest_install.sh /tmp/exampledir
 My VM doesn't run all the kselftests so I commented out all except my
 target and net/pmtu.sh then:
 cd /tmp/exampledir && ./run_kselftest.sh

Co-developed-by: Davide Caratti <dcaratti@redhat.com>
Signed-off-by: Davide Caratti <dcaratti@redhat.com>
Signed-off-by: Briana Oursler <briana.oursler@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agocrypto/chtls: Enable tcp window scaling option
Vinay Kumar Yadav [Fri, 17 Jul 2020 19:16:40 +0000 (00:46 +0530)]
crypto/chtls: Enable tcp window scaling option

Enable tcp window scaling option in hw based on sysctl settings
and option in connection request.

v1->v2:
- Set window scale option based on option in connection request.

Signed-off-by: Vinay Kumar Yadav <vinay.yadav@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoMerge branch 'net-atlantic-various-features'
David S. Miller [Tue, 21 Jul 2020 01:07:39 +0000 (18:07 -0700)]
Merge branch 'net-atlantic-various-features'

Mark Starovoytov says:

====================
net: atlantic: various features

This patchset adds more features for Atlantic NICs:
 * media detect;
 * additional per-queue stats;
 * PTP stats;
 * ipv6 support for TCP LSO and UDP GSO;
 * 64-bit operations;
 * A0 ntuple filters;
 * MAC temperature (hwmon).

This work is a joint effort of Marvell developers.

v3:
 * reworked patches related to stats:
   . fixed u64_stats_update_* usage;
   . use simple assignment in _get_stats / _fill_stats_data;
   . made _get_sw_stats / _fill_stats_data return count as return value;
   . split rx and tx per-queue stats;

v2: https://patchwork.ozlabs.org/cover/1329652/
 * removed media detect feature (will be reworked and submitted later);
 * removed irq counter from stats;
 * use u64_stats_update_* to protect 64-bit stats;
 * use io-64-nonatomic-lo-hi.h for readq/writeq fallbacks;

v1: https://patchwork.ozlabs.org/cover/1327894/
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: atlantic: add hwmon getter for MAC temperature
Mark Starovoytov [Mon, 20 Jul 2020 18:32:44 +0000 (21:32 +0300)]
net: atlantic: add hwmon getter for MAC temperature

This patch adds the possibility to obtain MAC temperature via hwmon.
On A1 there are two separate temperature sensors.
On A2 there's only one temperature sensor, which is used for reporting
both MAC and PHY temperature.

Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: atlantic: A0 ntuple filters
Dmitry Bogdanov [Mon, 20 Jul 2020 18:32:43 +0000 (21:32 +0300)]
net: atlantic: A0 ntuple filters

This patch adds support for ntuple filters on A0.

Signed-off-by: Dmitry Bogdanov <dbogdanov@marvell.com>
Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: atlantic: use intermediate variable to improve readability a bit
Nikita Danilov [Mon, 20 Jul 2020 18:32:42 +0000 (21:32 +0300)]
net: atlantic: use intermediate variable to improve readability a bit

This patch syncs up hw_atl_a0.c with an out-of-tree driver, where an
intermediate variable was introduced in a couple of functions to
improve the code readability a bit.

Signed-off-by: Nikita Danilov <ndanilov@marvell.com>
Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: atlantic: use U32_MAX in aq_hw_utils.c
Mark Starovoytov [Mon, 20 Jul 2020 18:32:41 +0000 (21:32 +0300)]
net: atlantic: use U32_MAX in aq_hw_utils.c

This patch replaces magic constant ~0U usage with U32_MAX in aq_hw_utils.c

Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: atlantic: add support for 64-bit reads/writes
Pavel Belous [Mon, 20 Jul 2020 18:32:40 +0000 (21:32 +0300)]
net: atlantic: add support for 64-bit reads/writes

This patch adds support for 64-bit reads/writes where applicable, e.g.
A2 supports them.

Signed-off-by: Pavel Belous <pbelous@marvell.com>
Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: atlantic: enable ipv6 support for TCP LSO and UDP GSO
Igor Russkikh [Mon, 20 Jul 2020 18:32:39 +0000 (21:32 +0300)]
net: atlantic: enable ipv6 support for TCP LSO and UDP GSO

This patch enables ipv6 support for TCP LSO and UDP GSO.
The code itself (aq_nic_map_skb) was ready for this after udp gso feature,
but corresponding NETIF_F_TSO6 wasn't enabled.

We now have tested both tcp and udp v6 GSO, and enabling them safely.

Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: atlantic: PTP statistics
Pavel Belous [Mon, 20 Jul 2020 18:32:38 +0000 (21:32 +0300)]
net: atlantic: PTP statistics

This patch adds PTP rings statistics. Before that
these were missing from overall stats, hardening debugging
and analysis.

Signed-off-by: Pavel Belous <pbelous@marvell.com>
Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: atlantic: additional per-queue stats
Dmitry Bogdanov [Mon, 20 Jul 2020 18:32:37 +0000 (21:32 +0300)]
net: atlantic: additional per-queue stats

This patch adds additional per-queue stats, these could
be useful for debugging and diagnostics.

Signed-off-by: Dmitry Bogdanov <dbogdanov@marvell.com>
Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: atlantic: use u64_stats_update_* to protect access to 64-bit stats
Mark Starovoytov [Mon, 20 Jul 2020 18:32:36 +0000 (21:32 +0300)]
net: atlantic: use u64_stats_update_* to protect access to 64-bit stats

This patch adds u64_stats_update_* usage to protect access to 64-bit stats,
where necessary.

This is necessary for per-ring stats, because they are updated by the
driver directly, so there is a possibility for a partial read.

Other stats require no additional protection, e.g.:
 * all MACSec stats are fetched directly from HW (under semaphore);
 * nic/ndev stats (aq_stats_s) are fetched directly from FW (under mutex).

Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: atlantic: split rx and tx per-queue stats
Mark Starovoytov [Mon, 20 Jul 2020 18:32:35 +0000 (21:32 +0300)]
net: atlantic: split rx and tx per-queue stats

This patch splits rx and tx per-queue stats.
This change simplifies the follow-up introduction of PTP stats and
u64_stats_update_* usage.

Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: atlantic: make _get_sw_stats return count as return value
Mark Starovoytov [Mon, 20 Jul 2020 18:32:34 +0000 (21:32 +0300)]
net: atlantic: make _get_sw_stats return count as return value

This patch changes aq_vec_get_sw_stats() to return count as a return
value (which was unused) instead of an out parameter.

Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: atlantic: use simple assignment in _get_stats and _get_sw_stats
Mark Starovoytov [Mon, 20 Jul 2020 18:32:33 +0000 (21:32 +0300)]
net: atlantic: use simple assignment in _get_stats and _get_sw_stats

This patch replaces addition assignment operator with a simple assignment
in aq_vec_get_stats() and aq_vec_get_sw_stats(), because it is
sufficient in both cases and this change simplifies the introduction of
u64_stats_update_* in these functions.

Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: atlantic: move FRAC_PER_NS to aq_hw.h
Mark Starovoytov [Mon, 20 Jul 2020 18:32:32 +0000 (21:32 +0300)]
net: atlantic: move FRAC_PER_NS to aq_hw.h

This patch moves FRAC_PER_NS to aq_hw.h so that it can be used in both
hw_atl (A1) and hw_atl2 (A2) in the future.

Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoMerge branch 'Extend-testptp-with-PTP-perout-waveform'
David S. Miller [Tue, 21 Jul 2020 01:04:59 +0000 (18:04 -0700)]
Merge branch 'Extend-testptp-with-PTP-perout-waveform'

Vladimir Oltean says:

====================
Extend testptp with PTP perout waveform

Demonstrate the usage of the newly introduced flags in the
PTP_PEROUT_REQUEST2 ioctl:

https://www.spinics.net/lists/netdev/msg669346.html
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agotestptp: add new options for perout phase and pulse width
Vladimir Oltean [Mon, 20 Jul 2020 17:55:59 +0000 (20:55 +0300)]
testptp: add new options for perout phase and pulse width

Extend the example program for PTP ancillary functionality with the
ability to configure not only the periodic output's period (frequency),
but also the phase and duty cycle (pulse width) which were newly
introduced.

The ioctl level also needs to be updated to the new PTP_PEROUT_REQUEST2,
since the original PTP_PEROUT_REQUEST doesn't support this
functionality. For an in-tree testing program, not having explicit
backwards compatibility is fine, as it should always be tested with the
current kernel headers and sources.

Tested with an oscilloscope on the felix switch PHC:

echo '2 0' > /sys/class/ptp/ptp1/pins/switch_1588_dat0
./testptp -d /dev/ptp1 -p 1000000000 -w 100000000 -H 1000 -i 0

Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Acked-by: Richard Cochran <richardcochran@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agotestptp: promote 'perout' variable to int64_t
Vladimir Oltean [Mon, 20 Jul 2020 17:55:58 +0000 (20:55 +0300)]
testptp: promote 'perout' variable to int64_t

Since 'perout' holds the nanosecond value of the signal's period, it
should be a 64-bit value. Current assumption is that it cannot be larger
than 1 second.

Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Acked-by: Richard Cochran <richardcochran@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoethernet: myri10ge: use generic power management
Vaibhav Gupta [Mon, 20 Jul 2020 16:19:31 +0000 (21:49 +0530)]
ethernet: myri10ge: use generic power management

Drivers using legacy PM have to manage PCI states and device's PM states
themselves. They also need to take care of configuration registers.

With improved and powerful support of generic PM, PCI Core takes care of
above mentioned, device-independent, jobs.

This driver makes use of PCI helper functions like
pci_save/restore_state(), pci_enable/disable_device(),
pci_set_power_state() and pci_set_master() to do required operations. In
generic mode, they are no longer needed.

Change function parameter in both .suspend() and .resume() to
"struct device*" type. Use to_pci_dev() and dev_get_drvdata() to get
"struct pci_dev*" variable and drv data.

Compile-tested only.

Signed-off-by: Vaibhav Gupta <vaibhavgupta40@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoMerge branch 'qed-qede-add-support-for-new-operating-modes'
David S. Miller [Tue, 21 Jul 2020 00:59:44 +0000 (17:59 -0700)]
Merge branch 'qed-qede-add-support-for-new-operating-modes'

Alexander Lobakin says:

====================
qed, qede: add support for new operating modes

This series covers the support for the following:
 - new port modes;
 - loopback modes, previously missing;
 - new speed/link modes;
 - several FEC modes;
 - multi-rate transceivers;

and also cleans up and optimizes several related parts of code.

v3 (from [2]):
 - dropped custom link mode declaration; qed, qede and qedf switched to
   Ethtool link modes and definitions (#0001, #0002, per Andrew Lunn's
   suggestion);
 - exchange more .text size to .initconst and .ro_after_init in qede
   (#0003).

v2 (from [1]):
 - added a patch (#0010) that drops discussed dead struct member;
 - addressed checkpatch complaints on #0014 (former #0013);
 - rebased on top of latest net-next;
 - no other changes.

[1] https://lore.kernel.org/netdev/20200716115446.994-1-alobakin@marvell.com/
[2] https://lore.kernel.org/netdev/20200719201453.3648-1-alobakin@marvell.com/
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoqed: add support for the extended speed and FEC modes
Alexander Lobakin [Mon, 20 Jul 2020 18:08:15 +0000 (21:08 +0300)]
qed: add support for the extended speed and FEC modes

Add all necessary code (NVM parsing, MFW and Ethtool reports etc.) to
support extended speed and FEC modes.
These new modes are supported by the new boards revisions and newer
MFW versions.

Misc: correct port type for MEDIA_KR.

Signed-off-by: Alexander Lobakin <alobakin@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoqed: populate supported link modes maps on module init
Alexander Lobakin [Mon, 20 Jul 2020 18:08:14 +0000 (21:08 +0300)]
qed: populate supported link modes maps on module init

Simplify and lighten qed_set_link() by declaring static link modes maps
and populating them on module init. This way we save plenty of text size
at the low expense of __ro_after_init and __initconst data (the latter
will be purged after module init is done).

Misc: sanitize exit callback.

Signed-off-by: Alexander Lobakin <alobakin@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoqed: add missing loopback modes
Alexander Lobakin [Mon, 20 Jul 2020 18:08:13 +0000 (21:08 +0300)]
qed: add missing loopback modes

These modes are relevant only for several boards, but may be reported by
MFW as well as the others.

Signed-off-by: Alexander Lobakin <alobakin@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoqed: add support for new port modes
Alexander Lobakin [Mon, 20 Jul 2020 18:08:12 +0000 (21:08 +0300)]
qed: add support for new port modes

These ports ship on new boards revisions and are supported by newer
firmware versions.

Signed-off-by: Alexander Lobakin <alobakin@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoqed: remove unused qed_hw_info::port_mode and QED_PORT_MODE
Alexander Lobakin [Mon, 20 Jul 2020 18:08:11 +0000 (21:08 +0300)]
qed: remove unused qed_hw_info::port_mode and QED_PORT_MODE

Struct field qed_hw_info::port_mode isn't used anywhere in the code, so
can be safely removed to prevent possible dead code addition.
Also remove the enumeration QED_PORT_MODE orphaned after this deletion.

Signed-off-by: Alexander Lobakin <alobakin@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoqed: reformat several structures a bit
Alexander Lobakin [Mon, 20 Jul 2020 18:08:10 +0000 (21:08 +0300)]
qed: reformat several structures a bit

Reformat a few nvm_cfg* structures (and partly qed_dev) prior to adding
new fields and definitions.

Signed-off-by: Alexander Lobakin <alobakin@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoqede: introduce support for FEC control
Alexander Lobakin [Mon, 20 Jul 2020 18:08:09 +0000 (21:08 +0300)]
qede: introduce support for FEC control

Add Ethtool callbacks for querying and setting FEC parameters if it's
supported by the underlying qed module and MFW version running on the
device.

Signed-off-by: Alexander Lobakin <alobakin@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoqede: format qede{,_vf}_ethtool_ops
Alexander Lobakin [Mon, 20 Jul 2020 18:08:08 +0000 (21:08 +0300)]
qede: format qede{,_vf}_ethtool_ops

Prior to adding new callbacks, format qede ethtool_ops structs to make
declarations more fancy and readable.

Signed-off-by: Alexander Lobakin <alobakin@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoqed: add support for Forward Error Correction
Alexander Lobakin [Mon, 20 Jul 2020 18:08:07 +0000 (21:08 +0300)]
qed: add support for Forward Error Correction

Add all necessary routines for reading supported FEC modes from NVM and
querying FEC control to the MFW (if the running version supports it).

Signed-off-by: Alexander Lobakin <alobakin@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoqed: reformat several structures a bit
Alexander Lobakin [Mon, 20 Jul 2020 18:08:06 +0000 (21:08 +0300)]
qed: reformat several structures a bit

Prior to adding new fields and bitfields, reformat the related
structures according to the Linux style (spaces to tabs,
lowercase hex, indentation etc.).

Signed-off-by: Alexander Lobakin <alobakin@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoqed: use transceiver data to fill link partner's advertising speeds
Alexander Lobakin [Mon, 20 Jul 2020 18:08:05 +0000 (21:08 +0300)]
qed: use transceiver data to fill link partner's advertising speeds

Currently qed driver does not take into consideration transceiver's
capabilities when generating link partner's speed advertisement. This
leads to e.g. incorrect ethtool link info on 10GbaseT modules.
Use transceiver info not only for advertisement and support arrays, but
also for link partner's abilities to fix it.

Misc: fix a couple of comments nearby.

Signed-off-by: Alexander Lobakin <alobakin@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoqed: add support for multi-rate transceivers
Alexander Lobakin [Mon, 20 Jul 2020 18:08:04 +0000 (21:08 +0300)]
qed: add support for multi-rate transceivers

Set the corresponding advertised and supported link modes according
to the detected transceiver type and device capabilities.

Signed-off-by: Alexander Lobakin <alobakin@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoqed: reformat public_port::transceiver_data a bit
Alexander Lobakin [Mon, 20 Jul 2020 18:08:03 +0000 (21:08 +0300)]
qed: reformat public_port::transceiver_data a bit

Prior to adding new bitfields, reformat the existing ones from spaces
to tabs, and unify all hex values to lowercase.

Signed-off-by: Alexander Lobakin <alobakin@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoqede: populate supported link modes maps on module init
Alexander Lobakin [Mon, 20 Jul 2020 18:08:02 +0000 (21:08 +0300)]
qede: populate supported link modes maps on module init

Simplify and lighten qede_set_link_ksettings() by declaring static link
modes maps and populating them on module init. This way we save plenty
of text size at the low expense of __ro_after_init and __initconst data
(the latter will be purged after module init is done).

Signed-off-by: Alexander Lobakin <alobakin@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoqed, qede, qedf: convert link mode from u32 to ETHTOOL_LINK_MODE
Alexander Lobakin [Mon, 20 Jul 2020 18:08:01 +0000 (21:08 +0300)]
qed, qede, qedf: convert link mode from u32 to ETHTOOL_LINK_MODE

Currently qed driver already ran out of 32 bits to store link modes,
and this doesn't allow to add and support more speeds.
Convert custom link mode to generic Ethtool bitmap and definitions
(convenient Phylink shorthands are used for elegance and readability).
This allowed us to drop all conversions/mappings between the driver
and Ethtool.

This involves changes in qede and qedf as well, as they used definitions
from shared "qed_if.h".

Suggested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Alexander Lobakin <alobakin@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agolinkmode: introduce linkmode_intersects()
Alexander Lobakin [Mon, 20 Jul 2020 18:08:00 +0000 (21:08 +0300)]
linkmode: introduce linkmode_intersects()

Add a new helper to find intersections between Ethtool link modes,
linkmode_intersects(), similar to the other linkmode helpers.

Signed-off-by: Alexander Lobakin <alobakin@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoMerge tag 'wireless-drivers-next-2020-07-20' of git://git.kernel.org/pub/scm/linux...
David S. Miller [Tue, 21 Jul 2020 00:52:50 +0000 (17:52 -0700)]
Merge tag 'wireless-drivers-next-2020-07-20' of git://git./linux/kernel/git/kvalo/wireless-drivers-next

Kalle Valo says:

====================
wireless-drivers-next patches for v5.9

First set of patches for v5.9. This comes later than usual as I was
offline for two weeks. The biggest change here is moving Microchip
wilc1000 driver from staging. There was an immutable topic branch with
one commit moving the whole driver and the topic branch was pulled
both to staging-next and wireless-drivers-next. At the moment the only
reported conflict is in MAINTAINERS file, so I'm hoping the move
should go smoothly.

Other notable changes are ath11k getting 6 GHz band support and rtw88
supporting RTL8821CE. And there's also the usual fixes, API changes
and cleanups all over.

Major changes:

wilc1000

* move from drivers/staging to drivers/net/wireless/microchip

ath11k

* add 6G band support

* add spectral scan support

iwlwifi

* make FW reconfiguration quieter by not using warn level

rtw88

* add support for RTL8821CE
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agosis: switch from 'pci_' to 'dma_' API
Christophe JAILLET [Mon, 20 Jul 2020 13:36:09 +0000 (15:36 +0200)]
sis: switch from 'pci_' to 'dma_' API

The wrappers in include/linux/pci-dma-compat.h should go away.

The patch has been generated with the coccinelle script below and has been
hand modified to replace GFP_ with a correct flag.
It has been compile tested.

When memory is allocated in 'epic_init_one()' (sis190.c), GFP_KERNEL can be
used because this is a net_device_ops' 'ndo_open' function. This function
is protected by the rtnl_lock() semaphore. So only a mutex is used and no
spin_lock is acquired.

When memory is allocated in 'sis900_probe()' (sis900.c), GFP_KERNEL can be
used because it is a probe function and no spin_lock is acquired.

@@
@@
-    PCI_DMA_BIDIRECTIONAL
+    DMA_BIDIRECTIONAL

@@
@@
-    PCI_DMA_TODEVICE
+    DMA_TO_DEVICE

@@
@@
-    PCI_DMA_FROMDEVICE
+    DMA_FROM_DEVICE

@@
@@
-    PCI_DMA_NONE
+    DMA_NONE

@@
expression e1, e2, e3;
@@
-    pci_alloc_consistent(e1, e2, e3)
+    dma_alloc_coherent(&e1->dev, e2, e3, GFP_)

@@
expression e1, e2, e3;
@@
-    pci_zalloc_consistent(e1, e2, e3)
+    dma_alloc_coherent(&e1->dev, e2, e3, GFP_)

@@
expression e1, e2, e3, e4;
@@
-    pci_free_consistent(e1, e2, e3, e4)
+    dma_free_coherent(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_map_single(e1, e2, e3, e4)
+    dma_map_single(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_unmap_single(e1, e2, e3, e4)
+    dma_unmap_single(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4, e5;
@@
-    pci_map_page(e1, e2, e3, e4, e5)
+    dma_map_page(&e1->dev, e2, e3, e4, e5)

@@
expression e1, e2, e3, e4;
@@
-    pci_unmap_page(e1, e2, e3, e4)
+    dma_unmap_page(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_map_sg(e1, e2, e3, e4)
+    dma_map_sg(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_unmap_sg(e1, e2, e3, e4)
+    dma_unmap_sg(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_single_for_cpu(e1, e2, e3, e4)
+    dma_sync_single_for_cpu(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_single_for_device(e1, e2, e3, e4)
+    dma_sync_single_for_device(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_sg_for_cpu(e1, e2, e3, e4)
+    dma_sync_sg_for_cpu(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_sg_for_device(e1, e2, e3, e4)
+    dma_sync_sg_for_device(&e1->dev, e2, e3, e4)

@@
expression e1, e2;
@@
-    pci_dma_mapping_error(e1, e2)
+    dma_mapping_error(&e1->dev, e2)

@@
expression e1, e2;
@@
-    pci_set_dma_mask(e1, e2)
+    dma_set_mask(&e1->dev, e2)

@@
expression e1, e2;
@@
-    pci_set_consistent_dma_mask(e1, e2)
+    dma_set_coherent_mask(&e1->dev, e2)

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agor6040: switch from 'pci_' to 'dma_' API
Christophe JAILLET [Mon, 20 Jul 2020 13:02:42 +0000 (15:02 +0200)]
r6040: switch from 'pci_' to 'dma_' API

The wrappers in include/linux/pci-dma-compat.h should go away.

The patch has been generated with the coccinelle script below and has been
hand modified to replace GFP_ with a correct flag.
It has been compile tested.

When memory is allocated in 'r6040_open()', GFP_KERNEL can be used because
this is a net_device_ops' 'ndo_open' function. This function is protected
by the rtnl_lock() semaphore. So only a mutex is used and no spin_lock is
acquired.

@@
@@
-    PCI_DMA_BIDIRECTIONAL
+    DMA_BIDIRECTIONAL

@@
@@
-    PCI_DMA_TODEVICE
+    DMA_TO_DEVICE

@@
@@
-    PCI_DMA_FROMDEVICE
+    DMA_FROM_DEVICE

@@
@@
-    PCI_DMA_NONE
+    DMA_NONE

@@
expression e1, e2, e3;
@@
-    pci_alloc_consistent(e1, e2, e3)
+    dma_alloc_coherent(&e1->dev, e2, e3, GFP_)

@@
expression e1, e2, e3;
@@
-    pci_zalloc_consistent(e1, e2, e3)
+    dma_alloc_coherent(&e1->dev, e2, e3, GFP_)

@@
expression e1, e2, e3, e4;
@@
-    pci_free_consistent(e1, e2, e3, e4)
+    dma_free_coherent(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_map_single(e1, e2, e3, e4)
+    dma_map_single(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_unmap_single(e1, e2, e3, e4)
+    dma_unmap_single(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4, e5;
@@
-    pci_map_page(e1, e2, e3, e4, e5)
+    dma_map_page(&e1->dev, e2, e3, e4, e5)

@@
expression e1, e2, e3, e4;
@@
-    pci_unmap_page(e1, e2, e3, e4)
+    dma_unmap_page(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_map_sg(e1, e2, e3, e4)
+    dma_map_sg(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_unmap_sg(e1, e2, e3, e4)
+    dma_unmap_sg(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_single_for_cpu(e1, e2, e3, e4)
+    dma_sync_single_for_cpu(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_single_for_device(e1, e2, e3, e4)
+    dma_sync_single_for_device(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_sg_for_cpu(e1, e2, e3, e4)
+    dma_sync_sg_for_cpu(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_sg_for_device(e1, e2, e3, e4)
+    dma_sync_sg_for_device(&e1->dev, e2, e3, e4)

@@
expression e1, e2;
@@
-    pci_dma_mapping_error(e1, e2)
+    dma_mapping_error(&e1->dev, e2)

@@
expression e1, e2;
@@
-    pci_set_dma_mask(e1, e2)
+    dma_set_mask(&e1->dev, e2)

@@
expression e1, e2;
@@
-    pci_set_consistent_dma_mask(e1, e2)
+    dma_set_coherent_mask(&e1->dev, e2)

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: packetengines: switch from 'pci_' to 'dma_' API
Christophe JAILLET [Mon, 20 Jul 2020 12:29:12 +0000 (14:29 +0200)]
net: packetengines: switch from 'pci_' to 'dma_' API

The wrappers in include/linux/pci-dma-compat.h should go away.

The patch has been generated with the coccinelle script below and has been
hand modified to replace GFP_ with a correct flag.
It has been compile tested.

When memory is allocated in 'hamachi_init_one()' (hamachi.c), GFP_KERNEL
can be used because it is a probe function and no lock is acquired.

When memory is allocated in 'yellowfin_init_one()' (yellowfin.c),
GFP_KERNEL can be used because it is a probe function and no lock is
acquired.

@@
@@
-    PCI_DMA_BIDIRECTIONAL
+    DMA_BIDIRECTIONAL

@@
@@
-    PCI_DMA_TODEVICE
+    DMA_TO_DEVICE

@@
@@
-    PCI_DMA_FROMDEVICE
+    DMA_FROM_DEVICE

@@
@@
-    PCI_DMA_NONE
+    DMA_NONE

@@
expression e1, e2, e3;
@@
-    pci_alloc_consistent(e1, e2, e3)
+    dma_alloc_coherent(&e1->dev, e2, e3, GFP_)

@@
expression e1, e2, e3;
@@
-    pci_zalloc_consistent(e1, e2, e3)
+    dma_alloc_coherent(&e1->dev, e2, e3, GFP_)

@@
expression e1, e2, e3, e4;
@@
-    pci_free_consistent(e1, e2, e3, e4)
+    dma_free_coherent(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_map_single(e1, e2, e3, e4)
+    dma_map_single(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_unmap_single(e1, e2, e3, e4)
+    dma_unmap_single(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4, e5;
@@
-    pci_map_page(e1, e2, e3, e4, e5)
+    dma_map_page(&e1->dev, e2, e3, e4, e5)

@@
expression e1, e2, e3, e4;
@@
-    pci_unmap_page(e1, e2, e3, e4)
+    dma_unmap_page(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_map_sg(e1, e2, e3, e4)
+    dma_map_sg(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_unmap_sg(e1, e2, e3, e4)
+    dma_unmap_sg(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_single_for_cpu(e1, e2, e3, e4)
+    dma_sync_single_for_cpu(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_single_for_device(e1, e2, e3, e4)
+    dma_sync_single_for_device(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_sg_for_cpu(e1, e2, e3, e4)
+    dma_sync_sg_for_cpu(&e1->dev, e2, e3, e4)

@@
expression e1, e2, e3, e4;
@@
-    pci_dma_sync_sg_for_device(e1, e2, e3, e4)
+    dma_sync_sg_for_device(&e1->dev, e2, e3, e4)

@@
expression e1, e2;
@@
-    pci_dma_mapping_error(e1, e2)
+    dma_mapping_error(&e1->dev, e2)

@@
expression e1, e2;
@@
-    pci_set_dma_mask(e1, e2)
+    dma_set_mask(&e1->dev, e2)

@@
expression e1, e2;
@@
-    pci_set_consistent_dma_mask(e1, e2)
+    dma_set_coherent_mask(&e1->dev, e2)

Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoarch, net: remove the last csum_partial_copy() leftovers
Christoph Hellwig [Mon, 20 Jul 2020 11:36:09 +0000 (13:36 +0200)]
arch, net: remove the last csum_partial_copy() leftovers

Most of the tree only uses and implements csum_partial_copy_nocheck,
but the c6x and lib/checksum.c implement a csum_partial_copy that
isn't used anywere except to define csum_partial_copy.  Get rid of
this pointless alias.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: fs_enet: remove redundant null check
Zhang Changzhong [Mon, 20 Jul 2020 11:12:33 +0000 (19:12 +0800)]
net: fs_enet: remove redundant null check

Because clk_prepare_enable and clk_disable_unprepare already
checked NULL clock parameter, so the additional checks are
unnecessary, just remove them.

Signed-off-by: Zhang Changzhong <zhangchangzhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoMerge branch 'net-macb-Wake-on-Lan-magic-packet-GEM-and-MACB-handling'
David S. Miller [Tue, 21 Jul 2020 00:01:45 +0000 (17:01 -0700)]
Merge branch 'net-macb-Wake-on-Lan-magic-packet-GEM-and-MACB-handling'

Nicolas Ferre says:

====================
net: macb: Wake-on-Lan magic packet GEM and MACB handling

Here is the second part of support for WoL magic-packet on the current macb
driver. This one
is addressing the bulk of the feature and is based on current net-next/master.

MACB and GEM code must co-exist and as they don't share exactly the same
register layout, I had to specialize a bit the suspend/resume paths and plug a
specific IRQ handler in order to avoid overloading the "normal" IRQ hot path.

These changes were tested on both sam9x60 which embeds a MACB+FIFO controller
and sama5d2 which has a GEM+packet buffer type of controller.

Best regards,
  Nicolas

Changes in v7:
- Release the spinlock before exiting macb_suspend/resume in case of error
  changing IRQ handler

Changes in v6:
- rebase on net-next/master now that the "fixes" patches of the series are
  merged in both net and net-next.
- GEM addition and MACB update to finish the support of WoL magic-packet on the
  two revisions of the controller.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: macb: Add WoL interrupt support for MACB type of Ethernet controller
Nicolas Ferre [Mon, 20 Jul 2020 08:56:53 +0000 (10:56 +0200)]
net: macb: Add WoL interrupt support for MACB type of Ethernet controller

Handle the Wake-on-Lan interrupt for the Cadence MACB Ethernet
controller.
As we do for the GEM version, we handle of WoL interrupt in a
specialized interrupt handler for MACB version that is positionned
just between suspend() and resume() calls.

Cc: Claudiu Beznea <claudiu.beznea@microchip.com>
Cc: Harini Katakam <harini.katakam@xilinx.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: macb: WoL support for GEM type of Ethernet controller
Nicolas Ferre [Mon, 20 Jul 2020 08:56:52 +0000 (10:56 +0200)]
net: macb: WoL support for GEM type of Ethernet controller

Adapt the Wake-on-Lan feature to the Cadence GEM Ethernet controller.
This controller has different register layout and cannot be handled by
previous code.
We disable completely interrupts on all the queues but the queue 0.
Handling of WoL interrupt is done in another interrupt handler
positioned depending on the controller version used, just between
suspend() and resume() calls.
It allows to lower pressure on the generic interrupt hot path by
removing the need to handle 2 tests for each IRQ: the first figuring out
the controller revision, the second for actually knowing if the WoL bit
is set.

Queue management in suspend()/resume() functions inspired from RFC patch
by Harini Katakam <harinik@xilinx.com>, thanks!

Cc: Claudiu Beznea <claudiu.beznea@microchip.com>
Cc: Harini Katakam <harini.katakam@xilinx.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agosched: sch_api: add missing rcu read lock to silence the warning
Jiri Pirko [Mon, 20 Jul 2020 08:10:41 +0000 (10:10 +0200)]
sched: sch_api: add missing rcu read lock to silence the warning

In case the qdisc_match_from_root function() is called from non-rcu path
with rtnl mutex held, a suspiciout rcu usage warning appears:

[  241.504354] =============================
[  241.504358] WARNING: suspicious RCU usage
[  241.504366] 5.8.0-rc4-custom-01521-g72a7c7d549c3 #32 Not tainted
[  241.504370] -----------------------------
[  241.504378] net/sched/sch_api.c:270 RCU-list traversed in non-reader section!!
[  241.504382]
               other info that might help us debug this:
[  241.504388]
               rcu_scheduler_active = 2, debug_locks = 1
[  241.504394] 1 lock held by tc/1391:
[  241.504398]  #0: ffffffff85a27850 (rtnl_mutex){+.+.}-{3:3}, at: rtnetlink_rcv_msg+0x49a/0xbd0
[  241.504431]
               stack backtrace:
[  241.504440] CPU: 0 PID: 1391 Comm: tc Not tainted 5.8.0-rc4-custom-01521-g72a7c7d549c3 #32
[  241.504446] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.13.0-2.fc32 04/01/2014
[  241.504453] Call Trace:
[  241.504465]  dump_stack+0x100/0x184
[  241.504482]  lockdep_rcu_suspicious+0x153/0x15d
[  241.504499]  qdisc_match_from_root+0x293/0x350

Fix this by passing the rtnl held lockdep condition down to
hlist_for_each_entry_rcu()

Reported-by: Ido Schimmel <idosch@mellanox.com>
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: ena: Fix using plain integer as NULL pointer in ena_init_napi_in_range
Wang Hai [Mon, 20 Jul 2020 07:56:14 +0000 (15:56 +0800)]
net: ena: Fix using plain integer as NULL pointer in ena_init_napi_in_range

Fix sparse build warning:

drivers/net/ethernet/amazon/ena/ena_netdev.c:2193:34: warning:
 Using plain integer as NULL pointer

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Wang Hai <wanghai38@huawei.com>
Suggested-by: Joe Perches <joe@perches.com>
Acked-by: Shay Agroskin <shayagr@amazon.com>
Acked-by: Shay Agroskin <shayagr@amazon.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: hns: use eth_broadcast_addr() to assign broadcast address
Xu Wang [Mon, 20 Jul 2020 06:24:10 +0000 (06:24 +0000)]
net: hns: use eth_broadcast_addr() to assign broadcast address

This patch is to use eth_broadcast_addr() to assign broadcast address
insetad of memset().

Signed-off-by: Xu Wang <vulab@iscas.ac.cn>
Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agoMerge branch 'net-dsa-Setup-dsa_netdev_ops'
David S. Miller [Mon, 20 Jul 2020 23:48:22 +0000 (16:48 -0700)]
Merge branch 'net-dsa-Setup-dsa_netdev_ops'

Florian Fainelli says:

====================
net: dsa: Setup dsa_netdev_ops

This patch series addresses the overloading of a DSA CPU/management
interface's netdev_ops for the purpose of providing useful information
from the switch side.

Up until now we had duplicated the existing netdev_ops structure and
added specific function pointers to return information of interest. Here
we have a more controlled way of doing this by involving the specific
netdev_ops function pointers that we want to be patched, which is easier
for auditing code in the future. As a byproduct we can now maintain
netdev_ops pointer comparisons which would be failing before (no known
in tree problems because of that though).

Let me know if this approach looks reasonable to you and we might do the
same with our ethtool_ops overloading as well.

Changes in v2:

- use static inline int vs. static int inline (Kbuild robot)
- fixed typos in patch 4 (Andrew)
- avoid using macros (Andrew)
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
4 years agonet: dsa: Setup dsa_netdev_ops
Florian Fainelli [Mon, 20 Jul 2020 03:49:54 +0000 (20:49 -0700)]
net: dsa: Setup dsa_netdev_ops

Now that we have all the infrastructure in place for calling into the
dsa_ptr->netdev_ops function pointers, install them when we configure
the DSA CPU/management interface and tear them down. The flow is
unchanged from before, but now we preserve equality of tests when
network device drivers do tests like dev->netdev_ops == &foo_ops which
was not the case before since we were allocating an entirely new
structure.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>