Ryan OShea [Mon, 24 Aug 2020 17:03:23 +0000 (18:03 +0100)]
Update Doxygen Project Version
* Change Project Version to 20.08
Signed-off-by: Ryan OShea <Ryan.OShea2@arm.com>
Change-Id: I02ceca1995bdefb98d73511748fb2142cd27969e
Jakub Sujak [Wed, 17 Jun 2020 14:35:03 +0000 (15:35 +0100)]
MLECO-955: Added python object detection example for PyArmNN
Change-Id: I1344c027f4cc70520b7846b34dfbc2abf399d10a
Signed-off-by: Jakub Sujak <jakub.sujak@arm.com>
Nikhil Raj [Fri, 21 Aug 2020 10:31:30 +0000 (11:31 +0100)]
Minor html changes to BuildGuideCrossCompilation.md to make it look better
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: I4213bf811d39898506c6d976089d90379a617056
Narumol Prangnawarat [Fri, 21 Aug 2020 09:03:49 +0000 (10:03 +0100)]
IVGCVSW-5200 Add import enabled optimizer options to PyArmNN
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: Ic7c288fd829d7f1f1ae2910c47fbccdd635def8f
Francis Murtagh [Thu, 20 Aug 2020 14:38:29 +0000 (15:38 +0100)]
Bugfix: Allow permutation of QuantizationDim
Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
Change-Id: Ib98ec471e6fdd47600b7c62d0b4d19dd36e20cbd
Pavel Macenauer [Tue, 2 Jun 2020 11:54:59 +0000 (11:54 +0000)]
Update to provide resources to PyArmNN examples manually
Change-Id: I9ee751512abd5d4ec9faca499b5cea7c19028d22
Signed-off-by: Pavel Macenauer <pavel.macenauer@nxp.com>
Jan Eilers [Wed, 19 Aug 2020 13:14:36 +0000 (14:14 +0100)]
IVGCVSW-5208 Wrap SampleDynamicBackend in own namespace
* to prevent name clashes with armnn
Signed-off-by: Jan Eilers <jan.eilers@arm.com>
Change-Id: I10b394d47e58cec45bacd489938ee048b7c9776e
Narumol Prangnawarat [Wed, 19 Aug 2020 13:39:07 +0000 (14:39 +0100)]
IVGCVSW-5012 Add importEnabled option for OptimizerOptions
* Default importEnabled to false
* Improve error messages
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I17f78986aa1d23e48b0844297a52029b1a9bbe3e
Nikhil Raj [Wed, 19 Aug 2020 09:04:35 +0000 (10:04 +0100)]
Update ACL pin to their 20.08 release branch
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: I4fab85d4660c6a36dd1f9e2d7a71a4c24e573a2f
Ryan OShea [Fri, 7 Aug 2020 15:27:34 +0000 (16:27 +0100)]
IVGCVSW-5159 Add Accuracy Check for YoloV3 Big App
* Add Check Accuracy Method
* Add Ability to pass in comparison file paths
* Add compare_detection to yolo v3 class
Signed-off-by: Ryan OShea <Ryan.OShea2@arm.com>
Change-Id: I914ffe4805316263dc19d76a777fff6e35f44961
Sadik Armagan [Wed, 22 Jul 2020 15:32:06 +0000 (16:32 +0100)]
IVGCVSW-5014 Deprecate CreateTensorHandle from WorkloadFactory
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Signed-off-by: Kevin May <kevin.may@arm.com>
Change-Id: I948117b0ff5be27540267edbd68628f1bff23a9d
Teresa Charlin [Mon, 17 Aug 2020 22:22:11 +0000 (23:22 +0100)]
IVGCVSW-5230 Add ARMNN_NO_DEPRECATE_WARN to TimerTests
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ib7a1c9cc2cff207700c3c86dbac8df160670c576
Teresa Charlin [Mon, 17 Aug 2020 19:06:26 +0000 (20:06 +0100)]
IVGCVSW-5229 Add ARMNN_NO_DEPRECATE_WARN_BEGIN to Memory tests
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Icd4c84ca6250b6e6d616f64481c5ff60671be9c0
Narumol Prangnawarat [Mon, 17 Aug 2020 18:50:25 +0000 (19:50 +0100)]
Update padding required layers
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: Ia0982a87f1ce7250b9a6b4188fc6877a92cdfe40
Narumol Prangnawarat [Mon, 17 Aug 2020 16:02:12 +0000 (17:02 +0100)]
IVGCVSW-5114 Enable memory import in TfLiteYoloV3Big App
* Enable memory import in TfLiteYoloV3Big App
* Add isMemoryManaged flag to Concat and Splitter layers
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I7e00f5da2a016c09d480b744fb17ea5611af8365
Rob Hughes [Mon, 17 Aug 2020 14:47:20 +0000 (15:47 +0100)]
Fix Windows build
Change-Id: I145d220c73313e31c184b6a75ab7f4823df99919
Signed-off-by: Robert Hughes <robert.hughes@arm.com>
Teresa Charlin [Sun, 16 Aug 2020 22:40:14 +0000 (23:40 +0100)]
IVGCVSW-5214 Add ARMNN_NO_DEPRECATE_WARN to Concat and Splitter Layers
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I15eeda7d63d134194faa9fa09ff6a23d928b208b
Jan Eilers [Wed, 12 Aug 2020 13:59:06 +0000 (14:59 +0100)]
IVGCVSW-5200 Update pyarmnn
* Add HalfPixelCenters to Resize
* Update pyarmnn version to semantic versioning
* Add fill operator
* Add Bf16 optimization
* Add Gather operator
* Update TransposeConvolution2d descriptor
* Add Rank operator
* Add load dynamic tensor support of TfLiteParser
Signed-off-by: Jan Eilers <jan.eilers@arm.com>
Change-Id: I7e76ed286ab87bd97a65ff62868ba7db7967376f
Nikhil Raj [Fri, 14 Aug 2020 11:10:39 +0000 (12:10 +0100)]
IVGCVSW-4813 Update semantic versioning of ArmNN to 22.0.0 for 20.08 release
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: Ida6100eb62c46971b6958addfc69f15eb0634ba2
Keith Davis [Sun, 16 Aug 2020 22:44:15 +0000 (23:44 +0100)]
IVGCVSW-5107 Allow Split to use subtensor on x and y
Signed-off-by: Keith Davis <keith.davis@arm.com>
Change-Id: I2370d260b750f36842c23f08e8a00ccf976d0aed
Narumol Prangnawarat [Mon, 17 Aug 2020 10:42:20 +0000 (11:42 +0100)]
IVGCVSW-5221 Fix dynamic backend build failure
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I0c007db23cd703f7c37c120ef177d67476882c34
Teresa Charlin [Mon, 17 Aug 2020 00:01:06 +0000 (01:01 +0100)]
IVGCVSW-5217 Add ARMNN_NO_DEPRECATE_WARN to layer tests
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I3c2c3d0c5d743b9faf05e6e9bcb4a9c9fd369ebc
Teresa Charlin [Sun, 16 Aug 2020 23:58:28 +0000 (00:58 +0100)]
IVGCVSW-5215 Add ARMNN_NO_DEPRECATE_WARN to OutputHandler
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I9ee3c114b4f7d2010a955aaa5126fdfee5b3ef04
Narumol Prangnawarat [Fri, 14 Aug 2020 10:51:12 +0000 (11:51 +0100)]
IVGCVSW-5012 Enable zero copy for Neon
* Allow memory import if padding is not required in Neon
* AddMockImportBackend for fallback tests
* Refactor GraphUtils
* Memory import unit tests
* Fallback unit tests
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: Ic2e141e12774bf6d915e77745b6f6d2d83d9b82d
Teresa Charlin [Sat, 15 Aug 2020 11:23:29 +0000 (12:23 +0100)]
IVGCVSW-5216 Remove CreateTensorHandle from Transpose
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Iea9cc3a36021aac4b86ea5d8340dd8eb1f308283
Colm Donelan [Tue, 11 Aug 2020 15:27:02 +0000 (16:27 +0100)]
IVGCVSW-5181 Update FAQ to highlight Caffe problems on Ubuntu 20.04.
* Add a FAQ entry about the version of OpenCV causing build failures
of Caffe on Ubuntu 20.04.
Signed-off-by: Colm Donelan <Colm.Donelan@arm.com>
Change-Id: Ic2b5b72c16a1b49411795acf14a35b5dae79d41b
Francis Murtagh [Fri, 14 Aug 2020 16:24:39 +0000 (17:24 +0100)]
IVGCVSW-5218 Remove CreateTensorHandle from DetectionPostProcess and Prelu
* Remove default arguments in Neon and CL causing ambiguity
Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
Change-Id: I314885719a16311b68c7bda37cd54b2ca0d14480
Ayan Halder [Fri, 14 Aug 2020 16:02:36 +0000 (17:02 +0100)]
Fix linker err missing boost filesystem library
One needs Boost filesystem library to build armnn.so and GatordMock
Signed-off-by: Ayan Halder <ayan.halder@arm.com>
Change-Id: I108910047fa723e26c87ed6b1e9d401fae3e985e
Jim Flynn [Fri, 14 Aug 2020 10:07:21 +0000 (11:07 +0100)]
Fix linker err missing boost filesystem library
Change-Id: I6b09b80cfde86cb0f496aa95a47b13ae30d5d99b
Signed-off-by: Jim Flynn <jim.flynn@arm.com>
Teresa Charlin [Thu, 13 Aug 2020 17:25:42 +0000 (18:25 +0100)]
Update ACL pin to
547b2e7aa07db4dd41f99e492c40710f2548c6ba
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Icaca98eb61c7201618b951134c655bacdb6c9657
Teresa Charlin [Wed, 12 Aug 2020 15:04:41 +0000 (16:04 +0100)]
Revert "IVGCVSW-5209 Fix for SqueezeNet failing after change in Softmax"
This reverts commit
fde170cc8cb7883ba7583a17ac3e8e07551bb6d5.
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ieb542f49ad21ba13ddc10f0440ef08521c3f0451
Teresa Charlin [Wed, 12 Aug 2020 15:47:51 +0000 (16:47 +0100)]
Update ACL pin to
27423f0c3f005155637ef7f1eb8fd31a06a9f205
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I1c2c3f6668fc63537e8824d19e767010d0dfb587
Teresa Charlin [Thu, 6 Aug 2020 10:30:46 +0000 (11:30 +0100)]
IVGCVSW-4979 Add GetTensorHandleFactory to WorkloadFactoryHelper(Ref/Ne/Cl)
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I7e4c752f396833e226d73c3569e195b796fbf482
Teresa Charlin [Wed, 12 Aug 2020 10:46:43 +0000 (11:46 +0100)]
IVGCVSW-5209 Fix for SqueezeNet failing after change in Softmax
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Iaf298384a9010715ea7040460cbc537d2cb0ab64
Teresa Charlin [Tue, 11 Aug 2020 22:00:18 +0000 (23:00 +0100)]
IVGCVSW-5207 Add to PadLayer the functions to validate and infer shapes
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I63a6da418862b0a843637d73cbe178086f23bc84
Teresa Charlin [Tue, 11 Aug 2020 18:40:58 +0000 (19:40 +0100)]
Update ACL pin to
315a20eea78a1861a55ba9fa25e244b702384f01
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I910b6e84cfbe30fba20f78f029e1d47e5df803a8
Narumol Prangnawarat [Tue, 11 Aug 2020 10:24:25 +0000 (11:24 +0100)]
IVGCVSW-5203 Fix Dynamic Sample Backend build
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: Ie2a8b0e4f439500a1978f66dd332281220c75a82
Nikhil Raj [Tue, 11 Aug 2020 09:57:50 +0000 (10:57 +0100)]
Update ACL pin to
996c777eea8acb8ce816552e77050dbf388f62be
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: Idf605ceffc3f9cc71b0803aceb20f07f57aa4a6e
Colm Donelan [Mon, 10 Aug 2020 10:00:29 +0000 (11:00 +0100)]
IVGCVSW-5181 Updating to flatbuffers 1.12.0
* Modify BuildGuideCrossCompilation.md to download flatbuffers 1.12.0
* Add FAQ entry about Flat Buffers on Ubuntu 20.04.
Signed-off-by: Colm Donelan <Colm.Donelan@arm.com>
Change-Id: I489bdb11edb32cec28aabab48c8d5af8c929b25e
Teresa Charlin [Fri, 7 Aug 2020 15:00:38 +0000 (16:00 +0100)]
Update ACL pin to
4aed4aafa2ddb0b6f4b76aef5008c8bb45599ea4
* Use axis=-1 in all softmax tests as ACL only accepts this dimension
(the most right dimension, in ACL is 0 and in ArmNN is -1).
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I4be83f60aa9505b4bf2367c4489e6f12d644c6d4
Sadik Armagan [Tue, 4 Aug 2020 13:01:05 +0000 (14:01 +0100)]
IVGCVSW-5108 Allow Concat to use subtensor on x and y
* Updated ConcatLayer to allow using subtensors on x/y if padding is not required
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I46a8fb9f17b976b76e069bb82614b6628a206717
Teresa Charlin [Wed, 5 Aug 2020 16:43:54 +0000 (17:43 +0100)]
IVGCVSW-5013 Add TensorHandleFactory to Sample Dynamic Tensor
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I9f8367ebb59a73570a1a2de68aaadba98abef11c
Finn Williams [Fri, 7 Aug 2020 10:43:24 +0000 (11:43 +0100)]
IVGCVSW-5170 Do not resend timeline data if TimelineReporting is already enabled
Signed-off-by: Finn Williams <Finn.Williams@arm.com>
Change-Id: I79f19dd1c1b66d199008c0010c33b5a55e0e89f2
Teresa Charlin [Thu, 6 Aug 2020 16:25:08 +0000 (17:25 +0100)]
Update ACL pin to
b972ae62dd877eb53e6ad56ee124cfbc89441e2d
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I91a82edc9f67c9a6dc53d72a4b65dd75e043e3f2
Jan Eilers [Thu, 6 Aug 2020 11:03:16 +0000 (12:03 +0100)]
IVGCVSW-5187, Github#432 Fix common/include/Packet.hpp not found in DynamicBackendSample
Signed-off-by: Jan Eilers <jan.eilers@arm.com>
Change-Id: Ib9c93c193abb89fb0e7d1a5a3c32f544372e1aeb
Teresa Charlin [Wed, 5 Aug 2020 15:00:38 +0000 (16:00 +0100)]
Updated ACL pin to
0499dff9293a86d3d53f72fed0a38b2823563674
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I637d93f72a521a8fbcd4e0f5a61cf3e7f9cd5976
Teresa Charlin [Tue, 4 Aug 2020 15:20:01 +0000 (16:20 +0100)]
Update ACL pin to
ac4c03042d7a3020f87cea641e69aa38a684ddd7
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I20ad98ab3b16d950ce972ad067c9961d418bf548
Teresa Charlin [Fri, 31 Jul 2020 14:24:33 +0000 (15:24 +0100)]
Update ACL pin to
3b64e3e78c166773fea680afb4829d886e90552d
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I23dfa2465438fa6fac602639884cf27d702304fb
Teresa Charlin [Wed, 29 Jul 2020 08:36:41 +0000 (09:36 +0100)]
IVGCVSW-4712 Fill layer datatype adjustments
* Input layer to be int32 instead of same type as output
* Enable float16 end to end tests
* Neon and Cl layer support check for backend
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I6bc889077c8da63eeff66bd45730ce5d8783c419
Francis Murtagh [Thu, 30 Jul 2020 17:03:40 +0000 (18:03 +0100)]
IVGCVSW-5174 Fix i386 Floor and AbsTest
* Remove QSymm16 support for Floor to match NNApi and disable RefLayerTest
* Return nullptr for floor workload if quantized type
* Fix SimpleAbsTest incorrect output
Signed-off-by: Francis Murtagh <francis.murtagh@arm.com>
Change-Id: I80d9e2fb78777d0a3fc7ce6d12b5eb4af3fd1d3a
Teresa Charlin [Wed, 29 Jul 2020 13:47:39 +0000 (14:47 +0100)]
Update ACL to
a179798501af2b3939f9282b2f03ef4f98471d81
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Iec00568a6feaeeff816025d9cc38531090d12cba
Teresa Charlin [Wed, 29 Jul 2020 13:29:20 +0000 (14:29 +0100)]
IVGCVSW-4713 Add EndToEnd test for RANK
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ia8f237a2500986e01843defb75787694a20ba24c
Jim Flynn [Thu, 30 Jul 2020 10:47:02 +0000 (11:47 +0100)]
IVGCVSW-5171 Change library name to allow adbPush
Change-Id: Ifc79b433dfcc034822cfb538102b936987e382c8
Signed-off-by: Jim Flynn <jim.flynn@arm.com>
David Monahan [Tue, 21 Jul 2020 10:16:51 +0000 (11:16 +0100)]
IVGCVSW-5085 Updates to CL and NEON TensorHandleFactory
* Update the CL and Neon TensorHandleFactories to not use SubTensors if
Axis is on x or y
Signed-off-by: David Monahan <david.monahan@arm.com>
Change-Id: I782b89f50a92b21fdcbe68dab0281ad265fb3b63
Teresa Charlin [Tue, 28 Jul 2020 14:17:12 +0000 (15:17 +0100)]
IVGCVSW-5167 Use a generic axis in CL/Neon LogSoftmax and Softmax workload
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Id72d2c2851adcc1dd8f00a6103642b16ebe3a964
Jim Flynn [Mon, 20 Jul 2020 15:57:44 +0000 (16:57 +0100)]
IVGCVSW-5166 Pull out the common and server side code into standalone libraries
Change-Id: I180f84c493a9b2be4b93b25d312ebdd9e71b1735
Signed-off-by: Jim Flynn <jim.flynn@arm.com>
Sadik Armagan [Tue, 14 Jul 2020 09:02:22 +0000 (10:02 +0100)]
IVGCVSW-4980 Introduce InferAndValidate option to ExecuteNetwork for parsers
* Introduced infer-output-shape option to TfLiteParser in ExecuteNetwork app
!armnn:3591
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: I30bd5e51ac2b6759169e22a44586fd97986f2402
Teresa Charlin [Wed, 29 Jul 2020 11:06:40 +0000 (12:06 +0100)]
Update ACL pin
42e57362933b7fa04f9a86297fa75ed38c5e3c97
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I7c27c371c00aeb1eba61b7a0137232cca175c8dd
Sadik Armagan [Tue, 28 Jul 2020 09:42:13 +0000 (10:42 +0100)]
IVGCVSW-4932 Introduce ShapeInferenceMethod to TfLite Parser
* Introduced ShapeInferenceMethod::InferAndValidate to TfLiteParser
* Added unit tests
Signed-off-by: Sadik Armagan <sadik.armagan@arm.com>
Change-Id: Iad4aadce92912e7645b1652019ec4af478b7fc32
Jan Eilers [Tue, 28 Jul 2020 13:00:06 +0000 (14:00 +0100)]
Github#433 Add HardSwish support to TfLiteParser
Signed-off-by: Jan Eilers <jan.eilers@arm.com>
Change-Id: Ic476f8d80bba080ab459db9e6a59cbafd307d129
Teresa Charlin [Fri, 24 Jul 2020 13:59:07 +0000 (14:59 +0100)]
IVGCVSW-4973 Enable QLstm projection unit tests on NEON
*Cosmetic changes on NeonQLstmWorkload
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I53e00ec31845d4c7d1f00d53d179b8540dcee608
Teresa Charlin [Mon, 27 Jul 2020 10:27:19 +0000 (11:27 +0100)]
IVGCVSW-4712 Add EndToEnd test for FILL
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Ic89bcbbd580abe1b05bd26748db704e83cf65bea
Kevin May [Tue, 28 Jul 2020 10:29:04 +0000 (11:29 +0100)]
IVGCVSW-5079 Fix for Timeline decoder segfaults when given bad data
* Check packet size/length in ReadSwTraceMessage
* Update existing Unit tests
* Add new Unit tests
Signed-off-by: Kevin May <kevin.may@arm.com>
Change-Id: Ie15be8bc289d7bcb354a259312aada5268bff4e4
Narumol Prangnawarat [Mon, 27 Jul 2020 14:52:13 +0000 (15:52 +0100)]
IVGCVSW-5011 Implement GetCapabilities in NeonTensorHandleFactory
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I43591ec1250c1d84d286de85956a86eb5e2abc2a
Nikhil Raj [Mon, 27 Jul 2020 09:45:14 +0000 (10:45 +0100)]
Update ACL pin to
ad7515d231acb075a9585e52f257373b1a1b5d1f
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: Ie20fc8aecd0cd0b70836993c4c66a5e2eae4f840
Finn Williams [Fri, 3 Jul 2020 09:12:03 +0000 (10:12 +0100)]
IVGCVSW-5155 Update Arm NN API to allow for call to shape inference
Signed-off-by: Finn Williams <Finn.Williams@arm.com>
Change-Id: I0a2babe5b5b09eb81c9900dc3a05071034a0440b
Teresa Charlin [Mon, 20 Jul 2020 13:23:02 +0000 (14:23 +0100)]
IVGCVSW-3896 Add CL LOG_SOFTMAX Workload
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I6c5704c6c7bcf1dd008061c037c81a712365aa74
Teresa Charlin [Fri, 24 Jul 2020 13:12:48 +0000 (14:12 +0100)]
Update ACL pin to
318c9f40770b2d1c06f8c0fe3f7929812503733e
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Idb6e09d783646856ea0dd54307a0af62adea1580
Keith Davis [Thu, 2 Jul 2020 10:49:26 +0000 (11:49 +0100)]
IVGCVSW-3897 Add NEON LOG_SOFTMAX Workload
Signed-off-by: Keith Davis <keith.davis@arm.com>
Change-Id: I632b5ac7f188853de68e232e81568b3fca238d42
Teresa Charlin [Thu, 23 Jul 2020 16:59:00 +0000 (17:59 +0100)]
IVGCVSW-4889/IVGCVSW-4890 CL/Neon UnitTests for align_corners & half_pixels
*Add more UnitTests to the reference implemenation.
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: Idbce68baa76b049e5f741f790a5cfd75acb54a95
Narumol Prangnawarat [Wed, 22 Jul 2020 11:46:51 +0000 (12:46 +0100)]
IVGCVSW-5010 Add GetCapabilities to ITensorHandleFactory
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: Ie8acb9c729af4f95488aecf795f45ff12364f9ca
Narumol Prangnawarat [Tue, 23 Jun 2020 10:45:56 +0000 (11:45 +0100)]
IVGCVSW-5118 Fix incorrect scoped profiling
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I58c78c1dffaa9804d4ac79366e2d7af1c6c2133b
Jim Flynn [Thu, 23 Jul 2020 10:20:59 +0000 (11:20 +0100)]
IVGCVSW-5165 add the fmt library to third-party folder
Change-Id: I5519ce6c7811152a6b534898b9fdbaf5214c28d5
Signed-off-by: Jim Flynn <jim.flynn@arm.com>
Teresa Charlin [Thu, 16 Jul 2020 11:44:16 +0000 (12:44 +0100)]
Update ACL pin to
aa95ddc2abb7cef0b2edd03f7c4c9d9c6b9d7cf4
IVGCVSW-5136 Adapt to change in ConcatenateLayer in ACL
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I5bc1752215a7b5a91c449e62809ae06f501c6108
Narumol Prangnawarat [Tue, 21 Jul 2020 09:21:19 +0000 (10:21 +0100)]
IVGCVSW-5078 Fix segmentation fault on Yolo v3 big app
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I6ec9bbc22f26dcb55f7424da5bb1d21c66a7bf01
Jim Flynn [Thu, 16 Jul 2020 10:23:45 +0000 (11:23 +0100)]
IVGCVSW-5104 Fix OS-X GetCurrentThreadId build error
Change-Id: Ic54b8d387d8507209e8777d25dcd2c4bc1641bf4
Signed-off-by: Jim Flynn <jim.flynn@arm.com>
Jim Flynn [Wed, 15 Jul 2020 10:45:37 +0000 (11:45 +0100)]
Add FAQ entries about IVGCVSW-4861 and GitHub #402
* IVGCVSW-4861 relates to unit test errors with combinations of GCC and
pthreads in an armv7 environment.
* GitHub #402 relates to compiling Boost in a OS-X environment.
Signed-off-by: Colm Donelan <Colm.Donelan@arm.com>
Signed-off-by: Jim Flynn <jim.flynn@arm.com>
Change-Id: I724767f8f897578b4dd3242f56e28cab11966296
Colm Donelan [Tue, 14 Jul 2020 20:23:13 +0000 (21:23 +0100)]
IVGCVSW-5080 Fixing OOB unit test failures in GatordMockTests.
* Adding CHILD, EXECUTION_OF and PROCESS_ID to CheckTimelinePackets in
GatorDMockEndToEnd.
* Adding an index to avoid updating label offsets in CheckTimelinePackets.
* Updating relationship size and label size in
GatorDMockTimeLineActivation.
Signed-off-by: Colm Donelan <Colm.Donelan@arm.com>
Change-Id: Ia5096b899387a7d9770a81d35fc5672c7fba283b
Jim Flynn [Tue, 14 Jul 2020 08:50:59 +0000 (09:50 +0100)]
IVGCVSW-5101 Add a SOL/EOL and a process ID label to Network
Change-Id: I6261f46404a3aab5c069bca40586994d31d26fe8
Signed-off-by: Jim Flynn <jim.flynn@arm.com>
Jim Flynn [Tue, 14 Jul 2020 13:26:27 +0000 (14:26 +0100)]
Make it build on MACOSX
Still need to explicitly defined
-DCMAKE_CXX_FLAGS=--std=c++14
which that flags should goes into CMakefile.txt
JF: Fixed merge failure by removing Filesystem.cpp
and updated the copyright headers to new standard
Change-Id: I6d0886bd86bc1ddb593028194852551d43c77745
Signed-off-by: Keith Mok <ek9852@gmail.com>
Signed-off-by: Jim Flynn <jim.flynn@arm.com>
Jan Eilers [Mon, 13 Jul 2020 12:40:24 +0000 (13:40 +0100)]
IVGCVSW-4847, Github #393 Fix TfLite reshape operator
* Change order of reading target shape. Checks built-in option first
then input.
Signed-off-by: Jan Eilers <jan.eilers@arm.com>
Change-Id: Iddc39188ebfb7f71e33c35847de7506a02d807af
Colm Donelan [Mon, 13 Jul 2020 19:23:58 +0000 (20:23 +0100)]
Fixing compile error on Ubuntu 16.04
* gcc-arm-linux-gnueabihf/xenial,now 4:5.3.1-1ubuntu1 amd64 complains
about error: array must be initialized with a brace-enclosed initializer
in include/armnn/Tensor.hpp:122:81.
Signed-off-by: Colm Donelan <Colm.Donelan@arm.com>
Change-Id: Ib8f72bbcf86586a704a0e98c5ba07fefdf5665a8
Jim Flynn [Thu, 9 Jul 2020 12:48:16 +0000 (13:48 +0100)]
IVGCVSW-5076 Correct Profiling Stream Metadata packet revision table
Change-Id: Ic3f8637642d3f3a5925f5b82e3729b3b654a7f3e
Signed-off-by: Jim Flynn <jim.flynn@arm.com>
Narumol Prangnawarat [Fri, 10 Jul 2020 16:50:53 +0000 (17:50 +0100)]
IVGCVSW-5078 Fix segmentation fault on Yolo V3 Big App
* Register TensorHandleFactories when create Workload Factory
Signed-off-by: Narumol Prangnawarat <narumol.prangnawarat@arm.com>
Change-Id: I6217c6f00d27b67e42b8043cbaf72d9db5789bfb
Finn Williams [Fri, 3 Jul 2020 09:12:03 +0000 (10:12 +0100)]
IVGCVSW-4929 Implement ShapeInferenceMethod in all Layers
Signed-off-by: Finn Williams <Finn.Williams@arm.com>
Change-Id: I2c2d99f97cf89814140b057a9f93f41b364197f5
David Monahan [Fri, 10 Jul 2020 15:54:58 +0000 (16:54 +0100)]
Remove unnecessary header file
Signed-off-by: David Monahan <david.monahan@arm.com>
Change-Id: I4444fa485bf47c4caf133505927699507c4eb306
James Conroy [Fri, 10 Jul 2020 12:01:01 +0000 (13:01 +0100)]
Github #388 Remove TfLite Concat quant validation
* Matching quant validation was added to TfLite
parser as per TfLite documentation.
* Removing this validation for Concat and Pad as
it is causing some nightly model test failures.
Signed-off-by: James Conroy <james.conroy@arm.com>
Change-Id: Ie128fb66cc2d4a193ac22dc9eb41f5703d113663
Jim Flynn [Thu, 9 Jul 2020 06:28:37 +0000 (07:28 +0100)]
IVGCVSW-5095 Make timeline report the Linux Thread ID not the pthread ID
Change-Id: Id69519fd9ef57716de4e389ed4156710a904c701
Signed-off-by: Jim Flynn <jim.flynn@arm.com>
Nikhil Raj [Thu, 9 Jul 2020 10:19:53 +0000 (11:19 +0100)]
Update ACL pin to
6b6a16faa9375365d444b2a3998381b22cd6cd5b
Signed-off-by: Nikhil Raj <nikhil.raj@arm.com>
Change-Id: I8c4c1b397a7537605bb7f9f7471e407e4b21ffe0
Colm Donelan [Sun, 28 Jun 2020 07:16:46 +0000 (08:16 +0100)]
IVGCVSW-4487 Remove boot/dll.hpp from dynamic backends test.
* Replace the call to boost::dll::program_location() with a cmake
variable set at runtime. PROJECT_BINARY_DIR appears to fit the bill.
* Fall back to a boost custom CLI to allow it to be user specified.
* Add a FAQ entry describing potential problems.
* Adding flexibility to GetSharedObjectsTestImpl to cope with
sym links in file systems.
Signed-off-by: Colm Donelan <Colm.Donelan@arm.com>
Change-Id: Iccf3f1b0f2911101e1f61bffd73cefba271bbfe2
James Conroy [Wed, 24 Jun 2020 14:39:55 +0000 (15:39 +0100)]
GitHub #388 Add matching quant checks in TfLite parser
* Adds checks for matching tensor quantization info
as per TfLite documentation.
* Adds missing layer nullptr assert checks.
Signed-off-by: James Conroy <james.conroy@arm.com>
Change-Id: I4344a3554e349ce8edcd14126f63bc627637e0cd
David Monahan [Tue, 30 Jun 2020 14:57:56 +0000 (15:57 +0100)]
IVGCVSW-5005 Fix Deprecated Functions in CL/NEON Resize Workload
* Update CL pin to
f3ad9513dd46fca1d6c5e4550286480fdbaba056
IVGCVSW-5005: Fix Deprecated Functions in CL/NEON Resize Workload
* Add missing virtual function to NeonIntercepterScheduler
* Update CL/Neon Resize Workloads to use ScaleKernelInfo
* Update CL/Neon Resize workloads to set correct Sampling Policy for Half Pixels
IVGCVSW-4981: Change CL/NEON Softmax axis value
* Default value is now 0
Signed-off-by: David Monahan <david.monahan@arm.com>
Change-Id: I8a14c6a64e5a24bc1a66a7d3685cd388c2245702
Teresa Charlin [Wed, 8 Jul 2020 10:12:47 +0000 (11:12 +0100)]
IVGCVSW-5087 NNT zero sized failing after TensorShape refactor
Signed-off-by: Teresa Charlin <teresa.charlinreyes@arm.com>
Change-Id: I71bf28aae86766db8777b011c769b547436e7d39
Jan Eilers [Wed, 1 Jul 2020 15:35:35 +0000 (16:35 +0100)]
Remove new occurence of boost::polymorphic_downcast
Signed-off-by: Jan Eilers <jan.eilers@arm.com>
Change-Id: Id9446c30f6a31c5064bab08b40805e463700072c
Finn Williams [Wed, 10 Jun 2020 14:53:46 +0000 (15:53 +0100)]
IVGCVSW-4624 Add a RANK Reference Implementation
* Add Rank front end
* Add Rank reference implementation
* Add Rank serialization support
* Add Scalar serialization support
Signed-off-by: Finn Williams <Finn.Williams@arm.com>
Change-Id: I06e4a468c2a84e79bae2e6c5348596bbbf853b4b
Mike Kelly [Mon, 6 Jul 2020 18:24:15 +0000 (19:24 +0100)]
GitHub #418 AddBroadcastReshapeLayer can cause inputs to be connected incorrectly
* Fixed issue where AddBroadcastReshapeLayer would always connect the Reshaped input to the first input slot and the other input to the first input slot.
Signed-off-by: Mike Kelly <mike.kelly@arm.com>
Change-Id: Ifd2745a819eb0f72ff9433690afc92a6a34f2ec3
Jan Eilers [Wed, 1 Jul 2020 17:09:39 +0000 (18:09 +0100)]
IVGCVSW-4770 Fix segmentation fault in FileOnlyProfilingDecoratorTests
Signed-off-by: Jan Eilers <jan.eilers@arm.com>
Change-Id: I5725aa418b50fc14ce4e6638fe29a74d762cc304
Ryan OShea [Mon, 6 Jul 2020 10:45:50 +0000 (11:45 +0100)]
IVGCVSW-4919 Strided Slice 0 Dimension Tensor Fix
* Add check Axis' shrunk to 0 dimensions
Signed-off-by: Ryan OShea <Ryan.OShea2@arm.com>
Change-Id: Ic2544f7538d2df4a561f88ce8909533424fa2a25
Ryan OShea [Fri, 3 Jul 2020 10:40:12 +0000 (11:40 +0100)]
IVGCVSW-4920 Invalid Negative Stride fix
* Add check for negative stride with ShrinkAxisMask
Signed-off-by: Ryan OShea <Ryan.OShea2@arm.com>
Change-Id: I69ecd2915d94278d6313d8279361c4dc675adb74
Colm Donelan [Fri, 3 Jul 2020 14:54:28 +0000 (15:54 +0100)]
IVGCVSW-4988 Add handling output shape parameter to TransposeConvolution2d
* Add m_OutputShape and m_OutputShapeEnabled to
TransposeConvolution2dDescriptor.
* Update TfLite parser to populate m_OutputShape if found in the model.
Handle both Signed32 from tflite files and QAsymmU8 from test fixtures.
* Update TransposeConvolution2dLayer to use m_OutputShape instead of
InferOutputShapes if specified.
Signed-off-by: Colm Donelan <Colm.Donelan@arm.com>
Change-Id: Ia6933065375eb8006c916f1ca67c38dc50bc205c
projects / platform / upstream / armnn.git / log