Maxime Ripard [Fri, 14 Apr 2023 09:14:22 +0000 (11:14 +0200)]
drm/vc4: tests: Add tests for BCM2712 PixelValve Muxing
The BCM2712 has a simpler pipeline than the BCM2711, and thus the muxing
requirements are different. Create some tests to make sure we get proper
muxing decisions.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Fri, 17 Feb 2023 12:38:10 +0000 (13:38 +0100)]
drm/vc4: tests: Add BCM2712 mock driver
The BCM2712 has a simpler pipeline that can only output to a writeback
connector and two HDMI controllers.
Let's allow our kunit tests to create a mock of that pipeline.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Fri, 24 Mar 2023 09:02:59 +0000 (10:02 +0100)]
drm/vc4: tests: Return the allocated output
Some tests will need to retrieve the output that was just allocated by
vc4_mock_atomic_add_output().
Instead of making them look them up in the DRM device, we can simply
make vc4_mock_atomic_add_output() return an error pointer that holds the
allocated output instead of the error code.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Fri, 24 Mar 2023 08:58:15 +0000 (09:58 +0100)]
drm/vc4: tests: Drop drm parameter for vc4_find_crtc_for_encoder
The DRM device pointer and the DRM encoder pointer are redundant, since
the latter is attached to the former and we can just follow the
drm_encoder->dev pointer.
Let's remove the drm_device pointer argument.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Fri, 17 Feb 2023 12:35:16 +0000 (13:35 +0100)]
drm/vc4: tests: Switch generation mockup to a switch
Testing whether the VideoCore generation we want to mock is vc5 or vc4
worked so far, but will be difficult to extend to support BCM2712 (VC6).
Convert to a switch.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Tue, 21 Feb 2023 13:38:32 +0000 (14:38 +0100)]
drm/vc4: Add additional warn_on
Some code path in vc4 are conditional to a generation and cannot be
executed on others. Let's put a WARN_ON if that ever happens.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Mon, 20 Feb 2023 16:16:01 +0000 (17:16 +0100)]
drm/vc4: txp: Add BCM2712 MOPLET support
The BCM2712 features a simpler TXP called MOPLET. Let's add support for
it.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Thu, 27 Apr 2023 07:30:49 +0000 (09:30 +0200)]
drm/vc4: txp: Add support for BCM2712 MOP
The BCM2712 has an evolution of what used to be called TXP in the
earlier SoCs, but is now called MOP.
There's a few differences still, so we can add a new compatible to deal
with them easily.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Thu, 27 Apr 2023 09:49:28 +0000 (11:49 +0200)]
drm/vc4: txp: Add a new TXP encoder type
Starting with BCM2712, we'll have a two TXP. Let's follow the HDMI
example and add two encoder types for TXP: TXP0 and TXP1.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Thu, 27 Apr 2023 09:26:10 +0000 (11:26 +0200)]
drm/vc4: txp: Move the encoder type in the variant structure
We'll have multiple TXP instances in the BCM2712, so we can't use a
single encoder type anymore. Let's tie the encoder type to the
compatible.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Fri, 14 Apr 2023 15:47:11 +0000 (17:47 +0200)]
drm/vc4: txp: Handle 40-bits DMA Addresses
The BCM2712 MOP and MOPLET can handle addresses larger than 32bits
through an extra register. We can easily support it and make it
conditional based on the compatible through a boolean in our variant
structure.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Thu, 27 Apr 2023 07:47:54 +0000 (09:47 +0200)]
drm/vc4: txp: Add horizontal and vertical size offset toggle bit
The new writeback controllers that can be found on the BCM2712 require
to have their horizontal and vertical size reduced by one.
Let's tie that behaviour to the compatible so we can support both the
new and old controllers.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Thu, 27 Apr 2023 07:30:33 +0000 (09:30 +0200)]
drm/vc4: txp: Add byte enable toggle bit
The MOPLET doesn't have the BYTE_ENABLE field to set, but the TXP and
MOP do, so let's add a boolean to control whether or not we need to set
it.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Tue, 25 Apr 2023 08:21:53 +0000 (10:21 +0200)]
drm/vc4: txp: Rename TXP data structure
The TXP data structure has a name too generic for the multiple variants
we'll have to support. Let's rename it to mention the SoC it applies to.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Tue, 25 Apr 2023 08:12:32 +0000 (10:12 +0200)]
drm/vc4: txp: Introduce structure to deal with revision differences
The BCM2712 will have several TXP with small differences. Let's add a
structure tied to the compatible to deal with those differences.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Fri, 17 Feb 2023 14:34:30 +0000 (15:34 +0100)]
drm/vc4: hdmi: Add support for BCM2712 HDMI controllers
The HDMI controllers found in the BCM2712 are largely the ones found in
the BCM2711 with a different PHY.
There's some difference with how timings are split between registers,
and HDMI1 is now able to run at 4k/60Hz.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Fri, 17 Feb 2023 14:33:23 +0000 (15:33 +0100)]
drm/vc4: crtc: Add support for BCM2712 PixelValves
The PixelValves found on the BCM2712 are similar to the ones found in
the previous generation.
Compared to BCM2711, the pixelvalves only drive one HDMI controller each
and HDMI1 PixelValve has a FIFO long enough to support 4k at 60Hz.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Fri, 17 Feb 2023 14:25:16 +0000 (15:25 +0100)]
drm/vc4: hvs: Support BCM2712 HVS
The HVS found in the BCM2712, while having a similar role, is very
different from the one found in the previous SoCs. Indeed, the register
layout is fairly different, and the DLIST format is new as well.
Let's introduce the needed functions to support the new HVS.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Fri, 17 Feb 2023 14:29:52 +0000 (15:29 +0100)]
drm/vc4: drv: Support BCM2712
The BCM2712 has an improved display pipeline, most notably with a
different HVS and only HDMI and writeback outputs.
Let's introduce it as a new VideoCore generation and compatible.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Fri, 17 Feb 2023 12:36:51 +0000 (13:36 +0100)]
dt-bindings: display: Add BCM2712 KMS driver bindings
The BCM2712 SoC comes with a new variation of the videocore display
pipeline. Let's create a new compatible for it.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Fri, 17 Feb 2023 12:36:36 +0000 (13:36 +0100)]
dt-bindings: display: Add BCM2712 MOPLET bindings
The BCM2712 has a MOPLET controller which is basically a TXP without the
transpose feature.
Express that by adding a new compatible for it.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Fri, 17 Feb 2023 12:36:36 +0000 (13:36 +0100)]
dt-bindings: display: Add BCM2712 MOP bindings
The BCM2712 has a MOP controller which is basically a new revision of
the TXP.
Express that by adding a new compatible for it.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Fri, 17 Feb 2023 12:36:27 +0000 (13:36 +0100)]
dt-bindings: display: Add BCM2712 PixelValve bindings
The BCM2712 has 3 different pixelvalves that are similar to the ones
found in the previous generations but with slightly different
capabilities.
Express that using a new set of compatibles.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Fri, 17 Feb 2023 12:36:14 +0000 (13:36 +0100)]
dt-bindings: display: Add BCM2712 HVS bindings
The BCM2712 has a completely different HVS than the previous
generations, so let's add a new compatible for it.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Fri, 17 Feb 2023 12:36:02 +0000 (13:36 +0100)]
dt-bindings: display: Add BCM2712 HDMI bindings
The BCM2712 HDMI controller uses a slightly different HDMI controller
than the BCM2711, and a completely different PHY.
Let's introduce a new compatible for it.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Tim Gover [Thu, 13 Jul 2023 16:47:22 +0000 (17:47 +0100)]
drm/vc4: Enable SCALER_CONTROL early in HVS init
Always enable SCALER_CONTROL before attempting other HVS
operations. It's safe to write to some parts of the HVS but
in general it's dangerous to do this because it can cause bus
lockups.
Signed-off-by: Tim Gover <tim.gover@raspberrypi.com>
Dom Cobley [Thu, 22 Jun 2023 13:06:40 +0000 (14:06 +0100)]
drm/vc4: hvs: Remove ABORT_ON_EMPTY flag
ABORT_ON_EMPTY chooses whether the HVS abandons the current frame
when it experiences an underflow, or attempts to continue.
In theory the frame should be black from the point of underflow,
compared to a shift of sebsequent pixels to the left.
Unfortunately it seems to put the HVS is a bad state where it is not
possible to recover simply. This typically requires a reboot
following the 'flip done timed out message'.
Discussion with Broadcom has suggested we don't use this flag.
All their testing is done with it disabled.
Additionally setting BLANK_INSERT_EN causes the HDMI to output
blank pixels on an underflow which avoids it losing sync.
After this change a 'flip done timed out' due to sdram bandwidth
starvation or too low a clock is recoverable once the situation improves.
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Dave Stevenson [Fri, 1 Sep 2023 12:45:08 +0000 (13:45 +0100)]
drm: vc4: Remove incorrect limit from hvs_dlist debugfs function
The debugfs function to dump dlists aborted at 256 bytes,
when actually the dlist memory is generally significantly
larger but varies based on SoC.
We already have the correct limit in __vc4_hvs_alloc, so
store it for use in the debugfs dlist function.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Dave Stevenson [Thu, 24 Aug 2023 14:36:21 +0000 (15:36 +0100)]
drm/vc4: Fix dlist debug not resetting the next entry pointer
The debug function to display the dlists didn't reset next_entry_start
when starting each display, so resulting in not stopping the
list at the correct place.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Dave Stevenson [Mon, 25 Sep 2023 15:57:07 +0000 (16:57 +0100)]
drm/vc4: Move the buffer offset out of the vc4_plane_state
The offset fields in vc4_plane_state are described as being
the offset for each buffer in the bo, however it is used to
store the complete DMA address that is then written into the
register.
The DMA address including the fb ofset can be retrieved
using drm_fb_dma_get_gem_addr, and the offset adjustment due to
clipping is local to vc4_plane_mode_set.
Drop the offset field from the state, and compute the complete
DMA address in vc4_plane_mode_set.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Dom Cobley [Tue, 5 Sep 2023 18:38:24 +0000 (19:38 +0100)]
drm/vc4: hdmi: Avoid hang with debug registers when suspended
Trying to read /sys/kernel/debug/dri/1/hdmi1_regs
when the hdmi is disconnected results in a fatal system hang.
This is due to the pm suspend code disabling the dvp clock.
That is just a gate of the 108MHz clock in DVP_HT_RPI_MISC_CONFIG,
which results in accesses hanging AXI bus.
Protect against this.
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Dave Stevenson [Wed, 23 Aug 2023 16:48:23 +0000 (17:48 +0100)]
drm/vc4: UV planes vertical scaling must always be enabled
It has been observed that a YUV422 unity scaled plane isn't displayed.
Enabling vertical scaling on the UV planes solves this. There is
already a similar clause to always enable horizontal scaling on the
UV planes.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Maxime Ripard [Fri, 24 Mar 2023 14:45:50 +0000 (15:45 +0100)]
drm/vc4: hvs: Change prototype of __vc4_hvs_alloc to pass registers
The BCM2712 HVS has registers to report the size of the various SRAM the
driver uses, and their size actually differ depending on the stepping.
The initialisation of the memory pools happen in the __vc4_hvs_alloc()
function that also allocates the main HVS structure, that will then hold
the pointer to the memory mapping of the registers.
This creates some kind of circular dependency that we can break by
passing the mapping pointer as an argument for __vc4_hvs_alloc() to use
to query to get the SRAM sizes and initialise the memory pools
accordingly.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Thu, 13 Apr 2023 08:12:19 +0000 (10:12 +0200)]
drm/vc4: hvs: Rework LBM alignment
With the introduction of the support for BCM2712, the check of whether
we're running on vc5 or not to compute the LBM alignment requirement
doesn't work anymore.
Moreover, the LBM size will need to be computed in words for the
BCM2712, while we've had sizes in bytes so far.
Aligning on either 64 or 32 words is thus fairly harmful on BCM2712, so
let's just explicitly align the size when needed, and then call
drm_mm_insert_node_generic() with an alignment of 1.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Fri, 24 Mar 2023 08:56:31 +0000 (09:56 +0100)]
drm/vc4: plane: Change ptr0_offset to an array
The BCM2712 will have a fairly different dlist, that will feature one
Pointer 0 word for each plane.
Let's prepare by changing the ptr0_offset variable that holds the offset
in a dlist of the pointer 0 word to an array.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Fri, 17 Feb 2023 12:41:59 +0000 (13:41 +0100)]
drm/vc4: hvs: Rename hvs_regs list
The HVS register set has been heavily modified in the BCM2712, and we'll
thus need a separate debugfs_reg32 array for it.
The name hvs_regs is thus a bit too generic, so let's rename it to
something more specific.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Fri, 17 Feb 2023 14:14:55 +0000 (15:14 +0100)]
drm/vc4: hvs: Create cob_init function
Just like the HVS itself, the COB parameters will be fairly different in
the BCM2712.
Let's move the COB parameters computation and its initialisation to a
separate function that will be easier to extend in the future.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Fri, 17 Feb 2023 13:36:28 +0000 (14:36 +0100)]
drm/vc4: hvs: Create hw_init function
Since the BCM2712 will feature a significantly different HVS, let's move
the hardware initialisation part of our bind function into a separate
function.
That way, it will be easier to extend in the future.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Thu, 27 Apr 2023 11:46:53 +0000 (13:46 +0200)]
drm/vc4: hvs: Test if the EOF interrupts are enabled
We currently enable the EOF interrupts through the CRTC destroy_state
implementation.
However, nothing guarantees that we can't call destroy_state multiple
times in a row, and therefore before the EOF interrupt even happens.
This means we would enable the interrupt multiple times but disable it
only once. It wasn't an issue so far since the interrupts were only
enabled by setting a bit in a register, but with BCM2712 we will use an
external interrupt controller, with a refcounted interrupt.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Fri, 17 Feb 2023 14:07:29 +0000 (15:07 +0100)]
drm/vc4: hvs: Use switch statement to simplify enabling/disabling irq
Since we'll support BCM2712 soon, let's move the logic to enable and
disable the end-of-frame interrupts to a switch to extend it more
easily.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Fri, 17 Feb 2023 14:07:29 +0000 (15:07 +0100)]
drm/vc4: hvs: Use switch statement to simplify vc4_hvs_get_fifo_from_output
Since we'll support BCM2712 soon, let's move the logic behind
vc4_hvs_get_fifo_from_output() to a switch to extend it more easily.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Fri, 17 Feb 2023 12:29:27 +0000 (13:29 +0100)]
drm/vc4: Make v3d paths unavailable on any generation newer than vc4
The V3D IP has been separate since BCM2711, so let's make sure we issue
a WARN if we're running not only on BCM2711, but also anything newer.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Fri, 17 Feb 2023 12:07:36 +0000 (13:07 +0100)]
drm/vc4: Introduce generation number enum
With the introduction of the BCM2712 support, we will get yet another
generation of display engine to support.
The binary check of whether it's VC5 or not thus doesn't work anymore,
especially since some parts of the driver will have changed with BCM2711,
and some others with BCM2712.
Let's introduce an enum to store the generation the driver is running
on, which should provide more flexibility.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Fri, 17 Feb 2023 12:39:13 +0000 (13:39 +0100)]
drm/vc4: crtc: Move assigned_channel to a variable
We access multiple times the vc4_crtc_state->assigned_channel variable
in the vc4_crtc_get_scanout_position() function, so let's store it in a
local variable.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Fri, 17 Feb 2023 13:26:44 +0000 (14:26 +0100)]
drm/vc4: plane: Use return variable in atomic_check
The vc4_plane_atomic_check() directly returns the result of the final
function it calls.
Using the already defined ret variable to check its content on error,
and a separate return 0 on success, makes it easier to extend.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Wed, 22 Mar 2023 15:17:57 +0000 (16:17 +0100)]
drm/vc4: plane: Add more debugging for LBM allocation
LBM allocations need a different size depending on the line length,
format, etc.
This can get tricky, and fail. Let's add some more prints to ease the
debugging when it does.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Wed, 22 Mar 2023 08:53:17 +0000 (09:53 +0100)]
drm/vc4: hvs: Print error if we fail an allocation
We need to allocate a few additional structures when checking our
atomic_state, especially related to hardware SRAM that will hold the
plane descriptors (DLIST) and the current line context (LBM) during
composition.
Since those allocation can fail, let's add some error message in that
case to help debug what goes wrong.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Wed, 22 Mar 2023 08:51:51 +0000 (09:51 +0100)]
drm/vc4: hvs: More logging for dlist generation
DLIST generation can get pretty tricky and there's not a lot of debug in
the driver to help. Let's add a few more to track the generated DLIST
size.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Thu, 23 Feb 2023 18:44:32 +0000 (19:44 +0100)]
drm/vc4: hdmi: Warn if writing to an unknown HDMI register
The VC4 HDMI driver has a bunch of accessors to read from a register.
The read accessor was warning when accessing an unknown register, but
the write one was just returning silently.
Let's make sure we warn also when writing to an unknown register.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Wed, 29 Mar 2023 14:26:52 +0000 (15:26 +0100)]
drm/vc4: hdmi: Enable the audio clock
The audio clock is used by the HDMI controller driver and we were using
it to get its audio rate and compute the dividers needed to reach a
given audio sample rate.
However, we were never enabling it, which was resulting in lockups on
the BCM2712.
Fixes:
632ee3aa8786 ("drm/vc4: hdmi: Add audio-related callbacks")
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Dave Stevenson [Thu, 30 Mar 2023 16:18:36 +0000 (17:18 +0100)]
drm/vc4: Fix FKMS for when the YUV chroma planes are different buffers
The code was assuming that it was a single buffer with offsets,
when kmstest uses separate buffers and 0 offsets for each plane.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Dom Cobley [Thu, 13 Apr 2023 16:41:11 +0000 (17:41 +0100)]
drm/vc4: Treat zero sized destination as full screen
Kodi video planes come through with all zeros for fullscreen
Without this check, we WARN when writing width-1, height-1
to destination dlist
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Dom Cobley [Mon, 17 Apr 2023 14:21:41 +0000 (15:21 +0100)]
vc4_drv: Avoid panic when booted with no kms
If kms/fkms overlay is not present we have no matching drivers
and so match is NULL.
It is not safe to call component_master_add_with_match with a null match argument.
So don't do that
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Jonathan Bell [Fri, 15 Sep 2023 16:33:03 +0000 (17:33 +0100)]
drivers: rtc-rpi: add battery charge circuit control and readback
Parse devicetree for a charger voltage and apply it. If nonzero and a
valid voltage, the firmware will enable charging, otherwise the charger
circuit is disabled.
Add sysfs attributes to read back the supported charge voltage range,
the measured battery voltage, and the charger setpoint.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
Jonathan Bell [Mon, 18 Sep 2023 15:33:06 +0000 (16:33 +0100)]
dt: bindings: update rpi-rtc binding
Add property for bcm2712 firmware RTC driver charger control
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
Nick Hollinghurst [Fri, 28 Jul 2023 10:59:28 +0000 (11:59 +0100)]
media: i2c: imx296: Add 2ms delay after releasing standby
The delay seems to be required to reliably read model ID.
(The same delay is already used when starting the camera.)
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
Phil Elwell [Tue, 11 Jul 2023 09:17:29 +0000 (10:17 +0100)]
hwmon: (pwm-fan) Add fan speed register support
Some platforms include a fan-speed register that reports RPM directly
as an alternative to counting interrupts from the fan tachometer input.
Add support for reading a register at a given offset (rpm-offset) within
a block declared in another node (rpm-regmap). This indirection allows
the usual address mapping to be performed, and for address sharing with
another driver.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Dom Cobley [Fri, 7 Jul 2023 19:16:06 +0000 (20:16 +0100)]
dt-bindings: rtc: new binding for Raspberry Pi RTC driver
Add binding for the new RTC driver for Raspberry Pi.
This platform has an RTC managed by firmware, and this RTC
driver provides the simple mailbox interface to access it.
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Dom Cobley [Fri, 7 Jul 2023 19:00:45 +0000 (20:00 +0100)]
rtc: rtc-rpi: Add simple RTC driver for Raspberry Pi
This supports setting and reading the real time clock
and supports wakeup alarms.
To support wake up alarms you want this bootloader config:
POWER_OFF_ON_HALT=1
WAKE_ON_GPIO=0
You can test with:
echo +600 | sudo tee /sys/class/rtc/rtc0/wakealarm
sudo halt
That will halt (in an almost no power state),
then wake and restart after 10 minutes.
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Dom Cobley [Wed, 28 Jun 2023 15:24:29 +0000 (16:24 +0100)]
irqchip/irq-brcmstb-l2: Add config for 2711 controller
We currently see these regularly:
[ 25.157560] irq 31, desc:
00000000c15e6d2c, depth: 0, count: 0, unhandled: 0
[ 25.164658] ->handle_irq():
00000000b1775675, brcmstb_l2_intc_irq_handle+0x0/0x1a8
[ 25.172352] ->irq_data.chip():
00000000fea59f1c, gic_chip_mode1+0x0/0x108
[ 25.179166] ->action():
000000003eda6d6f
[ 25.183096] ->action->handler():
000000002c09e646, bad_chained_irq+0x0/0x58
[ 25.190084] IRQ_LEVEL set
[ 25.193142] IRQ_NOPROBE set
[ 25.196198] IRQ_NOREQUEST set
[ 25.199255] IRQ_NOTHREAD set
with:
$ cat /proc/interrupts | grep 31:
31: 1 0 0 0 GICv2 129 Level (null)
The interrupt is described in DT with IRQ_TYPE_LEVEL_HIGH
But the current compatible string uses the controller in edge triggered mode
(as that config matches our register layout).
Add a new compatible structure for level driven interrupt with our register layout.
We had already been using this compatible string in device tree, so no change needed
there.
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Nick Hollinghurst [Thu, 11 May 2023 15:37:34 +0000 (16:37 +0100)]
drivers: iommu: Add BCM2712 IOMMU
Add a driver for BCM2712 IOMMUs.
There is a small driver for the Shared IOMMU TLB Cache.
Each IOMMU instance is a separate device.
IOMMUs are set up with a "pass-through" range covering
the lowest 40BGytes (which should cover all of SDRAM)
for the benefit of non-IOMMU-aware devices that share
a physical IOMMU; and translation for addresses in the
range 40GB to 42GB.
An optional parameter adds a DMA offset (which otherwise
would be lost?) to virtual addresses for DMA masters on a
bus such as PCIe.
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
Dom Cobley [Wed, 24 May 2023 18:32:16 +0000 (19:32 +0100)]
dmaengine: bcm2835: Fix dma driver for BCM2835-38
The previous commit broke support on older devices.
Make the breaking parts of patch conditional on
the device being used.
Fixes:
6e1856ac7c39 ("dmaengine: bcm2835: HACK: Support DMA-Lite channels")
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Dom Cobley [Thu, 25 May 2023 13:48:28 +0000 (14:48 +0100)]
dmaengine: bcm2835: Rename to_bcm2711_cbaddr to to_40bit_cbaddr
As the shifted address also applies to bcm2712,
give the function a more specific name.
Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Jonathan Bell [Mon, 22 May 2023 14:31:17 +0000 (15:31 +0100)]
net: phy: broadcom: optionally enable link-down powersave based on DT
It's really a function of the board whether or not to use this feature
as it may require MAC compatibility as well as interop testing.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
Maxime Ripard [Fri, 24 Feb 2023 13:12:50 +0000 (14:12 +0100)]
clk: bcm: rpi: Add disp clock
BCM2712 has an extra clock exposed by the firmware called DISP, and used
by (at least) the HVS. Let's add it to the list of clocks to register in
Linux.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Maxime Ripard [Thu, 13 Apr 2023 14:52:19 +0000 (16:52 +0200)]
dmaengine: bcm2835: HACK: Support DMA-Lite channels
The BCM2712 has a DMA-Lite controller that is basically a BCM2835-style
DMA controller that supports 40 bits DMA addresses.
We need it for HDMI audio to work, but this breaks BCM2835-38 so we
should rework this later.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Phil Elwell [Wed, 8 Mar 2023 16:53:38 +0000 (16:53 +0000)]
dmaengine: bcm2835: Add BCM2712 support
BCM2712 has 6 40-bit channels - DMA6 to DMA11. Add a new compatible
string to indicate that the current platform is BCM2712.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Jonathan Bell [Thu, 4 May 2023 14:48:53 +0000 (15:48 +0100)]
drivers: hwmon: rp1-adc: check conversion validity before supplying value
The SAR ADC architecture may complete a conversion but instability in the
comparator can corrupt the result. Such corruption is signalled in the CS
ERR bit, asserted alongside each conversion result.
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
Iago Toral Quiroga [Thu, 2 Mar 2023 10:56:52 +0000 (11:56 +0100)]
dt-bindings: gpu: v3d: Add BCM2712 to compatibility list
Phil Elwell [Fri, 4 Aug 2023 10:26:10 +0000 (11:26 +0100)]
drm/v3d: Improve MMU support for larger pages
The built-in MMU driver went most of the way towards supporting larger
kernel pages, but dropped the ball when it comes to calculating indexes
into the page table. Fix it.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Iago Toral Quiroga [Thu, 2 Mar 2023 10:54:45 +0000 (11:54 +0100)]
drm/v3d: add brcm,2712-v3d as a compatible V3D device
Iago Toral Quiroga [Thu, 2 Mar 2023 10:52:08 +0000 (11:52 +0100)]
drm/v3d: update UAPI to match user-space for V3D 7.x
V3D t.x takes a new parameter to configure TFU jobs that needs
to be provided by user space.
Iago Toral Quiroga [Thu, 2 Mar 2023 10:49:46 +0000 (11:49 +0100)]
drm/v3d: fix up register addresses for V3D 7.x
v2: fix kernel panic with debug-fs interface to list registers
Nick Hollinghurst [Mon, 4 Sep 2023 09:57:47 +0000 (10:57 +0100)]
spi: spi-gpio: Implement spidelay when requested bit rate <= 1 Mbps
Formerly the delay was omitted as bit-banged SPI seldom achieved
even one Mbit/s; but some modern platforms can run faster, and
some SPI devices may need to be clocked slower.
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
Nick Hollinghurst [Wed, 1 Mar 2023 17:57:11 +0000 (17:57 +0000)]
spi: gpio: Fix spi-gpio to correctly implement sck-idle-input
Formerly, if configured using DT, CS GPIOs were driven from spi.c
and it was possible for CS to be asserted (low) *before* starting
to drive SCK. CS GPIOs have been brought under control of this
driver in both ACPI and DT cases, with a fixup for GPIO polarity.
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
Phil Elwell [Wed, 8 Mar 2023 14:42:48 +0000 (14:42 +0000)]
soc: bcm: bcm2835-power: Add support for BCM2712
BCM2712 has a PM block but neither ASB nor RPIVID_ASB. Use the absence
of the "asb" register range to indicate BCM2712 and its different PM
register range.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Phil Elwell [Wed, 8 Mar 2023 14:27:58 +0000 (14:27 +0000)]
mfd: bcm2835-pm: Add support for BCM2712
BCM2712 lacks the "asb" and "rpivid_asb" register ranges, but still
requires the use of the bcm2835-power driver to reset the V3D block.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Phil Elwell [Thu, 2 Mar 2023 18:04:42 +0000 (18:04 +0000)]
hwmon: Add RP1 ADC and temperature driver
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Phil Elwell [Fri, 1 Sep 2023 13:07:48 +0000 (14:07 +0100)]
ASoC: bcm: Remove dependency on BCM2835 I2S
These soundcard drivers don't rely on a specific I2S interface, so
remove the dependency declarations.
See: https://github.com/raspberrypi/linux-2712/issues/111
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Phil Elwell [Fri, 21 Jul 2023 11:07:16 +0000 (12:07 +0100)]
ASOC: dwc: Fix 16-bit audio handling
IMO the Synopsys datasheet could be clearer in this area, but it seems
that the DMA data ports (DMATX and DMARX) expect left and right samples
in alternate writes; if a stereo pair is pushed in a single 32-bit
write, the upper half is ignored, leading to double speed audio with a
confused stereo image. Make sure the necessary changes happen by
updating the DMA configuration data in the hw_params method.
The set_bclk_ratio change was made at a time when it looked like it
could be causing an error, but I think the division of responsibilities
is clearer this way (and the kernel log clearer without the info-level
message).
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Phil Elwell [Mon, 3 Jul 2023 09:14:43 +0000 (10:14 +0100)]
ASOC: dwc: Improve DMA shutdown
Disabling the I2S interface with outstanding transfers prevents the
DMAC from shutting down, so keep it partially active after a stop.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Phil Elwell [Mon, 3 Jul 2023 08:08:16 +0000 (09:08 +0100)]
ASoC: dwc: Add DMACR handling
Add control of the DMACR register, which is required for paced DMA
(i.e. DREQ) support.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Phil Elwell [Thu, 4 Mar 2021 14:49:23 +0000 (14:49 +0000)]
ASoC: dwc: Support set_bclk_ratio
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Phil Elwell [Wed, 15 Feb 2023 09:46:35 +0000 (09:46 +0000)]
dt-bindings: net: cdns,macb: AXI tuning properties
Add optional properties to tune the AXI interface -
cdns,aw2w-max-pipe, cdns,ar2r-max-pipe and cdns,use-aw2b-fill.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Naushir Patuck [Tue, 14 Feb 2023 17:30:12 +0000 (17:30 +0000)]
media: rp1: Add CFE (Camera Front End) support
Signed-off-by: Naushir Patuck <naush@raspberrypi.com>
Naushir Patuck [Tue, 14 Feb 2023 20:58:59 +0000 (20:58 +0000)]
v4l2: Add pisp compression format support to v4l2
Signed-off-by: Naushir Patuck <naush@raspberrypi.com>
Nick Hollinghurst [Tue, 19 Sep 2023 16:54:41 +0000 (17:54 +0100)]
drm: Add RP1 VEC driver
Add support for the RP1 VEC hardware.
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
Nick Hollinghurst [Tue, 19 Sep 2023 16:51:49 +0000 (17:51 +0100)]
drm: Add RP1 DPI driver
Add support for the RP1 DPI hardware.
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
Nick Hollinghurst [Tue, 14 Feb 2023 14:58:33 +0000 (14:58 +0000)]
drm: Add RP1 DSI driver
Add support for the RP1 DSI hardware.
Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
Phil Elwell [Tue, 14 Feb 2023 14:03:54 +0000 (14:03 +0000)]
pwm: Add support for RP1 PWM
Add a driver for the RP1 PWM block.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Phil Elwell [Tue, 29 Nov 2022 10:09:54 +0000 (10:09 +0000)]
spi: dw: Handle combined tx and rx messages
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Phil Elwell [Wed, 28 Apr 2021 16:46:01 +0000 (17:46 +0100)]
dmaengine: dw-axi-dmac: Fixes for RP1
Don't assume that DMA addresses of devices are the same as their
physical addresses - convert correctly.
The CFG2 register layout is used when there are more than 8 channels,
but also when configured for more than 16 target peripheral devices
because the index of the handshake signal has to be made wider.
Reset the DMAC on probe
The driver goes to the trouble of tracking when transfers have been
paused, but then doesn't report that state when queried.
Not having APB registers is not an error - for most use cases it's
not even of interest, it's expected. Demote the message to debug level,
which is disabled by default.
Each channel has a descriptor pool, which is shared between transfers.
It is unsafe to treat the total number of descriptors allocated from a
pool as the number allocated to a specific transfer; doing so leads
to releasing buffers that shouldn't be released and walking off the
ends of descriptor lists. Instead, give each transfer descriptor its
own count.
Support partial transfers:
Some use cases involve streaming from a device where the transfer only
proceeds when the device's FIFO occupancy exceeds a certain threshold.
In such cases (e.g. when pulling data from a UART) it is important to
know how much data has been transferred so far, in order that remaining
bytes can be read from the FIFO directly by software.
Add the necessary code to provide this "residue" value with a finer,
sub-transfer granularity.
In order to prevent the occasional byte getting stuck in the DMA
controller's internal buffers, restrict the destination memory width
to the source register width.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Phil Elwell [Fri, 4 Dec 2020 15:20:36 +0000 (15:20 +0000)]
i2c: designware: Add SMBUS quick command support
The SMBUS emulation code turns an SMBUS quick command into a zero-
length read. This controller can't do zero length accesses, but it
can do quick commands, so reverse the emulation. The alternative
would be to properly implement the SMBUS support but that is a lot
more work, and unnecessary just to get i2cdetect working.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Phil Elwell [Wed, 12 Oct 2022 13:20:07 +0000 (14:20 +0100)]
clk: rp1: Add sdio-clk driver
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Phil Elwell [Wed, 12 Oct 2022 13:07:32 +0000 (14:07 +0100)]
mmc: sdhci-of-dwcmshc: rp1 sdio changes
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Liam Fraser [Thu, 14 Mar 2019 16:01:26 +0000 (16:01 +0000)]
mmc: sdhci-of-dwcmshc: define sdio timeout clocks
Signed-off-by: Liam Fraser <liam@raspberrypi.com>
Phil Elwell [Wed, 12 Oct 2022 12:24:51 +0000 (13:24 +0100)]
serial: pl011: rp1 uart support
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Phil Elwell [Mon, 10 Oct 2022 13:21:11 +0000 (14:21 +0100)]
pinctrl: Add rp1 driver
RP1 exposes GPIOs. Add a pinctrl driver to allow control of those.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Phil Elwell [Fri, 28 Oct 2022 13:13:30 +0000 (14:13 +0100)]
dt-bindings: pinctrl: Add bindings for Raspberry Pi RP1
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
Phil Elwell [Mon, 10 Oct 2022 13:25:38 +0000 (14:25 +0100)]
clk: Add rp1 clock driver
RP1 contains various PLLs and clocks for driving the hardware
blocks, so add a driver to configure these.
Signed-off-by: Phil Elwell <phil@raspberrypi.com>