Masahiro Yamada [Fri, 20 Apr 2018 09:14:26 +0000 (18:14 +0900)]
ARM: dts: uniphier: drop u-boot, dm-pre-reloc from SD/eMMC clock node
Now that the SD/eMMC driver does not use the clock driver in SPL,
remove u-boot,dm-pre-reloc properties to let the fdtgrep tool drop
the unnecessary nodes.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 20 Apr 2018 09:14:25 +0000 (18:14 +0900)]
mmc: uniphier-sd: skip clock set-up for SPL
The size of SPL is hitting the limit (64KB) for uniphier_v7_defconfig.
When booting from SD/eMMC, obviously its clock has been properly set up
by the boot ROM. Acutually, no need to re-initialize the clock in SPL.
Using a clock driver would generalize the SoC specific code, but
solving the memory footprint problem would win.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 20 Apr 2018 09:14:24 +0000 (18:14 +0900)]
mmc: tmio: move clk_enable() to each driver's probe function
I need to differentiate the clock handling for uniphier-sd. Move it
to each driver's probe function from the tmio common code so that
renesas-sdhi will not be affected.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Fri, 20 Apr 2018 08:42:29 +0000 (17:42 +0900)]
ARM: uniphier: increase CONFIG_SYS_MONITOR_LEN
With the recent changes, the size of the U-Boot proper image for
uniphier_v7_defconfig exceeded the current limit, 512KB, then SPL
fails to load the whole of the U-Boot proper. Increase the size.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tom Rini [Sun, 22 Apr 2018 13:30:36 +0000 (09:30 -0400)]
Merge git://git.denx.de/u-boot-usb
Tom Rini [Sun, 22 Apr 2018 13:30:29 +0000 (09:30 -0400)]
Merge git://git.denx.de/u-boot-sh
Neil Armstrong [Thu, 12 Apr 2018 08:13:50 +0000 (10:13 +0200)]
usb: dwc3-of-simple: fix error check of clk_get_bulk when disabled
The disabled clk API returns -ENOSYS unlike the reset API returning -ENOTSUPP.
Fixes:
ca7fdc8b1267 ("usb: host: Add simple of glue driver for DWC3 USB Controllers integration")
Reported-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Jean-Jacques Hiblot [Thu, 12 Apr 2018 08:41:11 +0000 (10:41 +0200)]
usb: dwc3-of-simple: Add support for DRA7/AM57 platforms.
Add the compatibility with "ti,dwc3" and enable it by default if DM_USB
is enabled.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Jean-Jacques Hiblot [Thu, 12 Apr 2018 08:41:10 +0000 (10:41 +0200)]
usb: dwc3-of-simple: Fix dependencies
This simple glue layer does not require CONFIG_MISC, but it does require
CONFIG_DM_USB.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Marek Vasut [Sat, 21 Apr 2018 14:19:56 +0000 (16:19 +0200)]
ARM: rmobile: Update E2 Silk
The E2 Silk port was broken since some time. This patch updates
the E2 Silk port to use modern frameworks, DM, DT probing, SPL
for the preloading and puts it on par with the M2 Porter board.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
NOTE: The port is missing support for I2C1 for DA9063 reset, since the
I2C driver needs to be converted to DM and DT probing. That's not
an issue for this patch though, since the reset was broken on Silk
since forever.
Marek Vasut [Sat, 21 Apr 2018 15:53:07 +0000 (17:53 +0200)]
mmc: sh_mmcif: Migrate configs to CONFIG_SH_MMCIF
Migrate the U-Boot configs to Kconfig CONFIG_SH_MMCIF .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Marek Vasut [Sat, 21 Apr 2018 15:40:20 +0000 (17:40 +0200)]
mmc: sh_mmcif: Add Kconfig entry
Add Kconfig entry for SH MMCIF driver.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Marek Vasut [Sat, 21 Apr 2018 15:27:11 +0000 (17:27 +0200)]
mmc: sh_mmcif: Add DM and DT probing support
Add MMC DM and DT probing support into the SH MMCIF driver.
This patch abstracts out the common bits of the send command
and set ios functions, so they can be used both by DM and non
DM setups and adds the DM probe support.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Marek Vasut [Sat, 21 Apr 2018 14:35:49 +0000 (16:35 +0200)]
clk: renesas: Minor clean up of the R8A7794 clock driver
The initconst is not used in U-Boot, drop it. The r8a7794_crit_mod_clks
is also not used in U-Boot, so drop it too.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Sat, 21 Apr 2018 14:36:54 +0000 (16:36 +0200)]
clk: renesas: Minor clean up of the R8A7792 clock driver
The initconst is not used in U-Boot, drop it. The r8a7792_crit_mod_clks
is also not used in U-Boot, so drop it too.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Tom Rini [Wed, 18 Apr 2018 20:24:26 +0000 (16:24 -0400)]
Merge git://git.denx.de/u-boot-uniphier
Tom Rini [Wed, 18 Apr 2018 20:24:14 +0000 (16:24 -0400)]
Merge git://git.denx.de/u-boot-sh
Kunihiko Hayashi [Wed, 18 Apr 2018 01:06:07 +0000 (10:06 +0900)]
reset: uniphier: add ethernet reset control support
Add reset lines for ethernet controller on each SoC.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Kunihiko Hayashi [Wed, 18 Apr 2018 01:05:33 +0000 (10:05 +0900)]
clk: uniphier: add ethernet clock control support
Add clock control for ethernet controller on each SoC.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamada [Mon, 16 Apr 2018 03:35:33 +0000 (12:35 +0900)]
ARM: dts: uniphier: sync DT with Linux 4.17-rc1
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tom Rini [Tue, 17 Apr 2018 21:45:28 +0000 (17:45 -0400)]
Merge git://git.denx.de/u-boot-socfpga
Tom Rini [Tue, 17 Apr 2018 21:45:18 +0000 (17:45 -0400)]
Merge tag 'arc-for-2018.05-rc3' of git://git.denx.de/u-boot-arc
Subtle ARC fixes for v2018.05-RC3
These are only very subtle clean-ups here and there including:
* Correctly specified CPU freq for HSDK
(production boards are all shipped with 500MHZ as opposed
to early batch running at 1GHz)
* Addition of SNPS internal group email to MAINTAINERS file
* Switch to Hush shell on AXS10x boards
Neil Armstrong [Thu, 12 Apr 2018 08:03:19 +0000 (10:03 +0200)]
reset: fix bulk API when DM_RESET is disabled
In the commit "reset: Add get/assert/deassert/release for bulk of reset signals"
the disabled reset_release_bulk() and reset_get_bulk() used the wrong
struct clk_bulk instead of struct reset_ctl_bulk.
Fixes:
0c28233903b5 ("reset: Add get/assert/deassert/release for bulk of reset signals")
Reported-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bryan O'Donoghue [Sun, 15 Apr 2018 10:48:17 +0000 (11:48 +0100)]
bootm: Align cache flush begin address
commit
b4d956f6bc0f ("bootm: Align cache flush end address correctly")
aligns the end address of the cache flush operation to a cache-line size to
ensure lower-layers in the code accept the range provided and flush.
A similar action should be taken for the begin address of a cache flush
operation. The load address may not be aligned to a cache-line boundary, so
ensure the passed address is aligned.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reported-by: Breno Matheus Lima <brenomatheus@gmail.com>
Suggested-by: Tom Rini <trini@konsulko.com>
Cc: Simon Glass <sjg@chromium.org>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Neil Armstrong [Tue, 17 Apr 2018 09:30:31 +0000 (11:30 +0200)]
clk: fix clk_get_bulk when phandle error
This fixes the Coverity Defect CID 175347 when dev_count_phandle_with_args()
returns a negative value.
Fixes:
a855be87da49 ("clk: Add get/enable/disable/release for a bulk of clocks")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Tue, 17 Apr 2018 09:30:22 +0000 (11:30 +0200)]
reset: fix reset_get_bulk when phandle error
This fixes the Coverity Defect CID 175348 when dev_count_phandle_with_args()
returns a negative value.
Fixes:
0c28233903b5 ("reset: Add get/assert/deassert/release for bulk of reset signals")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Marek Vasut [Tue, 17 Apr 2018 12:13:11 +0000 (14:13 +0200)]
ARM: rmobile: Update M2 Koelsch
The M2 Koelsch port was broken since some time. This patch updates
the M2 Koelsch port to use modern frameworks, DM, DT probing, SPL
for the preloading and puts it on par with the M2 Porter board.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Eugeniy Paltsev [Tue, 17 Apr 2018 16:01:15 +0000 (19:01 +0300)]
ARC: Remove unused DECLARE_GLOBAL_DATA_PTR from init_helpers.c
"Global data" structure "gd" is not used in init_helpers.c
thus DECLARE_GLOBAL_DATA_PTR might be safely removed.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Eugeniy Paltsev [Tue, 17 Apr 2018 14:30:40 +0000 (17:30 +0300)]
ARC: Update ARC architecture maintainers
Update ARC architecture maintainers and add
uboot-snps-arc@synopsys.com mailing list.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Eugeniy Paltsev [Tue, 17 Apr 2018 14:15:31 +0000 (17:15 +0300)]
ARC: AXS10x: Enable hush shell
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Eugeniy Paltsev [Tue, 17 Apr 2018 13:27:15 +0000 (16:27 +0300)]
ARC: HSDK: Fix CPU frequency value
CPU on HSDK board runs at 500MHz after preloader so fix
wrong CPU frequency value in hsdk_defconfig.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Tom Rini [Tue, 17 Apr 2018 13:22:31 +0000 (09:22 -0400)]
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 17 Apr 2018 13:14:33 +0000 (09:14 -0400)]
Merge git://git.denx.de/u-boot-marvell
Dinh Nguyen [Thu, 12 Apr 2018 14:03:37 +0000 (09:03 -0500)]
configs: socfpga: disable EFI and ISO partition types
None of the SoCFPGA platforms will support EFI/ISO partition types that
is needed for DISTRO_DEFAULTS. SoCFPGA bootroom will only support 0xa2
partition type.
This is needed to help limit the size of the SPL to within the 64k limit
that is required for SoCFPGA.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Dinh Nguyen [Wed, 4 Apr 2018 22:18:25 +0000 (17:18 -0500)]
configs: socfpga: add DM_RESET
Add the DM reset driver to socfpga defconfigs.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Dinh Nguyen [Wed, 4 Apr 2018 22:18:24 +0000 (17:18 -0500)]
i2c: designware: add reset ctrl to driver
Add code to look for a reset manager property. Specifically, look for the
reset-names of 'i2c'. A reset property is an optional feature, so only print
out a warning and do not fail if a reset property is not present.
If a reset property is discovered, then use it to deassert, thus bringing the
IP out of reset.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Dinh Nguyen [Wed, 4 Apr 2018 22:18:23 +0000 (17:18 -0500)]
arm: dts: socfpga: add reset property
Add reset dts property to the i2c nodes.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Dinh Nguyen [Wed, 4 Apr 2018 22:18:22 +0000 (17:18 -0500)]
arm: dts: socfpga: enables i2c0 in socfpga_de0_nano
Add all the appropriate i2c alias in the base socfpga dtsi and enables
the i2c node on the DE0 NANO board.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Dinh Nguyen [Wed, 4 Apr 2018 22:18:21 +0000 (17:18 -0500)]
configs: socfpga: convert i2c to dm
Enable DM I2C driver on SoCFPGA platforms.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Dinh Nguyen [Wed, 4 Apr 2018 22:18:20 +0000 (17:18 -0500)]
reset: socfpga: add reset driver for SoCFPGA platform
Add a DM compatible reset driver for the SoCFPGA platform.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Dinh Nguyen [Fri, 9 Mar 2018 03:39:26 +0000 (21:39 -0600)]
ARM: dts: stratix10: Add base dtsi and devkit dts
From the Linux v4.16-rc4, add the base dtsi and devkit dts files for
the Stratix10 SoCFPGA platform.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Dinh Nguyen [Fri, 9 Mar 2018 03:39:25 +0000 (21:39 -0600)]
ARM64: stratix10: add reset manager includes
Pulled from linux v4.16-rc4.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Chin Liang See [Fri, 9 Mar 2018 03:39:24 +0000 (21:39 -0600)]
arm: socfpga: stratix10: Add base address map for Statix10 SoC
Add the base address map for Stratix10 SoC
Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Marek Vasut [Tue, 17 Apr 2018 00:49:48 +0000 (02:49 +0200)]
ARM: rmobile: Ignore U-Boot env when started via JTAG on Porter
When U-Boot is started via JTAG, ignore the installed environment
as it may interfere with the recovery of the board.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Mon, 16 Apr 2018 23:07:23 +0000 (01:07 +0200)]
ARM: rmobile: Ignore U-Boot env when started via JTAG on Stout
When U-Boot is started via JTAG, ignore the installed environment
as it may interfere with the recovery of the board.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Sun, 15 Apr 2018 22:16:43 +0000 (00:16 +0200)]
ARM: rmobile: Enable fitImage support on Gen3
Enable fitImage support to be on the right side of the millenium.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Sun, 15 Apr 2018 22:56:15 +0000 (00:56 +0200)]
ARM: rmobile: Disable SDHI on R8A77970 V3M Eagle
The SDHI is not routed to a slot on the Eagle, so disable it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Tue, 13 Feb 2018 20:34:03 +0000 (21:34 +0100)]
ARM: rmobile: Enable RPC QSPI on R8A77970 V3M Eagle
Enable the RPC QSPI driver on R8A77970 V3M Eagle and configure
the environment layout to match that used by old U-Boot.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Sat, 29 Jul 2017 19:28:34 +0000 (21:28 +0200)]
ARM: rmobile: Add Renesas RPC HF/QSPI DT nodes
Add device tree nodes for the Renesas RPC HF/QSPI controller.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Matt Pelland [Mon, 16 Apr 2018 14:08:18 +0000 (10:08 -0400)]
mmc: mv_sdhci: zero out sdhci_host structure
The mv_sdhci driver was not zeroing the sdhci_host structure it
allocates causing random access violations in parts of the mmc core
where the "ops" member pointers are checked and called if not NULL.
Signed-off-by: Matt Pelland <mpelland@starry.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Tom Rini [Tue, 17 Apr 2018 00:00:14 +0000 (20:00 -0400)]
Prepare v2018.05-rc2
Signed-off-by: Tom Rini <trini@konsulko.com>
Patrice Chotard [Mon, 16 Apr 2018 08:35:08 +0000 (10:35 +0200)]
serial: Remove duplicated line in Makefile
The line "-obj-$(CONFIG_STM32_SERIAL) += serial_stm32.o"
is found twice in Makefile.
Fixes:
ae74de0dfd45 ("serial: stm32: Rename serial_stm32x7.c to serial_stm32.c"
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Lukasz Majewski [Sun, 15 Apr 2018 19:50:11 +0000 (21:50 +0200)]
doc: Update git-mailrc entry for lukma (lukma@denx.de)
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Heinrich Schuchardt [Sat, 14 Apr 2018 13:41:00 +0000 (15:41 +0200)]
env: mmc/fat/ext4: undefined reference to `mmc_initialize'
For CONFIG_ENV_FAT_INTERFACE != 'mmc' a link error
env/fat.c:93: undefined reference to `mmc_initialize'
occurs if CONFIG_MMC_SUPPORT is not enabled.
Fixes:
26862b4a40c3 ("env: mmc/fat/ext4: make sure that the MMC sub-system
is initialized before using it")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Siva Durga Prasad Paladugu [Fri, 13 Apr 2018 05:57:21 +0000 (07:57 +0200)]
env: Relocate env drivers if manual reloc is required
Relocate env drivers if manual relocation is enabled. This
patch fixes the issue of u-boot hang incase if env is
present in any of the flash devices.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Sjoerd Simons [Thu, 12 Apr 2018 16:09:58 +0000 (18:09 +0200)]
Kconfig: Enlarge default SYS_MALLOC_F_LEN for AM33XX
Since commit
8e14ba7bd524 ("gpio: omap_gpio: Add DM_FLAG_PRE_RELOC
flag") omap GPIO gets bound before relocation. Unfortunately due to
this, on at least the beaglebone black, the pre-relocation memory pool
gets exhausted before probing the serial port. This then causes u-boot
to panic as CONFIG_REQUIRE_SERIAL_CONSOLE is set...
Resolve this by resizing the default size of the pre-relocation malloc
pool for AM335X platforms.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Alexander Graf [Thu, 12 Apr 2018 07:58:44 +0000 (09:58 +0200)]
part: Disable CONFIG_SPL_ISO_PARTITION by default
We enabled CONFIG_ISO_PARTITION by default for distro boot, so that U-Boot
could load distro images that usually get shipped as iso images. These images
usually come with a board agnostic boot environment.
However, there is very little point in having ISO support enabled (for anyone
really) in SPL, as the whole idea of SPL is to load U-Boot proper which again
is board specific. So the fact that we enable ISO support in U-Boot proper does
not mean at all that we want ISO support in U-Boot SPL.
Hence, let's remove the Kconfig dependency. Along the way, let's also clean up
all those default configs that disabled SPL ISO support.
Signed-off-by: Alexander Graf <agraf@suse.de>
Tom Rini [Mon, 16 Apr 2018 17:24:20 +0000 (13:24 -0400)]
Merge git://git.denx.de/u-boot-x86
Simon Glass [Thu, 12 Apr 2018 20:04:40 +0000 (14:04 -0600)]
x86: Rename coreboot-x86 to coreboot
We only use coreboot as a target on x86 platforms, since on ARM platforms
U-Boot always runs as the primary boot loader. Rename the coreboot-x86
platform to reflect this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng [Thu, 12 Apr 2018 05:02:23 +0000 (22:02 -0700)]
doc: vxworks: Update x86 specific instructions
This updates the doc of booting VxWorks, like loading an x64 kernel,
and how to make VxWorks graphics console driver work.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng [Thu, 12 Apr 2018 05:02:22 +0000 (22:02 -0700)]
bootvx: x86: Assign bootaddr based on kernel memory base
On VxWorks x86 its bootline address is at a pre-defined offset @
0x1200. If 'bootaddr' is not passed via environment variable, we
assign its value based on the kernel memory base address.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng [Thu, 12 Apr 2018 05:02:21 +0000 (22:02 -0700)]
bootvx: Exit if bootline address is not specified
Exit the 'bootvx' command if bootline address is not specified.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng [Thu, 12 Apr 2018 05:02:20 +0000 (22:02 -0700)]
bootvx: Refactor the bootline copy codes a little bit
There is a small duplication in do_bootvx() that does the bootline
copy. Refactor this a little bit to make it simpler.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 12 Apr 2018 05:02:19 +0000 (22:02 -0700)]
bootvx: x86: Make VxWorks EFI console driver happy
When booting from EFI BIOS, VxWorks bootloader stores the EFI GOP
framebuffer info at a pre-defined offset @ 0x6100. When VxWorks
kernel boots up, its EFI console driver tries to find such a block
and if the signature matches, the framebuffer information will be
used to initialize the driver.
However it is not necessary to prepare an EFI environment for
VxWorks's EFI console driver to function (eg: EFI loader in
U-Boot). If U-Boot has already initialized the graphics card and
set it to a VESA mode that is compatible with EFI GOP, we can
simply prepare such a block for VxWorks.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 12 Apr 2018 05:02:18 +0000 (22:02 -0700)]
pci: video: Only print out when everything is OK
If video initialization fails, the "Video:" output message will be
mixed with the next console log. Change to print out such message
only when everything is OK, which improves the boot log readability.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 12 Apr 2018 05:02:17 +0000 (22:02 -0700)]
x86: Change default FRAMEBUFFER_VESA_MODE of some boards
This changes some boards' default FRAMEBUFFER_VESA_MODE to use 32-bit
pixel format for better VxWorks compatibility.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 12 Apr 2018 05:02:16 +0000 (22:02 -0700)]
video: vesa: Change default FRAMEBUFFER_VESA_MODE
This changes the default FRAMEBUFFER_VESA_MODE to use 32-bit pixel
format for better VxWorks compatibility.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 12 Apr 2018 05:02:15 +0000 (22:02 -0700)]
bios: vesa: Guard setting vesa mode with CONFIG_FRAMEBUFFER_SET_VESA_MODE
If CONFIG_FRAMEBUFFER_SET_VESA_MODE is not set, don't switch
graphics card to VESA mode. This applies to both native mode
and emulator mode of running the VGA BIOS.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Mon, 16 Apr 2018 12:31:17 +0000 (08:31 -0400)]
Merge git://git.denx.de/u-boot-cfi-flash
Bin Meng [Thu, 12 Apr 2018 05:02:14 +0000 (22:02 -0700)]
elf: Add a very simple ELF64 loader
This adds a very simple ELF64 loader via program headers, similar
to load_elf_image_phdr() that we already have.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 12 Apr 2018 05:02:13 +0000 (22:02 -0700)]
elf: Add ELF64 related structure defines
This adds ELF header, program header and section header structure
defines for the 64-bit ELF image.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 12 Apr 2018 05:02:12 +0000 (22:02 -0700)]
elf: Clean up the ELF header file
Fix various style violations in elf.h
- use correct comment format if the comment fits in just one line
- remove the ending period for the one-line comment
- use tab for the indention instead of space
- put the opening brace at the same line of a typedef/union
- remove <name> in a 'typedef struct' for consistency
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Bin Meng [Thu, 12 Apr 2018 05:02:11 +0000 (22:02 -0700)]
x86: Rename e820entry to e820_entry
This changes 'struct e820entry' to 'struct e820_entry' to conform
with the coding style.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Bin Meng [Thu, 12 Apr 2018 05:02:10 +0000 (22:02 -0700)]
x86: Use 'unsigned int' in install_e820_map() functions
This fixes the following checkpatch warning:
warning: Prefer 'unsigned int' to bare use of 'unsigned'
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Bin Meng [Thu, 12 Apr 2018 05:02:09 +0000 (22:02 -0700)]
vxworks: x86: Rename e820info to e820_info
This changes 'struct e820info' to 'struct e820_info' to conform
with the coding style.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Bin Meng [Thu, 12 Apr 2018 05:02:08 +0000 (22:02 -0700)]
bootvx: x86: Explicitly clear the bootloader image size
VxWorks bootloader stores its size at a pre-defined offset @ 0x5004.
Later when VxWorks kernel boots up and system memory information is
retrieved from the E820 table, the bootloader size will be subtracted
from the total system memory size to calculate the size of available
memory for the OS.
Explicitly clear the bootloader image size otherwise if memory
at this offset happens to contain some garbage data, the final
available memory size for the kernel is insane.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Bin Meng [Thu, 12 Apr 2018 05:02:07 +0000 (22:02 -0700)]
bootvx: x86: Prepare e820 related stuff from the given kernel memory base address
At present two environment variables 'e820data'/'e820info' are required
to boot a VxWorks x86 kernel, but this is superfluous. The offset of
these two tables are actually at a fixed offset from the kernel memory
base address and we can provide the kernel memory base address to U-Boot
via only one variable 'vx_phys_mem_base'.
Note as it name indicates, the physical address should be provided.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Bin Meng [Thu, 12 Apr 2018 05:02:06 +0000 (22:02 -0700)]
doc: vxworks: Minor update for clarity
This corrects a typo and updates several places for clarity.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Lukasz Majewski [Thu, 29 Mar 2018 14:41:11 +0000 (16:41 +0200)]
x86: Update the io.h file to use {out|in}_{be|le}X macros
The commit
3f70a6f57734 ("x86: Add clr/setbits functions")
introduced the {read|write}_ macros to manipulate data.
Those macros are not used by any code in the u-boot project (despite the
io.h itself). Other architectures use io.h with {in|out}_* macros.
This commit brings some unification across u-boot supported architectures.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Ivan Gorinov [Fri, 6 Apr 2018 21:43:04 +0000 (14:43 -0700)]
x86: Add 64-bit memory-mapped I/O functions
Add readq() and writeq() definitions for x86.
Please note: in 32-bit code readq/writeq will generate two 32-bit
memory access instructions instead of one atomic 64-bit operation.
Signed-off-by: Ivan Gorinov <ivan.gorinov@intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Mario Six [Wed, 28 Mar 2018 12:38:41 +0000 (14:38 +0200)]
mtd: cfi_flash: Make live-tree compatible
Make the cfi_flash driver compatible with a live device tree.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
Tom Rini [Sun, 15 Apr 2018 12:43:50 +0000 (08:43 -0400)]
Merge git://git.denx.de/u-boot-imx
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sun, 15 Apr 2018 12:42:37 +0000 (08:42 -0400)]
Merge git://git.denx.de/u-boot-net
Tom Rini [Sun, 15 Apr 2018 12:42:08 +0000 (08:42 -0400)]
Merge git://git.denx.de/u-boot-sh
Jon Nettleton [Tue, 10 Apr 2018 20:05:35 +0000 (17:05 -0300)]
mx6cuboxi: Fix some memory configuration errors
These changes bring mainline back into line with the configurations
that were originally set in our stable BSP.
Signed-off-by: Jon Nettleton <jon@solid-run.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Trent Piepho [Sat, 7 Apr 2018 00:11:27 +0000 (17:11 -0700)]
imx: Create distinct pre-processed mkimage config files
Each imx image is created by a separate sub-make and during this process
the mkimage config file is run though cpp.
The cpp output is to the same file no matter what imx image is being
created.
This means if two imx images are generated in parallel they will attempt
to independently produce the same pre-processed mkimage config file at
the same time.
Avoid the problem by making the pre-processed config file name unique
based on the imx image it will be used in. This way each image will
create a unique config file and they won't clobber each other when run
in parallel.
This should fixed the build bug referenced in
b5b0e4e3 ("imximage:
Remove failure when no IVT offset is found").
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Tom Rini [Fri, 6 Apr 2018 20:27:55 +0000 (16:27 -0400)]
mx31ads: Delete
This platform has been marked as orphaned since September 2013, remove.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Fri, 6 Apr 2018 20:27:54 +0000 (16:27 -0400)]
imx31_phycore: Delete
This platform has been marked as orphaned since September 2013, remove.
Signed-off-by: Tom Rini <trini@konsulko.com>
Vanessa Maegima [Fri, 6 Apr 2018 19:54:41 +0000 (16:54 -0300)]
pico-imx7d: Replace fatload command
Replace fatload with the fs generic loading interface ('load' command).
Signed-off-by: Vanessa Maegima <vanessa.maegima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Bryan O'Donoghue [Thu, 5 Apr 2018 18:46:06 +0000 (19:46 +0100)]
imx: mx7: snvs: Add an SNVS init routine
Working with HAB on the i.MX7 we've encountered a case where a board that
successfully authenticates u-boot when booting Linux via OPTEE subsequently
fails to properly bring up the RTC.
The RTC registers live in the low-power block of the Secure Non-Volatile
Storage (SNVS) block.
The root cause of the error has been traced to the HAB handing off the
SNVS-RTC in a state where HPCOMR::NPSWA_EN = 0 in other words where the
Non-Privileged Software Access Enable bit is zero. In ordinary
circumstances this is OK since we typically do not run in TZ mode, however
when we boot via HAB and enablng TrustZone, it is required to set
HPCOMR::NPSWA_EN = 1 in order for the upstream Linux driver to have
sufficient permissions to manipulate the SNVS-LP block.
On our reference board it is the difference between Linux doing this:
root@imx7s-warp-mbl:~# dmesg | grep rtc
snvs_rtc_enable read 0x00000000 from SNVS_LPLR @ 0x00000034
snvs_rtc_enable read 0x00000021 from SNVS_LPCR @ 0x00000038
snvs_rtc_enable read 0x00000000 from SNVS_HPLR @ 0x00000000
snvs_rtc_enable read 0x80002100 from SNVS_HPCOMR @ 0x00000004
snvs_rtc
30370000.snvs:snvs-rtc-lp: rtc core: registered
30370000.snvs:snvs-rtc-lp as rtc0
snvs_rtc
30370000.snvs:snvs-rtc-lp: setting system clock to2018-04-01 00:51:04 UTC (
1522543864)
and doing this:
root@imx7s-warp-mbl:~# dmesg | grep rtc
snvs_rtc_enable read 0x00000000 from SNVS_LPLR @ 0x00000034
snvs_rtc_enable read 0x00000020 from SNVS_LPCR @ 0x00000038
snvs_rtc_enable read 0x00000001 from SNVS_HPLR @ 0x00000000
snvs_rtc_enable read 0x00002020 from SNVS_HPCOMR @ 0x00000004
snvs_rtc
30370000.snvs:snvs-rtc-lp: failed to enable rtc -110
snvs_rtc: probe of
30370000.snvs:snvs-rtc-lp failed with error -110
hctosys: unable to open rtc device (rtc0)
Note bit 1 of LPCR is not set in the second case and is set in the first
case and that bit 31 of HPCOMR is set in the second case but not in the
first.
Setting NPSWA_EN in HPCOMR allows us to boot through enabling TrustZone
and continue onto the kernel. The kernel then has the necessary permissions
to set LPCR::SRTC_ENV (RTC enable in the LP command register) whereas in
contrast - in the failing case the non-privileged kernel cannot do so.
This patch adds a simple init_snvs() call which sets the permission-bit
called from soc.c for the i.MX7. It may be possible, safe and desirable to
perform this on other i.MX processors but for now this is only tested on
i.MX7 as working.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Lukasz Majewski [Thu, 5 Apr 2018 07:04:39 +0000 (09:04 +0200)]
boot: script: The boot.scr file for K+P's boards
By using this file one can avoid cluttering <board>.h file with u-boot
HUSH commands necessary for booting target device.
With such approach the commands are stored only in one place and can be
reused if needed.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Lukasz Majewski [Thu, 5 Apr 2018 07:04:38 +0000 (09:04 +0200)]
imx: board: Add support for the K+P's kp_imx6q_tpc board
This commit provides support for Kieback & Peter GmbH IMX6Q based
TPC board.
U-boot console output:
U-Boot SPL 2018.05-rc1-00005-g631e2d01fd (Apr 04 2018 - 21:16:24 +0200)
Trying to boot from MMC1
U-Boot 2018.05-rc1-00005-g631e2d01fd (Apr 04 2018 - 21:16:24 +0200)
CPU: Freescale i.MX6Q rev1.5 996 MHz (running at 792 MHz)
CPU: Extended Commercial temperature grade (-20C to 105C) at 37C
Reset cause: POR
Board: K+P KP_IMX6Q_TPC i.MX6Q
Watchdog enabled
I2C: ready
DRAM: 2 GiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... OK
In: serial
Out: serial
Err: serial
Net: FEC [PRIME]
Autoboot in 3 seconds
Ian Ray [Wed, 4 Apr 2018 08:50:17 +0000 (10:50 +0200)]
board: ge: bx50v3: enable backlight on demand
Enable display backlight only if a message needs to be displayed.
The kernel re-initializes the backlight, which results in some
unwanted artifacts.
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Ken Lin [Fri, 30 Mar 2018 01:11:42 +0000 (09:11 +0800)]
arm: imx: Add Winbond SPI-NOR support for Advantech DMS-BA16 board
Windbond's been in the AVL list and need to enable the support
Signed-off-by: Ken Lin <yungching0725@gmail.com>
Bryan O'Donoghue [Mon, 26 Mar 2018 14:36:46 +0000 (15:36 +0100)]
imx: hab: Provide hab_auth_img_or_fail command
This patch adds hab_auth_img_or_fail() a command line function that
encapsulates a common usage of authenticate and failover, namely if
authenticate image fails, then drop to BootROM USB recovery mode.
For secure-boot systems, this type of locked down behavior is important to
ensure no unsigned images can be run.
It's possible to script this logic but, when done over and over again the
environment starts get very complex and repetitive, reducing that script
repetition down to a command line function makes sense.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Breno Lima <breno.lima@nxp.com>
Bryan O'Donoghue [Mon, 26 Mar 2018 14:36:45 +0000 (15:36 +0100)]
imximage: Encase majority of header in __ASSEMBLY__ declaration
Subsequent patches will want to include imageimage.h but in doing so
include it on an assembly compile path causing a range of compile errors.
Fix the errors pre-emptively by encasing the majority of the declarations
in imximage.h inside an ifdef __ASSEMBLY__ block.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Breno Lima <breno.lima@nxp.com>
Bryan O'Donoghue [Mon, 26 Mar 2018 14:27:34 +0000 (15:27 +0100)]
warp7: Set u-boot serial# based on OTP value
u-boot has a standard "serial#" environment variable that is suitable
for storing the iSerial number we will supply via the USB device
descriptor. serial# is automatically picked up by the disk subsystem in
u-boot - thus providing a handy unique identifier in /dev/disk/by-id as
detailed below.
Storing the hardware serial identifier in serial# means we can change the
serial# if we want before USB enumeration - thus making iSerial automatic
via OTP but overridable if necessary.
This patch reads the defined OTP fuse and sets environment variable
"serial#" to the value read.
With this patch in place the USB mass storage device will appear in
/dev/disk/by-id with a unique name based on the OTP value. For example
/dev/disk/by-id/usb-Linux_UMS_disk_0_WaRP7-0xf42400d3000001d4-0:0
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Rui Miguel Silva <rui.silva@linaro.org>
Cc: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Bryan O'Donoghue [Mon, 26 Mar 2018 14:27:33 +0000 (15:27 +0100)]
imx: mx7: Add comment to describe OTP TESTER registers
The tester registers provide a unique chip-level identifier which
get_board_serial() returns in a "struct tag_serialnr".
This patch documents the properties of the registers; in summary.
31:0 OCOTP_TESTER0 (most significant)
- FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID
OCOTP_TESTER1 (least significant)
31:24
- The X-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique
ID
23:16
- The Y-coordinate of the die location on the wafer/SJC CHALLENGE/ Unique
ID
15:11
- The wafer number of the wafer on which the device was fabricated/SJC
CHALLENGE/ Unique ID
10:0
- FSL-wide unique, encoded LOT ID STD II/SJC CHALLENGE/ Unique ID
The 64 bits of data generate a unique serial number per-chip.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Bryan O'Donoghue [Mon, 26 Mar 2018 14:27:32 +0000 (15:27 +0100)]
imx: mx7: Fix CONFIG_SERIAL_TAG compilation
Currently when we define CONFIG_SERIAL_TAG we will barf with a failure to
define "struct tag_serialnr".
This structure is defined in <asm/setup.h>, this patch includes
<asm/setup.h> to fix.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Marek Vasut [Fri, 30 Mar 2018 01:04:43 +0000 (03:04 +0200)]
ARM: mx6: ddr: Add write leveling correction code
When the DDR calibration is enabled, a situation may happen that it
will fail on a few select boards out of a whole production lot. In
particular, after the first write leveling stage, the MPWLDECTRLx
registers will contain a value 0x1nn , for nn usually being 0x7f or
slightly lower.
What this means is that the HW write leveling detected that the DQS
rising edge on one or more bundles arrives slightly _after_ CLK and
therefore when the DDR DRAM samples CLK on the DQS rising edge, the
CLK signal is already high (cfr. AN4467 rev2 Figure 7 on page 18).
The HW write leveling then ends up adding almost an entire cycle (thus
the 0x17f) to the DQS delay, which indeed aligns it, but also triggers
subsequent calibration failure in DQS gating due to this massive offset.
There are two observations here:
- If the MPWLDECTRLx value is corrected from 0x17f to 0x0 , then the
DQS gating passes, the entire calibration passes as well and the
DRAM is perfectly stable even under massive load.
- When using the NXP DRAM calibrator for iMX6/7, the value 0x17f or so
in MPWLDECTRx register is not there, but it is replaced by 0x0 as one
would expect.
Someone from NXP finally explains why, quoting [1]:
"
Having said all that, the DDR Stress Test does something that we
do not advertise to the users. The Stress Test iself looks at the
values of the MPWLDECTRL0/1 fields before reporting results, and
if it sees any filed with a value greater than 200/256 delay
(reported as half-cycle = 0x1 and ABS_OFFSET > 0x48), the DDR
Stress test will reset the Write Leveling delay for this lane
to 0x000 and not report it in the log.
The reason that the DDR Stress test does this is because a delay
of more than 78% a clock cycle means that the DQS edge is arriving
within the JEDEC tolerence of 25% of the clock edge. In most cases,
DQS is arriving < 5% tCK of the SDCLK edge in the early case, and
it does not make sense to delay the DQS strobe almost a full clock
cycle and add extra latency to each Write burst just to make the
two edges align exactly. In this case, we are guilty of making a
decision for the customer without telling them we are doing it so
that we don't have to provide the above explanation to every customer.
They don't need to know it.
"
This patch adds the correction described above, that is if the MPWLDECTRx
value is over 0x148, the value is corrected back to 0x0.
[1] https://community.nxp.com/thread/456246
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Eric Nelson <eric@nelint.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>