Coby Tayree [Tue, 21 Nov 2017 09:11:41 +0000 (09:11 +0000)]
[x86][icelake]VAES introduction
an icelake promotion of AES
Differential Revision: https://reviews.llvm.org/D40078
llvm-svn: 318740
Coby Tayree [Tue, 21 Nov 2017 08:50:10 +0000 (08:50 +0000)]
[x86][inline-asm] allow recognition of MPX regs inside ms inline-asm blob
Differential Revision: https://reviews.llvm.org/D38445
llvm-svn: 318739
Alex Bradbury [Tue, 21 Nov 2017 08:23:08 +0000 (08:23 +0000)]
[RISCV] Use register X0 (ZERO) for constant 0
The obvious approach of defining a pattern like the one below actually doesn't
work:
`def : Pat<(i32 0), (i32 X0)>;`
As was noted when Lanai made this change (https://reviews.llvm.org/rL288215),
attempting to handle the constant 0 in tablegen leads to assertions due to a
physical register being used where a virtual register is expected.
llvm-svn: 318738
Alex Bradbury [Tue, 21 Nov 2017 08:11:03 +0000 (08:11 +0000)]
[RISCV] Support and tests for a variety of additional LLVM IR constructs
Previous patches primarily ensured that codegen was possible for the standard
RISC-V instructions. However, there are a number of IR inputs that wouldn't be
appropriately lowered. This patch both adds test cases and supports lowering
for a number of these cases:
* Improved sext/zext/trunc support
* Support for setcc variants that don't map directly to RISC-V instructions
* Lowering mul, and hence support for external symbols
* addc, adde, subc, sube
* mulhs, srem, mulhu, urem, udiv, sdiv
* {srl,sra,shl}_parts
* brind
* br_jt
* bswap, ctlz, cttz, ctpop
* rotl, rotr
* BlockAddress operands
Differential Revision: https://reviews.llvm.org/D29938
llvm-svn: 318737
Martell Malone [Tue, 21 Nov 2017 08:09:59 +0000 (08:09 +0000)]
[MS] add an init test for thumbv7-windows-msvc
llvm-svn: 318736
Alex Bradbury [Tue, 21 Nov 2017 07:51:32 +0000 (07:51 +0000)]
[RISCV] Implement lowering of ISD::SELECT
Although ISD::SELECT_CC is a more natural match for RISCVISD::SELECT_CC (and
ultimately the integer RISC-V conditional branch instructions), we choose to
expand ISD::SELECT_CC and lower ISD::SELECT. The appropriate compare+branch
will be created in the case where an ISD::SELECT condition value is created by
an ISD::SETCC node, which operates on XLen types. Other datatypes such as
floating point don't have conditional branch instructions, and lowering
ISD::SELECT allows more flexibility for handling these cases.
Differential Revision: https://reviews.llvm.org/D29937
llvm-svn: 318735
Dean Michael Berris [Tue, 21 Nov 2017 07:29:21 +0000 (07:29 +0000)]
[XRay][compiler-rt] Migrate basic mode logging to the XRay framework
Summary:
Before this patch, XRay's basic (naive mode) logging would be
initialised and installed in an adhoc manner. This patch ports the
implementation of the basic (naive mode) logging implementation to use
the common XRay framework.
We also make the following changes to reduce the variance between the
usage model of basic mode from FDR (flight data recorder) mode:
- Allow programmatic control of the size of the buffers dedicated to
per-thread records. This removes some hard-coded constants and turns
them into runtime-controllable flags and through an Options
structure.
- Default the `xray_naive_log` option to false. For now, the only way
to start basic mode is to set the environment variable, or set the
default at build-time compiler options. Because of this change we've
had to update a couple of tests relying on basic mode being always
on.
- Removed the reliance on a non-trivially destructible per-thread
resource manager. We use a similar trick done in D39526 to use
pthread_key_create() and pthread_setspecific() to ensure that the
per-thread cleanup handling is performed at thread-exit time.
We also radically simplify the code structure for basic mode, to move
most of the implementation in the `__xray` namespace.
Reviewers: pelikan, eizan, kpw
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D40164
llvm-svn: 318734
Dean Michael Berris [Tue, 21 Nov 2017 07:16:57 +0000 (07:16 +0000)]
[XRay] Use optimistic logging model for FDR mode
Summary:
Before this change, the FDR mode implementation relied on at thread-exit
handling to return buffers back to the (global) buffer queue. This
introduces issues with the initialisation of the thread_local objects
which, even through the use of pthread_setspecific(...) may eventually
call into an allocation function. Similar to previous changes in this
line, we're finding that there is a huge potential for deadlocks when
initialising these thread-locals when the memory allocation
implementation is also xray-instrumented.
In this change, we limit the call to pthread_setspecific(...) to provide
a non-null value to associate to the key created with
pthread_key_create(...). While this doesn't completely eliminate the
potential for the deadlock(s), it does allow us to still clean up at
thread exit when we need to. The change is that we don't need to do more
work when starting and ending a thread's lifetime. We also have a test
to make sure that we actually can safely recycle the buffers in case we
end up re-using the buffer(s) available from the queue on multiple
thread entry/exits.
This change cuts across both LLVM and compiler-rt to allow us to update
both the XRay runtime implementation as well as the library support for
loading these new versions of the FDR mode logging. Version 2 of the FDR
logging implementation makes the following changes:
* Introduction of a new 'BufferExtents' metadata record that's outside
of the buffer's contents but are written before the actual buffer.
This data is associated to the Buffer handed out by the BufferQueue
rather than a record that occupies bytes in the actual buffer.
* Removal of the "end of buffer" records. This is in-line with the
changes we described above, to allow for optimistic logging without
explicit record writing at thread exit.
The optimistic logging model operates under the following assumptions:
* Threads writing to the buffers will potentially race with the thread
attempting to flush the log. To avoid this situation from occuring,
we make sure that when we've finalized the logging implementation,
that threads will see this finalization state on the next write, and
either choose to not write records the thread would have written or
write the record(s) in two phases -- first write the record(s), then
update the extents metadata.
* We change the buffer queue implementation so that once it's handed
out a buffer to a thread, that we assume that buffer is marked
"used" to be able to capture partial writes. None of this will be
safe to handle if threads are racing to write the extents records
and the reader thread is attempting to flush the log. The optimism
comes from the finalization routine being required to complete
before we attempt to flush the log.
This is a fairly significant semantics change for the FDR
implementation. This is why we've decided to update the version number
for FDR mode logs. The tools, however, still need to be able to support
older versions of the log until we finally deprecate those earlier
versions.
Reviewers: dblaikie, pelikan, kpw
Subscribers: llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D39526
llvm-svn: 318733
Craig Topper [Tue, 21 Nov 2017 06:28:15 +0000 (06:28 +0000)]
[X86] Simplify type constraints for AVX2 masked gather.
We don't need separate 32 and 64 node types. We can use SDTCisInt and SDTCisSameSizeAs to ensure the mask size the result type and is integer.
llvm-svn: 318732
Serguei Katkov [Tue, 21 Nov 2017 06:03:43 +0000 (06:03 +0000)]
Revert "[CGP] Enable complex addr mode (2nd attempt)"
Revert the patch rl318728 causing buildbot hangs-ups.
llvm-svn: 318731
Craig Topper [Tue, 21 Nov 2017 06:01:20 +0000 (06:01 +0000)]
[X86] Simplify the predicates for avx2 masked gather patterns.
We don't need a dyn_cast and we only need to check the type of the index. The base ptr is guaranteed to be scalar.
llvm-svn: 318730
Rafael Espindola [Tue, 21 Nov 2017 05:35:45 +0000 (05:35 +0000)]
move static function. NFC
llvm-svn: 318729
Serguei Katkov [Tue, 21 Nov 2017 05:31:47 +0000 (05:31 +0000)]
[CGP] Enable complex addr mode (2nd attempt)
2nd attempt to enable complex addr modes after
fix of the crash by rL318638.
llvm-svn: 318728
Yaxun Liu [Tue, 21 Nov 2017 02:29:54 +0000 (02:29 +0000)]
[AMDGPU] Fix DAGTypeLegalizer::SplitInteger for shift amount type
DAGTypeLegalizer::SplitInteger uses default pointer size as shift amount constant type,
which causes less performant ISA in amdgcn---amdgiz target since the default pointer
type is i64 whereas the desired shift amount type is i32.
This patch fixes that by using TLI.getScalarShiftAmountTy in DAGTypeLegalizer::SplitInteger.
The X86 change is necessary since splitting i512 requires shifting amount of 256, which
cannot be held by i8.
Differential Revision: https://reviews.llvm.org/D40148
llvm-svn: 318727
Rafael Espindola [Tue, 21 Nov 2017 01:52:44 +0000 (01:52 +0000)]
Split a rename_handle out of rename on windows.
llvm-svn: 318725
Richard Trieu [Tue, 21 Nov 2017 01:45:17 +0000 (01:45 +0000)]
Add default values for member functions.
Initialize IsVis2 and IsVis3 in SparcSubtarget::initializeSubtargetDependencies.
MSan detected uninitialized read of IsVis3 after r318704. Initializing the
variables to false will prevent undefined behavior.
llvm-svn: 318724
Reid Kleckner [Tue, 21 Nov 2017 01:25:56 +0000 (01:25 +0000)]
[MS] Increase default new alignment for win64 and test it
Summary:
This raises __STDCPP_DEFAULT_NEW_ALIGNMENT__ from 8 to 16 on Win64.
This matches platforms that follow the usual `2 * sizeof(void*)`
alignment requirement for malloc. We might want to consider making that
the default rather than relying on long double alignment.
Fixes PR35356
Reviewers: STL_MSFT, rsmith
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D40277
llvm-svn: 318723
Zachary Turner [Tue, 21 Nov 2017 01:20:28 +0000 (01:20 +0000)]
Re-revert "Refactor debuginfo-tests."
This is still breaking greendragon.
At this point I give up until someone can fix the greendragon
bots, and I will probably abandon this effort in favor of using
a private github repository.
llvm-svn: 318722
Peter Collingbourne [Tue, 21 Nov 2017 01:14:14 +0000 (01:14 +0000)]
COFF: Emit a COFF symbol table if /debug:dwarf is specified.
This effectively reverts r318548 and r318635 while keeping the
functionality behind the flag and preserving the bug fix from r318548.
Differential Revision: https://reviews.llvm.org/D40264
llvm-svn: 318721
David Blaikie [Tue, 21 Nov 2017 01:09:18 +0000 (01:09 +0000)]
ASTMatchers{,Macros}.h: Add some extra macros to use for decl/def of matchers
Fix ODR violations caused by using internal linkage variables in
non-internal inline functions. (also removes duplicate definitions, etc)
llvm-svn: 318720
David Blaikie [Tue, 21 Nov 2017 01:09:17 +0000 (01:09 +0000)]
FormatInternal.h: Add missing includes.
llvm-svn: 318719
David Blaikie [Tue, 21 Nov 2017 01:09:10 +0000 (01:09 +0000)]
Make some headers modular by adding missing includes/forward decls.
llvm-svn: 318718
Walter Lee [Tue, 21 Nov 2017 01:01:32 +0000 (01:01 +0000)]
[sanitizers] Add init function to set alignment of low level allocator
ASan requires that the min alignment be at least the shadow
granularity, so add an init function to do that.
Differential Revision: https://reviews.llvm.org/D39473
llvm-svn: 318717
Craig Topper [Tue, 21 Nov 2017 00:33:26 +0000 (00:33 +0000)]
[X86] Remove 'mm3now' from isValidFeatureName.
The correct spelling is '3dnow' which is already in the list.
llvm-svn: 318716
David Blaikie [Tue, 21 Nov 2017 00:33:17 +0000 (00:33 +0000)]
xray-record-yaml.h: Remove unused file
llvm-svn: 318715
David Blaikie [Tue, 21 Nov 2017 00:23:19 +0000 (00:23 +0000)]
llvm-rc/ResourceScriptTokenList.h: Turns this into a .def file to imply that it's non-modular
Also undef the macros at the end of the file to make it easier to use.
llvm-svn: 318714
David Blaikie [Tue, 21 Nov 2017 00:23:19 +0000 (00:23 +0000)]
XRayRecord.h: Add missing #include
llvm-svn: 318713
David Blaikie [Tue, 21 Nov 2017 00:23:17 +0000 (00:23 +0000)]
YAML/XRay/std::vector: Fix ODR violation by removing local specialization
There's a generic partial specialization for all std::vector<T> that
does what's desired, so no need for this full specialization that's
causing an ODR violation anyway.
llvm-svn: 318712
Davide Italiano [Tue, 21 Nov 2017 00:21:52 +0000 (00:21 +0000)]
[SCCP] If we replace with a constant, we can't replace with a range.
This microoptimization is NFC.
llvm-svn: 318711
Richard Trieu [Tue, 21 Nov 2017 00:12:18 +0000 (00:12 +0000)]
Revert r318678 to fix Clang test
r318678 caused the Clang test CodeGen/ms-inline-asm.c to start failing.
llvm-svn: 318710
Vitaly Buka [Mon, 20 Nov 2017 23:37:56 +0000 (23:37 +0000)]
[msan] Don't sanitize "nosanitize" instructions
Reviewers: eugenis
Subscribers: hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D40205
llvm-svn: 318708
Vitaly Buka [Mon, 20 Nov 2017 23:37:46 +0000 (23:37 +0000)]
[tsan] Fix sigaction implementation when it's called only to get handler
Reviewers: eugenis
Subscribers: kubamracek, llvm-commits, krytarowski
Differential Revision: https://reviews.llvm.org/D40272
llvm-svn: 318707
Craig Topper [Mon, 20 Nov 2017 23:08:50 +0000 (23:08 +0000)]
[SelectionDAG] When promoting the result of a VSELECT, make sure we promote the condition to the SetCC type for the final result type not the original type.
Normally this would be cleaned up by promoting the condition operand next. But in the attached case we promoted the result from v2i48 to v2i64 and the condition from v2i1 to v2i48. Then we tried to "promote" the v2i48 condition back to v2i1 because that's what the SetCC result type for v2i64 is on X86 with VLX. But promote is either a NOP or SIGN_EXTEND and this would need a truncation.
With the change here we now get the SetCC type of v2i1 when we're handling the result promotion and the operand no longer needs to be promoted itself.
Fixes PR35272.
llvm-svn: 318706
Alexander Shaposhnikov [Mon, 20 Nov 2017 22:53:30 +0000 (22:53 +0000)]
[analyzer] Diagnose stack leaks via block captures
This diff extends StackAddrEscapeChecker
to catch stack addresses leaks via block captures
if the block is executed asynchronously or
returned from a function.
Differential revision: https://reviews.llvm.org/D39438
llvm-svn: 318705
Fedor Sergeev [Mon, 20 Nov 2017 22:33:58 +0000 (22:33 +0000)]
[Sparc] efficient pattern for UINT_TO_FP conversion
Summary:
while investigating performance degradation of imagick benchmark
there were found inefficient pattern for UINT_TO_FP conversion.
That pattern causes RAW hazard in assembly code. Specifically,
uitofp IR operator results in poor assembler :
st %i0, [%fp - 952]
ldd [%fp - 952], %f0
it stores 32-bit integer register into memory location and then
loads 64-bit floating point data from that location.
That is exactly RAW hazard case. To optimize that case it is
possible to use SPISD::ITOF and SPISD::XTOF for conversion from
integer to floating point data type and to use ISD::BITCAST to
copy from integer register into floating point register.
The fix is to write custom UINT_TO_FP pattern using SPISD::ITOF,
SPISD::XTOF, ISD::BITCAST.
Patch by Alexey Lapshin
Reviewers: fedor.sergeev, jyknight, dcederman, lero_chris
Reviewed By: jyknight
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D36875
llvm-svn: 318704
David Blaikie [Mon, 20 Nov 2017 22:12:55 +0000 (22:12 +0000)]
Add ADL support to range based <algorithm> extensions
This adds support for ADL in the range based <algorithm> extensions
(llvm::for_each etc.).
Also adds the helper functions llvm::adl::begin and llvm::adl::end which wrap
std::begin and std::end with ADL support.
Saw this was missing from a recent llvm weekly post about adding llvm::for_each
and thought I might add it.
Patch by Stephen Dollberg!
Differential Revision: https://reviews.llvm.org/D40006
llvm-svn: 318703
Erich Keane [Mon, 20 Nov 2017 22:10:28 +0000 (22:10 +0000)]
Revert 318668, which is associated with a broken patch
llvm-svn: 318702
Reid Kleckner [Mon, 20 Nov 2017 21:53:24 +0000 (21:53 +0000)]
Relax pdb.test checks for debug chunk sizes
llvm-svn: 318700
Reid Kleckner [Mon, 20 Nov 2017 21:49:35 +0000 (21:49 +0000)]
Merge .xdata into .rdata by default
Summary: MSVC does this. The user can override it with their own /merge: flag.
Reviewers: ruiu, pcc
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D40197
llvm-svn: 318699
Erich Keane [Mon, 20 Nov 2017 21:46:29 +0000 (21:46 +0000)]
Revert r318669/318694
Broke some libclang tests, so reverting for now.
llvm-svn: 318698
Zachary Turner [Mon, 20 Nov 2017 21:41:36 +0000 (21:41 +0000)]
Resubmit "Refactor debuginfo-tests" again.
This was reverted due to the tests being run twice on some
build bots. Each run had a slightly different configuration
due to the way in which it was being invoked. This fixes
the problem (albeit in a somewhat hacky way). Hopefully in
the future we can get rid of the workflow of running
debuginfo-tests as part of clang, and then this hack can
go away.
llvm-svn: 318697
Hiroshi Yamauchi [Mon, 20 Nov 2017 21:38:43 +0000 (21:38 +0000)]
Fix a lld-x86_64-darwin13 build error.
Summary:
Fix this build error
http://lab.llvm.org:8011/builders/lld-x86_64-darwin13/builds/15112/steps/build_Lld/logs/stdio
after https://reviews.llvm.org/rL318693
Reviewers: davidxl
Reviewed By: davidxl
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D40266
llvm-svn: 318696
Yonghong Song [Mon, 20 Nov 2017 21:37:58 +0000 (21:37 +0000)]
bpf: add a test case for trunc-op optimization
Commit
b5cbc7760ab8 ("[bpf] allow direct and indirect calls")
allowed more than one function in the bpf program, and
commit
114353884415 ("bpf: fix a bug in trunc-op optimization")
fixed a bug in trunc-op optimization which only showed up
with more than one function in the bpf program.
This patch added a test case for trunc-op optimization
for bpf programs with two functions. Reverting commit
"bpf: fix a bug in trunc-op optimization" will cause
failure for this test case.
Signed-off-by: Yonghong Song <yhs@fb.com>
llvm-svn: 318695
Erich Keane [Mon, 20 Nov 2017 21:15:01 +0000 (21:15 +0000)]
Include test files for rL318668
Forgotten when doing my SVN commit.
llvm-svn: 318694
Hiroshi Yamauchi [Mon, 20 Nov 2017 21:03:38 +0000 (21:03 +0000)]
Add heuristics for irreducible loop metadata under PGO
Summary:
Add the following heuristics for irreducible loop metadata:
- When an irreducible loop header is missing the loop header weight metadata,
give it the minimum weight seen among other headers.
- Annotate indirectbr targets with the loop header weight metadata (as they are
likely to become irreducible loop headers after indirectbr tail duplication.)
These greatly improve the accuracy of the block frequency info of the Python
interpreter loop (eg. from ~3-16x off down to ~40-55% off) and the Python
performance (eg. unpack_sequence from ~50% slower to ~8% faster than GCC) due to
better register allocation under PGO.
Reviewers: davidxl
Reviewed By: davidxl
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D39980
llvm-svn: 318693
Carlo Bertolli [Mon, 20 Nov 2017 20:46:39 +0000 (20:46 +0000)]
[OpenMP] Initial implementation of code generation for pragma 'teams distribute parallel for' on host
https://reviews.llvm.org/D40187
This patch implements code gen for 'teams distribute parallel for' on the host, including all its clauses and related regression tests.
llvm-svn: 318692
Simon Atanasyan [Mon, 20 Nov 2017 20:40:45 +0000 (20:40 +0000)]
[MIPS] Add test case to check calculation of GOT pages in case of using a linker script. NFC
llvm-svn: 318691
Eric Fiselier [Mon, 20 Nov 2017 20:23:27 +0000 (20:23 +0000)]
Fix std::string::data() symbol during library build.
The non-const data() member of std::string is only exposed
in C++17 and beyond. However std::string is externally instantiated
and so the member function needs to be exposed to be externally instantiated.
On Linux and OS X this shouldn't cause a problem, because
_LIBCPP_INLINE_VISIBILITY ensures the symbol is always inlined.
However on Windows, the symbol gets marked dllimport, but
there is no definition to import, causing link errors.
llvm-svn: 318690
Peter Collingbourne [Mon, 20 Nov 2017 19:37:07 +0000 (19:37 +0000)]
COFF: Correctly handle relocations against early discarded sections.
Don't crash if we encounter a reference to an early discarded section
(such as .drectve). Instead, handle them the same way as sections
discarded by comdat merging, i.e. either print an error message or
(for debug sections) silently ignore the relocation.
Differential Revision: https://reviews.llvm.org/D40235
llvm-svn: 318689
Rafael Espindola [Mon, 20 Nov 2017 19:23:36 +0000 (19:23 +0000)]
Add missing test.
Without this we could remove
SS->getFile<ELFT>()->IsUsed = true;
from addUndefined and no test would fail.
llvm-svn: 318688
Simon Pilgrim [Mon, 20 Nov 2017 19:18:33 +0000 (19:18 +0000)]
Fix spelling in comment. NFCI.
llvm-svn: 318687
Mandeep Singh Grang [Mon, 20 Nov 2017 19:17:11 +0000 (19:17 +0000)]
Revert "[SelectionDAG] Make sorting predicate stronger to remove non-deterministic ordering"
This broke the bots. Reverting this until I can fix the failures.
This reverts commit
5a3db2856d12a3c4b400f487d39f8f05989e79f0.
llvm-svn: 318686
Evandro Menezes [Mon, 20 Nov 2017 19:11:56 +0000 (19:11 +0000)]
[AArch64] Adjust the cost model for Exynos M1 and M2
Fix the modeling of test and branch.
llvm-svn: 318685
Paul Robinson [Mon, 20 Nov 2017 19:07:52 +0000 (19:07 +0000)]
Revert "Fix out-of-order stepping behavior in programs with sunk instructions."
This reverts commit
30419e150cd940893a13b345e85f96053850208f.
aka r318679. It caused "sanitizer-windows" bot to fail.
llvm-svn: 318684
Peter Collingbourne [Mon, 20 Nov 2017 18:52:53 +0000 (18:52 +0000)]
COFF: Remove the SymbolBodies vector, and rename SparseSymbolBodies to Symbols.
Differential Revision: https://reviews.llvm.org/D40237
llvm-svn: 318683
Peter Collingbourne [Mon, 20 Nov 2017 18:51:29 +0000 (18:51 +0000)]
COFF: Stop requiring comdat sections to have an external leader to participate in ICF.
This requirement was added in r254578 to fix pr25686. However, it
appears to have originated from a misdiagnosis of the problem: link.exe
refused to merge the two sections because they are non-executable,
not because they have internal leaders. If I set up a similar scenario
with functions instead of globals I see that link.exe merges them.
Differential Revision: https://reviews.llvm.org/D40236
llvm-svn: 318682
Mandeep Singh Grang [Mon, 20 Nov 2017 18:49:14 +0000 (18:49 +0000)]
[AutoComplete] Use stronger sort predicate for autocomplete candidates to remove non-deterministic ordering
Summary: This fixes the failure in test/Driver/autocomplete.c uncovered by D39245.
Reviewers: yamaguchi, teemperor, ruiu
Reviewed By: yamaguchi, ruiu
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D40234
llvm-svn: 318681
Mandeep Singh Grang [Mon, 20 Nov 2017 18:46:11 +0000 (18:46 +0000)]
[SelectionDAG] Make sorting predicate stronger to remove non-deterministic ordering
Summary:
This fixes failures in the following tests uncovered by D39245:
LLVM :: CodeGen/ARM/ifcvt3.ll
LLVM :: CodeGen/ARM/switch-minsize.ll
LLVM :: CodeGen/X86/switch.ll
Reviewers: hans, efriedma
Reviewed By: hans
Subscribers: fhahn, aemerson, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D39995
llvm-svn: 318680
Paul Robinson [Mon, 20 Nov 2017 18:42:17 +0000 (18:42 +0000)]
Fix out-of-order stepping behavior in programs with sunk instructions.
MachineSink attempts to place instructions near the basic blocks where
they are needed. Once an instruction has been sunk, its location
relative to other instructions is no longer consistent with the
original source code. In order to ensure correct single-stepping and
profiling, the debug location for sunk instructions is either merged
with the insertion point or erased if the target successor block is
empty.
Patch by Matthew Voss!
Differential Revision: https://reviews.llvm.org/D39933
llvm-svn: 318679
Nirav Dave [Mon, 20 Nov 2017 18:38:55 +0000 (18:38 +0000)]
[X86] Avoid unecessary opsize byte in segment move to memory
Summary:
Segment moves to memory are always 16-bit. Remove invalid 32 and 64
bit variants.
Fixes PR34478.
Reviewers: rnk, craig.topper
Subscribers: llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D39847
llvm-svn: 318678
Teresa Johnson [Mon, 20 Nov 2017 18:33:38 +0000 (18:33 +0000)]
[SROA] Correctly invalidate analyses when dead instructions deleted
Summary:
SROA can fail in rewriting alloca but still rewrite a phi resulting
in dead instruction elimination. The Changed flag was not being set
correctly, resulting in downstream passes using stale analyses.
The included test case will assert during the second BDCE pass as a
result.
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D39921
llvm-svn: 318677
Kamil Rytarowski [Mon, 20 Nov 2017 18:27:39 +0000 (18:27 +0000)]
Try to fix syntax for !NetBSD in TSAN_INTERCEPTORs
llvm-svn: 318676
Dmitry Preobrazhensky [Mon, 20 Nov 2017 18:24:21 +0000 (18:24 +0000)]
[AMDGPU][MC][GFX8][GFX9] Corrected names of integer v_{add/addc/sub/subrev/subb/subbrev}
See bug 34765: https://bugs.llvm.org//show_bug.cgi?id=34765
Reviewers: tamazov, SamWot, arsenm, vpykhtin
Differential Revision: https://reviews.llvm.org/D40088
llvm-svn: 318675
Kamil Rytarowski [Mon, 20 Nov 2017 18:07:52 +0000 (18:07 +0000)]
Handle NetBSD specific indirection of libpthread functions
Summary:
Correct handling of libpthread(3) functions in TSan/NetBSD:
- pthread_cond_init(3),
- pthread_cond_signal(3),
- pthread_cond_broadcast(3),
- pthread_cond_wait(3),
- pthread_cond_destroy(3),
- pthread_mutex_init(3),
- pthread_mutex_destroy(3),
- pthread_mutex_trylock(3),
- pthread_rwlock_init(3),
- pthread_rwlock_destroy(3),
- pthread_rwlock_rdlock(3),
- pthread_rwlock_tryrdlock(3),
- pthread_rwlock_wrlock(3),
- pthread_rwlock_trywrlock(3),
- pthread_rwlock_unlock(3),
- pthread_once(3).
Code out of the libpthread(3) context uses the libc symbols
that are prefixed with __libc_, for example: __libc_cond_init.
This caused that these functions were invisible to sanitizers on NetBSD.
Intercept the libc-specific ones and add them as NetBSD-specific aliases
for the common pthread(3) ones.
NetBSD needs to intercept both functions, as the regularly named ones
are used internally in libpthread(3).
Sponsored by <The NetBSD Foundation>
Reviewers: joerg, dvyukov, vitalybuka
Reviewed By: dvyukov
Subscribers: kubamracek, llvm-commits, #sanitizers
Tags: #sanitizers
Differential Revision: https://reviews.llvm.org/D40243
llvm-svn: 318673
Craig Topper [Mon, 20 Nov 2017 18:07:43 +0000 (18:07 +0000)]
[Docs] Regenerate the command line option reference.
llvm-svn: 318672
Kamil Rytarowski [Mon, 20 Nov 2017 18:06:26 +0000 (18:06 +0000)]
Add DemangleFunctionName for backtracing on NetBSD
Summary:
NetBSD uses indirection for old threading functions for historical reasons
The mangled names are internal implementation detail and should not be
exposed even in backtraces.
Sponsored by <The NetBSD Foundation>
Reviewers: joerg, vitalybuka, dvyukov
Reviewed By: dvyukov
Subscribers: kubamracek, llvm-commits, #sanitizers
Tags: #sanitizers
Differential Revision: https://reviews.llvm.org/D40251
llvm-svn: 318671
Jonas Toth [Mon, 20 Nov 2017 18:01:35 +0000 (18:01 +0000)]
[clang-tidy] revert hicpp-multiway-paths-covered
The address sanitizer found a stackoverflow with this patch.
There is no obvious fix. This patch will be reapplied when the problem
is found.
llvm-svn: 318670
Erich Keane [Mon, 20 Nov 2017 17:57:42 +0000 (17:57 +0000)]
For Linux/gnu compatibility, preinclude <stdc-predef.h> if the file is available
As reported in llvm bugzilla 32377.
Here’s a patch to add preinclude of stdc-predef.h.
The gcc documentation says “On GNU/Linux, <stdc-predef.h> is pre-included.”
See https://gcc.gnu.org/gcc-4.8/porting_to.html;
The preinclude is inhibited with –ffreestanding.
Basically I fixed the failing test cases by adding –ffreestanding which inhibits
this behavior.
I fixed all the failing tests, including some in extra/test, there's a separate
patch for that which is linked here
Patch By: mibintc
Differential Revision: https://reviews.llvm.org/D34158
llvm-svn: 318669
Erich Keane [Mon, 20 Nov 2017 17:57:20 +0000 (17:57 +0000)]
extra test modifications for D34158
When adding support for D34158 which changes preprocessed output, I needed to
make tiny test corrections for these. Adding the option -ffreestanding
suppresses the new behavior, and that's the change I made to fix the tests.
Patch By: mibintc
Differential Revision: https://reviews.llvm.org/D34624
llvm-svn: 318668
Hans Wennborg [Mon, 20 Nov 2017 17:48:54 +0000 (17:48 +0000)]
Revert r318456 "Issue -Wempty-body warnings for else blocks"
This caused warnings also when the if or else comes from macros. There was an
attempt to fix this in r318556, but that introduced new problems and was
reverted. Reverting this too until the whole issue is sorted.
> This looks like it was just an oversight.
>
> Fixes http://llvm.org/pr35319
>
> git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@318456
91177308-0d34-0410-b5e6-
96231b3b80d8
llvm-svn: 318667
Evgeniy Stepanov [Mon, 20 Nov 2017 17:41:57 +0000 (17:41 +0000)]
[asan] Use dynamic shadow on 32-bit Android, try 2.
Summary:
This change reverts r318575 and changes FindDynamicShadowStart() to
keep the memory range it found mapped PROT_NONE to make sure it is
not reused. We also skip MemoryRangeIsAvailable() check, because it
is (a) unnecessary, and (b) would fail anyway.
Reviewers: pcc, vitalybuka, kcc
Subscribers: srhines, kubamracek, mgorny, llvm-commits, hiraditya
Differential Revision: https://reviews.llvm.org/D40203
llvm-svn: 318666
Hans Wennborg [Mon, 20 Nov 2017 17:38:16 +0000 (17:38 +0000)]
Revert r318556 "Loosen -Wempty-body warning"
It seems this somehow made -Wempty-body fire in some macro cases where
it didn't before, e.g.
../../third_party/ffmpeg/libavcodec/bitstream.c(169,5): error: if statement has empty body [-Werror,-Wempty-body]
ff_dlog(NULL, "new table index=%d size=%d\n", table_index, table_size);
^
../../third_party/ffmpeg\libavutil/internal.h(276,80): note: expanded from macro 'ff_dlog'
# define ff_dlog(ctx, ...) do { if (0) av_log(ctx, AV_LOG_DEBUG, __VA_ARGS__); } while (0)
^
../../third_party/ffmpeg/libavcodec/bitstream.c(169,5): note: put the
semicolon on a separate line to silence this warning
Reverting until this can be figured out.
> Do not show it when `if` or `else` come from macros.
> E.g.,
>
> #define USED(A) if (A); else
> #define SOME_IF(A) if (A)
>
> void test() {
> // No warnings are shown in those cases now.
> USED(0);
> SOME_IF(0);
> }
>
> Patch by Ilya Biryukov!
>
> Differential Revision: https://reviews.llvm.org/D40185
llvm-svn: 318665
Craig Topper [Mon, 20 Nov 2017 17:24:47 +0000 (17:24 +0000)]
[Expression parser] Remove logging of field that is no longer in clang's TargetOptions struct.
The Reciprocals field was moved to CodeGenOptions. I don't think lldb was really using this field so I'm just removing the mention.
llvm-svn: 318664
Craig Topper [Mon, 20 Nov 2017 17:09:22 +0000 (17:09 +0000)]
[CodeGen] Move Reciprocals option from TargetOptions to CodeGenOptions
Diffrential Revision: https://reviews.llvm.org/D40226
llvm-svn: 318662
Tony Jiang [Mon, 20 Nov 2017 16:55:07 +0000 (16:55 +0000)]
[MachineCSE] Add new callback for is caller preserved or constant physregs
The instructions addis,addi, bl are used to calculate the address of TLS thread
local variables. These TLS access code sequences are generated repeatedly every
time the thread local variable is accessed. By communicating to Machine CSE that
X2 is guaranteed to have the same value within the same function call (so called
Caller Preserved Physical Register), the redundant TLS access code sequences are
cleaned up.
Differential Revision: https://reviews.llvm.org/D39173
llvm-svn: 318661
Yaxun Liu [Mon, 20 Nov 2017 16:53:13 +0000 (16:53 +0000)]
[AMDGPU] Update test r600.amdgpu-alias-analysis.ll
Manually update test r600.amdgpu-alias-analysis.ll for amdgiz environment
since it cannot be done by script.
The two pointers are swapped in the output because PrintResults in
AliasAnalysisEvaluator.cpp sorts the strings obtained from printAsOperand
before printing them.
Differential Revision: https://reviews.llvm.org/D40131
llvm-svn: 318660
Kostya Kortchinsky [Mon, 20 Nov 2017 16:39:49 +0000 (16:39 +0000)]
[sanitizer] New attempt at using runtime checks for Android logging
Summary:
This is a second attempt after D40100 induced racey crashes with ASan
(due to `__android_log_write` and the `strncpy` interceptor on API >= 21).
This new version checks the runtime API level to be <= `ANDROID_KITKAT` for
the use of `__android_log_write`, otherwise we use `syslog`, which should
conform with the previous behavior.
Unfortunately despite numerous efforts I couldn't reproduce the original
crashes in my environments so I couldn't test that the fix was actually
preventing crashes.
Reviewers: eugenis
Reviewed By: eugenis
Subscribers: llvm-commits, srhines, kubamracek
Differential Revision: https://reviews.llvm.org/D40149
llvm-svn: 318659
Andrey Churbanov [Mon, 20 Nov 2017 16:00:42 +0000 (16:00 +0000)]
Fixed OMP doacross implementation on 32-bit platforms.
Differential Revision: https://reviews.llvm.org/D40171
llvm-svn: 318658
Simon Dardis [Mon, 20 Nov 2017 15:59:18 +0000 (15:59 +0000)]
[mips] Reorder target specific passes
Move the hazard scheduling pass to after the long branch pass, as the
long branch pass can create forbiddden slot hazards. Rather than complicating
the implementation of the long branch pass to handle forbidden slot hazards,
just reorder the passes.
llvm-svn: 318657
Alexander Richardson [Mon, 20 Nov 2017 15:49:48 +0000 (15:49 +0000)]
[ELF] Fix rewriting of --sysroot in reproducer tars
Summary:
I noticed that the reproducers files I was getting from building CheriBSD
didn't work because the --sysroot option was not being rewritten. I've
updated the test to also verify that the rewritten path matches uses a
FileCheck capature instead of a {{.+}} regex
Reviewers: ruiu
Reviewed By: ruiu
Subscribers: llvm-commits, emaste
Differential Revision: https://reviews.llvm.org/D40125
llvm-svn: 318656
Alexander Richardson [Mon, 20 Nov 2017 15:43:20 +0000 (15:43 +0000)]
[ELF] Fall back to search dirs for linker scripts specified with -T
Summary:
This matches the behaviour of ld.bfd:
https://sourceware.org/binutils/docs/ld/Options.html#Options
If scriptfile does not exist in the current directory, ld looks for it in
the directories specified by any preceding '-L' options. Multiple '-T'
options accumulate.
Reviewers: ruiu, grimar
Reviewed By: ruiu, grimar
Subscribers: emaste, llvm-commits
Differential Revision: https://reviews.llvm.org/D40129
llvm-svn: 318655
Kamil Rytarowski [Mon, 20 Nov 2017 15:39:30 +0000 (15:39 +0000)]
Correct return types of NetBSD specific functions
The __libc_mutex_lock, __libc_mutex_unlock and __libc_thr_setcancelstate
functions return int, not void.
This does not seem to introduce a functional change, however it looks
better with fixed the function prototype.
Sponsored by <The NetBSD Foundation>
llvm-svn: 318654
Alexander Richardson [Mon, 20 Nov 2017 15:37:19 +0000 (15:37 +0000)]
[ELF][MIPS] Fix crash in LLD when linking code that needs PIC thunks
Summary:
The bug triggers when the following conditions are met:
- A thunk is created in a given input section S
- A linker script is specified
- There is at least one matcher in the linker script .text section output
that does not match any of the sections in the input files, before the matcher
that matches section S.
The issue was found when linking the FreeBSD kernel for MIPS when built
with -fPIC. Patch by Alfredo Mazzinghi.
Reviewers: ruiu, psmith, atanasyan
Reviewed By: ruiu
Subscribers: peter.smith, emaste, sdardis, krytarowski, llvm-commits
Differential Revision: https://reviews.llvm.org/D40174
llvm-svn: 318653
Jonas Paulsson [Mon, 20 Nov 2017 14:54:03 +0000 (14:54 +0000)]
[SystemZ] Bugfix for handling of subregisters in getRegAllocationHints().
The 32 bit subreg indices of GR128 registers must also be checked for in
getRC32().
Review: Ulrich Weigand.
llvm-svn: 318652
Tony Jiang [Mon, 20 Nov 2017 14:38:30 +0000 (14:38 +0000)]
[PPC] Heuristic to choose between a X-Form VSX ld/st vs a X-Form FP ld/st.
The VSX versions have the advantage of a full 64-register target whereas the FP
ones have the advantage of lower latency and higher throughput. So what we’re
after is using the faster instructions in low register pressure situations and
using the larger register file in high register pressure situations.
The heuristic chooses between the following 7 pairs of instructions.
PPC::LXSSPX vs PPC::LFSX
PPC::LXSDX vs PPC::LFDX
PPC::STXSSPX vs PPC::STFSX
PPC::STXSDX vs PPC::STFDX
PPC::LXSIWAX vs PPC::LFIWAX
PPC::LXSIWZX vs PPC::LFIWZX
PPC::STXSIWX vs PPC::STFIWX
Differential Revision: https://reviews.llvm.org/D38486
llvm-svn: 318651
Sander de Smalen [Mon, 20 Nov 2017 14:36:40 +0000 (14:36 +0000)]
[AArch64][TableGen] Skip tied result operands for InstAlias
Summary:
This patch fixes an issue so that the right alias is printed when the instruction has tied operands. It checks the number of operands in the resulting instruction as opposed to the alias, and then skips over tied operands that should not be printed in the alias.
This allows to generate the preferred assembly syntax for the AArch64 'ins' instruction, which should always be displayed as 'mov' according to the ARM Architecture Reference Manual. Several unit tests have changed as a result, but only to reflect the preferred disassembly. Some other InstAlias patterns (movk/bic/orr) needed a slight adjustment to stop them becoming the default and breaking other unit tests.
Please note that the patch is mostly the same as https://reviews.llvm.org/D29219 which was reverted because of an issue found when running TableGen with the Address Sanitizer. That issue has been addressed in this iteration of the patch.
Reviewers: rengolin, stoklund, huntergr, SjoerdMeijer, rovka
Reviewed By: rengolin, SjoerdMeijer
Subscribers: fhahn, aemerson, javed.absar, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D40030
llvm-svn: 318650
Valery Pykhtin [Mon, 20 Nov 2017 14:35:53 +0000 (14:35 +0000)]
AMDGPU: Partial ILP scheduler port from SelectionDAG to SchedulingDAG (experimental)
Differential revision: https://reviews.llvm.org/D39897
llvm-svn: 318649
Peter Smith [Mon, 20 Nov 2017 13:53:55 +0000 (13:53 +0000)]
[ARM] For assembler files recognize -Xassembler or -Wa, -mthumb
Attempt to fix warning picked up by buildbot.
llvm-svn: 318648
Peter Smith [Mon, 20 Nov 2017 13:43:55 +0000 (13:43 +0000)]
[ARM] For assembler files recognize -Xassembler or -Wa, -mthumb
The Unified Arm Assembler Language is designed so that the majority of
assembler files can be assembled for both Arm and Thumb with the choice
made as a compilation option.
The way this is done in gcc is to pass -mthumb to the assembler with either
-Wa,-mthumb or -Xassembler -mthumb. This change adds support for these
options to clang. There is no assembler equivalent of -mno-thumb, -marm or
-mno-arm so we don't need to recognize these.
Ideally we would do all of the processing in
CollectArgsForIntegratedAssembler(). Unfortunately we need to change the
triple and at that point it is too late. Instead we look for the option
earlier in ComputeLLVMTriple().
Fixes PR34519
Differential Revision: https://reviews.llvm.org/D40127
llvm-svn: 318647
Kamil Rytarowski [Mon, 20 Nov 2017 12:21:11 +0000 (12:21 +0000)]
Handle NetBSD specific indirection of libpthread functions
Summary:
Correct handling of three libpthread(3) functions on NetBSD:
- pthread_mutex_lock(3),
- pthread_mutex_unlock(3),
- pthread_setcancelstate(3).
Code out of the libpthread(3) context uses the libc symbols:
- __libc_mutex_lock,
- __libc_mutex_unlock,
- __libc_thr_setcancelstate.
The threading library (libpthread(3)) defines strong aliases:
- __strong_alias(__libc_mutex_lock,pthread_mutex_lock)
- __strong_alias(__libc_mutex_unlock,pthread_mutex_unlock)
- __strong_alias(__libc_thr_setcancelstate,pthread_setcancelstate)
This caused that these functions were invisible to sanitizers on NetBSD.
Intercept the libc-specific ones and add them as NetBSD-specific aliases
for the common pthread(3) ones.
NetBSD needs to intercept both functions, as the regularly named ones
are used internally in libpthread(3).
Sponsored by <The NetBSD Foundation>
Reviewers: joerg, dvyukov, vitalybuka
Reviewed By: dvyukov
Subscribers: llvm-commits, kubamracek, #sanitizers
Tags: #sanitizers
Differential Revision: https://reviews.llvm.org/D40241
llvm-svn: 318646
Gil Rapaport [Mon, 20 Nov 2017 12:01:47 +0000 (12:01 +0000)]
[LV] Model masking in VPlan, introducing VPInstructions
This patch adds a new abstraction layer to VPlan and leverages it to model the planned
instructions that manipulate masks (AND, OR, NOT), introduced during predication.
The new VPValue and VPUser classes model how data flows into, through and out
of a VPlan, forming the vertices of a planned Def-Use graph. The new
VPInstruction class is a generic single-instruction Recipe that models a
planned instruction along with its opcode, operands and users. See
VectorizationPlan.rst for more details.
Differential Revision: https://reviews.llvm.org/D38676
llvm-svn: 318645
Ivan A. Kosarev [Mon, 20 Nov 2017 11:16:16 +0000 (11:16 +0000)]
[Driver] Add a cc1 flag for the new TBAA metadata format
This patch starts a series of changes to add support for the new
TBAA metadata format proposed in this llvm-dev thread:
http://lists.llvm.org/pipermail/llvm-dev/2017-November/118748.html
Differential Revision: https://reviews.llvm.org/D39955
llvm-svn: 318644
Diana Picus [Mon, 20 Nov 2017 11:05:31 +0000 (11:05 +0000)]
[ARM GlobalISel] Add test for RSBri. NFC
Add instruction selector test for RSBri, which is derived from
AsI1_rbin_irs, and make sure it doesn't get mistaken for SUBri, which is
derived from the very similar AsI1_bin_irs pattern.
llvm-svn: 318643
Diana Picus [Mon, 20 Nov 2017 10:35:35 +0000 (10:35 +0000)]
[ARM GlobalISel] Clean up binary operator tests. NFC
Remove some of the instruction selector tests for binary operators (and,
or, xor). These are all derived from the same kind of TableGen pattern,
AsI1_bin_irs, so there's no point in testing all of them.
llvm-svn: 318642
Mohammed Agabaria [Mon, 20 Nov 2017 08:18:12 +0000 (08:18 +0000)]
[LV][X86] Support of AVX2 Gathers code generation and update the LV with this
This patch depends on: https://reviews.llvm.org/D35348
Support of pattern selection of masked gathers of AVX2 (X86\AVX2 code gen)
Update LoopVectorize to generate gathers for AVX2 processors.
Reviewers: delena, zvi, RKSimon, craig.topper, aaboud, igorb
Reviewed By: delena, RKSimon
Differential Revision: https://reviews.llvm.org/D35772
llvm-svn: 318641
Craig Topper [Mon, 20 Nov 2017 08:15:04 +0000 (08:15 +0000)]
[X86] Regenerate a test with broadcast comments. NFC
llvm-svn: 318640
Max Kazantsev [Mon, 20 Nov 2017 06:07:57 +0000 (06:07 +0000)]
[IRCE] Smart range intersection
In rL316552, we ban intersection of unsigned latch range with signed range check and vice
versa, unless the entire range check iteration space is known positive. It was a correct
functional fix that saved us from dealing with ambiguous values, but it also appeared
to be a very restrictive limitation. In particular, in the following case:
loop:
%iv = phi i32 [ 0, %preheader ], [ %iv.next, %latch]
%iv.offset = add i32 %iv, 10
%rc = icmp slt i32 %iv.offset, %len
br i1 %rc, label %latch, label %deopt
latch:
%iv.next = add i32 %iv, 11
%cond = icmp i32 ult %iv.next, 100
br it %cond, label %loop, label %exit
Here, the unsigned iteration range is `[0, 100)`, and the safe range for range
check is `[-10, %len - 10)`. For unsigned iteration spaces, we use unsigned
min/max functions for range intersection. Given this, we wanted to avoid dealing
with `-10` because it is interpreted as a very big unsigned value. Semantically, range
check's safe range goes through unsigned border, so in fact it is two disjoint
ranges in IV's iteration space. Intersection of such ranges is not trivial, so we prohibited
this case saying that we are not allowed to intersect such ranges.
What semantics of this safe range actually means is that we can start from `-10` and go
up increasing the `%iv` by one until we reach `%len - 10` (for simplicity let's assume that
`%len - 10` is a reasonably big positive value).
In particular, this safe iteration space includes `0, 1, 2, ..., %len - 11`. So if we were able to return
safe iteration space `[0, %len - 10)`, we could safely intersect it with IV's iteration space. All
values in this range are non-negative, so using signed/unsigned min/max for them is unambiguous.
In this patch, we alter the algorithm of safe range calculation so that it returnes a subset of the
original safe space which is represented by one continuous range that does not go through wrap.
In order to reach this, we use modified SCEV substraction function. It can be imagined as a function
that substracts by `1` (or `-1`) as long as the further substraction does not cause a wrap in IV iteration
space. This allows us to perform IRCE in many situations when we deal with IV space and range check
of different types (in terms of signed/unsigned).
We apply this approach for both matching and not matching types of IV iteration space and the
range check. One implication of this is that now IRCE became smarter in detection of empty safe
ranges. For example, in this case:
loop:
%iv = phi i32 [ %begin, %preheader ], [ %iv.next, %latch]
%iv.offset = sub i32 %iv, 10
%rc = icmp ult i32 %iv.offset, %len
br i1 %rc, label %latch, label %deopt
latch:
%iv.next = add i32 %iv, 11
%cond = icmp i32 ult %iv.next, 100
br it %cond, label %loop, label %exit
If `%len` was less than 10 but SCEV failed to trivially prove that `%begin - 10 >u %len- 10`,
we could end up executing entire loop in safe preloop while the main loop was still generated,
but never executed. Now, cutting the ranges so that if both `begin - 10` and `%len - 10` overflow,
we have a trivially empty range of `[0, 0)`. This in some cases prevents us from meaningless optimization.
Differential Revision: https://reviews.llvm.org/D39954
llvm-svn: 318639
Serguei Katkov [Mon, 20 Nov 2017 05:42:36 +0000 (05:42 +0000)]
[CGP] Fix the crash caused by enable of complex addr mode
We must collect all AddModes even if they are the same.
This is due to Original value is different but we need all original
values collected as they are used as anchors in common phi finding.
Reviewers: john.brawn, reames
Reviewed By: john.brawn
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D40166
llvm-svn: 318638
Peter Collingbourne [Mon, 20 Nov 2017 05:31:37 +0000 (05:31 +0000)]
COFF: Fix invalid comdat sections in test cases.
The comdat sections in these test cases do not comply with the COFF
specification, and link.exe rejects them. I plan to make a change to
how we handle comdat sections which would also cause us to reject them.
llvm-svn: 318637
Peter Collingbourne [Mon, 20 Nov 2017 05:31:23 +0000 (05:31 +0000)]
COFF: Change SparseChunks to be of type std::vector<SectionChunk *>. NFC.
llvm-svn: 318636