Francisco Jerez [Fri, 22 Jul 2016 01:49:36 +0000 (18:49 -0700)]
i965/eu: Take into account the target cache argument in brw_set_dp_read_message.
brw_set_dp_read_message() was setting the data cache as send message
SFID on Gen7+ hardware, ignoring the target cache specified by the
caller. Some of the callers were passing a bogus target cache value
as argument relying on brw_set_dp_read_message not to take it into
account. Fix them too.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Tue, 19 Jul 2016 22:23:30 +0000 (15:23 -0700)]
i965: Flip the non-coherent framebuffer fetch extension bit on G45-Gen8 hardware.
This is not enabled on the original Gen4 part because it lacks surface
state tile offsets so it may not be possible to sample from arbitrary
non-zero layers of the framebuffer depending on the miptree layout (it
should be possible to work around this by allocating a scratch surface
and doing the same hack currently used for render targets, but meh...).
On Gen9+ even though it should mostly work (feel free to force-enable
it in order to compare the coherent and non-coherent paths in terms of
performance), there are some corner cases like 1D array layered
framebuffers that cannot be handled easily by the non-coherent path
because of the incompatible layout in memory of 1D and 2D miptrees (it
should be possible to work around this too by doing state-dependent
recompiles, but it's hard to care enough since Gen9 has native support
for coherent render target reads...)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Fri, 1 Jul 2016 20:54:05 +0000 (13:54 -0700)]
i965: Implement glBlendBarrier.
This is a no-op if the platform supports coherent framebuffer fetch,
-- If it doesn't we just need to flush the render cache and invalidate
the texture cache in order for previous rendering to be visible to
framebuffer fetch.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Fri, 1 Jul 2016 20:56:47 +0000 (13:56 -0700)]
i965: Upload surface state for non-coherent framebuffer fetch.
This iterates over the list of attached render buffers and binds
appropriate surface state structures to the binding table block
allocated for shader framebuffer read.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Fri, 22 Jul 2016 05:23:13 +0000 (22:23 -0700)]
i965: Implement support for overriding the texture target in brw_emit_surface_state.
This allows the caller to bind a miptree using a texture target other
than the one it it was created with. The code should work even if the
memory layouts of the specified and original targets don't match, as
long as the caller only intends to access a single slice of the
miptree structure.
This will be exploited by the next commit in order to support
non-coherent framebuffer fetch of a single layer of a 3D texture
(since some generations lack the minimum array element control for 3D
textures bound to the sampler unit), and multiple layers of a 1D array
texture (since binding it as an actual 1D array texture would require
state-dependent recompiles because the same shader couldn't
simultaneously work for 1D and 2D array textures due to the different
texel fetch coordinate ordering).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Fri, 19 Aug 2016 05:08:10 +0000 (22:08 -0700)]
i965: Massage argument list of brw_emit_surface_state().
This commit does three different things in a single pass in order to
keep the amount of churn low: Remove the for_gather boolean argument
which was unused, pass the isl_view argument by value rather than by
reference since I'll have to modify it from within the function, and
add a target argument to allow callers to bind textures using a target
other than the original. The prototype of the function now looks
like:
void brw_emit_surface_state(struct brw_context *brw,
struct intel_mipmap_tree *mt,
GLenum target, struct isl_view view,
uint32_t mocs, uint32_t *surf_offset, int surf_index,
unsigned read_domains, unsigned write_domains);
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Tue, 19 Jul 2016 01:06:02 +0000 (18:06 -0700)]
i965: Add missing has_surface_tile_offset flag to the Gen8+ device info structures.
This surface state control has been supported by all hardware
generations since G45.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Fri, 22 Jul 2016 05:09:46 +0000 (22:09 -0700)]
i965: Return the correct layout from get_isl_dim_layout for pre-ILK cube textures.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Tue, 19 Jul 2016 01:07:35 +0000 (18:07 -0700)]
i965: Factor out isl_surf_dim/isl_dim_layout calculation into functions.
The logic to calculate the right layout and dimensionality for a given
GL texture target is going to be useful elsewhere, factor it out from
intel_miptree_get_isl_surf().
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Fri, 1 Jul 2016 20:45:22 +0000 (13:45 -0700)]
i965: Resolve color for non-coherent FB fetch at UpdateState time.
This is required because the sampler unit used to fetch from the
framebuffer is unable to interpret non-color-compressed fast-cleared
single-sample texture data. Roughly the same limitation applies for
surfaces bound to texture or image units, but unlike texture sampling,
non-coherent framebuffer fetch is by definition non-coherent with
previous rendering, so the brw_render_cache_set_check_flush() call can
be omitted except after resolve.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Sat, 23 Jul 2016 01:16:45 +0000 (18:16 -0700)]
i965: Return whether the miptree was resolved from intel_miptree_resolve_color().
This will allow optimizing out the cache flush in some cases when
resolving wasn't necessary.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Fri, 22 Jul 2016 04:57:00 +0000 (21:57 -0700)]
i965/fs: Translate nir_intrinsic_load_output on a fragment output.
This gets the non-coherent framebuffer fetch path hooked up to the NIR
front-end.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Fri, 22 Jul 2016 04:47:45 +0000 (21:47 -0700)]
i965/fs: Allocate fragment output temporaries on demand.
This gets rid of the duplication of logic between nir_setup_outputs()
and get_frag_output() by allocating fragment output temporaries lazily
whenever get_frag_output() is called. This makes nir_setup_outputs()
a no-op for the fragment shader stage.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Fri, 22 Jul 2016 04:26:20 +0000 (21:26 -0700)]
i965/fs: Rework representation of fragment output locations in NIR.
The problem with the current approach is that driver output locations
are represented as a linear offset within the nir_outputs array, which
makes it rather difficult for the back-end to figure out what color
output and index some nir_intrinsic_load/store_output was meant for,
because the offset of a given output within the nir_output array is
dependent on the type and size of all previously allocated outputs.
Instead this defines the driver location of an output to be the pair
formed by its GLSL-assigned location and index (I've borrowed the
bitfield macros from brw_defines.h in order to represent the pair of
integers as a single scalar value that can be assigned to
nir_variable_data::driver_location). nir_assign_var_locations is no
longer useful for fragment outputs.
Because fragment outputs are now allocated independently rather than
within the nir_outputs array, the get_frag_output() helper becomes
necessary in order to obtain the right temporary register for a given
location-index pair.
The type_size helper passed to nir_lower_io is now type_size_dvec4
rather than type_size_vec4_times_4 so that output array offsets are
provided in terms of whole array elements rather than in terms of
scalar components (dvec4 is the largest vector type supported by the
GLSL so this will cause all individual fragment outputs to have a size
of one regardless of the type).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Fri, 22 Jul 2016 04:58:56 +0000 (21:58 -0700)]
i965: Fix undefined signed overflow in INTEL_MASK for bitfields of 31 bits.
Most likely we had only ever used this macro on bitfields of less than
31 bits -- That's going to change shortly.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Fri, 22 Jul 2016 04:25:46 +0000 (21:25 -0700)]
i965/fs: Special-case nir_intrinsic_store_output for the fragment shader.
I'm about to change how fragment shader output locations are
represented, so the generic nir_intrinsic_store_output implementation
that assumes that outputs are just contiguous elements in the big
nir_outputs array won't work anymore. This somewhat simplified
implementation of nir_intrinsic_store_output for fragment shaders
should be functionally equivalent to the current fall-back one.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Fri, 22 Jul 2016 03:25:28 +0000 (20:25 -0700)]
i965/fs: Implement non-coherent framebuffer fetch using the sampler unit.
v2: Memoize sample ID, misc codestyle changes. (Ken)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Fri, 22 Jul 2016 03:35:29 +0000 (20:35 -0700)]
i965/fs: Emit interpolation setup if non-coherent framebuffer fetch is in use.
This will be required for the next commit since the non-coherent path
makes use of the fragment coordinates implicitly, so they need to be
calculated.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Thu, 21 Jul 2016 23:20:07 +0000 (16:20 -0700)]
i965/fs: Force per-sample dispatch if the shader reads from a multisample FBO.
The result of a framebuffer fetch from a multisample FBO is inherently
per-sample, so the spec requires at least those sections of the shader
that depend on the framebuffer fetch result to be executed once per
sample.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Fri, 1 Jul 2016 20:46:40 +0000 (13:46 -0700)]
i965: Allocate space in the binding table for non-coherent FB fetch.
Unfortunately due to the inconsistent meaning of some surface state
structure fields, we cannot re-use the same binding table entries for
sampling from and rendering into the same set of render buffers, so we
need to allocate a separate binding table block specifically for
render target reads if the non-coherent path is in use.
The slight noise is due to the change of
brw_assign_common_binding_table_offsets to return the next available
binding table index rather than void.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Fri, 22 Jul 2016 03:32:12 +0000 (20:32 -0700)]
i965/fs: Add brw_wm_prog_key bit specifying whether FB reads should be coherent.
Some of the following changes in this series are specific to the
non-coherent path, so I need some way to tell whether the coherent or
non-coherent path is in use. The flag defaults to the value of the
gl_extensions::MESA_shader_framebuffer_fetch enable so that it can be
overridden easily on hardware that supports both framebuffer fetch
extensions in order to test the non-coherent path, like:
MESA_EXTENSION_OVERRIDE=-GL_EXT_shader_framebuffer_fetch
(Of course trying to force-enable the coherent framebuffer fetch
extension on hardware without native support won't work and lead to
assertion failures).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Thu, 21 Jul 2016 19:46:04 +0000 (12:46 -0700)]
i965/fs: Get rid of fs_visitor::do_dual_src.
This boolean flag was being used for two different things:
- To set the brw_wm_prog_data::dual_src_blend flag. Instead we can
just set it based on whether the dual_src_output register is valid,
which will be the case if the shader writes the secondary blending
color.
- To decide whether to call emit_single_fb_write() once, or in a loop
that would iterate only once, which seems pretty useless.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Wed, 20 Jul 2016 03:35:26 +0000 (20:35 -0700)]
nir: Handle FB fetch outputs correctly in nir_lower_io_to_temporaries.
This requires emitting a series of copies at the top of the program
from each output variable to the corresponding temporary. The initial
copy can be skipped for non-framebuffer fetch outputs whose initial
value is undefined, and the final copy needs to be skipped for
read-only outputs (i.e. gl_LastFragData), since it would be illegal to
emit a store output intrinsic for it.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Wed, 20 Jul 2016 03:33:46 +0000 (20:33 -0700)]
nir: Pass through fb_fetch_output and OutputsRead from GLSL IR.
The NIR representation of framebuffer fetch is the same as the GLSL
IR's until interface variables are lowered away, at which point it
will be translated to load output intrinsics. The GLSL-to-NIR pass
just needs to copy the bits over to the NIR program.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Eric Anholt [Thu, 25 Aug 2016 19:32:19 +0000 (12:32 -0700)]
vc4: Add support for fddx/fddy
Based vaguely on a patch by jonasarrow on github.
Eric Anholt [Thu, 25 Aug 2016 21:32:47 +0000 (14:32 -0700)]
vc4: Add register allocation support for MUL output rotation.
We need the source to be in r0-r3, so make a new register class for it.
It will be up to the surrounding passes to make sure that the r0-r3
allocation of its source won't conflict with anything other class
requirements on that temp.
Eric Anholt [Thu, 25 Aug 2016 19:31:49 +0000 (12:31 -0700)]
vc4: Add support for MUL output rotation.
Extracted from a patch by jonasarrow on github.
Eric Anholt [Thu, 25 Aug 2016 19:15:29 +0000 (12:15 -0700)]
vc4: Add support for the 2-bit LOAD_IMM variants.
Extracted and fixed up from a patch by jonasarrow on github. This ended
up not getting used for ddx/ddy, but seems like it might still be useful.
Eric Anholt [Thu, 25 Aug 2016 20:40:27 +0000 (13:40 -0700)]
vc4: Add QPU scheduling to handle MUL rotate sources.
We need MUL rotates to do ddx/ddy support.
Eric Anholt [Thu, 25 Aug 2016 20:26:50 +0000 (13:26 -0700)]
vc4: Add disassembly for constant MUL rotates
Eric Anholt [Thu, 25 Aug 2016 20:21:58 +0000 (13:21 -0700)]
vc4: Add real validation for MUL rotation.
Caught problems in the upcoming DDX/DDY implementation.
Eric Anholt [Thu, 25 Aug 2016 20:48:21 +0000 (13:48 -0700)]
vc4: Add a QIR value for the QPU element register.
This will be used in the ddx/ddy support for "Am I the top half?" or "Am I
the left half?" checks.
Chad Versace [Thu, 25 Aug 2016 23:08:27 +0000 (16:08 -0700)]
i965: Respect miptree offsets in intel_readpixels_tiled_memcpy()
Respect intel_miptree_slice::x_offset,y_offset and
intel_mipmap_tree::offset. All three may be non-zero when glReadPixels
is called on an EGLImage created from the non-base slice of a miptree.
Patch 2/2 that fixes test
'dEQP-EGL.functional.image.create.gles2_cubemap_*'.
Reported-by: Haixia Shi <hshi@chromium.org>
Diagnosed-by: Haixia Shi <hshi@chromium.org>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Change-Id: I4b397b27e55a743a7094d29fb0a6a4b6b34352b0
Chad Versace [Thu, 25 Aug 2016 23:08:15 +0000 (16:08 -0700)]
i965: Fix miptree layout for EGLImage-based renderbuffers
When glEGLImageTargetRenderbufferStorageOES() was given an EGLImage
created from the non-base slice of a miptree,
intel_image_target_renderbuffer_storage() forgot to apply the intra-tile
offsets __DRIimage::tile_x,tile_y to the miptree layout.
This patch fixes the problem with a quick hack suitable for
cherry-picking. A proper fix requires more thorough plumbing in
intel_miptree_create_layout() and brw_tex_layout().
Patch 1/2 that fixes test
'dEQP-EGL.functional.image.create.gles2_cubemap_*'.
Reported-by: Haixia Shi <hshi@chromium.org>
Diagnosed-by: Haixia Shi <hshi@chromium.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
Change-Id: I8a64b0048a1ee9e714ebb3f33fffd8334036450b
Jason Ekstrand [Mon, 22 Aug 2016 21:10:46 +0000 (14:10 -0700)]
intel: Flatten the makefile structure
This pulls isl and genxml into a single make file so that they can properly
build in parallel. This isn't terribly important now as genxml just
generates sources which happens serially first anyway but it will be more
important as we add more stuff to src/intel.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jason Ekstrand [Mon, 22 Aug 2016 21:24:01 +0000 (14:24 -0700)]
isl/tests: Use a longer path for isl.h
The tests assumed that isl would be in the include path but that usually
isn't the case. Instead, we usually have src/intel and you need to add an
"isl/" prefix.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Jason Ekstrand [Wed, 24 Aug 2016 04:46:58 +0000 (21:46 -0700)]
intel/isl/gen9: Only use the magic 1D alignment for GEN9_1D surfaces
If the surface has a layout of GEN4_2D then we need to compute a normal 2D
alignment and not use the magic linewar 1D alignment.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Jason Ekstrand [Wed, 24 Aug 2016 04:46:23 +0000 (21:46 -0700)]
intel/isl: Pass the dim_layout into choose_alignment_el
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Jason Ekstrand [Wed, 24 Aug 2016 04:35:36 +0000 (21:35 -0700)]
intel/isl: Use DIM_LAYOUT_GEN4_2D for tiled 1-D surfaces on SKL
The Sky Lake 1D layout is only used if the surface is linear. For tiled
surfaces such as depth and stencil the old gen4 2D layout is used.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Jason Ekstrand [Thu, 25 Aug 2016 04:49:10 +0000 (21:49 -0700)]
nir/phi_builder: Don't recurse in value_get_block_def
In some programs, we can have very deep dominance trees and the recursion
can cause us to risk stack overflows. Instead, we replace the recursion
with a pair of loops, one at the start and one at the end. This is
functionally equivalent to what we had before and it's actually a bit
easier to read in the new form without the recursion.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97225
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Chad Versace [Thu, 25 Aug 2016 20:54:47 +0000 (13:54 -0700)]
.mailmap: Update my address again
I joined Google's Chrome OS graphics team.
Matt Turner [Thu, 25 Aug 2016 02:25:58 +0000 (19:25 -0700)]
nir: Walk blocks in source code order in lower_vars_to_ssa.
Prior to this commit rename_variables_block() is recursively called,
performing a depth-first traversal of the control flow graph. The
function uses a non-trivial amount of stack space for local variables,
which puts us in danger of smashing the stack, given a sufficiently deep
dominance tree.
XCOM: Enemy Within contains a shader with such a dominance tree (1574
nir_blocks in total, depth of at least 143).
Jason tells me that he believes that any walk over the nir_blocks that
respects dominance is sufficient (a DFS might have been necessary prior
to the introduction of nir_phi_builder).
In fact, the introduction of nir_phi_builder made the problem worse:
rename_variables_block(), walks to the bottom of the dominance tree
before calling nir_phi_builder_value_get_block_def() which walks back to
the top of the dominance tree...
In any case, this patch ensures we avoid that problem as well.
Cc: mesa-stable@lists.freedesktop.org
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97225
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Marek Olšák [Thu, 25 Aug 2016 18:22:59 +0000 (20:22 +0200)]
radeonsi: don't use allocas for arrays with LLVM 3.8
It crashes.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97413
Marek Olšák [Wed, 24 Aug 2016 23:26:54 +0000 (01:26 +0200)]
gallium/radeon: unify and simplify checking for an empty gfx IB
We can take advantage of the fact that multi_fence does the obvious thing
with NULL fences.
This fixes unflushed fences that can get stuck due to empty IBs.
Matt Turner [Thu, 25 Aug 2016 18:19:55 +0000 (11:19 -0700)]
mesa: Drop sed of now dead Plo files.
gen6/7/8_blorp.c were removed in commits
c8bc1ae96a,
e198983c61, and
16a9fcbbb6 respectively.
Kenneth Graunke [Fri, 12 Aug 2016 21:48:54 +0000 (14:48 -0700)]
meta: Always do GenerateMipmaps in linear colorspace.
When generating mipmaps for sRGB textures, force both decode and encode,
so the filtering is done in linear colorspace, regardless of settings.
Fixes a WebGL conformance test in Chrome:
https://www.khronos.org/registry/webgl/sdk/tests/conformance2/textures/misc/tex-srgb-mipmap.html?webglVersion=2
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97322
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Eric Engestrom [Tue, 19 Jul 2016 12:41:36 +0000 (13:41 +0100)]
configure.ac: raise Mako required version to 0.8.0
It seems [0] old versions of Mako are no longer supported. Emil mentioned it
might need v0.8.0 [1] for isl_format_layout [2], although I didn't get
a confirmation that it's really the minimum.
Let's raise it to that to avoid getting other bugs.
We might lower it a bit again later if it turns out we can.
[0] https://lists.freedesktop.org/archives/mesa-dev/2016-July/122772.html
[1] https://lists.freedesktop.org/archives/mesa-dev/2016-July/122775.html
[2] https://lists.freedesktop.org/archives/mesa-dev/2016-July/123278.html
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Dave Airlie <Airlied@redhat.com>
Brian Paul [Wed, 24 Aug 2016 14:52:29 +0000 (08:52 -0600)]
swrast: fix incorrectly positioned putImage() in swrast driver
Some front buffer rendering was in the wrong position. This included
scissored clears, glDrawPixels and glCopyPixels. The problem was the
y coordinate passed to putImage() didn't match the y coordinate passed
to getImage().
We fix this by setting xrb->map_y to the inverted coordinate in
swrast_map_renderbuffer() which is used later by the putImage() call.
Also pass xrb->map_y to getImage() to be symmetric.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97426
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Marek Olšák [Wed, 24 Aug 2016 21:34:01 +0000 (23:34 +0200)]
radeonsi: disable SDMA texture copying on Carrizo
Cc: 12.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Marek Olšák [Sun, 21 Aug 2016 10:41:29 +0000 (12:41 +0200)]
gallium/noop: use 3-space indentation
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Sun, 21 Aug 2016 10:24:59 +0000 (12:24 +0200)]
gallium: add a pipe_context parameter to resource_get_handle
radeonsi needs to do some operations (DCC decompression) for OpenGL-OpenCL
interop and this is the only way to make it coherent with the current
context. It can optionally be set to NULL.
Reviewed-by: Brian Paul <brianp@vmware.com>
Nicolai Hähnle [Thu, 11 Aug 2016 11:06:47 +0000 (13:06 +0200)]
st/mesa: fix sRGB BlitFramebuffer regression
Broken since:
3190c7ee9727161d627f107c2e7f8ec3a11941c1
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97285
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Michel Dänzer [Wed, 17 Aug 2016 08:02:04 +0000 (17:02 +0900)]
loader/dri3: Overhaul dri3_update_num_back
Always use 3 buffers when flipping. With only 2 buffers, we have to wait
for a flip to complete (which takes non-0 time even with asynchronous
flips) before we can start working on the next frame. We were previously
only using 2 buffers for flipping if the X server supports asynchronous
flips, even when we're not using asynchronous flips. This could result
in bad performance (the referenced bug report is an extreme case, where
the inter-frame stalls were preventing the GPU from reaching its maximum
clocks).
I couldn't measure any performance boost using 4 buffers with flipping.
Performance actually seemed to go down slightly, but that might have
been just noise.
Without flipping, a single back buffer is enough for swap interval 0,
but we need to use 2 back buffers when the swap interval is non-0,
otherwise we have to wait for the swap interval to pass before we can
start working on the next frame. This condition was previously reversed.
Cc: "12.0 11.2" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97260
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Jason Ekstrand [Thu, 25 Aug 2016 00:14:11 +0000 (17:14 -0700)]
anv: Include the pipeline layout in the shader hash
The pipeline layout affects shader compilation because it is what
determines binding table locations as well as whether or not a particular
buffer has dynamic offsets. Since this affects the generated shader, it
needs to be in the hash. This fixes a bunch of CTS tests now that the CTS
is using a pipeline cache.
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Tue, 23 Aug 2016 01:11:41 +0000 (18:11 -0700)]
anv: Add a --disable-vulkan-icd-full-driver-path option
This option makes installed Vulkan ICD files contain only a driver library
name and not a path. This is intended for distros to help them work around
multi-arch issues.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Francisco Jerez [Tue, 23 Aug 2016 01:50:41 +0000 (18:50 -0700)]
i965/fs: Don't consider the stencil output to be a color output.
This would cause gl_FragStencilRef to be counted as a color output
incorrectly during the precompile phase, which leads to unnecessary
recompilation on master and could trigger an assertion failure in
fs_visitor::emit_fb_writes() on my i965-fb-fetch branch.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Wed, 20 Jul 2016 03:30:24 +0000 (20:30 -0700)]
glsl: Keep track of the set of fragment outputs read by a GL program.
This is the set of shader outputs whose initial value is provided to
the shader by some external means when the shader is executed, rather
than computed by the shader itself.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Wed, 20 Jul 2016 03:29:55 +0000 (20:29 -0700)]
glsl: Don't consider read-only fragment outputs to be written to.
Since they cannot be written. This prevents adding fragment outputs
to the OutputsWritten set that are only read from via the
gl_LastFragData array but never written to.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Thu, 14 Jul 2016 19:57:14 +0000 (12:57 -0700)]
glsl/linker: Allow fragment output overlap for gl_LastFragData.
gl_LastFragData overlaps gl_FragData by definition.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Thu, 14 Jul 2016 19:52:51 +0000 (12:52 -0700)]
glsl/ast: Allow redeclaration of gl_LastFragData with different precision qualifier.
v2: No need to check the GLSL version. (Ken)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Wed, 20 Jul 2016 03:23:17 +0000 (20:23 -0700)]
glsl: Don't attempt to do dead varying elimination on gl_LastFragData arrays.
Apparently this pass can only handle elimination of a single built-in
fragment output array, so the presence of gl_LastFragData (which it
wouldn't split correctly anyway) could prevent it from splitting the
actual gl_FragData array. Just match gl_FragData by name since it's
the only built-in it can handle.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Wed, 20 Jul 2016 03:11:53 +0000 (20:11 -0700)]
glsl: Define a gl_LastFragData built-in for older GLSL versions.
The EXT_shader_framebuffer_fetch extension defines alternative
language for GLES2 shaders where user-defined fragment outputs are not
allowed. Instead of using inout user-defined fragment outputs the
shader is expected to read from the gl_LastFragData built-in array.
In addition this allows using the same language on desktop GLSL
versions prior to 4.2 that support the deprecated gl_FragData built-in
in preparation for the MESA_shader_framebuffer_fetch desktop GL
extension.
Both legacy and user-defined inout outputs have a common
representation at the GLSL IR level, so it shouldn't make any
difference for optimization passes and back-ends whether the
application is using gl_LastFragData or user-defined outputs, all
they'll see is a variable dereference of a fragment output at a
certain interface location with the fb_fetch_output bit set to one.
v2: Don't define the built-in variable on GLSL versions for which
gl_FragData exists but is deprecated. (Ken)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Wed, 20 Jul 2016 03:10:21 +0000 (20:10 -0700)]
glsl: Handle the inout qualifier in fragment shader output declarations.
According to the EXT_shader_framebuffer_fetch extension the inout
qualifier can be used on ESSL 3.0+ shaders to declare a special kind
of fragment output that gets implicitly initialized with the previous
framebuffer contents at the current fragment coordinates. In addition
we allow using the same language to define FB fetch outputs in GLSL
1.3+ shaders in preparation for the desktop MESA_shader_framebuffer_fetch
extensions.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Wed, 20 Jul 2016 03:07:47 +0000 (20:07 -0700)]
glsl: Add support for representing framebuffer fetch in the GLSL IR.
The GLSL IR representation of framebuffer fetch amounts to a single
bit in the ir_variable object applicable to fragment shader outputs.
The flag indicates that the variable will be implicitly initialized to
the previous contents of the render buffer at the same fragment
coordinates and sample index.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Tue, 26 Jul 2016 00:24:52 +0000 (17:24 -0700)]
glsl: Add parser state enables for the framebuffer fetch extensions.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Wed, 6 Jul 2016 06:21:21 +0000 (23:21 -0700)]
mesa: Add blend barrier entry point and driver hook.
Both MESA_shader_framebuffer_fetch_non_coherent and the non-coherent
variant of KHR_blend_equation_advanced will use this driver hook to
request coherency between framebuffer reads and writes. This
intentionally doesn't hook up glBlendBarrierMESA to the dispatch layer
since the extension isn't exposed to applications yet, see [1]
for more details.
[1] https://lists.freedesktop.org/archives/mesa-dev/2016-July/124028.html
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Wed, 6 Jul 2016 06:18:18 +0000 (23:18 -0700)]
mesa: Move shader memory barrier functions into barrier.c.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Wed, 6 Jul 2016 06:15:01 +0000 (23:15 -0700)]
mesa: Rename "texturebarrier" source files to "barrier".
In preparation for collecting all pipeline barrier GL entry points
into a single source file.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Wed, 6 Jul 2016 04:28:11 +0000 (21:28 -0700)]
mesa: Add support for querying GL_FRAGMENT_SHADER_DISCARDS_SAMPLES_EXT.
This can currently only give true as result since the only way you can
expose EXT_shader_framebuffer_fetch right now is by flipping the
MESA_shader_framebuffer_fetch bit, but that could potentially change
in the future, see [1] for an explanation.
[1] https://lists.freedesktop.org/archives/mesa-dev/2016-July/124028.html
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Wed, 20 Jul 2016 00:40:05 +0000 (17:40 -0700)]
mesa: Add extension enables for framebuffer fetch extensions.
This allows drivers to expose EXT_shader_framebuffer_fetch in GLES2+
contexts if desired. Note that this adds boolean flags for two MESA
extensions, but only the EXT GLES-only extension is exposed for the
moment, see the cover letter of this series [1] for the rationale.
[1] https://lists.freedesktop.org/archives/mesa-dev/2016-July/124028.html
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Wed, 6 Jul 2016 04:25:56 +0000 (21:25 -0700)]
glapi: Add XML for GL_EXT_shader_framebuffer_fetch.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Samuel Pitoiset [Wed, 24 Aug 2016 18:22:52 +0000 (20:22 +0200)]
nvc0: invalidate textures/samplers on GK104+
Like Fermi, textures and samplers are aliased between 3D and compute,
especially the TIC_FLUSH/TSC_FLUSH methods and we have to re-validate
these resources when switching between the two pipelines.
This fixes a GPU hang with Elemental (and most likely with other UE4 demos).
Tested on GK107 and GM107.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
CC: <mesa-stable@lists.freedesktop.org>
Rhys Kidd [Wed, 24 Aug 2016 04:13:04 +0000 (00:13 -0400)]
gallium/ttn: Remove duplicated TGSI_OPCODE_DP2A initialization
Duplicate line is currently on 1535.
Identified by Clang, when run through Eric Anholt's Travis harness.
Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Eric Anholt [Thu, 18 Aug 2016 21:10:57 +0000 (14:10 -0700)]
travis: Upgrade LLVM dependency to 3.5 and enable LLVM drivers.
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Rhys Kidd <rhyskidd@gmail.com>
Eric Anholt [Thu, 18 Aug 2016 20:43:12 +0000 (13:43 -0700)]
travis: Enable vc4 in libdrm to satisfy vc4 test build dependency.
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Rhys Kidd <rhyskidd@gmail.com>
Eric Anholt [Thu, 18 Aug 2016 20:12:18 +0000 (13:12 -0700)]
travis: Update to the Ubuntu Trusty image.
This will hopefully fix wget from x.org (no real reason explained in
Travis CI bug reports), and may also mean that we can enable LLVM driver
builds.
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Rhys Kidd <rhyskidd@gmail.com>
Eric Anholt [Thu, 18 Aug 2016 19:29:31 +0000 (12:29 -0700)]
travis: Parse configure.ac to pick an updated LIBDRM_VERSION.
Travis has been broken a couple of times by configure.ac updates. To make
it useful, auto-update the version necessary.
This could potentially be used for other dependencies, too, but those get
bumped less frequently.
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Rhys Kidd <rhyskidd@gmail.com>
Lionel Landwerlin [Wed, 24 Aug 2016 16:52:12 +0000 (17:52 +0100)]
anv: meta_blit2d: adapt texel fetch pitch for fake w-tiled
We need to compute detiling coordinates using the physical size of W tiling
(128x32) rather than the logical size (64x64).
v2: Correct comment (Jason)
Fixes dEQP-VK.api.copy_and_blit.image_to_image_stencil
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97448
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Eric Anholt [Mon, 22 Aug 2016 21:58:28 +0000 (14:58 -0700)]
vc4: Fix GPU hangs with >16 varying values.
Fixes glsl-routing in piglit and hangs in glbenchmark 2.0.2.
Leo Liu [Mon, 22 Aug 2016 16:05:53 +0000 (12:05 -0400)]
vl/rbsp: fix another three byte not detected
This happens when three byte "00 00 03" is partly loaded to
vlc->buffer, thus at the bottom of buffer with valid bits is
"00" or "00 00" and left like "00 03" or "03" in the data,
so that it will not be detected by three byte emulation check.
The reason for that is the escaped bit was set to 0 from the
rbsp init.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Marek Olšák [Thu, 18 Aug 2016 13:25:51 +0000 (15:25 +0200)]
radeonsi: fix VM faults due NULL internal const buffers on CIK
They are harmless, but the interrupts do decrease performance.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97039
Cc: 12.0 <mesa-stable@lists.freedesktop.org>
Tomasz Figa [Tue, 2 Aug 2016 10:46:28 +0000 (19:46 +0900)]
gallium/winsys/kms: Look up the GEM handle after importing a prime FD
drmPrimeHandleToFD() will return the same GEM handle every time the same
buffer is imported, even from a different prime FD. Since GEM handles
are not reference counted, we need to make sure that each GEM handle is
referenced only by one display target struct, by looking it up in
kms_sw->bo_list first and bumping the refcount of the found dt on hit
and falling back to creating a new dt only on miss.
v2: Split into separate function.
Use helper function for lookup.
v3 [Emil Velikov]:
Rename kms_sw_displaytarget_{lookup,find_and_ref} (Jordan)
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com> (v2)
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Tomasz Figa [Tue, 2 Aug 2016 10:46:27 +0000 (19:46 +0900)]
gallium/winsys/kms: Move display target handle lookup to separate function
As a preparation to use the lookup in more than once place, move the
code that looks up given KMS/GEM handle to a separate function. This
change should not introduce any functional changes.
v2: Split into separate patch.
Move lookup code into separate function.
v3 [Emil Velikov]:
Rename kms_sw_displaytarget_{lookup,find_and_ref} (Jordan)
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com> (v2)
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Tomasz Figa [Tue, 2 Aug 2016 10:46:26 +0000 (19:46 +0900)]
gallium/winsys/kms: Fully initialize kms_sw_dt at prime import time (v2)
Currently kms_sw_displaytarget_add_from_prime() allocates the struct and
fills in only some of the fields, resulting in a half-baked struct that
needs to be further completed by the caller. To make this a bit more
consistent, pass width, height and stride to this function and fill in
everything there, so that caller can take the returned struct as is.
v2: Split from one big patch into four fixing one thing at a time.
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Tomasz Figa [Tue, 2 Aug 2016 10:46:25 +0000 (19:46 +0900)]
gallium/winsys/kms: Fix double refcount when importing from prime FD (v2)
Currently the code creates a display target struct with refcount field
initialized to 1 and then the caller again increments it, leading to
a leaked reference. Let's remove the unnecessary increment.
v2: Split from one big patch into four fixing one thing at a time.
Signed-off-by: Tomasz Figa <tfiga@chromium.org>
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Alejandro Piñeiro [Tue, 23 Aug 2016 15:00:54 +0000 (17:00 +0200)]
shaderapi: don't generate not linked error on GetProgramStage in general
Both ARB_shader_subroutine and the GL core spec doesn't list any
error when the program is not linked.
We left a error generation for the uniform location, in order to be
consistent with other methods from the spec that generate them.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Eric Engestrom [Tue, 12 Jul 2016 21:48:28 +0000 (22:48 +0100)]
gallium/cso: avoid unnecessary null dereference
The label `out:` calls `destroy()` which dereferences `ctx`.
This is unnecessary as there is nothing to destroy.
Immediately return instead.
CovID: 1258255
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Eric Engestrom [Tue, 31 May 2016 01:30:16 +0000 (02:30 +0100)]
.gitignore: Ignore tags generated by `make tags`
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
[Emil Velikov: rebase]
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Eric Engestrom [Tue, 12 Jul 2016 22:41:50 +0000 (23:41 +0100)]
st/xvmc: fix a couple 'unused-but-set-variable' warnings
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Eric Engestrom [Mon, 22 Aug 2016 20:52:03 +0000 (21:52 +0100)]
egl: turn a couple asserts static (compile-time)
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Eric Engestrom [Mon, 15 Aug 2016 14:51:21 +0000 (15:51 +0100)]
i915: remove unnecessary `if`
if (x) return true; else return false;
can be simplified as:
return x;
since `x` is already a boolean expression.
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Eric Engestrom [Mon, 15 Aug 2016 14:51:20 +0000 (15:51 +0100)]
i965: remove unnecessary `if`
if (x) return true; else return false;
can be simplified as:
return x;
since both `x` are already boolean expressions.
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Alejandro Piñeiro [Thu, 18 Aug 2016 17:44:55 +0000 (19:44 +0200)]
program_resource: subroutine active uniforms should return NumSubroutineUniforms
Before this commit, GetProgramInterfaceiv for pname ACTIVE_RESOURCES
and all the <shader>_SUBROUTINE_UNIFORM programInterface were
returning the count of resources on the shader program using that
interface, instead of the num of uniform resources. This would get a
wrong value (for example) if the shader has an array of subroutine
uniforms.
Note that this means that in order to get a proper value, the shader
needs to be linked, something that is not explicitly mentioned on
ARB_program_interface_query spec, but comes from the general
definition of active uniform. If the program is not linked we
return 0.
v2: don't generate an error if the program is not linked, returning 0
active uniforms instead, plus extra spec references (Tapani Palli)
Fixes GL44-CTS.program_interface_query.subroutines-compute
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Stencel, Joanna [Mon, 22 Aug 2016 07:48:50 +0000 (09:48 +0200)]
egl/wayland-egl: Fix for segfault in dri2_wl_destroy_surface.
Segfault occurs when destroying EGL surface attached to already destroyed
Wayland window. The fix is to set to NULL the pointer of surface's
native window when wl_egl_destroy_window() is called.
Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Stencel, Joanna <joanna.stencel@intel.com>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Kai Wasserbäch [Sat, 20 Aug 2016 16:14:54 +0000 (18:14 +0200)]
st/va: Remove unused variable coded_size from vlVaEndPicture()
Removes the following GCC warning:
../../../../../src/gallium/state_trackers/va/picture.c:542:17: warning:
unused variable 'coded_size' [-Wunused-variable]
unsigned int coded_size;
^~~~~~~~~~
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Kai Wasserbäch [Sat, 20 Aug 2016 16:14:53 +0000 (18:14 +0200)]
st/va: Remove else case in vlVaEndPicture() made superfluous by
c59628d11b
Commit
c59628d11b134fc016388a170880f7646e100d6f made the else statement
and duplication of the context->decoder->end_frame() call superfluous.
Cc: Boyuan Zhang <boyuan.zhang@amd.com>
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Eric Engestrom [Sun, 21 Aug 2016 21:11:48 +0000 (22:11 +0100)]
st/va: add missing mutex_unlock
Fixes:
c59628d11b134fc01638 ("st/va: enable dual instances encode by sync surface")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Kenneth Graunke [Tue, 23 Aug 2016 23:35:59 +0000 (16:35 -0700)]
aubinator: Style fixes.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Sirisha Gandikota [Fri, 19 Aug 2016 19:13:25 +0000 (12:13 -0700)]
aubinator: Fix the tool to correctly decode the DWords
Several fixes have been added as part of this as listed below:
1) Fix the mask and add disassembler handling for STATE_DS, STATE_HS
as the mask returned wrong values of the fields.
2) Fix the GEN_TYPE_ADDRESS/GEN_TYPE_OFFSET decoding - the address/
offset were handled the same way as the other fields and that gives
the wrong values for the address/offset.
3) Decode nested/recurssive structures - Many packets contain nested
structures, ex: 3DSATE_SO_BUFFER, STATE_BASE_ADDRESS, etc contain MOC
structures. Previously, the aubinator printed 1 if there was a MOC
structure. Now we decode the entire structure and print out its fields.
4) Print out the DWord address along with its hex value - For a better
clarity of information, it is helpful to print both the address and
hex value of the DWord along with the DWord count. Since the DWord0
contains the instruction code and the instruction length, it is
unnecessary to print the decoded values for DWord0. This information
is already available from the DWord hex value.
5) Decode the <group> and the corresponding fields in the group- The
<group> tag can have fields of several types including structures. A
group can contain one or more number of fields and this has be correctly
decoded. Previously, aubinator did not decode the groups or the
fields/structures inside them. Now we decode the <group> in the
instructions and structures where the fields in it repeat for any number
of times specified.
v2: Fix the formatting (per Matt)
Make the start and end pos calculation to extract fields from a DWord
more appropriate by moving %32 away from mask() method
Signed-off-by: Sirisha Gandikota <Sirisha.Gandikota@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Ben Widawsky <ben@bwidawsk.net>
Kristian Høgsberg Kristensen [Fri, 19 Aug 2016 19:13:24 +0000 (12:13 -0700)]
aubinator: Add a new tool called Aubinator to the src/intel/tools folder.
The Aubinator tool is designed to help the driver developers in debugging
the driver functionality by decoding the data in the .aub files.
Primary Authors of this tool are Damien Lespiau <damien.lespiau at intel.com>
and Kristian Høgsberg Kristensen <krh at bitplanet.net>.
v2: Review comments are incorporated by Sirisha Gandikota as below:
1) Make Makefile.am more crisp, reuse intel_aub.h from libdrm (per Emil)
2) Aubinator will use platform name instead of GEN number (per Matt)
3) Disassmebler gets created based on pciid rather then GEN number (per Matt)
4) Other formatting comments (per Ken, Matt and Emil)
Signed-off-by: Sirisha Gandikota <Sirisha.Gandikota@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Ben Widawsky <ben@bwidawsk.net>