Chia-I Wu [Thu, 28 Sep 2023 17:38:01 +0000 (10:38 -0700)]
anv: add support for vk_require_astc driconf
When vk_require_astc is true and there is no native ASTC LDR support,
enable ASTC LDR emulation.
vk_require_astc defaults to true on Android 14+.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25467>
Chia-I Wu [Thu, 28 Sep 2023 17:37:11 +0000 (10:37 -0700)]
anv: advertise emulated formats
Advertise required features for emulated formats.
v2: no sparse residency support
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25467>
Chia-I Wu [Thu, 28 Sep 2023 18:20:31 +0000 (11:20 -0700)]
anv: fix up blit src for emulated formats
When the blit src has an emulated format, redirect to the hidden plane.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25467>
Chia-I Wu [Thu, 28 Sep 2023 17:29:52 +0000 (10:29 -0700)]
anv: fix up image views for emulated formats
When the view format is the same as the image format, and the format is
emulated, change the format to the decompressed format.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25467>
Chia-I Wu [Thu, 28 Sep 2023 16:40:36 +0000 (09:40 -0700)]
anv: decompress on upload for emulated formats
Add anv_astc_emu_decompress to decompress the raw texel data to the
hidden plane. Call anv_astc_emu_decompress from anv_CmdCopyImage2 and
anv_CmdCopyBufferToImage2.
v2: support transfer queue and add missing flushes (Lionel)
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25467>
Chia-I Wu [Thu, 28 Sep 2023 16:36:31 +0000 (09:36 -0700)]
anv: add a hidden plane for emulated formats
When an image is created with an emulated format, add a hidden plane to
the image. The hidden plane will be used for decompressed data.
v2: assert no sparse residency
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v1)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25467>
Chia-I Wu [Thu, 28 Sep 2023 16:28:21 +0000 (09:28 -0700)]
anv: add anv_is_format_emulated
anv_is_format_emulated returns true when a format is emulated. It will
be used for ASTC LDR emulation, but it always return false at the
moment.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25467>
Chia-I Wu [Wed, 27 Sep 2023 23:52:45 +0000 (16:52 -0700)]
anv: add anv_cmd_buffer_{save,restore}_state
They can be used to save/restore a subset of the current compute state.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25467>
Chia-I Wu [Mon, 9 Oct 2023 22:23:07 +0000 (15:23 -0700)]
anv: add anv_descriptor_set_write
Add anv_descriptor_set_write as a helper for both
anv_UpdateDescriptorSets and anv_CmdPushDescriptorSetKHR.
v2: rename push_set to the more generic set_override
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v1)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25467>
Chia-I Wu [Mon, 9 Oct 2023 23:43:36 +0000 (16:43 -0700)]
anv: support alternative push descriptor sets
Do not assume anv_cmd_pipeline_state::push_descriptor is the currently
bound push descriptor set. With this and anv_push_descriptor_set_init,
it is possible to initialize a temporary push descriptor set on stack
for internal use.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25467>
Chia-I Wu [Mon, 9 Oct 2023 22:30:23 +0000 (15:30 -0700)]
anv: add anv_push_descriptor_set_{init,finish}
Refactor anv_cmd_buffer_alloc_push_descriptor_set and add
anv_push_descriptor_set_{init,finish}. Note that
anv_push_descriptor_set_init still supports re-initialization.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25467>
Chia-I Wu [Mon, 9 Oct 2023 21:16:19 +0000 (14:16 -0700)]
anv: support image views with surface state stream
Add optional anv_state_stream to anv_image_view_init. This is useful
for internal image views whose lifetimes are tied to the lifetime of a
command buffer.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25467>
Chia-I Wu [Mon, 9 Oct 2023 20:34:51 +0000 (13:34 -0700)]
anv: add anv_image_view_{init,finish}
This is a minor refactor.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25467>
Chia-I Wu [Mon, 25 Sep 2023 23:49:18 +0000 (16:49 -0700)]
anv: remove unused field from anv_image_view
image_plane is unused.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25467>
Chia-I Wu [Mon, 25 Sep 2023 16:54:11 +0000 (09:54 -0700)]
radv, drirc: rename radv_require_{etc2,astc}
Rename them to vk_require_{etc2,astc}.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25467>
Lionel Landwerlin [Fri, 13 Oct 2023 08:57:11 +0000 (11:57 +0300)]
anv: update batch chaining to Gfx9 commands
I don't know this fixes anything but I noticed the generated draws
jump into addresses slightly different from CPU generated jumps.
After checking the genxml, I noticed MI_BATCH_BUFFER_START "Batch
Buffer Start Address" fields have different sizes in Gfx8 & Gfx9+.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25705>
Karol Herbst [Tue, 19 Sep 2023 12:44:26 +0000 (14:44 +0200)]
pipe-loader: allow to load multiple zink devices
Rusticl needs to be able to create a zink_screen on all renderer nodes.
This adds the infrastructure of doing so.
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24839>
Karol Herbst [Tue, 19 Sep 2023 12:44:26 +0000 (14:44 +0200)]
rusticl: enable zink
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24839>
Karol Herbst [Tue, 19 Sep 2023 12:44:26 +0000 (14:44 +0200)]
rusticl/mesa/screen,device: add driver_name
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24839>
Mike Blumenkrantz [Wed, 27 Sep 2023 13:16:01 +0000 (09:16 -0400)]
zink: eliminate samplers from no-sampler CL texops
samplers aren't guaranteed to be provided by no-sampler ops in CL,
so flagging them as extant may read from a null sampler and explode
instead just pass the image through directly in the spirv
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24839>
Karol Herbst [Fri, 29 Sep 2023 08:53:53 +0000 (10:53 +0200)]
zink: fix load/store scratch offsets
The offset is originally in bytes, so we have to handle it just like
shared load/stores.
Fixes:
ddc5c304899 ("zink: handle global and scratch vars")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24839>
Karol Herbst [Tue, 19 Sep 2023 12:44:26 +0000 (14:44 +0200)]
zink: fix RA textures
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24839>
Karol Herbst [Tue, 19 Sep 2023 12:44:26 +0000 (14:44 +0200)]
zink: implement remaining pack ops via bitcast
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24839>
Karol Herbst [Tue, 19 Sep 2023 12:44:26 +0000 (14:44 +0200)]
zink: support samplers with unnormalized_coords
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24839>
Mike Blumenkrantz [Tue, 19 Sep 2023 12:44:26 +0000 (14:44 +0200)]
zink: add set_global_binding
This requires VK_KHR_buffer_device_address which is the only sane way of
implementing CL global memory.
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24839>
Karol Herbst [Tue, 19 Sep 2023 12:44:26 +0000 (14:44 +0200)]
zink: make spirv_builder_emit_*op compatible with spec constants
This way we can use those builder functions to emit spec constant
operations.
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24839>
Karol Herbst [Tue, 19 Sep 2023 12:44:26 +0000 (14:44 +0200)]
zink: support more nir opcodes
There are sadly no SPIRV variants for hadd or iadd_sat we can use, so
lower those.
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24839>
Karol Herbst [Tue, 19 Sep 2023 12:44:26 +0000 (14:44 +0200)]
zink: variable shared mem support
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24839>
Karol Herbst [Tue, 19 Sep 2023 12:44:26 +0000 (14:44 +0200)]
zink: refactor spec constant handling
This makes it simpler to add more spec constants
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24839>
Karol Herbst [Tue, 19 Sep 2023 12:44:26 +0000 (14:44 +0200)]
zink: pass entire pipe_grid_info into zink_program_update_compute_pipeline_state
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24839>
Karol Herbst [Tue, 19 Sep 2023 12:44:26 +0000 (14:44 +0200)]
zink: copy has_variable_shared_mem cs property
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24839>
Karol Herbst [Tue, 19 Sep 2023 12:44:26 +0000 (14:44 +0200)]
zink: implement get_compute_state_info
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24839>
Mike Blumenkrantz [Tue, 26 Sep 2023 19:38:29 +0000 (15:38 -0400)]
zink: always clamp shader stage in descriptor handling
otherwise KERNEL leaks through and explodes
cc: mesa-stable
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24839>
Karol Herbst [Fri, 13 Oct 2023 20:25:24 +0000 (22:25 +0200)]
ci: add half-life 2 freedreno flake
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25722>
Alejandro Piñeiro [Wed, 4 Oct 2023 11:55:35 +0000 (13:55 +0200)]
doc/features: update after last v3d changes
V3D v71 supports new hw features, like 8 draw buffers.
As we are here, we also update some features that have been working
for some time now, even on v41.
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Wed, 21 Jun 2023 08:29:07 +0000 (10:29 +0200)]
v3dv: expose scalarBlockLayout on V3D 7.x
This version of V3D doesn't have the restriction that vector accesses
must not cross 16-byte boundaries.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Wed, 31 May 2023 08:38:59 +0000 (10:38 +0200)]
v3dv: expose depthClamp in V3D 7.x
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Wed, 31 May 2023 07:23:51 +0000 (09:23 +0200)]
v3dv: expose fullDrawIndexUint32 in V3D 7.x
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Juan A. Suarez Romero [Mon, 20 Mar 2023 15:48:51 +0000 (16:48 +0100)]
broadcom/simulator: add per-hw version calls
Add a wrapper to allow calling the right simulator function based on
the hardware under simulation.
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Juan A. Suarez Romero [Wed, 22 Feb 2023 08:43:40 +0000 (09:43 +0100)]
broadcom: add performance counters for V3D 7.x
Some of the counters need to be defined correctly.
v2: Remove references to extended performance counters. The hw does
not support them.
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Thu, 9 Mar 2023 18:05:19 +0000 (19:05 +0100)]
v3d,v3dv: fix compute for V3D 7.1.6+
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Wed, 8 Feb 2023 08:04:02 +0000 (09:04 +0100)]
v3d,v3dv: fix depth bias for v3d 7.x
In v3d 7.x we don't need to scale up depth bias for D16 buffers.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Wed, 8 Feb 2023 07:41:12 +0000 (08:41 +0100)]
v3dv: fix color write mask for v3d 7.x
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Mon, 15 May 2023 22:38:40 +0000 (00:38 +0200)]
v3dv: use new texture shader state rb_swap and reverse fields in v3d 7.x
In v3d 4.x we handle formats that are reversed or R/B swapped by
applying a format swizzle. This doesn't work on border colors though,
and for that there is a specific bit to reverse the border color in
the texture shader state.
In v3d 7.x we have new reverse and swap R/B bits and we no longer have
a bit to reverse the border color because the new reverse bit applies
to border texels too. Because of this, we absolutely need to use these
new bits in order to get correct border colors in all cases with these
formats.
When we enable the reverse and/or swap R/B bits, we are effectively
applying the format swizzle through them, so in these cases we need to
make sure the swizzle we program in the texture shader state is the
view swizzle provided by the API and not the composition of the format
swizzle with the view swizzle like we do in 4.x for all formats. The
same applies to custom border colors: we must not apply the format
swizzle to them for formats that are reversed or R/B swapped, because
again, this format swizzle is already applied through these new bits.
While we are doing this, we also fully adopt the texture shader state
spec from v3d 7.1.5 for v3d 7.x instead of using a description from
7.1.2 which is incompatible and required the driver to manually pack
some of the bits.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Fri, 3 Dec 2021 12:20:22 +0000 (13:20 +0100)]
v3d,v3dv: propagate NaNs bits in shader state records are reserved in v7.x
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Alejandro Piñeiro [Fri, 19 Nov 2021 09:51:37 +0000 (10:51 +0100)]
v3dv: implement depthBounds support for v71
Just for for v71, as that feature is not supported by older hw.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Tue, 16 Nov 2021 10:26:17 +0000 (11:26 +0100)]
v3d,v3dv: don't use max internal bpp for tile sizing in V3D 7.x
We can use the actual bpp of each color attachment to compute real
tile memory requirements, which may allow us to choose a larger tile
size configuration than in V3D 4.2 in certain scenarios.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Fri, 12 Nov 2021 09:35:59 +0000 (10:35 +0100)]
v3d,v3dv: support up to 8 render targets in v7.1+
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Mon, 15 May 2023 22:28:27 +0000 (00:28 +0200)]
v3d/v3dv: fix texture state array stride packing for V3D 7.1.5
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Alejandro Piñeiro [Wed, 27 Oct 2021 00:03:10 +0000 (02:03 +0200)]
v3d: add support for TFU blit in v71
TFU has changed on v71, specially on which registers to use, so that
means that support code change across versions. So as part of this
commit TFU copying is moved to a v3dx file.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Alejandro Piñeiro [Fri, 22 Oct 2021 12:26:29 +0000 (14:26 +0200)]
v3d: handle Z clipping in v71
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Alejandro Piñeiro [Fri, 22 Oct 2021 11:41:09 +0000 (13:41 +0200)]
v3d: don't convert floating point border colors in v71
The TMU does this for us now.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Alejandro Piñeiro [Fri, 22 Oct 2021 10:17:45 +0000 (12:17 +0200)]
v3d: GFX-1461 does not affect V3D 7.x
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Alejandro Piñeiro [Fri, 22 Oct 2021 09:40:49 +0000 (11:40 +0200)]
v3d: setup render pass color clears for any format bpp in v71
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Alejandro Piñeiro [Fri, 22 Oct 2021 08:54:24 +0000 (10:54 +0200)]
v3d: handle new TEXTURE_SHADER_STATE v71 YCbCr fields
There are some new fields for YCbCr with pointers for the various
planes in multi-planar formats. These need to match the base address
pointer in the texture state, or the hardware will assume this is a
multi-planar texture.
Notice we don't use an address type for these fields in the XML
description. This is because the addresses are 64-bit aligned (even
though the PRM doesn't say it) which means the 6 LSB bits are
implicitly 0, but the fields are encoded before the 6th bit of their
starting byte, so we can't use the usual trick we do with address
types where the first 6 bits in the byte are implicitly overwritten by
other fields and we have to encode this manually as a uint field. This
would mean that if we had an actual BO we would also need to add it
manually to the job's list, but since we don't have one, we don't have
to do anything about it.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Alejandro Piñeiro [Thu, 21 Oct 2021 21:21:02 +0000 (23:21 +0200)]
v3d: handle new texture state transfer functions in v71
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Alejandro Piñeiro [Thu, 21 Oct 2021 11:46:11 +0000 (13:46 +0200)]
v3d/uniforms: update VIEWPORT_X/Y_SCALE uniforms for v71
As the packet CLIPPER_XY scaling, this needs to be computed on 1/64ths
of pixel, instead of 1/256ths of pixels.
As this is the usual values that we get from macros, we add manually a
v42 and v71 macro, and define a new helper to get those.
Those granularity values are the same for Vulkan and OpenGL, so
perhaps we should move them to a common place.
As with v3dv, V3D_X macro name is somewhat confusing. It is
specifically created to ask for define values that depends on the
version. But I also felt that V3D_DEFINE_X was too long.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Alejandro Piñeiro [Thu, 21 Oct 2021 11:37:46 +0000 (13:37 +0200)]
v3d: default vertex attributes values are not needed for v71
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Alejandro Piñeiro [Thu, 21 Oct 2021 11:19:49 +0000 (13:19 +0200)]
v3d: no specific separate_segments flag for V3D 7.1
On V3D 7.1 there is not a flag on the Shader State Record to specify
if we are using shared or separate segments. This is done by setting
the vpm input size to 0 (so we need to ensure that the output would be
the max needed for input/output).
We were already doing the latter on the prog_data_vs, so we just need
to use those values, instead of assigning default values.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Alejandro Piñeiro [Thu, 21 Oct 2021 11:14:32 +0000 (13:14 +0200)]
v3d: emit CLIPPER_XY_SCALING for v71
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Alejandro Piñeiro [Thu, 21 Oct 2021 11:09:03 +0000 (13:09 +0200)]
v3d: just don't fill up early-z fields for CFG_BITS for v71
v71 doesn't include early_z_enable/early_z_updates_enable. They are
configured with packet 121.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Alejandro Piñeiro [Wed, 20 Oct 2021 23:47:29 +0000 (01:47 +0200)]
v3d: emit CLEAR_RENDER_TARGETS for v71
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Alejandro Piñeiro [Wed, 20 Oct 2021 13:12:15 +0000 (15:12 +0200)]
v3d: TILE_RENDERING_MODE_CFG_RENDER_TARGET_PART1
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Alejandro Piñeiro [Wed, 20 Oct 2021 12:31:10 +0000 (14:31 +0200)]
v3d: emit TILE_BINNING_MODE_CFG and TILE_RENDERING_MODE_CFG_COMMON for v71
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Alejandro Piñeiro [Tue, 23 May 2023 21:32:37 +0000 (23:32 +0200)]
v3d: add v71 hw generation
Starting point for v71 version inclusion:
* Adds as one of the versions to be compiled on meson
* Updated the v3d_X and v3dX macros to include version 71
* Update the code enough to get it building when using v71.
Any real v71 support will be implemented on following commits.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Tue, 14 Feb 2023 09:09:53 +0000 (10:09 +0100)]
v3dv: fix depth clipping then Z scale is too small in V3D 7.x
When the Z scale is too small guardband clipping may not clip
correctly, so disable it, which is a new option in V3D 7.x.
This fixes this test in V3D 7.x without needing any workarounds:
dEQP-VK.draw.renderpass.inverted_depth_ranges.nodepthclamp_deltazero
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Wed, 20 Oct 2021 09:22:11 +0000 (11:22 +0200)]
v3dv: make v3dv_viewport_compute_xform depend on the V3D version
For 4.x we have a workaround for too small Z scale values that is not
required for V3D 7.x.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Alejandro Piñeiro [Wed, 17 Nov 2021 10:33:59 +0000 (11:33 +0100)]
v3dv: add support for TFU jobs in v71
This includes update the simulator.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Fri, 15 Oct 2021 11:06:31 +0000 (13:06 +0200)]
v3dv: handle Z clipping in v71
Fixes the following tests:
dEQP-VK.clipping.clip_volume.*
dEQP-VK.draw.inverted_depth_ranges.nodepthclamp_* (except deltazero)
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Thu, 7 Oct 2021 10:43:49 +0000 (12:43 +0200)]
v3dv: don't convert floating point border colors in v71
The TMU does this for us now.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Alejandro Piñeiro [Fri, 1 Oct 2021 13:18:38 +0000 (15:18 +0200)]
v3dv: no specific separate_segments flag for V3D 7.1
On V3D 7.1 there is not a flag on the Shader State Record to specify
if we are using shared or separate segments. This is done by setting
the vpm input size to 0 (so we need to ensure that the output would be
the max needed for input/output).
We were already doing the latter on the prog_data_vs, so we just need
to use those values, instead of assigning default values.
As we are here, we also add some comments on the compiler part.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Wed, 29 Sep 2021 07:07:28 +0000 (09:07 +0200)]
v3dv: handle RTs with no color targets in v71
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Wed, 29 Sep 2021 06:22:59 +0000 (08:22 +0200)]
v3dv: handle early Z/S clears for v71
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Tue, 28 Sep 2021 06:59:08 +0000 (08:59 +0200)]
broadcom/compiler: update thread end restrictions validation for v71
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Tue, 28 Sep 2021 06:31:04 +0000 (08:31 +0200)]
v3dv: GFX-1461 does not affect V3D 7.x
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Tue, 28 Sep 2021 06:23:48 +0000 (08:23 +0200)]
v3dv: handle render pass global clear for v71
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Tue, 28 Sep 2021 06:14:11 +0000 (08:14 +0200)]
v3dv: implement noop job for v71
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Sun, 24 Oct 2021 23:38:31 +0000 (01:38 +0200)]
v3dv: handle new texture state transfer functions in v71
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Sun, 24 Oct 2021 23:37:12 +0000 (01:37 +0200)]
v3dv: fix up texture shader state for v71
There are some new fields for YCbCr with pointers for the various
planes in multi-planar formats. These need to match the base address
pointer in the texture state, or the hardware will assume this is a
multi-planar texture.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Wed, 22 Sep 2021 10:04:21 +0000 (12:04 +0200)]
v3dv: setup TLB clear color for meta operations in v71
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Wed, 22 Sep 2021 10:03:58 +0000 (12:03 +0200)]
v3dv: setup render pass color clears for any format bpp in v71
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Alejandro Piñeiro [Wed, 28 Jul 2021 11:45:52 +0000 (13:45 +0200)]
v3dv/pipeline: handle GL_SHADER_STATE_RECORD changed size on v71
It is likely that we would need more changes, as this packet changed,
but this is enough to get basic tests running. Any additional support
will be handled with new commits.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Alejandro Piñeiro [Wed, 28 Jul 2021 10:05:26 +0000 (12:05 +0200)]
v3dv/pipeline: default vertex attributes values are not needed for v71
There are not part of the shader state record.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Alejandro Piñeiro [Wed, 28 Jul 2021 10:01:38 +0000 (12:01 +0200)]
v3dv: default vertex attribute values are gen dependant
Content, structure and size would depend on the generation. Even if it
is needed at all.
So let's move it to the v3dvx files.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Alejandro Piñeiro [Tue, 27 Jul 2021 12:02:30 +0000 (14:02 +0200)]
v3dv/cmd_buffer: just don't fill up early-z fields for CFG_BITS for v71
For v71 early_z_enable/early_z_updates_enable is configured with
packet 121.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Alejandro Piñeiro [Tue, 14 Sep 2021 08:08:19 +0000 (10:08 +0200)]
v3dv/uniforms: update VIEWPORT_X/Y_SCALE uniforms for v71
As the packet CLIPPER_XY scaling, this needs to be computed on 1/64ths
of pixel, instead of 1/256ths of pixels.
As this is the usual values that we get from macros, we add manually a
v42 and v71 macro, and define a new helper (V3DV_X) to get the value
for the current hw version.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Alejandro Piñeiro [Sun, 19 Sep 2021 21:37:32 +0000 (23:37 +0200)]
v3dv/cmd_buffer: emit CLIPPER_XY_SCALING for v71
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Alejandro Piñeiro [Mon, 26 Jul 2021 13:08:11 +0000 (15:08 +0200)]
v3dvx/cmd_buffer: emit CLEAR_RENDER_TARGETS for v71
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Alejandro Piñeiro [Thu, 22 Jul 2021 12:26:13 +0000 (14:26 +0200)]
v3dv/cmd_buffer: emit TILE_RENDERING_MODE_CFG_RENDER_TARGET_PART1 for v71
Signed-off-by: Alejandro Piñeiro <apinheiro@igalia.com>
Signed-off-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Alejandro Piñeiro [Tue, 20 Jul 2021 12:00:44 +0000 (14:00 +0200)]
v3dv: emit TILE_BINNING_MODE_CFG and TILE_RENDERING_MODE_CFG_COMMON for v71
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Wed, 10 Nov 2021 06:54:35 +0000 (07:54 +0100)]
v3dv/device: handle new rpi5 device (bcm2712)
This includes both master and primary devices.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Wed, 10 Nov 2021 09:06:50 +0000 (10:06 +0100)]
v3dv: expose V3D revision number in device name
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Alejandro Piñeiro [Tue, 29 Jun 2021 09:59:53 +0000 (11:59 +0200)]
v3dv/meson: add v71 hw generation
Starting point for v71 version inclusion.
This just adds it as one of the versions to be compiled (on meson),
updates the v3dX/v3dv_X macros, and update the code enough to get it
compiling when building using the two versions. For any packet not
available on v71 we just provide a generic asserted placeholder of
generation not supported.
Any real v71 support will be implemented on following commits.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Mon, 15 May 2023 08:02:10 +0000 (10:02 +0200)]
broadcom/compiler: only assign rf0 as last resort in V3D 7.x
So we can use it for ldunif(a) and avoid generating ldunif(a)rf which
can't be paired with conditional instructions.
shader-db (pi5):
total instructions in shared programs:
11357802 ->
11338883 (-0.17%)
instructions in affected programs: 7117889 -> 7098970 (-0.27%)
helped: 24264
HURT: 17574
Instructions are helped.
total uniforms in shared programs: 3857808 -> 3857815 (<.01%)
uniforms in affected programs: 92 -> 99 (7.61%)
helped: 0
HURT: 1
total max-temps in shared programs: 2230904 -> 2230199 (-0.03%)
max-temps in affected programs: 52309 -> 51604 (-1.35%)
helped: 1219
HURT: 725
Max-temps are helped.
total sfu-stalls in shared programs: 15021 -> 15236 (1.43%)
sfu-stalls in affected programs: 6848 -> 7063 (3.14%)
helped: 1866
HURT: 1704
Inconclusive result
total inst-and-stalls in shared programs:
11372823 ->
11354119 (-0.16%)
inst-and-stalls in affected programs: 7149177 -> 7130473 (-0.26%)
helped: 24315
HURT: 17561
Inst-and-stalls are helped.
total nops in shared programs: 273624 -> 273711 (0.03%)
nops in affected programs: 31562 -> 31649 (0.28%)
helped: 1619
HURT: 1854
Inconclusive result (value mean confidence interval includes 0).
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Tue, 2 May 2023 08:17:47 +0000 (10:17 +0200)]
broadcom/compiler: don't assign registers to unused nodes/temps
In programs with a lot of unused temps, if we don't do this, we may
end up recycling previously used rfs more often, which can be
detrimental to instruction pairing.
total instructions in shared programs:
11464335 ->
11444136 (-0.18%)
instructions in affected programs: 8976743 -> 8956544 (-0.23%)
helped: 33196
HURT: 33778
Inconclusive result
total max-temps in shared programs: 2230150 -> 2229445 (-0.03%)
max-temps in affected programs: 86413 -> 85708 (-0.82%)
helped: 2217
HURT: 1523
Max-temps are helped.
total sfu-stalls in shared programs: 18077 -> 17104 (-5.38%)
sfu-stalls in affected programs: 8669 -> 7696 (-11.22%)
helped: 2657
HURT: 2182
Sfu-stalls are helped.
total inst-and-stalls in shared programs:
11482412 ->
11461240 (-0.18%)
inst-and-stalls in affected programs: 8995697 -> 8974525 (-0.24%)
helped: 33319
HURT: 33708
Inconclusive result
total nops in shared programs: 298140 -> 296185 (-0.66%)
nops in affected programs: 52805 -> 50850 (-3.70%)
helped: 3797
HURT: 2662
Inconclusive result
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Tue, 2 May 2023 08:12:37 +0000 (10:12 +0200)]
broadcom/compiler: improve allocation for final program instructions
The last 3 instructions can't use specific registers so flag all the
nodes for temps used in the last program instructions and try to
avoid assigning any of these. This may help us avoid injecting nops
for the last thread switch instruction.
Because regisster allocation needs to happen before QPU scheduling
and instruction merging we can't tell exactly what the last 3
instructions will be, so we do this for a few more instructions than
just 3.
We only do this for fragment shaders because other shader stages
always end with VPM store instructions that take an small immediate
and therefore will never allow us to merge the final thread switch
earlier, so limiting allocation for these shaders will never improve
anything and might instead be detrimental.
total instructions in shared programs:
11471389 ->
11464335 (-0.06%)
instructions in affected programs: 582908 -> 575854 (-1.21%)
helped: 4669
HURT: 578
Instructions are helped.
total max-temps in shared programs: 2230497 -> 2230150 (-0.02%)
max-temps in affected programs: 5662 -> 5315 (-6.13%)
helped: 344
HURT: 44
Max-temps are helped.
total sfu-stalls in shared programs: 18068 -> 18077 (0.05%)
sfu-stalls in affected programs: 264 -> 273 (3.41%)
helped: 37
HURT: 48
Inconclusive result (value mean confidence interval includes 0).
total inst-and-stalls in shared programs:
11489457 ->
11482412 (-0.06%)
inst-and-stalls in affected programs: 585180 -> 578135 (-1.20%)
helped: 4659
HURT: 588
Inst-and-stalls are helped.
total nops in shared programs: 301738 -> 298140 (-1.19%)
nops in affected programs: 14680 -> 11082 (-24.51%)
helped: 3252
HURT: 108
Nops are helped.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Tue, 18 Apr 2023 06:50:13 +0000 (08:50 +0200)]
broadcom/compiler: don't allocate spill base to rf0 in V3D 7.x
Otherwise it can be stomped by instructions doing implicit rf0 writes.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Alejandro Piñeiro [Fri, 26 Nov 2021 00:24:12 +0000 (01:24 +0100)]
broadcom/qpu: new packing/conversion v71 instructions
This commits adds the qpu definitions for several new v71
instructions.
Packing:
* vpack does a 2x32 to 2x16 bit integer pack
* v8pack: Pack 2 x 2x16 bit integers into 4x8 bits
* v10pack packs parts of 2 2x16 bit integer into r10g10b10a2.
* v11fpack packs parts of 2 2x16 bit float into r11g11b10 rounding
to nearest
Conversion to unorm/snorm:
* vftounorm8/vftosnorm8: converts from 2x16-bit floating point
to 2x8 bit unorm/snorm.
* ftounorm16/ftosnorm16: converts floating point to 16-bit
unorm/snorm
* vftounorm10lo: Convert 2x16-bit floating point to 2x10-bit unorm
* vftounorm10hi: Convert 2x16-bit floating point to one 2-bit and one 10-bit unorm
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Tue, 9 Nov 2021 10:34:59 +0000 (11:34 +0100)]
broadcom/compiler: fix up copy propagation for v71
Update rules for unsafe copy propagations to match v7.x.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>
Iago Toral Quiroga [Mon, 29 Nov 2021 12:23:11 +0000 (13:23 +0100)]
broadcom/compiler: lift restriction on vpmwt in last instruction for V3D 7.x
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25450>