Paulo Zanoni [Fri, 1 Mar 2013 16:30:46 +0000 (13:30 -0300)]
lib: detect PCH_LPT and PCH_NONE
So we don't assign PCH_IBX to anything that's not PCH_CPT nor PCH_LPT.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Kees Cook [Fri, 15 Mar 2013 18:09:07 +0000 (11:09 -0700)]
tests: add gem_reloc_overflow to check wrapping
This adds a test to make sure that the execbuffer validation routine is
checking for invalid addresses, single entry overflow, and multi-entry
wrapping overflow.
Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Ville Syrjälä [Mon, 4 Mar 2013 13:34:07 +0000 (15:34 +0200)]
kms_flip: Don't access freed data
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Ville Syrjälä [Mon, 4 Mar 2013 13:34:06 +0000 (15:34 +0200)]
kms_flip: Add flip-vs-bad-tiling test
flip-vs-bad-tiling tests that page flipping to a Y-tiled buffer returns
an error correctly, rather than triggering kernel BUG for instance.
Create a third fb for this purpose. After the fb has been created,
change its tiling mode to Y. When performing a flip, target this
Y-tiled fb and make sure we get the expected error value.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Ville Syrjälä [Fri, 15 Feb 2013 15:10:47 +0000 (17:10 +0200)]
kms_flip: Add a flip-vs-panning-vs-hang test
The flip-vs-panning-vs-hang is just like the regular flip-vs-panning
test, except it also hangs the GPU. This will test whether panning
works after a pending page flip has been cancelled by a GPU reset,
and also whether page flip events get delivered correctly.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Ville Syrjälä [Fri, 15 Feb 2013 15:10:46 +0000 (17:10 +0200)]
kms_flip: Split the "no events" logic into a separate flag
Do not use the TEST_HANG flag to determine whether page flip events are
used. Add a new TEST_NOEVENT flag that can be used to disable the use
of events instead.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Thu, 21 Mar 2013 16:19:36 +0000 (16:19 +0000)]
lib: Add a comment about why we only parse long options for subtests
For thet next one wondering about that.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Mon, 4 Mar 2013 15:59:00 +0000 (15:59 +0000)]
build: Fix typo if the test setting enable_debugger
Of course, a 'x' need to be inserted there.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Mon, 4 Feb 2013 13:57:48 +0000 (13:57 +0000)]
assembler: Mark format() as PRINTFLIKE in the disassembler
So when making changes in code using that function, we get warnings
about mismatches between the format string and arguments.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Mon, 4 Feb 2013 12:23:57 +0000 (12:23 +0000)]
assembler: Fix the decoding of the destination horizontal stride
dest_horizontal_stride needs go through the horiz_stride[] indirection
to pick up the rigth stride when its value is 11b (4 elements).
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Mon, 4 Feb 2013 12:12:29 +0000 (12:12 +0000)]
assembler: Group the header inclusions together
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Mon, 4 Feb 2013 12:02:18 +0000 (12:02 +0000)]
assembler: Don't use GL types
sed -i -e 's/GLuint/unsigned/g' -e 's/GLint/int/g' \
-e 's/GLfloat/float/g' -e 's/GLubyte/uint8_t/g' \
-e 's/GLshort/int16_t/g' assembler/*.[ch]
Drop the GL types here, they don't bring anything to the table. For
instance, GLuint has no guarantee to be 32 bits, so it does not make too
much sense to use it in structure describing hardware tables and
opcodes.
Of course, some bikeshedding can be applied to use uin32_t instead, I
figured that some of the GLuint are used without size constraints, so
a sed with uint32_t did not seem the right thing to do. On top of that
initial sed, one bothered enough could change the structures with size
constraints to actually use uint32_t.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Fri, 1 Feb 2013 14:54:46 +0000 (14:54 +0000)]
assembler: Remove trailing white space
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Fri, 1 Feb 2013 14:09:41 +0000 (14:09 +0000)]
assembler: Use defines for width
Instead of just using hardcoded numbers or resorting to ffs().
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Fri, 1 Feb 2013 13:59:32 +0000 (13:59 +0000)]
assembler: Merge declared_register's type into the reg structure
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Fri, 1 Feb 2013 13:29:48 +0000 (13:29 +0000)]
assembler: Finish importing brw_eu_*c from mesa
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Thu, 31 Jan 2013 18:22:49 +0000 (18:22 +0000)]
assembler: Use set_instruction_src1() in send
No reason not to!
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Thu, 31 Jan 2013 14:28:00 +0000 (14:28 +0000)]
assembler: Put struct opcode_desc back in brw_context.h
I originally moved struct opcode_desc from brw_context.h to brw_eu.h on
the mesa side, but that was before the realization we needed struct
brw_context if we wanted to not touch the code too much.
So put it back there now that the mesa patch has been dropped.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Thu, 31 Jan 2013 14:25:42 +0000 (14:25 +0000)]
assembler: Don't pollute the library files with gen4asm.h
gen4asm.h is assembler specific while we want the library files to be
somewhat of a proper library.
This means that we have to redefine the GL* typedefs for brw_structs.h,
not using any of thet GL typedef will be for a future commit.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Thu, 31 Jan 2013 01:28:15 +0000 (01:28 +0000)]
assembler: Use brw_*() functions for 3-src instructions
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Thu, 31 Jan 2013 01:27:36 +0000 (01:27 +0000)]
assembler: Add support for D and UD in 3-src instructions
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Thu, 31 Jan 2013 00:53:46 +0000 (00:53 +0000)]
assembler: Expose setters for 3src operands
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Thu, 31 Jan 2013 00:26:51 +0000 (00:26 +0000)]
assembler: Introduce set_instruction_saturate()
Also simplify the logic that was setting the saturate bit in the math
instruction.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Thu, 31 Jan 2013 00:18:47 +0000 (00:18 +0000)]
assembler: Introduce set_intruction_pred_cond()
This allow us to factor out the test that checks if, when using both
predicates and conditional modifiers, we are using the same flag
register.
Also get rid of of a FIXME that we are now dealing with (the warning
mentioned above).
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Wed, 30 Jan 2013 23:39:09 +0000 (23:39 +0000)]
assembler: Introduce set_instruction_opcode()
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Wed, 30 Jan 2013 23:25:19 +0000 (23:25 +0000)]
assembler: Isolate all the options in their own structure
Like with the predicate fields before, there's no need to use the full
instruction to collect the list of options. This allows us to decouple
the list of options from a specific instruction encoding.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Wed, 30 Jan 2013 23:00:26 +0000 (23:00 +0000)]
assembler: Unify adding options to the header
Right now we have duplicated code for when the option is the last in the
list or not. Put that code in a common function.
Interestingly it appears that both sides haven't been kept in sync and
that EOT and ACCWRCTRL had limitations on where they had to be in the
option list. It's fixed now!
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Wed, 30 Jan 2013 22:32:07 +0000 (22:32 +0000)]
assembler: Gather all predicate data in its own structure
Rather than user a full instruction for that. Also use
set_instruction_predicate() for a case that coud not be done like that
before the refactoring (because everyone now uses the same instruction
structure).
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Wed, 30 Jan 2013 17:09:17 +0000 (17:09 +0000)]
assembler: Move struct relocation out of relocatable instructions
Now that all instructions (relocatable or not) are struct
brw_program_instructions, this means we can move the relocation specific
information out the "relocatable instruction" structure. This will allow
us to share the relocation information between different types of
instructions.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Wed, 30 Jan 2013 17:04:13 +0000 (17:04 +0000)]
assembler: Unify all instructions to be brw_program_instructions
Time to finally unify all instructions on the same structure.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Wed, 30 Jan 2013 12:31:45 +0000 (12:31 +0000)]
assembler: Renamed the instruction field to insn
This will be less typing for the refactoring to come (which is use
struct brw_program_instruction in gram.y for the type of all the
instructions).
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Mon, 28 Jan 2013 15:29:26 +0000 (15:29 +0000)]
assembler: Use brw_set_src1()
Everything is now aligned to be able to use brw_set_src1() in the
opcode generation, so use it.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Mon, 28 Jan 2013 15:27:59 +0000 (15:27 +0000)]
assembler: Implement register-indirect addressing mode in brw_set_src1()
The assembler allows people to do that and that's something available
since Crestline.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Sun, 27 Jan 2013 11:23:38 +0000 (11:23 +0000)]
assembler: Fix ')' placement in condition
A small typo in the condition.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Sun, 27 Jan 2013 11:05:50 +0000 (11:05 +0000)]
assembler: Cleanup visibility of a few global variables/functions
Not everything has to be exported out the compilation unit. Do a small
cleanup pass.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Sun, 27 Jan 2013 10:41:23 +0000 (10:41 +0000)]
assembler: Port the warning and error reporting to warn()/error()
This way we ensure to have a single place where these are handled. The
immediate benefit is that now line numbers are always printed out, which
is quite handy.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Sun, 27 Jan 2013 02:06:22 +0000 (02:06 +0000)]
assembler: Use brw_set_src0()
Unfortunately, it's all a walk in the park. Both, internal code in the
assembler and external shaders (libva) generate registers that trigger
assertions in brw_eu_emit.c's brw_validate().
To fix all that I took the option to be able to emit warning with the -W
flag but still make the assembler generate the same opcodes.
We can fix all this, but it requires validation, something that I cannot
do right now.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Sun, 27 Jan 2013 01:32:52 +0000 (01:32 +0000)]
assembler: Add the input filename to the error/warning messages
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Sat, 26 Jan 2013 23:55:01 +0000 (23:55 +0000)]
assembler: Add a check for when ExecSize and width are 1
Another check (that we hit if we try to use brw_set_src0()). Again,
protect it with the -W option.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Sat, 26 Jan 2013 23:09:42 +0000 (23:09 +0000)]
assembler: Add a check for when width is 1 and hstride is not 0
The list of region restrictions in bspec do say that we can't have:
width == 1 && hstrize != 0
We do have plenty of assembly code that don't respect that behaviour. So
let's hide the warning under a -W flag (for now) while we fix things.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Sat, 26 Jan 2013 22:44:45 +0000 (22:44 +0000)]
assembler: Add error() and warn() shorthands and use them in set_src[01]
Now that we have locations, we can write error() and warn() functions
giving more information about where it's going wrong.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Sat, 26 Jan 2013 19:51:28 +0000 (19:51 +0000)]
assembler: Add location support
Let's generate location information about the tokens we are parsing.
This can be used to give accurate location when reporting errors and
warnings.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Sat, 26 Jan 2013 18:26:03 +0000 (18:26 +0000)]
assembler: Don't warn if identical declared registers are redefined
There's no real need to warn when the same register is declared twice.
Currently the libva driver does do that and this warning makes other
errors really hide in a sea of warnings.
Redefining a register with different parameters is a real error though,
so we should not allow that and error out in that case.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Fri, 25 Jan 2013 15:48:58 +0000 (15:48 +0000)]
assembler: Store immediate values in reg.dw1.ud
Another step in pushing the parsing in struct brw_reg.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Fri, 25 Jan 2013 15:13:30 +0000 (15:13 +0000)]
assembler: Fix comparisons between reg.type and Architecture registers
Of course the assertion is there to make sure GRF and MRF have a reg.nr
< 128. To exclude ARF registers, reg.file has be checked, not reg.type
(channel type). Most likely a typo never caught.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Fri, 25 Jan 2013 15:12:12 +0000 (15:12 +0000)]
assembler: ExecSize can be as big as 32 channels
See the IVB PRM, vol4 part3 5.2.3.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Thu, 24 Jan 2013 18:32:20 +0000 (18:32 +0000)]
assembler: Factor out the source register validation
The goal is to use brw_set_src[01](), so let's start by validating the
register we have before generating the opcode.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Thu, 24 Jan 2013 16:16:35 +0000 (16:16 +0000)]
assembler: Use brw_set_dest() to encode the destination
A few notes:
I needed to introduce a brw context and compile structs. These are only
used to get which generation we are compiling code for, but eventually
we can use more of the infrastructure.
brw_set_dest() uses the destination register width to program the
instruction execution size.
The assembler can either take subnr in bytes or in number of elements,
so we need a resolve step when setting a brw_reg.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Thu, 24 Jan 2013 12:21:13 +0000 (12:21 +0000)]
assembler: Factor out the destination register validation
The goal is to use brw_set_dest(), so let's start by validating the
register we have before generating the opcode.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Wed, 23 Jan 2013 22:29:23 +0000 (22:29 +0000)]
assembler: Use brw_reg in the source operand
Last refactoring step in transition to struct brw_reg.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Wed, 23 Jan 2013 21:46:21 +0000 (21:46 +0000)]
assembler: Get rid of src operand's swizzle_set
swizzle_set can be derived from the value of swizzle itself, no need for
that field.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Wed, 23 Jan 2013 21:35:10 +0000 (21:35 +0000)]
assembler: Consolidate the swizzling configuration on 8 bits
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Wed, 23 Jan 2013 20:33:00 +0000 (20:33 +0000)]
assembler: Replace struct dst_operand by struct brw_reg
One more step on the road to replacing all register-like structures by
struct brw_reg.
Two things in this commit are worth noting:
* As we are using more and more brw_reg, a lot of the field-by-field
assignments can be replaced by 1 assignment which results is a
reduction of code
* As the destination horizontal stride is now stored on 2 bits in
brw_reg, it's not possible to defer the handling of DEFAULT_DSTREGION
(aka (int)-1) when setting the destination operand. It has to be done
when parsing the region and resolve_dst_region() is a helper for that
task.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Wed, 23 Jan 2013 16:20:05 +0000 (16:20 +0000)]
assembler: Unify the direct and indirect register type
They are all struct brw_reg registers now.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Wed, 23 Jan 2013 16:17:28 +0000 (16:17 +0000)]
assembler: Replace struct indirect_reg by struct brw_reg
More code simplification can be layered on top of that (by using some
brw_* helpers to create registers), that'd be for another commit.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Wed, 23 Jan 2013 16:06:49 +0000 (16:06 +0000)]
assembler: Replace struct direct_reg by struct brw_reg
More code simplification can be layered on top of that (by using some
brw_* helpers to create registers), that'd be for another commit.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Wed, 23 Jan 2013 15:13:55 +0000 (15:13 +0000)]
assembler: Make struct declared_register use struct brw_reg
It's time to start converting the emission code in gram.y to use libbrw
infrastructure. Let's start with using brw_reg for declared register.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Mon, 21 Jan 2013 22:17:54 +0000 (22:17 +0000)]
assembler: Don't expose functions only used in main.c
and make then static.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Mon, 21 Jan 2013 22:12:10 +0000 (22:12 +0000)]
assembler: Make sure nobody adds a field back to struct brw_instruction
Adding something there will break the library, so we might as check for
it.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Mon, 21 Jan 2013 21:41:36 +0000 (21:41 +0000)]
assembler: Don't change the size of opcodes!
Until now, the assembler had relocation-related fields added to struct
brw_instruction. This changes the size of the structure and break code
assuming the opcode structure is really 16 bytes, for instance the
emission code in brw_eu_emit.c.
With this commit, we build on the infrastructure that slowly emerged in
the few previous commits to add a relocatable instruction with the
needed fields.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Mon, 21 Jan 2013 19:28:41 +0000 (19:28 +0000)]
assembler: Make explicit that labels are part of the instructions list
The output of the parsing is a list of struct brw_program_instruction.
These instructions can be either GEN instructions aka struct
brw_instruction or labels. To make this more explicit we now have a type
to test to determine which instruction we are dealing with.
This will also allow to to pull the relocation bits into struct
brw_program_instruction instead of having them in the structure
representing the opcodes.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Mon, 21 Jan 2013 17:07:28 +0000 (17:07 +0000)]
assembler: Refactor the code adding instructions and labels
Factoring out the code from the grammar will allow us to switch to
using brw_compile in a cleaner way.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Mon, 21 Jan 2013 15:10:01 +0000 (15:10 +0000)]
assembler: Make print_instruction() take an instruction
No need to use a brw_program_instruction there as a brw_instruction is
what you really dump anyway, espcially when the plan is to use
brw_compile from Mesa sooner rather than later.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Mon, 21 Jan 2013 14:45:46 +0000 (14:45 +0000)]
assembler: Simplify get_subreg_address()
This function can only be called to resolve subreg_nr in direct mode
(there is an other function for the indirect case) and it makes no sense
to call it with an immediate operand.
Express those facts with asserts and simplify the logic.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Mon, 21 Jan 2013 14:04:59 +0000 (14:04 +0000)]
assembler: Use subreg_nr to store the address register subreg
Another step towards using struct brw_reg for source and destination
operands.
Instead of having a separate field to store the sub register number of
the address register in indirect access mode, we can reuse the subreg_nr
field that was only used for direct access so far.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Sun, 20 Jan 2013 21:52:05 +0000 (21:52 +0000)]
assembler: Remove the writemask_set field of struct dest_operand
writemask_set gets in the way of switching to using struct brw_reg and
it's possible to derive it from the writemask value.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Sun, 20 Jan 2013 21:11:29 +0000 (21:11 +0000)]
assembler: Use BRW_WRITEMASK_XYZW instead of the 0xf constant
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Sat, 19 Jan 2013 23:27:46 +0000 (23:27 +0000)]
assembler: Import brw_eu_emit.c
Finally importing the meaty brw_eu_emit.c code that emit instructions.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Sat, 19 Jan 2013 23:25:22 +0000 (23:25 +0000)]
assembler: Don't use -Wpointer-arith
Mesa's code uses the GNU C extension that allows additions and
soustractions on void* (+/- 1).
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Sat, 19 Jan 2013 23:04:07 +0000 (23:04 +0000)]
assembler: Import brw_eu.c
Another step the road of importing Mesa's emission code.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Sat, 19 Jan 2013 22:52:21 +0000 (22:52 +0000)]
assembler: Import brw_eu_compact.c
To be able to import brw_eu.c and brw_eu_emit.c later on. This could be
used to get the assembler generate compact instructions at some point.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Sat, 19 Jan 2013 22:50:57 +0000 (22:50 +0000)]
assembler: Protect gen4asm.h from multiple inclusions
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Sat, 19 Jan 2013 17:24:56 +0000 (17:24 +0000)]
assembler: Make an libbrw library
With the brw_* files imported from mesa.
There are still a few things in that library that needs gen4asm.h, for
instance the GLuint and GLint types. The hope is that eventually libbrw
can be split out in its own directory and shared.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Sat, 19 Jan 2013 17:05:48 +0000 (17:05 +0000)]
assembler: Introduce struct brw_context
A lot of the mesa code use struct brw_context to get the GPU generation
and various information. Let's stub this structure and initialize it
ourselves to be able to resuse mesa's code untouched.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Sat, 19 Jan 2013 11:51:08 +0000 (11:51 +0000)]
assembler: Remove white space from brw_eu.h
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Sat, 19 Jan 2013 11:49:11 +0000 (11:49 +0000)]
assembler: Import ralloc from Mesa
This also add a new brw_compat.h that should help maintaining the
diff between mesa's version and our as small as possible.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Sat, 19 Jan 2013 00:30:18 +0000 (00:30 +0000)]
assembler: Update the disassembler code
From Mesa. This imports a bit more the of brw_eu* infrastructure (which
is going towards the right direction!) from mesa and the update is quite
a significant improvement over what we had.
I also verified that the changes that were done on the assembler old
version of brw_disasm.c were already supported by the Mesa version, and
indeed they were.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Fri, 18 Jan 2013 13:21:32 +0000 (13:21 +0000)]
assembler: Remove trailing white space from brw_defines.h
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Fri, 18 Jan 2013 13:14:23 +0000 (13:14 +0000)]
assembler: Import brw_defines.h from Mesa
Almost identical files now, the diff is:
-#include "intel_chipset.h"
+#define EX_DESC_SFID_MASK 0xF
+#define EX_DESC_EOT_MASK 0x20
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Fri, 18 Jan 2013 11:52:01 +0000 (11:52 +0000)]
assembler: Rename BRW_ACCWRCTRL_ACCWRCTRL
To a more self-describing define. This hopefully will help its inclusion
into Mesa.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Fri, 18 Jan 2013 11:04:37 +0000 (11:04 +0000)]
assembler: Adopt enum brw_message_target from mesa
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Wed, 16 Jan 2013 15:11:05 +0000 (15:11 +0000)]
assembler: Remove trailing white spaces from brw_structs.h
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Wed, 16 Jan 2013 14:56:40 +0000 (14:56 +0000)]
assembler: Adopt brw_structs.h from mesa
Finally merge both brw_structs.h from mesa. One detail has risen in that
last commit, the msg_control field of data port message descriptors.
Mesa's msg_control field is sometimes split with messages-specific
fields where the assembler (at least for recent generations) exposes the
full msg_control value in the send instruction.
As libva's shaders encodes the full msg_control value in its send
instructions, I've chosen to not take the split msg_control from mesa.
It's absolutely possible to have a patch fixing that divergence at some
later point.
I've also kept a hack introduced with ironlake to not have to rewrite
shaders (that encode msg_control in the text, remember), and thus
creates a another difference with Mesa.
- GLuint msg_control:3;
- GLuint msg_type:3;
+ GLuint msg_control:4;
+ GLuint msg_type:2;
Once again, I've made sure that re-generating libva's shaders don't show
any difference.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Wed, 16 Jan 2013 01:50:47 +0000 (01:50 +0000)]
assembler: Rename bits3.id and bits3.fd
As always, to sync with mesa.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Wed, 16 Jan 2013 01:44:41 +0000 (01:44 +0000)]
assembler: Rename branch_2_offset to break_cont
Once again, import the equivalent struct from mesa.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Wed, 16 Jan 2013 01:19:29 +0000 (01:19 +0000)]
assembler: Rename branch to branch_gen6
The purpose of this commit is to synchronize opcode definitions across
the gen4asm assembler and mesa.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Tue, 15 Jan 2013 20:34:50 +0000 (20:34 +0000)]
assembler: Rename gen5 DP pixel_scoreboard_clear to last_render_target
The purpose of this commit is to synchronize opcode definitions across
the gen4asm assembler and mesa.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Tue, 15 Jan 2013 20:24:51 +0000 (20:24 +0000)]
assembler: Remove struct dp_write_gen6 and struct use gen6_dp
We ended up with 2 structures that where exactly the same, so just use
one, which happens to be the one Mesa has.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Tue, 15 Jan 2013 18:47:05 +0000 (18:47 +0000)]
assembler: Rename dp_gen7 to gen7_dp and sync it with Mesa's
The purpose of this commit is to synchronize opcode definitions across
the gen4asm assembler and mesa.
I had to drop how mesa splits msg_control as the current assembly
language gives access the the whole msg_control field.
Recompiling the xorg and the intel driver of libva shaders doesn't show
any difference in the assembly created.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Tue, 15 Jan 2013 17:35:24 +0000 (17:35 +0000)]
assembler: Rename dp_gen6 to gen6_dp and sync with Mesa's
The purpose of this commit is to synchronize opcode definitions across
the gen4asm assembler and mesa.
I had to drop how mesa splits msg_control as the current assembly
language gives access the the whole msg_control field.
Recompiling the xorg and the intel driver of libva shaders doesn't show
any difference in the assembly created.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Tue, 15 Jan 2013 16:40:06 +0000 (16:40 +0000)]
assembler: Rename dp_read_gen6 to gen6_dp_sampler_const_cache
The purpose of this commit is to synchronize opcode definitions across
the gen4asm assembler and mesa.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Tue, 15 Jan 2013 14:05:23 +0000 (14:05 +0000)]
assembler: Rename three_src_gen6 to da3src
Mesa's brw_structs.h has named/renamed this field to da3src. Sync with
them.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Mon, 14 Jan 2013 19:13:19 +0000 (19:13 +0000)]
assembler: Sync brw_instruction's header with mesa's
Two changes there, a field has been renamed and one bit of padding is
now used for compressed instructions.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Tue, 22 Jan 2013 08:35:15 +0000 (08:35 +0000)]
build: Add the debugger compilation status to the summary
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Mon, 21 Jan 2013 23:02:36 +0000 (23:02 +0000)]
build: Only build the assembler if flex and bison are found
And start displaying a nice summary of what we are going to compile.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Sat, 19 Jan 2013 11:54:05 +0000 (11:54 +0000)]
build: Don't use AM_MAINTAINER_MODE
This does not bring us anything these days, not using the macro at all
is the same thing as having it always on.
See this discussion:
https://www.redhat.com/archives/virt-tools-list/2010-October/msg00049.html
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Tue, 15 Jan 2013 13:52:57 +0000 (13:52 +0000)]
gitignore: Ignore TAGS files
TAGS files are generated with "make tags" to quickly jump through the
code. Ignore those by-products of automake/ctags.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Mon, 14 Jan 2013 23:25:14 +0000 (23:25 +0000)]
build: Add CAIRO_FLAGS to the debugger compilation
The library in lib/ exposes <cairo.h> in its main header and thus users
must be able to include it.
Damien Lespiau [Mon, 14 Jan 2013 23:21:21 +0000 (23:21 +0000)]
build: Integrate the merged gen assembler in the build system
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Xiang, Haihao [Wed, 31 Oct 2012 08:10:20 +0000 (16:10 +0800)]
bump version to 1.3
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>