Simon Pilgrim [Mon, 30 Oct 2017 19:19:58 +0000 (19:19 +0000)]
[X86][SSE] Add another computeKnownBits test showing missing VSELECT demandedelts support
llvm-svn: 316945
Simon Pilgrim [Mon, 30 Oct 2017 19:08:21 +0000 (19:08 +0000)]
[SelectionDAG] Add VSELECT support to computeKnownBits
llvm-svn: 316944
Kostya Kortchinsky [Mon, 30 Oct 2017 19:06:59 +0000 (19:06 +0000)]
Fix warning + death test + failing test on Windows (D39072).
Summary: Fixes https://reviews.llvm.org/D39072
Reviewers: cryptoad
Reviewed By: cryptoad
Subscribers: kubamracek
Differential Revision: https://reviews.llvm.org/D39427
llvm-svn: 316943
Martin Storsjo [Mon, 30 Oct 2017 19:06:34 +0000 (19:06 +0000)]
Change unw_word_t to always have the same size as the pointer size
This matches the original libunwind API. This also unifies the
type between ARM EHABI and the other configurations, and allows
getting rid of a number of casts in log messages.
The cursor size updates for ppc and or1k are untested, but
unw_proc_info_t shrinks by 4 uint64_t units on i386 at least.
Differential Revision: https://reviews.llvm.org/D39365
llvm-svn: 316942
Eric Fiselier [Mon, 30 Oct 2017 18:59:59 +0000 (18:59 +0000)]
Implement LWG 3013 - some filesystem members should not be noexcept.
LWG 3013 points out that the constructors and increment members
of the directory iterators need to allocate, and therefore cannot
be marked noexcept.
It also points out that `is_empty` and `copy` likely need to allocate
as well, and as such can also not be noexcept.
This patch speculatively implements the resolution removing noexcept,
because libc++ does indeed have the possibility of throwing on allocation
failure.
llvm-svn: 316941
Simon Pilgrim [Mon, 30 Oct 2017 18:48:31 +0000 (18:48 +0000)]
[X86][SSE] computeKnownBits tests showing missing VSELECT demandedelts support
llvm-svn: 316940
Eric Fiselier [Mon, 30 Oct 2017 18:43:21 +0000 (18:43 +0000)]
Fix PR35078 - recursive directory iterator's increment method throws incorrectly.
The guts of the increment method for recursive_directory_iterator
was failing to pass an error code object to calls to status/symlink_status,
which can throw under certain conditions.
This patch fixes the issues by correctly propagating the error codes.
However the noexcept still needs to be removed from the signature, as
mentioned in LWG 3014, but that change will be made in a separate commit.
llvm-svn: 316939
Simon Pilgrim [Mon, 30 Oct 2017 18:37:27 +0000 (18:37 +0000)]
[X86][AVX512] Cleanup scheduler tests - split GENERIC and SKX targets
llvm-svn: 316938
Kostya Kortchinsky [Mon, 30 Oct 2017 18:16:05 +0000 (18:16 +0000)]
[sanitizer] Fixing an error introduced in D39072
Summary: This should fix the Windows bots after D39072.
Reviewers: alekseyshl, flowerhack
Reviewed By: flowerhack
Subscribers: llvm-commits, kubamracek
Differential Revision: https://reviews.llvm.org/D39426
llvm-svn: 316937
Richard Smith [Mon, 30 Oct 2017 18:06:18 +0000 (18:06 +0000)]
Undo accidental language mode change in this test.
llvm-svn: 316936
Richard Smith [Mon, 30 Oct 2017 18:05:10 +0000 (18:05 +0000)]
Add a test to make sure that -Wdeprecated doesn't warn on use of 'throw()' in system headers (deprecated in C++17).
llvm-svn: 316935
Kostya Kortchinsky [Mon, 30 Oct 2017 17:56:24 +0000 (17:56 +0000)]
Introduce ReservedAddressRange to sanitizer_common.
Summary:
Fixed version of https://reviews.llvm.org/D38437 (fixes Win/Fuchsia failures).
Creating a new revision, since the old one was getting a bit old/crowded.
In Fuchsia, MmapNoAccess/MmapFixedOrDie are implemented using a global
VMAR, which means that MmapNoAccess can only be called once. This works
for the sanitizer allocator but *not* for the Scudo allocator.
Hence, this changeset introduces a new ReservedAddressRange object to
serve as the new API for these calls. In this changeset, the object
still calls into the old Mmap implementations.
The next changeset two changesets will convert the sanitizer and scudo
allocators to use the new APIs, respectively. (ReservedAddressRange will
replace the SecondaryHeader in Scudo.)
Finally, a last changeset will update the Fuchsia implementation.
Reviewers: alekseyshl, cryptoad, phosek
Reviewed By: alekseyshl, cryptoad
Subscribers: kubamracek
Differential Revision: https://reviews.llvm.org/D39072
llvm-svn: 316934
Simon Pilgrim [Mon, 30 Oct 2017 17:53:51 +0000 (17:53 +0000)]
[SelectionDAG] Add SELECT demanded elts support to ComputeNumSignBits
llvm-svn: 316933
Simon Pilgrim [Mon, 30 Oct 2017 17:46:50 +0000 (17:46 +0000)]
[X86][SSE] ComputeNumSignBits tests showing missing VSELECT demandedelts support
llvm-svn: 316932
Rafael Espindola [Mon, 30 Oct 2017 17:43:16 +0000 (17:43 +0000)]
Use 64 bits for the shared symbol size again.
We might want to drop support for such large symbols, but that should
be an explicit decision with a testcase.
llvm-svn: 316931
Reid Kleckner [Mon, 30 Oct 2017 17:26:57 +0000 (17:26 +0000)]
Fix clang warnings in winasan code
There are two instances of -Wcast-qual and one of -Wsign-compare.
llvm-svn: 316930
Reid Kleckner [Mon, 30 Oct 2017 17:26:13 +0000 (17:26 +0000)]
[asan] Intercept heap routines in VS2010 CRT
Users have requested that we add it to the list:
https://github.com/google/sanitizers/issues/864
llvm-svn: 316929
Rafael Espindola [Mon, 30 Oct 2017 17:26:12 +0000 (17:26 +0000)]
Skip abs symbols when handling copy reloc aliases.
Since we now only check st_value, we have to consider the case where
the section index is special.
llvm-svn: 316928
Simon Pilgrim [Mon, 30 Oct 2017 17:24:40 +0000 (17:24 +0000)]
[MC] Split out register def/use idx calls to make debugging simpler. NFCI.
llvm-svn: 316927
Simon Pilgrim [Mon, 30 Oct 2017 17:23:17 +0000 (17:23 +0000)]
[X86][AVX] Add missing vcvtpd2dq/vcvtps2dq scheduling tests
llvm-svn: 316926
Simon Pilgrim [Mon, 30 Oct 2017 17:20:50 +0000 (17:20 +0000)]
[X86][SSE] Add clflush scheduling test
llvm-svn: 316925
Gabor Horvath [Mon, 30 Oct 2017 17:06:42 +0000 (17:06 +0000)]
[analyzer] Left shifting a negative value is undefined
The analyzer did not return an UndefVal in case a negative value was left
shifted. I also altered the UndefResultChecker to emit a clear warning in this
case.
Differential Revision: https://reviews.llvm.org/D39423
llvm-svn: 316924
Joachim Protze [Mon, 30 Oct 2017 16:44:00 +0000 (16:44 +0000)]
Test commit: sort names in CREDITS.txt
llvm-svn: 316922
Jina Nahias [Mon, 30 Oct 2017 16:37:28 +0000 (16:37 +0000)]
[X86][AVX512] Adding a pattern for broadcastm intrinsic.
Differential Revision: https://reviews.llvm.org/D38312
Change-Id: I71c8605a8e4c98013ef25289694afc5cfd46bb0b
llvm-svn: 316921
Rafael Espindola [Mon, 30 Oct 2017 16:32:31 +0000 (16:32 +0000)]
Move isDSOLocal check and add a comment.
llvm-svn: 316920
Pavel Labath [Mon, 30 Oct 2017 16:21:18 +0000 (16:21 +0000)]
Fix windows build broken in r316915
I accidentally left a linux-specific include in generic code.
llvm-svn: 316919
Marshall Clow [Mon, 30 Oct 2017 16:07:59 +0000 (16:07 +0000)]
Mark test as unsupported on C++98/03, since it uses move_iterator
llvm-svn: 316917
Fangrui Song [Mon, 30 Oct 2017 16:03:44 +0000 (16:03 +0000)]
[PPC CodeGen] Fix the bitreverse.i64 intrinsic.
Summary: The two 32-bit words were swapped. Update a test omitted in reverted r316270.
Reviewers: jtony, aaron.ballman
Subscribers: nemanjai, kbarton
Differential Revision: https://reviews.llvm.org/D39163
llvm-svn: 316916
Pavel Labath [Mon, 30 Oct 2017 16:00:13 +0000 (16:00 +0000)]
MainLoop: work around an android libc bug
Versions of android before kitkat implemented pselect non-atomically,
which caused flakyness, as we were relying on it atomically setting the
signal mask to implement waiting for signals.
This patch implements a direct call to the the pselect kernel syscall,
which does not suffer from this problem. The code itself is not very
pretty, but fortunately the uglyness is contained in the
android version of the MainLoop::RunImpl::Poll function.
llvm-svn: 316915
Marshall Clow [Mon, 30 Oct 2017 15:50:00 +0000 (15:50 +0000)]
Fix PR#35119 : set_union misbehaves with move_iterators. Thanks to Denis Yaroshevskiy for both the bug report and the fix.
llvm-svn: 316914
Craig Topper [Mon, 30 Oct 2017 14:51:37 +0000 (14:51 +0000)]
[X86] Make sure we don't create locked inc/dec instructions when the carry flag is being used.
Summary:
INC/DEC don't update the carry flag so we need to make sure we don't try to use it.
This patch introduces new X86ISD opcodes for locked INC/DEC. Teaches lowerAtomicArithWithLOCK to emit these nodes if INC/DEC is not slow or the function is being optimized for size. An additional flag is added that allows the INC/DEC to be disabled if the caller determines that the carry flag is being requested.
The test_sub_1_cmp_1_setcc_ugt test is currently showing this bug. The other test case changes are recovering cases that were regressed in r316860.
This should fully fix PR35068 finishing the fix started in r316860.
Reviewers: RKSimon, zvi, spatel
Reviewed By: zvi
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D39411
llvm-svn: 316913
Craig Topper [Mon, 30 Oct 2017 14:50:11 +0000 (14:50 +0000)]
[X86] Remove AVX512 early out from X86FastISel::X86SelectCmp.
This shouldn't be needed anymore since i1 isn't a legal type.
llvm-svn: 316912
Craig Topper [Mon, 30 Oct 2017 14:50:10 +0000 (14:50 +0000)]
[X86] Regenerate test using update_llc_test_checks.py
llvm-svn: 316911
Krasimir Georgiev [Mon, 30 Oct 2017 14:41:34 +0000 (14:41 +0000)]
[clang-format] Handle CRLF correctly when formatting escaped newlines
Subscribers: klimek
Differential Revision: https://reviews.llvm.org/D39420
Contributed by @peterbudai!
llvm-svn: 316910
Yaxun Liu [Mon, 30 Oct 2017 14:38:30 +0000 (14:38 +0000)]
CodeGen: Fix insertion position of addrspace cast for alloca
For non-zero alloca addr space, alloca is usually casted to default addr
space immediately.
For non-vla, alloca is inserted at AllocaInsertPt, therefore the addr
space cast should also be insterted at AllocaInsertPt. However,
for vla, alloca is inserted at the current insertion point of IRBuilder,
therefore the addr space cast should also inserted at the current
insertion point of IRBuilder.
Currently clang always insert addr space cast at AllocaInsertPt, which
causes invalid IR.
This patch fixes that.
Differential Revision: https://reviews.llvm.org/D39374
llvm-svn: 316909
Sanjay Patel [Mon, 30 Oct 2017 14:34:30 +0000 (14:34 +0000)]
[PassManager, SimplifyCFG] add test for PR34603 / D38566; NFC
Sinking common insts and converting to select early can inhibit better folds in other passes.
llvm-svn: 316908
Yaxun Liu [Mon, 30 Oct 2017 14:30:28 +0000 (14:30 +0000)]
[AMDGPU] Emit metadata for hidden arguments for kernel enqueue
Identifies kernels which performs device side kernel enqueues and emit
metadata for the associated hidden kernel arguments. Such kernels are
marked with calls-enqueue-kernel function attribute by
AMDGPUOpenCLEnqueueKernelLowering pass and later on
hidden kernel arguments metadata HiddenDefaultQueue and
HiddenCompletionAction are emitted for them.
Differential Revision: https://reviews.llvm.org/D39255
llvm-svn: 316907
Krasimir Georgiev [Mon, 30 Oct 2017 14:30:14 +0000 (14:30 +0000)]
Keep MSVC2015 happy after r316903
llvm-svn: 316906
Clement Courbet [Mon, 30 Oct 2017 14:19:33 +0000 (14:19 +0000)]
[CodeGen][ExpandMemcmp] Allow memcmp to expand to vector loads (2).
- Targets that want to support memcmp expansions now return the list of
supported load sizes.
- Expansion codegen does not assume that all power-of-two load sizes
smaller than the max load size are valid. For examples, this is not the
case for x86(32bit)+sse2.
Fixes PR34887.
llvm-svn: 316905
Krzysztof Parzyszek [Mon, 30 Oct 2017 14:11:52 +0000 (14:11 +0000)]
[Hexagon] Allow the RDF optimizations to be run in .mir testcases
llvm-svn: 316904
Krasimir Georgiev [Mon, 30 Oct 2017 14:01:50 +0000 (14:01 +0000)]
[clang-format] Format raw string literals
Summary:
This patch adds raw string literal formatting.
Reviewers: djasper, klimek
Reviewed By: klimek
Subscribers: klimek, mgorny
Differential Revision: https://reviews.llvm.org/D35943
llvm-svn: 316903
Javed Absar [Mon, 30 Oct 2017 13:51:56 +0000 (13:51 +0000)]
[GlobalISel|ARM] : Allow legalizing G_FSUB
Adding support for VSUB.
Reviewed by: @rovka
Differential Revision: https://reviews.llvm.org/D39261
llvm-svn: 316902
Gabor Horvath [Mon, 30 Oct 2017 12:16:07 +0000 (12:16 +0000)]
[analyzer] Use the signature of the primary template for issue hash calculation
Now when a template is instantiated more times and there is a bug found in the
instantiations the issue hash will be different for each instantiation even if
every other property of the bug (path, message, location) is the same.
This patch aims to resolve this issue. Note that explicit specializations still
generate different hashes but that is intended.
Differential Revision: https://reviews.llvm.org/D38728
llvm-svn: 316900
Gabor Horvath [Mon, 30 Oct 2017 12:02:23 +0000 (12:02 +0000)]
[analyzer] Make issue hash related tests more concise
Extend ExprInspection checker to make it possible to dump the issue hash of
arbitrary expressions. This change makes it possible to make issue hash related
tests more concise and also makes debugging issue hash related problems easier.
Differential Revision: https://reviews.llvm.org/D38844
llvm-svn: 316899
Andrew V. Tischenko [Mon, 30 Oct 2017 12:02:06 +0000 (12:02 +0000)]
Invalid used of 'w' suffix on push and pop using 64-bit register.
Differential Revision: https://reviews.llvm.org/D38626
llvm-svn: 316898
Diana Picus [Mon, 30 Oct 2017 11:58:09 +0000 (11:58 +0000)]
[ARM GlobalISel] Fixup r316572. NFC
Just missed a few spots...
llvm-svn: 316897
Ivan A. Kosarev [Mon, 30 Oct 2017 11:49:31 +0000 (11:49 +0000)]
[CodeGen] Generate TBAA info for reference loads
Differential Revision: https://reviews.llvm.org/D39177
llvm-svn: 316896
Haojian Wu [Mon, 30 Oct 2017 11:17:09 +0000 (11:17 +0000)]
[refactor] Fix a clang-tidy warning.
NFC
llvm-svn: 316895
Jina Nahias [Mon, 30 Oct 2017 10:35:53 +0000 (10:35 +0000)]
Revert "[X86][AVX512] Adding a pattern for broadcastm intrinsic."
This reverts commit r316890.
Change-Id: I683cceee9848ef309b452293086b1f26a941950d
llvm-svn: 316894
George Rimar [Mon, 30 Oct 2017 10:12:49 +0000 (10:12 +0000)]
[ELF] - Stop sorting input sections in createSections().
It does not seem that createSections() is a good place for
applying sorting. Patch changes code to do that inside
sortSections(), which looks more appropriate place.
Differential revision: https://reviews.llvm.org/D39371
llvm-svn: 316893
Gabor Horvath [Mon, 30 Oct 2017 10:09:55 +0000 (10:09 +0000)]
[analyzer] lock_guard and unique_lock extension for BlockInCriticalSection checker
A patch by zdtorok (Zoltán Dániel Török)!
Differential Revision: https://reviews.llvm.org/D33729
llvm-svn: 316892
Florian Hahn [Mon, 30 Oct 2017 10:07:42 +0000 (10:07 +0000)]
Recommit r315288: [SCCP] Propagate integer range info for parameters in IPSCCP.
This version of the patch includes a fix addressing a stage2 LTO buildbot
failure and addressed some additional nits.
Original commit message:
This updates the SCCP solver to use of the ValueElement lattice for
parameters, which provides integer range information. The range
information is used to remove unneeded icmp instructions.
For the following function, f() can be optimized to ret i32 2 with
this change
source_filename = "sccp.c"
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: norecurse nounwind readnone uwtable
define i32 @main() local_unnamed_addr #0 {
entry:
%call = tail call fastcc i32 @f(i32 1)
%call1 = tail call fastcc i32 @f(i32 47)
%add3 = add nsw i32 %call, %call1
ret i32 %add3
}
; Function Attrs: noinline norecurse nounwind readnone uwtable
define internal fastcc i32 @f(i32 %x) unnamed_addr #1 {
entry:
%c1 = icmp sle i32 %x, 100
%cmp = icmp sgt i32 %x, 300
%. = select i1 %cmp, i32 1, i32 2
ret i32 %.
}
attributes #1 = { noinline }
Reviewers: davide, sanjoy, efriedma, dberlin
Reviewed By: davide, dberlin
Subscribers: mcrosier, gberry, mssimpso, dberlin, llvm-commits
Differential Revision: https://reviews.llvm.org/D36656
llvm-svn: 316891
Jina Nahias [Mon, 30 Oct 2017 09:59:52 +0000 (09:59 +0000)]
[X86][AVX512] Adding a pattern for broadcastm intrinsic.
Differential Revision: https://reviews.llvm.org/D38312
Change-Id: I6551fb13879e098aed74de410e29815cf37d9ab5
llvm-svn: 316890
Max Kazantsev [Mon, 30 Oct 2017 09:35:16 +0000 (09:35 +0000)]
[IRCE][NFC] Store Length as SCEV in RangeCheck instead of Value
llvm-svn: 316889
Florian Hahn [Mon, 30 Oct 2017 09:21:50 +0000 (09:21 +0000)]
Revert r316887 to fix buildbot failures.
llvm-svn: 316888
Florian Hahn [Mon, 30 Oct 2017 09:04:18 +0000 (09:04 +0000)]
Recommit r315288: [SCCP] Propagate integer range info for parameters in IPSCCP.
This version of the patch includes a fix addressing a stage2 LTO buildbot
failure and addressed some additional nits.
Original commit message:
This updates the SCCP solver to use of the ValueElement lattice for
parameters, which provides integer range information. The range
information is used to remove unneeded icmp instructions.
For the following function, f() can be optimized to ret i32 2 with
this change
source_filename = "sccp.c"
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: norecurse nounwind readnone uwtable
define i32 @main() local_unnamed_addr #0 {
entry:
%call = tail call fastcc i32 @f(i32 1)
%call1 = tail call fastcc i32 @f(i32 47)
%add3 = add nsw i32 %call, %call1
ret i32 %add3
}
; Function Attrs: noinline norecurse nounwind readnone uwtable
define internal fastcc i32 @f(i32 %x) unnamed_addr #1 {
entry:
%c1 = icmp sle i32 %x, 100
%cmp = icmp sgt i32 %x, 300
%. = select i1 %cmp, i32 1, i32 2
ret i32 %.
}
attributes #1 = { noinline }
Reviewers: davide, sanjoy, efriedma, dberlin
Reviewed By: davide, dberlin
Subscribers: mcrosier, gberry, mssimpso, dberlin, llvm-commits
Differential Revision: https://reviews.llvm.org/D36656
llvm-svn: 316887
Gabor Horvath [Mon, 30 Oct 2017 09:01:48 +0000 (09:01 +0000)]
Add missing expected-no-diagnostics comment to test.
llvm-svn: 316886
Gabor Horvath [Mon, 30 Oct 2017 08:47:13 +0000 (08:47 +0000)]
[analyzer] Handle ObjC messages conservatively in CallDescription
Differential Revision: https://reviews.llvm.org/D37470
llvm-svn: 316885
Max Kazantsev [Mon, 30 Oct 2017 04:48:34 +0000 (04:48 +0000)]
[GVN][NFC] Mark instruction for deletion instead of immediate erasing in LoadPRE
It is done to uniformly handle instructions removal.
Differential Revision: https://reviews.llvm.org/D39369
llvm-svn: 316884
Craig Topper [Mon, 30 Oct 2017 04:39:18 +0000 (04:39 +0000)]
[X86] Rearrange code in X86InstrInfo.cpp to put all the foldMemoryOperandImpl methods together without partial/undef register handling in the middle. NFC
I have a future patch that wants to make use of the one of the partial functions in one of the earlier memory folding methods and the current ordering prevents that.
llvm-svn: 316883
Craig Topper [Mon, 30 Oct 2017 03:35:44 +0000 (03:35 +0000)]
[X86] Simplify code by removing an unnecessary temporary variable. NFC
llvm-svn: 316882
Craig Topper [Mon, 30 Oct 2017 03:35:43 +0000 (03:35 +0000)]
[X86] Move some EVEX->VEX code to a helper function to prepare for a future patch. NFC
llvm-svn: 316881
Rui Ueyama [Sun, 29 Oct 2017 23:41:16 +0000 (23:41 +0000)]
Remove unnecessary code.
Discarded section's Repl always points to itself, so returning
Sec is not different from returning Sec->Repl.
llvm-svn: 316880
Rui Ueyama [Sun, 29 Oct 2017 23:32:23 +0000 (23:32 +0000)]
Move "Assigned" bit from SectionBase to InputSectionBase.
This bit is to manage whether an input section has already been assigned
to some output section by linker scripts or not. So it logically belongs
to InputSectionBase. SectionBase is a common base class for input and
output sections, so that wasn't the right place to define the bit.
llvm-svn: 316879
Rui Ueyama [Sun, 29 Oct 2017 22:38:00 +0000 (22:38 +0000)]
Remove an obscure comment.
llvm-svn: 316878
Peter Collingbourne [Sun, 29 Oct 2017 22:31:48 +0000 (22:31 +0000)]
ELF: Correctly set edata if there are no .bss sections.
edata needs to be set to the end of the last mapped initialized
section. We were previously mishandling the case where there were no
non-mapped sections by setting it to the end of the last section in
the output file.
Differential Revision: https://reviews.llvm.org/D39399
llvm-svn: 316877
Rui Ueyama [Sun, 29 Oct 2017 22:26:52 +0000 (22:26 +0000)]
Initialize members not by assignment but by the member initializer list.
llvm-svn: 316876
Simon Pilgrim [Sun, 29 Oct 2017 22:03:37 +0000 (22:03 +0000)]
[SelectionDAG] Add SEXT/AND/XOR/Or demanded elts support to ComputeNumSignBits
llvm-svn: 316875
Marshall Clow [Sun, 29 Oct 2017 21:57:58 +0000 (21:57 +0000)]
Initial triage
llvm-svn: 316874
Marshall Clow [Sun, 29 Oct 2017 21:43:30 +0000 (21:43 +0000)]
Update status of 2950
llvm-svn: 316873
Philip Pfaffe [Sun, 29 Oct 2017 21:36:34 +0000 (21:36 +0000)]
[Acc] Do not statically dispatch into IslNodeBuilder's createFor
Summary:
When GPUNodeBuilder creates loops inside the kernel, it dispatches to
IslNodeBuilder. This however is surprisingly dangerous, since it accesses the
AST Node's user through the wrong type. This patch fixes this problem by
overriding createFor correctly.
This fixes PR35010.
Reviewers: grosser, bollu, Meinersbur
Reviewed By: Meinersbur
Subscribers: Meinersbur, nemanjai, pollydev, llvm-commits, kbarton
Differential Revision: https://reviews.llvm.org/D39364
llvm-svn: 316872
Simon Pilgrim [Sun, 29 Oct 2017 21:35:28 +0000 (21:35 +0000)]
[X86][SSE] Split ComputeNumSignBits SEXT/AND/XOR/OR demandedelts test
Max depth was being exceeded which could prevent some combines working
llvm-svn: 316871
Philip Pfaffe [Sun, 29 Oct 2017 21:00:48 +0000 (21:00 +0000)]
Fix two testcases. NFC intended.
Add missing %loadPolly directive to support out of tree builds. One of
the changes is somewhat bigger, because the directive turns on LLVM
names, and the testcase deosn't use those.
llvm-svn: 316870
Sanjay Patel [Sun, 29 Oct 2017 20:49:31 +0000 (20:49 +0000)]
[(new) Pass Manager] instantiate SimplifyCFG with the same options as the old PM
The old PM sets the options of what used to be known as "latesimplifycfg" on the
instantiation after the vectorizers have run, so that's what we'redoing here.
FWIW, there's a later SimplifyCFGPass instantiation in both PMs where we do not
set the "late" options. I'm not sure if that's intentional or not.
Differential Revision: https://reviews.llvm.org/D39407
llvm-svn: 316869
Simon Pilgrim [Sun, 29 Oct 2017 20:49:27 +0000 (20:49 +0000)]
[X86][SSE] ComputeNumSignBits tests showing missing SEXT/AND/XOR/OR demandedelts support
llvm-svn: 316868
Marshall Clow [Sun, 29 Oct 2017 19:02:00 +0000 (19:02 +0000)]
Issues to be voted on in ABQ
llvm-svn: 316867
Simon Pilgrim [Sun, 29 Oct 2017 18:19:37 +0000 (18:19 +0000)]
[SelectionDAG] Add SRA/SHL demanded elts support to ComputeNumSignBits
Introduce a isConstOrDemandedConstSplat helper function that can recognise a constant splat build vector for at least the demanded elts we care about.
llvm-svn: 316866
Simon Pilgrim [Sun, 29 Oct 2017 18:01:31 +0000 (18:01 +0000)]
[X86][SSE] ComputeNumSignBits tests showing missing SHL/SRA demandedelts support
llvm-svn: 316865
Craig Topper [Sun, 29 Oct 2017 17:15:09 +0000 (17:15 +0000)]
[X86] Add a slow-incdec command line to atomic-eflags-reuse.ll
I believe the test_sub_1_cmp_1_setcc_ugt test case is being miscompiled in the fast inc/dec case.
llvm-svn: 316864
Rui Ueyama [Sun, 29 Oct 2017 16:49:42 +0000 (16:49 +0000)]
Fix ubsan error that shift amount 64 is too large.
llvm-svn: 316863
Rui Ueyama [Sun, 29 Oct 2017 16:46:39 +0000 (16:46 +0000)]
Remove a redundant temporary variable.
llvm-svn: 316862
Craig Topper [Sun, 29 Oct 2017 06:51:04 +0000 (06:51 +0000)]
[X86] Remove combine that turns X86ISD::LSUB into X86ISD::LADD. Update patterns that depended on this.
If the carry flag is being used, this transformation isn't safe.
This does prevent some test cases from using DEC now, but I'll try to look into that separately.
Fixes PR35068.
llvm-svn: 316860
Craig Topper [Sun, 29 Oct 2017 06:51:02 +0000 (06:51 +0000)]
[X86] Fix typo in comment. NFC
llvm-svn: 316859
Saleem Abdulrasool [Sun, 29 Oct 2017 06:01:14 +0000 (06:01 +0000)]
Driver: default to `unsigned int` `wchar_t` for ARM
AAPCS and AAPCS64 mandate that `wchar_t` with `-fno-short-wchar` is an
`unsigned int` rather than a `signed int`. Ensure that the driver does
not flip the signedness of `wchar_t` for those targets.
Add additional tests to ensure that this does not regress.
llvm-svn: 316858
Craig Topper [Sun, 29 Oct 2017 05:14:26 +0000 (05:14 +0000)]
[X86] Use the extended vector register classes in fast isel with AVX512F/VL.
llvm-svn: 316857
Craig Topper [Sun, 29 Oct 2017 02:50:31 +0000 (02:50 +0000)]
[X86] Add AVX512 support to X86FastISel::X86SelectFPExt and X86FastISel::X86SelectFPTrunc.
llvm-svn: 316856
Craig Topper [Sun, 29 Oct 2017 02:25:48 +0000 (02:25 +0000)]
[X86] Use update_llc_test_checks.py to regenerate fast-isel-int-float-conversion.ll
llvm-svn: 316855
Craig Topper [Sun, 29 Oct 2017 02:18:43 +0000 (02:18 +0000)]
[X86] Use update_llc_test_checks.py to regenerate fast-isel-fptrunc-fpext.ll
llvm-svn: 316854
Craig Topper [Sun, 29 Oct 2017 02:18:41 +0000 (02:18 +0000)]
[X86] Add AVX512 support to X86FastISel::X86MaterializeFP
llvm-svn: 316853
Peter Szecsi [Sat, 28 Oct 2017 23:24:00 +0000 (23:24 +0000)]
[analyzer] MisusedMovedObjectChecker: More precise warning message
Added new enum in order to differentiate the warning messages on "misusing" into
3 categories: function calls, moving an object, copying an object. (At the
moment the checker gives the same message in case of copying and moving.)
Additional test cases added as well.
Differential Revision: https://reviews.llvm.org/D38674
llvm-svn: 316852
Craig Topper [Sat, 28 Oct 2017 23:10:13 +0000 (23:10 +0000)]
[X86] Remove invalid code from LowerVSELECT.
This code attempted to say that v8i16/v16i16 VSELECT is legal if BWI and VLX are enabled, but the only way we could reach this point is if the condition was not a vXi1 type. Which means it really wasn't legal.
We don't have any tests that exercise this code. So I'm hoping it wasn't really reachable.
llvm-svn: 316851
Peter Szecsi [Sat, 28 Oct 2017 23:09:37 +0000 (23:09 +0000)]
[analyzer] MisusedMovedObjectChecker: Fix false positive on state-resetting, handling method calls on base-class sub-objects
An earlier solution from Artem r315301 solves the reset problem, however, the
reports should be handled the same way in case of method calls. We should not
just report the base class of the object where the method was defined but the
whole object.
Fixed false positive which came from not removing the subobjects in case of a
state-resetting function. (Just replaced the State->remove(...) call to
removeFromState(..) which was defined exactly for that purpose.)
Some minor typos fixed in this patch as well which did not worth a whole new
patch in my opinion, so included them here.
Differential Revision: https://reviews.llvm.org/D31538
llvm-svn: 316850
Rui Ueyama [Sat, 28 Oct 2017 22:18:29 +0000 (22:18 +0000)]
Fix ubsan error.
This patch fixes ubsan's "shift exponent 64 is too large for 32-bit type
'int'" error.
llvm-svn: 316849
Rui Ueyama [Sat, 28 Oct 2017 22:18:17 +0000 (22:18 +0000)]
Reduce sizeof(Symbol) from 104 bytes to 88 bytes.
Finding aliases for shared symbols doesn't need st_shndx because
we can just compare st_value.
llvm-svn: 316848
Simon Pilgrim [Sat, 28 Oct 2017 22:10:40 +0000 (22:10 +0000)]
[SelectionDAG] Add support for INSERT_SUBVECTOR to computeKnownBits
llvm-svn: 316847
Rui Ueyama [Sat, 28 Oct 2017 21:11:38 +0000 (21:11 +0000)]
Do not handle DefinedCommon symbols in the MapFile writer.
Because of r314495 which converts DefinedCommon symbols to DefinedRegular
symbols, common symbols are no longer reachable to the MapFile writer.
So the code to handle common symbols is now dead.
llvm-svn: 316846
Simon Pilgrim [Sat, 28 Oct 2017 20:51:27 +0000 (20:51 +0000)]
[X86][SSE] Combine 128-bit target shuffles to PACKSS/PACKUS.
llvm-svn: 316845
Simon Pilgrim [Sat, 28 Oct 2017 20:27:22 +0000 (20:27 +0000)]
[X86][SSE] Split off matchVectorShuffleWithPACK. NFCI.
Split matchVectorShuffleWithPACK from lowerVectorShuffleWithPACK so that we can reuse it for target shuffle combines
llvm-svn: 316844
Martin Storsjo [Sat, 28 Oct 2017 20:19:49 +0000 (20:19 +0000)]
Restore arch specific lastDwarfRegNum in builds without _LIBUNWIND_IS_NATIVE_ONLY
This restores the previous behaviour of the Registers_* classes
after SVN r316745.
Differential Revision: https://reviews.llvm.org/D39382
llvm-svn: 316843
Rui Ueyama [Sat, 28 Oct 2017 20:16:11 +0000 (20:16 +0000)]
Rename V -> Ver for readability.
llvm-svn: 316842