John Brawn [Thu, 4 Nov 2021 12:19:12 +0000 (12:19 +0000)]
[AArch64] Add mayRaiseFPException to appropriate instructions
This is mostly handled by adding "let mayRaiseFPException = 1" before
the definition of the relevant instruction classes, but there are a
couple of complications:
* When we have a multiclass where currently some instantiations are
of instructions that can raise an exception and others aren't we
need to split that into two multiclasses, one inheriting from the
other using a multiclass parameter to enable exceptions.
* In a couple of places in the globalisel instruction selector we
need to manually set the NoFPExcept flag. There's also another
place that looks like it should need it, but that code is never hit
for those opcodes due to them being handled by the generic
instruction selector, so I've instead just removed them from the
switch.
Differential Revision: https://reviews.llvm.org/D115352
John Brawn [Tue, 25 Jan 2022 17:09:44 +0000 (17:09 +0000)]
[AArch64] Adjust aarch64 constrained intrinsics tests and un-XFAIL
Remove the checking of the generated asm, as that's already tested
elsewhere, and adjust some tests that were expecting the wrong
intrinsic to be generated.
Differential Revision: https://reviews.llvm.org/D118259
John Brawn [Thu, 9 Dec 2021 12:39:29 +0000 (12:39 +0000)]
[AArch64] Lowering and legalization of strict FP16
For strict FP16 to work correctly needs some changes in lowering and
legalization:
* SelectionDAGLegalize::PromoteNode was missing handling for some
strict fp opcodes.
* Some of the custom lowering of strict fp operations needed to be
adjusted to work with FP16.
* Custom lowering needed to be added for round-to-int operations.
With this, and the previous patches for the rest of the strict fp
isel, we can set IsStrictFPEnabled = true.
Differential Revision: https://reviews.llvm.org/D115620
Kevin P. Neal [Fri, 8 Apr 2022 15:47:54 +0000 (11:47 -0400)]
[FPEnv][InstSimplify] Fold fsub -0.0, -X ==> X
Currently the fsub optimizations in InstSimplify don't know how to fold
-0.0 - (-X) to X when the constrained intrinsics are used. This adds partial
support. The rest of the support will come later with work on the IR
matchers.
This review is split out from D107285.
Differential Revision: https://reviews.llvm.org/D123396
LLVM GN Syncbot [Thu, 14 Apr 2022 15:22:09 +0000 (15:22 +0000)]
[gn build] Port
1fdf952deeb9
Chris Bieneman [Wed, 30 Mar 2022 19:20:15 +0000 (14:20 -0500)]
[HLSL] Add Semantic syntax, and SV_GroupIndex
HLSL has a language feature called Semantics which get attached to
declarations like attributes and are used in a variety of ways.
One example of semantic use is here with the `SV_GroupIndex` semantic
which, when applied to an input for a compute shader is pre-populated
by the driver with a flattened thread index.
Differential Revision: https://reviews.llvm.org/D122699
# Conflicts:
# clang/include/clang/Basic/Attr.td
# clang/include/clang/Basic/AttrDocs.td
LLVM GN Syncbot [Thu, 14 Apr 2022 14:51:17 +0000 (14:51 +0000)]
[gn build] Port
e471ba3d0122
Joseph Huber [Fri, 25 Mar 2022 15:02:29 +0000 (11:02 -0400)]
[Object] Add binary format for bundling offloading metadata
We need to embed certain metadata along with a binary image when we wish
to perform a device-linking job on it. Currently this metadata was
embedded in the section name of the data itself. This worked, but made
adding new metadata very difficult and didn't work if the user did any
sort of section linking.
This patch introduces a custom binary format for bundling offloading
metadata with a device object file. This binary format is fundamentally
a simple string map table with some additional data and an embedded
image. I decided to use a custom format rather than using an existing
format (ELF, JSON, etc) because of the specialty use-case of this. We
need a simple binary format that can be concatenated without requiring
other external dependencies.
This extension will make it easier to extend the linker wrapper's
capabilties with whatever data is necessary. Eventually this will allow
us to remove all the external arguments passed to the linker wrapper and
embed it directly in the host's linker so device linking behaves exactly
like host linking.
Reviewed By: JonChesterfield
Differential Revision: https://reviews.llvm.org/D122069
Joseph Huber [Sat, 2 Apr 2022 21:55:00 +0000 (17:55 -0400)]
[OpenMP] Make offloading sections have the SHF_EXCLUDE flag
Offloading sections can be embedded in the host during codegen via a
section. This section was originally marked as metadata to prevent it
from being loaded, but these sections are completely unused at runtime
so the linker should automatically drop them from the final executable
or shard library. This flag adds support for the SHF_EXCLUDE flag in
target lowering and uses it.
Reviewed By: JonChesterfield, MaskRay
Differential Revision: https://reviews.llvm.org/D122987
Peter Klausler [Fri, 1 Apr 2022 19:46:04 +0000 (12:46 -0700)]
[flang] Improve appearance of message attachments
Error messages can have a list of attachments; these are used to point
to related source locations, supply additional information, and to
encapsulate error messages that were *not* emitted in a given context
to explain why a warning was justified.
This patch adds a message severity ("Because") for that last case,
and extends to AttachTo() API to provide a means for overriding
the severity of an attached message.
Some existing message attachments had their severities adjusted,
now that we're printing them. And operator==() for Message was
cleaned up while debugging after I noticed that it was recursively
O(N**2) and subject to returning a false positive.
Differential Revision: https://reviews.llvm.org/D123710
Fabian Wolff [Thu, 14 Apr 2022 14:17:24 +0000 (16:17 +0200)]
[libc++] Fix undefined behavior in `std::filebuf`
Fixes https://github.com/llvm/llvm-project/issues/49267.
Fixes https://github.com/llvm/llvm-project/issues/49282.
Fixes https://github.com/llvm/llvm-project/issues/49789.
Reviewed By: ldionne
Differential Revision: https://reviews.llvm.org/D122257
David Green [Thu, 14 Apr 2022 14:19:33 +0000 (15:19 +0100)]
[AArch64] Move v4i8 concat load lowering to a combine.
The existing code was not updating the uses of loads that it recreated,
leading to incorrect chains which could break the ordering between
nodes. This moves the code to a combine instead, and makes sure we
update the chain references. This does mean it happens earlier -
potentially before the concats are simplified. This can lead to
inefficiencies in the codegen, which will be fixed in followups.
Andrew Savonichev [Sun, 10 Apr 2022 19:33:48 +0000 (22:33 +0300)]
[NVPTX] Fix barrier.ll LIT test
The second parameter should be a multiple of the warp size (32).
PTX ISA spec, s9.7.12.1. Parallel Synchronization and Communication
Instructions: bar, barrier
barrier.sync{.aligned} a{, b};
Operand b specifies the number of threads participating in the
barrier. If no thread count is specified, all threads in the CTA
participate in the barrier. When specifying a thread count, the value
must be a multiple of the warp size.
Differential Revision: https://reviews.llvm.org/D123470
Andrew Savonichev [Thu, 31 Mar 2022 17:03:30 +0000 (20:03 +0300)]
[NVPTX] Avoid dots in global names
It seems that ptxas cannot parse them:
ptxas fatal: Parsing error near '.2': syntax error
Differential Revision: https://reviews.llvm.org/D123041
Andrew Savonichev [Thu, 31 Mar 2022 20:50:34 +0000 (23:50 +0300)]
[NVPTX] .attribute(.managed) is only supported for sm_30 and PTX 4.0
PTX ISA spec, s5.4.8. Variable Attribute Directive: .attribute
PTX ISA Notes
Introduced in PTX ISA version 4.0.
Target ISA Notes
.managed attribute requires sm_30 or higher.
Differential Revision: https://reviews.llvm.org/D123040
Andrew Savonichev [Thu, 31 Mar 2022 18:16:30 +0000 (21:16 +0300)]
[NVPTX] shfl.sync is introduced in PTX 6.0
PTX ISA spec, s9.7.8.6. Data Movement and Conversion Instructions:
shfl.sync
PTX ISA Notes
Introduced in PTX ISA version 6.0.
Target ISA Notes
Requires sm_30 or higher.
Differential Revision: https://reviews.llvm.org/D123039
Andrew Savonichev [Thu, 31 Mar 2022 16:30:41 +0000 (19:30 +0300)]
[NVPTX] 64-bit atom.{and,or,xor,min,max} require sm_32 or higher
PTX ISA spec, s9.7.12.4. Parallel Synchronization and Communication
Instructions: atom
Target ISA Notes
64-bit atom.{and,or,xor,min,max} require sm_32 or higher.
Differential Revision: https://reviews.llvm.org/D123038
LLVM GN Syncbot [Thu, 14 Apr 2022 13:37:28 +0000 (13:37 +0000)]
[gn build] Port
58d9ab70aef3
Nikolas Klauser [Wed, 13 Apr 2022 20:59:09 +0000 (22:59 +0200)]
[libc++][ranges] Implement ranges::minmax and ranges::minmax_element
Reviewed By: var-const, #libc, ldionne
Spies: sstefan1, ldionne, BRevzin, libcxx-commits, mgorny
Differential Revision: https://reviews.llvm.org/D120637
PeixinQiao [Thu, 14 Apr 2022 13:34:00 +0000 (21:34 +0800)]
[flang] Fix intrinsic interface for DIMAG/DCONJG
The intrinsics DREAL, DIMAG, and DCONJG are from Fortran 77 extensions.
For DREAL, the type of argument is extended to any complex. For DIMAG
and DCONJG, the type of argument for them should be complex(8). For DIMAG,
the result type should be real(8). For DCONJG, the result type should be
complex(8). Fix the intrinsic interface for them and add test cases for
the semantic checks and the lowering.
Reviewed By: Jean Perier
Differential Revision: https://reviews.llvm.org/D123459
PeixinQiao [Thu, 14 Apr 2022 13:28:30 +0000 (21:28 +0800)]
[flang] Fix float-number representation bug
The float number is represented as (-1)^s * 1.f * 2^(-127) for 32-bit,
where s is the signed flag, f is the mantissa. When the exponent bits
are all zeros, the float number is represented as (-1)^s * 0.f *2^(-126)
for 32-bit, in which case, the intPart is '0'.
Reviewed By: Jean Perier
https://reviews.llvm.org/D123673
Alex Zinenko [Thu, 14 Apr 2022 13:25:42 +0000 (15:25 +0200)]
[mlir] fix compiler warnings
-Wsign-compare and -Wunsued-value in the recently introduced code.
LLVM GN Syncbot [Thu, 14 Apr 2022 13:21:19 +0000 (13:21 +0000)]
[gn build] Port
dd47ab750b58
Nico Weber [Thu, 14 Apr 2022 13:20:51 +0000 (09:20 -0400)]
Revert "[clang-tidy] Add portability-std-allocator-const check"
This reverts commit
73da7eed8fac84c9005518740f12d58389998d95.
Breaks check-clang-tools on Windows, see comment on
https://reviews.llvm.org/D123655
LLVM GN Syncbot [Thu, 14 Apr 2022 13:06:13 +0000 (13:06 +0000)]
[gn build] Port
73da7eed8fac
Nico Weber [Thu, 14 Apr 2022 13:05:11 +0000 (09:05 -0400)]
Revert "[gn build] Port
73da7eed8fac"
This reverts commit
bd4463bebfe8545c8e626fc7828beac3509b656f.
Breaks check-clang-tools on Windows, see comment on
https://reviews.llvm.org/D123655
Lei Zhang [Thu, 14 Apr 2022 12:56:47 +0000 (08:56 -0400)]
[mlir][vector] Cast away leading one dims for insert ops
Reviewed By: ThomasRaoux
Differential Revision: https://reviews.llvm.org/D123621
Lei Zhang [Thu, 14 Apr 2022 12:51:18 +0000 (08:51 -0400)]
[mlir][vector] Fold splat constant transpose
Reviewed By: ThomasRaoux
Differential Revision: https://reviews.llvm.org/D123595
Paul Robinson [Mon, 11 Apr 2022 19:06:41 +0000 (12:06 -0700)]
[PS4] NFC refactor of PS4 toolchain class, prep for PS5
Simon Pilgrim [Thu, 14 Apr 2022 12:27:27 +0000 (13:27 +0100)]
[X86] Adjust fsetcc/fmin/fmax costs to match SoG (Issue #54889)
znver1/2 models were incorrectly modelling these as 3 cycle latency instructions on the wrong pipe and znver1 ymm variants also require double pumping.
Now matches AMD SoG, Agner and instlatx64 numbers.
Thanks to @fabian-r for the report
David Truby [Thu, 7 Apr 2022 12:56:37 +0000 (13:56 +0100)]
[Clang][AArch64][SVE] Add shift operators for SVE vector types
This patch enables shift operators on SVE vector types, as well as
supporting vector-scalar shift operations.
Shifts by a scalar that is wider than the contained type in the
vector are permitted but as in the C standard if the value is larger
than the width of the type the behavior is undefined.
Differential Revision: https://reviews.llvm.org/D123303
David Truby [Wed, 30 Mar 2022 15:18:07 +0000 (16:18 +0100)]
[Clang][AArch64][SVE] Allow subscript operator for SVE types
Undefined behaviour is just passed on to extract_element when the
index is out of bounds. Subscript on svbool_t is not allowed as
this doesn't really have meaningful semantics.
Differential Revision: https://reviews.llvm.org/D122732
Alex Zinenko [Thu, 14 Apr 2022 11:16:48 +0000 (13:16 +0200)]
[mlir] Introduce Transform dialect
This dialect provides operations that can be used to control transformation of
the IR using a different portion of the IR. It refers to the IR being
transformed as payload IR, and to the IR guiding the transformation as
transform IR.
The main use case for this dialect is orchestrating fine-grain transformations
on individual operations or sets thereof. For example, it may involve finding
loop-like operations with specific properties (e.g., large size) in the payload
IR, applying loop tiling to those and only those operations, and then applying
loop unrolling to the inner loops produced by the previous transformations. As
such, it is not intended as a replacement for the pass infrastructure, nor for
the pattern rewriting infrastructure. In the most common case, the transform IR
will be processed and applied to payload IR by a pass. Transformations
expressed by the transform dialect may be implemented using the pattern
infrastructure or any other relevant MLIR component.
This dialect is designed to be extensible, that is, clients of this dialect are
allowed to inject additional operations into this dialect using the newly
introduced in this patch `TransformDialectExtension` mechanism. This allows the
dialect to avoid a dependency on the implementation of the transformation as
well as to avoid introducing dialect-specific transform dialects.
See https://discourse.llvm.org/t/rfc-interfaces-and-dialects-for-precise-ir-transformation-control/60927.
Reviewed By: nicolasvasilache, Mogball, rriddle
Differential Revision: https://reviews.llvm.org/D123135
Alex Zinenko [Wed, 13 Apr 2022 16:29:47 +0000 (18:29 +0200)]
[mlir] Split intrinsics out of LLVMOps.td
Move the operations that correspond to LLVM IR intrinsics in a separate .td
file. This makes it easier to maintain the intrinsics and decreases the compile
time of LLVMDialect.cpp by ~25%.
Depends On D123310
Reviewed By: wsmoses, jacquesguan
Differential Revision: https://reviews.llvm.org/D123315
Alex Zinenko [Wed, 13 Apr 2022 16:29:17 +0000 (18:29 +0200)]
[mlir] initial support for opaque pointers in the LLVM dialect
LLVM IR has introduced and is moving forward with the concept of opaque
pointers, i.e. pointer types that are not carrying around the pointee type.
Instead, memory-related operations indicate the type of the data being accessed
through the opaque pointer. Introduce the initial support for opaque pointers
in the LLVM dialect:
- `LLVMPointerType` to support omitting the element type;
- alloca/load/store/gep to support opaque pointers in their operands and
results; this requires alloca and gep to store the element type as an
attribute;
- memory-related intrinsics to support opaque pointers in their operands;
- translation to LLVM IR for the ops above is no longer using methods
deprecated in LLVM API due to the introduction of opaque pointers.
Unlike LLVM IR, MLIR can afford to support both opaque and non-opaque pointers
at the same time and simplify the transition. Translation to LLVM IR of MLIR
that involves opaque pointers requires the LLVMContext to be configured to
always use opaque pointers.
Reviewed By: wsmoses
Differential Revision: https://reviews.llvm.org/D123310
Paul Walker [Wed, 13 Apr 2022 00:14:40 +0000 (01:14 +0100)]
[SVE] Add support for non-element-type sized scaling when lowering MGATHER/MSCATTER.
The lowering code did not use the scale operand of MGATHER/MSCATTER
nodes, but instead assumed scaled indices were always scaled based
on the element type of the memory type. This patch adds the missing
support by rewritting the nodes as unscaled variants.
Differential Revision: https://reviews.llvm.org/D123670
Florian Hahn [Thu, 14 Apr 2022 10:03:08 +0000 (12:03 +0200)]
[VPlan] Turn external defs in Value -> VPValue mapping.
This addresses an existing TODO by keeping a mapping of external IR
Value * definitions wrapped in VPValues for use in a VPlan.
Reviewed By: Ayal
Differential Revision: https://reviews.llvm.org/D123700
Mike Kashkarov [Tue, 5 Apr 2022 14:09:54 +0000 (17:09 +0300)]
[flang] Fix ICE for sqrt(0.0) evaluation
During real range reduction to [0.5, 4) with
SQRT(2**(2a) * x) = SQRT(2**(2a)) * SQRT(x) = 2**a * SQRT(x)
we fall into inf. recursion if IsZero() == true.
Explicitly handle SQRT(0.0) instead of additional checks during folding. Also
add helpers for +0.0/-0.0 generation to clean up a bit.
Reviewed By: klausler
Differential Revision: https://reviews.llvm.org/D123131
Mike Kashkarov [Tue, 5 Apr 2022 14:09:43 +0000 (17:09 +0300)]
[flang] Do not ICE on out-of-range data statement designator
Print error message instead of assert trigger.
Reviewed By: klausler
Differential Revision: https://reviews.llvm.org/D123132
Mike Kashkarov [Mon, 28 Feb 2022 23:16:47 +0000 (02:16 +0300)]
[flang] Allow IMPLICIT NONE(EXTERNAL) with GenericDetails
Restrictions of IMPLICIT NONE(EXTERNAL) prohibits usage of c_associated from
iso_c_binding (with explicit interface) without external definiton - relax
associated check.
Reviewed By: klausler
Differential Revision: https://reviews.llvm.org/D120971
Mehdi Amini [Sun, 3 Apr 2022 23:37:05 +0000 (23:37 +0000)]
Apply clang-tidy fixes for llvm-qualified-auto in VectorTransforms.cpp (NFC)
Mehdi Amini [Sun, 3 Apr 2022 23:19:13 +0000 (23:19 +0000)]
Apply clang-tidy fixes for performance-for-range-copy in SCF.cpp (NFC)
Andrzej Warzynski [Thu, 7 Apr 2022 09:47:23 +0000 (09:47 +0000)]
[flang][driver] Add support for `-mmlir`
The semantics of `-mmlir` are identical to `-mllvm`. The only notable
difference is that `-mmlir` options should be forwarded to MLIR rather
than LLVM.
Note that MLIR llvm::cl options are lazily constructed on demand (see
the definition of options in PassManagerOptions.cpp). This means that:
* MLIR global options are only visible when explicitly initialised and
displayed only when using `-mmlir --help`,
* Flang and LLVM global options are always visible and displayed when
using either `-mllvm -help` or `-mmlir --help`.
In other words, `-mmlir --help` is a superset of `-mllvm --help`. This is not
ideal, but we'd need to refactor all option definitions in Flang and
LLVM to improve this. I suggesting leaving this for later.
Differential Revision: https://reviews.llvm.org/D123297
LLVM GN Syncbot [Thu, 14 Apr 2022 09:08:24 +0000 (09:08 +0000)]
[gn build] Port
6ba1b9075dc1
Haojian Wu [Tue, 12 Apr 2022 13:51:16 +0000 (15:51 +0200)]
Reland "[AST] Add a new TemplateKind for template decls found via a using decl.""
This is the template version of https://reviews.llvm.org/D114251.
This patch introduces a new template name kind (UsingTemplateName). The
UsingTemplateName stores the found using-shadow decl (and underlying
template can be retrieved from the using-shadow decl). With the new
template name, we can be able to find the using decl that a template
typeloc (e.g. TemplateSpecializationTypeLoc) found its underlying template,
which is useful for tooling use cases (include cleaner etc).
This patch merely focuses on adding the node to the AST.
Next steps:
- support using-decl in qualified template name;
- update the clangd and other tools to use this new node;
- add ast matchers for matching different kinds of template names;
Differential Revision: https://reviews.llvm.org/D123127
Stanislav Mekhanoshin [Wed, 13 Apr 2022 18:17:10 +0000 (11:17 -0700)]
[AMDGPU] Remove redundand RequiredAlignment assignment. NFCI.
Differential Revision: https://reviews.llvm.org/D123699
Andrzej Warzynski [Thu, 14 Apr 2022 08:40:02 +0000 (08:40 +0000)]
[flang] Fix DYLIB builds
https://reviews.llvm.org/D123211 broke builds that set both
`LLVM_BUILD_LLVM_DYLIB` and `LLVM_LINK_LLVM_DYLIB` (see [1]). This patch
fixes that.
The build failure was caused by the fact that the LLVMPasses library,
which is an LLVM "component", was listed directly as link-time
dependency. Instead, one should use `LINK_COMPONENTS` in CMake files. I
made an identical mistake recently and then subsequently fixed it in
https://reviews.llvm.org/D121461 - please visit that revision for more
detail.
I'm merging this without a review. The change is straightforward, we
recently discussed it and I was able to confirm locally that it fixes
the build issue.
[1] https://lab.llvm.org/buildbot/#/builders/177/builds/4619
Jan Svoboda [Mon, 11 Apr 2022 10:10:05 +0000 (12:10 +0200)]
[clang][lex] NFCI: Use FileEntryRef in PPCallbacks::InclusionDirective()
This patch changes type of the `File` parameter in `PPCallbacks::InclusionDirective()` from `const FileEntry *` to `Optional<FileEntryRef>`.
With the API change in place, this patch then removes some uses of the deprecated `FileEntry::getName()` (e.g. in `DependencyGraph.cpp` and `ModuleDependencyCollector.cpp`).
Reviewed By: dexonsmith, bnbarham
Differential Revision: https://reviews.llvm.org/D123574
Jay Foad [Mon, 11 Apr 2022 15:11:43 +0000 (16:11 +0100)]
[AMDGPU] Add a test for flat scratch SVS addressing
Momchil Velikov [Thu, 14 Apr 2022 08:33:40 +0000 (09:33 +0100)]
Revert "[AArch64] Async unwind - Adjust unwind info in AArch64LoadStoreOptimizer"
This reverts commit
ecbf32dd88fc91b4fe709dc14bb3493dda6e8854.
It's possible this patch is the reason for an asertion failure
`!NodePtr->isKnownSentinel()` in `AArch64LoadStoreOpt::mergeUpdateInsn`
(https://lab.llvm.org/buildbot/#/builders/185/builds/1555) reverting while I
investigate.
Lian Wang [Tue, 12 Apr 2022 03:42:29 +0000 (03:42 +0000)]
[RISCV] Remove sext_inreg+riscv_grev/riscv_gorc isel patterns
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D123565
Lian Wang [Fri, 8 Apr 2022 09:28:21 +0000 (09:28 +0000)]
[RISCV][NFC] Refactor patterns for Multiply Add instructions
Reviewed By: craig.topper, frasercrmck
Differential Revision: https://reviews.llvm.org/D123355
Uday Bondhugula [Thu, 14 Apr 2022 02:30:50 +0000 (08:00 +0530)]
[MLIR] Fix missing return statement warning in PatternMatch.h
Fix missing return statement warning in PatternMatch.h. NFC.
```
mlir/include/mlir/IR/PatternMatch.h:983:3: warning: no return statement in
function returning non-void [-Wreturn-type]
```
Differential Revision: https://reviews.llvm.org/D123756
hsmahesha [Thu, 14 Apr 2022 07:21:02 +0000 (12:51 +0530)]
[AMDGPU][NFC] Organize code around reserving VGPR32 for AGPR copy.
This is an NFC patch in preparation to fix a bug related to always
reserving VGPR32 for AGPR copy.
Reviewed By: rampitec
Differential Revision: https://reviews.llvm.org/D123651
Carl Ritson [Thu, 14 Apr 2022 07:06:17 +0000 (16:06 +0900)]
[AMDGPU] Try to avoid inserting duplicate s_inst_prefetch
Check for existing s_inst_prefetch instructions when
configuring prefetches during loop alignment.
Reviewed By: rampitec, foad
Differential Revision: https://reviews.llvm.org/D123569
Arnab Dutta [Thu, 14 Apr 2022 06:00:07 +0000 (11:30 +0530)]
[MLIR][GPU] Add canonicalization patterns for folding simple gpu.wait ops.
* Fold away redundant %t = gpu.wait async + gpu.wait [%t] pairs.
* Fold away %t = gpu.wait async ... ops when %t has no uses.
* Fold away gpu.wait [] ops.
* In case of %t1 = gpu.wait async [%t0], replace all uses of %t1
with %t0.
Differential Revision: https://reviews.llvm.org/D121878
Vitaly Buka [Thu, 14 Apr 2022 06:42:50 +0000 (23:42 -0700)]
Revert "[sanitizer] Don't run malloc hooks for stacktraces"
Msan crashes on clang-s390x-linux bot
This reverts commit
d3531fc7f0053a7fe68317521ee6491da6e36733.
Brad Smith [Thu, 14 Apr 2022 06:38:08 +0000 (02:38 -0400)]
[Driver] Sort Generic_GCC::IsIntegratedAssemblerDefault, NFC
Fangrui Song [Thu, 14 Apr 2022 06:00:57 +0000 (23:00 -0700)]
[Driver] Fix -fpascal-strings on Darwin
LLVM GN Syncbot [Thu, 14 Apr 2022 05:36:21 +0000 (05:36 +0000)]
[gn build] Port
73da7eed8fac
Fangrui Song [Thu, 14 Apr 2022 05:35:11 +0000 (22:35 -0700)]
[clang-tidy] Add portability-std-allocator-const check
Report use of ``std::vector<const T>`` (and similar containers of const
elements). These are now allowed in standard C++ due to undefined
``std::allocator<const T>``. They do not compile with libstdc++ or MSVC.
Future libc++ will remove the extension (D120996).
See docs/clang-tidy/checks/portability-std-allocator-const.rst for detail.
I have attempted clean-up in a large code base. Here are some statistics:
* 98% are related to the container `std::vector`, among `deque/forward_list/list/multiset/queue/set/stack/vector`.
* 24% are related to `std::vector<const std::string>`.
* Both `std::vector<const absl::string_view>` and `std::vector<const int>` contribute 2%. The other contributors spread over various class types.
The check can be useful to other large code bases and may serve as an example
for future libc++ strictness improvement.
Reviewed By: sammccall
Differential Revision: https://reviews.llvm.org/D123655
Ruiling Song [Tue, 12 Apr 2022 03:25:33 +0000 (11:25 +0800)]
LowerSwitch: Avoid inserting NewDefault block
The NewDefault was used to simplify the updating of PHI nodes, but it
causes some inefficiency for target that will run structurizer later. For
example, for a simple two-case switch, the extra NewDefault is causing
unstructured CFG like:
O
/ \
O O
/ \ / \
C1 ND C2
\ | /
\ | /
D
The change is to avoid the ND(NewDefault) block, that is we will get a
structured CFG for above example like:
O
/ \
/ \
O O
/ \ / \
C1 \ / C2
\-> D <-/
The IR change introduced by this patch should be trivial to other targets,
so I am doing this unconditionally.
Fall-through among the cases will also cause unstructured CFG, but it need
more work and will be addressed in a separate change.
Reviewed by: arsenm
Differential Revision: https://reviews.llvm.org/D123607
Ruiling Song [Tue, 12 Apr 2022 12:50:44 +0000 (20:50 +0800)]
test: Don't depend on behavior of switch lower in one test. NFC
This is a preliminary change to update the test so that it does not
depend on how switch-case will be lowered. The following change will
lower switch-case more optimally that will make the test no longer
valid.
Reviewed by: arsenm
Differential Revision: https://reviews.llvm.org/D123606
Fangrui Song [Thu, 14 Apr 2022 05:00:44 +0000 (22:00 -0700)]
[Driver] Simplify some hasFlag patterns with addOptInFlag/addOptOutFlag. NFC
Peter Klausler [Thu, 31 Mar 2022 23:46:02 +0000 (16:46 -0700)]
[flang] Respect left tab limit with Tn editing after ADVANCE='NO'
Correct the implementation of non-advancing I/O after some testing
to ensure that T tab edit descriptors are not allowed to back up
into positions of a record prior to where it stood at the beginning
of the I/O statement.
Differential Revision: https://reviews.llvm.org/D123709
Stella Laurenzo [Thu, 14 Apr 2022 03:16:04 +0000 (20:16 -0700)]
[mlir] Introduce ml_program dialect.
Differential Revision: https://reviews.llvm.org/D120203
Richard Smith [Thu, 14 Apr 2022 04:34:08 +0000 (21:34 -0700)]
Revert "[clang] Implement Change scope of lambda trailing-return-type"
This reverts commit
c729d5be781a8e80137c11ab28aa14d9ace148db.
This change breaks thread safety annotations on lambdas.
joker881 [Wed, 13 Apr 2022 12:38:36 +0000 (20:38 +0800)]
RISCV] Add clang builtins for CLZ instruction.
add intrinsic for CLZ
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D121915
Blue Gaston [Wed, 13 Apr 2022 20:17:05 +0000 (13:17 -0700)]
[Darwin][ASan][Sanitizer] Fixes Sanitizer NonUnique Identifier to Account for Mac arm64 architectures.
Current check assumes iOS as the only Apple devices running arm64.
```#if SANITIZER_MAC && !(defined(__arm64__) && SANITIZER_IOS)```
Stops Apple Silicon from being flagged as requiring unique RTTI.
This introduced unexpected behavior within the sanitizer.
rdar://
91446703
Differential Revision: https://reviews.llvm.org/D123736
Stella Laurenzo [Thu, 14 Apr 2022 03:13:18 +0000 (20:13 -0700)]
[NFC] Generically resolve body in FunctionOpInterface verifyBody.
Since the actual implementation class can arbitrarily shadow parts of the FunctionOpInterface exported API, access the body generically instead of via the use of the interface being defined.
Fixes https://github.com/llvm/llvm-project/issues/54807
Differential Revision: https://reviews.llvm.org/D123757
Brad Smith [Thu, 14 Apr 2022 03:53:25 +0000 (23:53 -0400)]
[Clang] Move Hexagon / VE IAS enabling to Generic_GCC::IsIntegratedAssemblerDefault, NFC
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D123438
Shoaib Meenai [Thu, 14 Apr 2022 01:28:27 +0000 (18:28 -0700)]
[cmake] Loosen multi-distribution restrictions
We've found that there are cases where it's useful to be able to include
the same target in multiple distributions (e.g. if you want a
distribution that's a superset of another distribution, for convenience
purposes), and that there are cases where the distribution of a target
and its umbrella can legitimately differ (e.g. the LTO library would
commonly be distributed alongside your tools, but it also falls under
the llvm-libraries umbrella, which would commonly be distributed
separately). Relax the restrictions while providing an option to restore
them (which is mostly useful to ensure you aren't accidentally placing
targets in the wrong distributions).
There could be further refinements here (e.g. excluding a target from an
umbrella if it's explicitly included in some other distribution, or
having variables to control which targets are allowed to be duplicated
or placed in a separate distribution than their umbrellas), but we can
punt on those until there's an actual need.
Arjun P [Thu, 14 Apr 2022 02:20:17 +0000 (03:20 +0100)]
[MLIR][Presburger] change some `push_back`s to `emplace_back`s
Arjun P [Thu, 14 Apr 2022 02:19:03 +0000 (03:19 +0100)]
[MLIR][Presburger] change some post-increments/decrements to pre-increments/decrements
wangpc [Thu, 14 Apr 2022 02:47:08 +0000 (10:47 +0800)]
[RISCV][NFC] Use addExpr() instead of createExpr()
It seems to be neater.
Reviewed By: asb
Differential Revision: https://reviews.llvm.org/D123675
Florian Mayer [Tue, 12 Apr 2022 23:25:40 +0000 (16:25 -0700)]
[HWASan] symbolize: use buildid index for locals.
Reviewed By: eugenis
Differential Revision: https://reviews.llvm.org/D123644
Peter Klausler [Thu, 31 Mar 2022 22:59:27 +0000 (15:59 -0700)]
[flang] Error handling for out-of-range CASE values
Catch and nicely describe errors in CASE range values
that are out of range for the type of the SELECT CASE.
Differential Revision: https://reviews.llvm.org/D123708
Vitaly Buka [Thu, 14 Apr 2022 01:33:27 +0000 (18:33 -0700)]
[sanitizer] Disable malloc_hook_skip on Darwin
Followup to D123566
Nico Weber [Thu, 14 Apr 2022 00:58:10 +0000 (20:58 -0400)]
[gn build] (manually) port
ab8abeaf48ab
Fangrui Song [Thu, 14 Apr 2022 00:09:30 +0000 (17:09 -0700)]
[randstruct] Fix -Wunused-but-set-variable with Clang>=D122271 in -DLLVM_ENABLE_ASSERTIONS=off builds
Peter Klausler [Thu, 31 Mar 2022 20:36:09 +0000 (13:36 -0700)]
[flang] Fold IBITS() intrinsic function
Implement constant folding of IBITS(); add test.
Differential Revision: https://reviews.llvm.org/D123707
Okwan Kwon [Wed, 13 Apr 2022 23:55:43 +0000 (23:55 +0000)]
[mlir] Fix a typo to load lsp-mode correctly.
Differential Revision: https://reviews.llvm.org/D123745
Fangrui Song [Wed, 13 Apr 2022 23:58:00 +0000 (16:58 -0700)]
[Driver] Change CLANG_ENABLE_OPAQUE_POINTERS_INTERNAL to affect driver default instead of cc1 default
The current cc1 CLANG_ENABLE_OPAQUE_POINTERS=on default difference is not ideal
in that people contribute %clang_cc1 tests may assume the default ON behavior,
which will cause failures on systems set to OFF.
cc1 option default dependent on CMake options should be used prudently
(generally avoided). We prefer to limit target differences to Driver.
Change the CLANG_ENABLE_OPAQUE_POINTERS_INTERNAL mechanism introduced in D123122
to use a driver default instead. This is similar to the mechanism used for the
-flegacy-pass-manager transition to new PM transition.
Reviewed By: #opaque-pointers, rsmith, aeubanks
Differential Revision: https://reviews.llvm.org/D123744
Vitaly Buka [Sat, 9 Apr 2022 02:53:41 +0000 (19:53 -0700)]
[sanitizer] Don't run malloc hooks for stacktraces
Usually when we generated stacktraces the process is in error state, so
running hooks may crash the process and prevent meaningfull error report.
Symbolizer, unwinder and pthread are potential source of mallocs.
https://b.corp.google.com/issues/
228110771
Reviewed By: kda
Differential Revision: https://reviews.llvm.org/D123566
Arthur Eubanks [Wed, 13 Apr 2022 23:31:03 +0000 (16:31 -0700)]
[bazel] Set CLANG_ENABLE_OPAQUE_POINTERS_INTERNAL to 1
Matches official cmake build.
Arthur Eubanks [Wed, 13 Apr 2022 23:26:21 +0000 (16:26 -0700)]
[gn build] Set CLANG_ENABLE_OPAQUE_POINTERS_INTERNAL=1
Matches official cmake build.
Jonas Devlieghere [Wed, 13 Apr 2022 22:29:21 +0000 (15:29 -0700)]
[lldb] Remove reproducer logic from LocateSymbolFileMacOSX
Jonas Devlieghere [Wed, 13 Apr 2022 22:27:36 +0000 (15:27 -0700)]
[lldb] Format LocateSymbolFileMacOSX (NFC)
Mehdi Amini [Sun, 3 Apr 2022 23:18:19 +0000 (23:18 +0000)]
Apply clang-tidy fixes for llvm-else-after-return in SCF.cpp (NFC)
Mehdi Amini [Sun, 3 Apr 2022 23:14:19 +0000 (23:14 +0000)]
Apply clang-tidy fixes for readability-identifier-naming in OpenMPDialect.cpp (NFC)
Damian Rouson [Thu, 17 Mar 2022 18:05:25 +0000 (11:05 -0700)]
[flang] expand the num_images test coverage
Add a test with a range of num_images() intrinsic function
invocations, including the standard-conforming but previously
untested 'team' argument. Also test that several non-conforming
num_images() invocations generate the correct error messages.
Differential Revision: https://reviews.llvm.org/D121938
Peter Klausler [Thu, 31 Mar 2022 19:55:45 +0000 (12:55 -0700)]
[flang] Emit a portability warning for padding in COMMON
When padding is required in a COMMON block to ensure alignment
of a component, emit a portability warning.
Differential Revision: https://reviews.llvm.org/D123706
Christopher Bate [Wed, 13 Apr 2022 22:40:22 +0000 (22:40 +0000)]
[MLIR][GPU] Add GPU ops nvvm.mma.sync, nvvm.mma.ldmatrix, lane_id
This change adds three new operations to the GPU dialect: gpu.mma.sync,
gpu.mma.ldmatrix, and gpu.lane_id. The former two are meant to target
the lower level nvvm.mma.sync and nvvm.ldmatrix instructions, respectively.
Lowerings are added for the new GPU operations for conversion to
NVVM.
Reviewed By: ThomasRaoux
Differential Revision: https://reviews.llvm.org/D123647
Julian Lettner [Tue, 12 Apr 2022 20:58:33 +0000 (13:58 -0700)]
Adapt "cross compile?" check for Apple Silicon
This piece of code tries to implement the semantics "cross compile?" to
determine CFLAGS used for test binary compilation.
```
if(ANDROID OR ${arch} MATCHES "arm|aarch64|riscv32|riscv64")
```
Since Apple Silicon, macOS runs on arm64e, so we take the wrong branch
when compiling and running tests locally "on the host" on an AS machine.
Furthermore, for Apple code, we use the separate
`get_test_cflags_for_apple_platform` function to determine these test
compiliation flags and `get_test_cc_for_arch` is only ever used in the
"compile & run on host" case, so we can short-curcuit the "cross
compile?" check here.
rdar://
91446703
Differential Revision: https://reviews.llvm.org/D123633
Jonas Devlieghere [Wed, 13 Apr 2022 22:02:39 +0000 (15:02 -0700)]
[lldb] Fix a bug in the decorator matching logic.
This changes the decorator helper `_match_decorator_property` to
consider `None` as the actual value as not a match. Using `None` for the
pattern continues to be considered a match.
I discovered the issue because marking a test as NO_DEBUG_INFO_TESTCASE
will cause the call to `self.getDebugInfo()` to return `None` and
incorrectly skip or XFAIL the corresponding test.
I used the above scenario to create a test for the decorators.
Differential revision: https://reviews.llvm.org/D123401
Martin Sebor [Wed, 13 Apr 2022 21:58:07 +0000 (15:58 -0600)]
Run update_test_checks.py after parameter renaming in r03b807d3f2999888bbe395945987af06f201c142 (NFC).
Jonas Devlieghere [Wed, 13 Apr 2022 21:35:28 +0000 (14:35 -0700)]
[debugserver ] Un-conditionalize use of libcompression
Jason removed the include guards in
681f6c2f552f. This patch removes the
corresponding CMake logic as well.
Differential revision: https://reviews.llvm.org/D123616
Stanislav Mekhanoshin [Wed, 13 Apr 2022 16:27:09 +0000 (09:27 -0700)]
[AMDGPU] Increate hazard for store dwordx3/4 to 2 waitstates on gfx940
Fixes: SWDEV-327053
Differential Revision: https://reviews.llvm.org/D123687
Sanjay Patel [Wed, 13 Apr 2022 21:01:14 +0000 (17:01 -0400)]
[SimplifyCFG] improve readability in switch-to-select; NFC
Sanjay Patel [Wed, 13 Apr 2022 18:26:59 +0000 (14:26 -0400)]
[SimplifyCFG] add more tests for switch to select transform; NFC
Also, make test names more descriptive -
additional coverage for D122485