Mauro Rossi [Sat, 3 Oct 2020 22:14:29 +0000 (00:14 +0200)]
android: pan/bi: Use new disassembler (v2)
(v2) bifrost_gen_disasm.c generated source belongs to libpanfrost_bifrost_disasm
Fixes the following build errors, which happen with Android P, but not with Android Q
FAILED: out/target/product/x86_64/obj_x86/SHARED_LIBRARIES/gallium_dri_intermediates/LINKED/gallium_dri.so
...
external/mesa/src/panfrost/bifrost/disassemble.c:678: error: undefined reference to 'bi_disasm_fma'
external/mesa/src/panfrost/bifrost/disassemble.c:679: error: undefined reference to 'bi_disasm_add'
Fixes:
792b51713 ("android: pan/bi: Use new disassembler")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6996>
Jonathan Marek [Mon, 5 Oct 2020 02:06:18 +0000 (22:06 -0400)]
turnip: implement timestamp fences/semaphores for kgsl backend
This gets fences and semaphores working for kgsl (minus import/export).
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7000>
Alejandro Piñeiro [Wed, 23 Sep 2020 21:54:44 +0000 (23:54 +0200)]
broadcom/simulator: update to a newer simulator
Some headers were moved, and macros renamed.
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7007>
Mike Blumenkrantz [Wed, 23 Sep 2020 19:42:18 +0000 (15:42 -0400)]
zink: hook up driconf
we need this
Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7009>
Samuel Pitoiset [Mon, 28 Sep 2020 13:47:38 +0000 (15:47 +0200)]
ac/nir,radv: fix invalid IR when loading inline uniform blocks
Fixes dEQP-VK.binding_model.descriptorset_random.* and
dEQP-VK.binding_model.descriptor_copy.*.
Fixes:
05b6612b4ec ("radv: do not lower UBO/SSBO access to offsets")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6977>
Samuel Pitoiset [Wed, 30 Sep 2020 07:59:56 +0000 (09:59 +0200)]
radv: remove dead deref code in the shader info pass
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6931>
Samuel Pitoiset [Wed, 30 Sep 2020 07:58:16 +0000 (09:58 +0200)]
radv: remove unused gs.writes_memory in the shader info pass
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6931>
Samuel Pitoiset [Wed, 30 Sep 2020 07:57:00 +0000 (09:57 +0200)]
ac,radv,radeonsi: remove unused parameters in the shader ABI IO
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6931>
Samuel Pitoiset [Wed, 30 Sep 2020 07:51:08 +0000 (09:51 +0200)]
radeonsi: remove dead code in TCS/TES/GS since const_index is always 0
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6931>
Samuel Pitoiset [Wed, 30 Sep 2020 07:26:18 +0000 (09:26 +0200)]
ac/nir: remove dead shader IO code
RADV/LLVM and RadeonSI now lower IO.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6931>
Samuel Pitoiset [Wed, 30 Sep 2020 07:21:31 +0000 (09:21 +0200)]
ac/nir: remove dead global load/store/atomic derefs code
RADV/LLVM now lowers global operations and RadeonSI doesn't use that.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6931>
Samuel Pitoiset [Wed, 30 Sep 2020 13:01:46 +0000 (15:01 +0200)]
radv/llvm: enable lower_unpack_half_2x16
To match ACO.
fossils-db (Navi10):
Totals from 294 (0.22% of 136420) affected shaders:
SGPRs: 16504 -> 16496 (-0.05%)
VGPRs: 19008 -> 19124 (+0.61%); split: -0.06%, +0.67%
SpillVGPRs: 511 -> 476 (-6.85%); split: -7.63%, +0.78%
CodeSize: 1688852 -> 1687932 (-0.05%); split: -0.10%, +0.05%
Scratch: 305152 -> 307200 (+0.67%)
MaxWaves: 2877 -> 2878 (+0.03%)
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6937>
Samuel Pitoiset [Wed, 30 Sep 2020 13:09:54 +0000 (15:09 +0200)]
ac/llvm: implement nir_op_unpack_half_2x16_split_{x,y}
nir_unpack_half_2x16_split_{x,y}_flush_to_zero don't have to be
implemented because RADV/LLVM doesn't allow flushing denorms
for 16-bit floating point.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6937>
Samuel Pitoiset [Wed, 30 Sep 2020 07:15:54 +0000 (09:15 +0200)]
radv/llvm: lower VS IO
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6912>
Samuel Pitoiset [Fri, 25 Sep 2020 15:14:13 +0000 (17:14 +0200)]
radv/llvm: gather VS input usage mask from load_input
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6912>
Samuel Pitoiset [Wed, 30 Sep 2020 06:46:19 +0000 (08:46 +0200)]
radv/llvm: lower TCS IO
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6912>
Samuel Pitoiset [Tue, 29 Sep 2020 17:13:23 +0000 (19:13 +0200)]
radv/llvm: gather TCS outputs from the output variables
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6912>
Samuel Pitoiset [Tue, 29 Sep 2020 17:12:37 +0000 (19:12 +0200)]
radv/llvm: lower TES IO
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6912>
Samuel Pitoiset [Tue, 29 Sep 2020 15:05:57 +0000 (17:05 +0200)]
radv/llvm: lower GS IO
The LLVM bakend expects 64-bit IO to be lowered to 32-bit but
it's unclear if we want to do that for ACO at this point.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6912>
Samuel Pitoiset [Tue, 29 Sep 2020 17:18:14 +0000 (19:18 +0200)]
radv/llvm: assign driver locations for VS, TCS, TES and GS correctly
RADV/LLVM doesn't use assigned IO locations (yet).
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6912>
Samuel Pitoiset [Fri, 2 Oct 2020 14:35:14 +0000 (16:35 +0200)]
ac/nir: remove dead load/store deref code for temporary variables
They should have been lowered before reaching the backend.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6984>
Samuel Pitoiset [Fri, 2 Oct 2020 12:58:15 +0000 (14:58 +0200)]
ac/llvm: adjust dmask when image stores are shrinked using the format
It looks like GFX10 doesn't care about dmask if it's greater than
the number of components stored but it matters on GFX8-9 (I haven't
checked older gens).
Fixes:
1b4d968106d ("ac/llvm: fix invalid IR if image stores are shrinked using the format")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6982>
Jose Maria Casanova Crespo [Thu, 1 Oct 2020 23:55:07 +0000 (00:55 +0100)]
vc4: Avoid negative scissor caused by no intersection
This fixes 6 tests that were crashing on VC4 since
EGL_KHR_swap_buffers_with_damage was enabled.
dEQP-EGL.functional.swap_buffers_with_damage.*.buffer_age_render
Cc: 20.2 <mesa-stable>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6976>
Neil Roberts [Tue, 29 Sep 2020 15:24:51 +0000 (17:24 +0200)]
v3d: Update the TEXTURE_SHADER_STATE when there’s a new buf for a tex
When a texture is mapped with the DISCARD_WHOLE_RESOURCE flag set,
v3d_map_usage_prep will try to allocate a new buffer for the resource.
Previously, if the resource was used in a bound texture then nothing
would cause it to update the sampler view with the offset for the new
buffer. This commit just adds that in by looking at all sampler views
and calling v3d_create_texture_shader_state_bo for each one that
references this resource.
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6914>
Neil Roberts [Tue, 29 Sep 2020 15:22:37 +0000 (17:22 +0200)]
v3d: Split the creating of TEXTURE_SHADER_STATE into a helper function
This extracts the part of v3d_create_sampler_view that creates and fills
in the buffer for the TEXTURE_SHADER_STATE record into a helper
function. This will be used in a later patch to update the record when
the information changes.
v2: Also put the part that creates the buffer into the helper function
so that it won’t override the contents of an inflight buffer.
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6914>
Neil Roberts [Tue, 29 Sep 2020 15:20:31 +0000 (17:20 +0200)]
v3d: Make the function to set tex dirty state for a stage global
This moves the static function v3d_dirty_tex_state_for_shader_type from
v3dx_state.c to v3d_context.c and adds a declaration for it in the
header so that it can be used as a general utility function in a later
patch.
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6914>
Jonathan Marek [Sun, 4 Oct 2020 02:00:31 +0000 (22:00 -0400)]
turnip: remove pre-emption marker
turnip doesn't implement pre-emption, this hasn't been a problem with drm
backend since the kernel driver doesn't implement it either, however this
causes issues with kgsl backend.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6994>
Vinson Lee [Tue, 29 Sep 2020 01:20:32 +0000 (18:20 -0700)]
glsl: Initialize ast_node member field location.path in constructor.
Fix defect reported by Coverity Scan.
Uninitialized pointer field (UNINIT_CTOR)
uninit_member: Non-static class member field location.path is not
initialized in this constructor nor in any functions that it calls.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6905>
Vinson Lee [Tue, 29 Sep 2020 23:58:47 +0000 (16:58 -0700)]
intel/vec4: Remove leftover code from Gen8+ removal.
Remove code missed in commit
2a49007411bb ("intel/vec4: Remove all
support for Gen8+ [v2]").
Fix defect reported by Coverity Scan.
Logically dead code (DEADCODE)
dead_error_begin: Execution cannot reach this statement:
mcs.swizzle = 80U;
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6927>
Vinson Lee [Mon, 28 Sep 2020 23:16:37 +0000 (16:16 -0700)]
freedreno: Move rsc NULL check to before rsc dereferences.
Fix defect reported by Coverity Scan.
Dereference before null check (REVERSE_INULL)
check_after_deref: Null-checking rsc suggests that it may be
null, but it has already been dereferenced on all paths leading
to the check.
Fixes:
6173cc19c45d ("freedreno: gallium driver for adreno")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6903>
Jason Ekstrand [Fri, 2 Oct 2020 22:41:15 +0000 (17:41 -0500)]
iris: Fix the constant data address calculation
In
536727c46517, we switched iris to patching the constant data address
into the shader but, thanks to my lack of understanding how iris works,
I got the calculation wrong. I didn't realize, we needed to call
iris_bo_offset_from_base_address to get the BO offset from the start of
instruction state base address.
Fixes:
536727c465170c "iris: Patch constant data pointers into shaders"
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3596
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6992>
Vinson Lee [Fri, 18 Sep 2020 00:05:56 +0000 (17:05 -0700)]
nv50/ir: Initialize Source members.
Fix defects reported by Coverity Scan.
uninit_member: Non-static class member insns is not initialized in this
constructor nor in any functions that it calls.
uninit_member: Non-static class member clipVertexOutput is not
initialized in this constructor nor in any functions that it calls.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6769>
Vinson Lee [Mon, 28 Sep 2020 23:01:03 +0000 (16:01 -0700)]
radv: Fix asserts using assign instead of compare.
Fix defects reported by Coverity Scan.
Assign instead of compare (PW.ASSIGN_WHERE_COMPARE_MEANT)
assign_where_compare_meant: use of "=" where "==" may have been
intended
Fixes:
d8cdcd4adf7a ("radv: use syncobj for wsi fence")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6902>
Vinson Lee [Tue, 29 Sep 2020 01:35:04 +0000 (18:35 -0700)]
lima: Print usage if --help is any of the arguments.
Fix defect reported by Coverity Scan.
Structurally dead code (UNREACHABLE)
unreachable: Since the loop increment n++; is unreachable, the loop body
will never execute more than once.
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6906>
Eric Anholt [Tue, 29 Sep 2020 16:37:50 +0000 (09:37 -0700)]
android: Disable the user XML config parsing.
The android platform is not interested in this feature of Mesa. There are
currently workarounds for apps on Android, and no support for it in the
xmlconfig code. Even if there we do need workarounds eventually, we'll
want to bake them in as structs rather than have this awkward external
dependency for parsing user-readable data installed by Mesa for
Mesa-internal details.
This gets rid of the expat dependency in the turnip driver.
Note that rather than have more #ifdefs in the file, I've opted to move
the code to have more logical locations since the structs refactor had
left less-used helpers scattered across the file.
Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6916>
Eric Anholt [Fri, 11 Sep 2020 20:36:24 +0000 (13:36 -0700)]
util/xmlconfig: Drop use of XML_Char in parsing.
We don't define the use-16-bit-unicode defines (and our strings are plain
utf8), so it's just char. This will let me use some of this code in the
absence of expat.
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6916>
Eric Anholt [Tue, 29 Sep 2020 16:28:18 +0000 (09:28 -0700)]
driconf: Stop quoting true/false in boolean option definitions.
Now that we're not trying to evade preprocessor macro expansion in
preprocessor string concatenation, we can use plain old bools in option
setup.
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6916>
Eric Anholt [Fri, 25 Sep 2020 19:56:22 +0000 (12:56 -0700)]
driconf: Make the driver's declarations be structs instead of XML.
We can generate the XML if anybody actually queries it, but this reduces
the amount of work in driver setup and means that we'll be able to support
driconf option queries on Android without libexpat.
This updates the driconf interface struct version for i965, i915, and
radeon to use the new getXml entrypoint to call the on-demand xml
generation. Note that our loaders (egl, glx) implement the v2 function
interface and don't use .xml when that's set, and the X server doesn't use
this interface at all.
XML generation tested on iris and i965 using adriconf
Acked-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6916>
Eric Anholt [Tue, 29 Sep 2020 17:23:52 +0000 (10:23 -0700)]
driconf: Use DRI_CONF_OPT_I for remaining int options
Now that we have a single range in the option and start==end means "no
range", we can switch over these non-ranged int options. This will ease
later refactors.
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6916>
Eric Anholt [Mon, 28 Sep 2020 18:21:00 +0000 (11:21 -0700)]
driconf: Delete disjoint range support.
The only user was radeon/r200, which was using it to have something that
looks a lot like an enum value return a float from the config option.
Just convert that option to a plain float value (for compat with existing
driconfs) with the min and max of its disjoint range as the range. The
driver's option handling code already correctly deals with other values in
the range.
The disjoint range support was a bunch of extra parsing for this dead
driver, and made turning driconf into static structs difficult.
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6916>
Eric Anholt [Thu, 10 Sep 2020 23:54:38 +0000 (16:54 -0700)]
util/xmlconfig: Indent to Mesa style.
I'm heavily editing this code, and having Mesa's style not apply sucks.
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6916>
Eric Anholt [Thu, 10 Sep 2020 23:45:14 +0000 (16:45 -0700)]
util/xmlconfig: Drop silly open-coded strdup.
The comment about using "malloc"? The strdup man page says 'Memory for
the new string is obtained with malloc(3), and can be freed with free(3)'
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6916>
Eric Anholt [Sat, 26 Sep 2020 00:06:07 +0000 (17:06 -0700)]
driconf: Make a DRI_CONF_OPT_S() for string options.
This gets rid of most of the remaining special case option definitions.
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6916>
Eric Anholt [Fri, 25 Sep 2020 22:35:16 +0000 (15:35 -0700)]
r200: Reuse DRI_CONF_OPT_F for texture_blend_quality.
I missed this one in the nested macros conversion.
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6916>
Eric Anholt [Mon, 28 Sep 2020 22:44:21 +0000 (15:44 -0700)]
driconf: Fix extra quoting on "Jimenez'".
We're in a "" C string, no need to add extra '\'. Fixes an extra '\' in
adriconf's interface.
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6916>
Eric Anholt [Fri, 25 Sep 2020 22:06:11 +0000 (15:06 -0700)]
driconf: Eliminate the DRI_CONF_OPT_BEGIN_B macro.
Since the nested-sections rework, this use in the testcase was the only
remaining one.
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6916>
Jason Ekstrand [Fri, 2 Oct 2020 18:37:05 +0000 (13:37 -0500)]
intel/fs: Don't use NoDDClk/NoDDClr for split SHUFFLEs
When I copied and pasted the code from MOV_INDIRECT for handling the
dependency controls, I missed a subtle difference between MOV_INDIRECT
and SHUFFLE. Specifically, MOV_INDIRECT gets lowered to a narrow
instruction on Gen7 by the SIMD width lowering whereas SHUFFLE has to
split it in the generator. Therefore, the check safety check for
whether or not we can use dependency control has to be based on the
lowered width rather than the width of the original instruction.
Fixes:
a8ac61b0ee2fd "intel/fs: NoMask initialize the address..."
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3593
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6989>
Mauro Rossi [Thu, 1 Oct 2020 22:42:32 +0000 (00:42 +0200)]
android: util: add log.c to Makefile.sources
Fixes the following building errors:
external/mesa/src/intel/vulkan/anv_android.c:627: error: undefined reference to 'mesa_log'
...
external/mesa/src/intel/vulkan/anv_device.c:164: error: undefined reference to 'mesa_log'
Fixes:
13ea7db76 ("mesa: Promote Intel's simple logging façade for Android to util/")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Acked-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6972>
Boris Brezillon [Tue, 29 Sep 2020 08:25:56 +0000 (10:25 +0200)]
panfrost: decode: Flag pandecode_log_typed() as PRINTFLIKE
This way we can catch mismatch between the format string and the
arguments.
Suggested-by: Kristian H. Kristensen <hoegsberg@google.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6886>
Boris Brezillon [Thu, 24 Sep 2020 06:49:36 +0000 (08:49 +0200)]
panfrost: decode: Fix decode_bifrost_constant() prototype
We expect a float, not an integer.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6886>
Bas Nieuwenhuizen [Wed, 30 Sep 2020 11:07:43 +0000 (13:07 +0200)]
radv: Use atomics to read query results.
The volatile pattern gives me flaky results for 32-bit builds on
ChromeOS Android. This is because on 32-bit the volatile 64-bit
loads gets split into 2 32-bit loads each.
So if we read the lower dword first and then the upper dword, it
can happen that the upper dword is already changed but the lower
dword isn't yet. In particular for occlusion queries this gives
false readings, as the upper dword commonly only constains the
ready bit.
With the GCC atomic intrinsics we get a call to __atomic_load_8
in libatomic.so which does the right thing.
An alternative fix would be to explicitly split the 32-bit loads
in the right order and do a bunch of retries if things change, though
that gets messy quickly and for 32-bit builds only doesn't feel worth
it that much.
CC: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6933>
Alyssa Rosenzweig [Fri, 2 Oct 2020 16:02:36 +0000 (12:02 -0400)]
pan/bi: Fix assert when writing vertex outputs
Varying stores require us to generate a LEA_ATTR_IMM instruction, which
is a load.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Fixes:
0aa08ae2f67 ("nir: Split NIR_INTRINSIC_TYPE into separate src/dest indices")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6985>
Mike Blumenkrantz [Fri, 26 Jun 2020 22:16:15 +0000 (18:16 -0400)]
zink: use sizeof(vec4) multiplier for nir_lower_uniforms_to_ubo
we do everything ubo-related padded out to the size of a vec4, so ensure
that we're getting load offsets using the same alignment
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6981>
Mike Blumenkrantz [Fri, 26 Jun 2020 19:49:03 +0000 (15:49 -0400)]
zink: correctly set up ubo bindings and buffer indices
var->data.binding is only set for vulkan drivers (though it also will
get incremented after nir_lower_uniforms_to_ubo), so we have to generate
our own values here.
to do this, we iterate backwards over the ubos to account for the
"first" ubos being at the end of the list, and we must also ensure that we
remap the buffer index correctly based on whether we're running our
nir_lower_uniforms_to_ubo pass
note that running nir_lower_uniforms_to_ubo unconditionally would require
us to add a number of checks in this patch for !shader->num_uniforms in
order to properly adjust to the altered instructions which become 1-indexed
instead of 0-indexed when this pass is run with no uniforms present
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6981>
Mike Blumenkrantz [Fri, 26 Jun 2020 19:46:44 +0000 (15:46 -0400)]
zink: don't emit ubos or bindings for ubo variables
we want to only emit the full ubo block here to be used in the binding
table, not each ubo member variable, the likes of which are denoted by
having var->data.location != 0
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6981>
Mike Blumenkrantz [Fri, 26 Jun 2020 19:44:03 +0000 (15:44 -0400)]
zink: emit ubo variables sized based on the overall ubo block size
if we're creating a block containing multiple variables, we want to create
the whole block at once, not just each individual variable, as we have no
way to reference individual variables in vulkan due to the requirement
for VkDescriptorSetLayoutBinding members to have different binding values
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6981>
Mike Blumenkrantz [Fri, 26 Jun 2020 19:42:49 +0000 (15:42 -0400)]
zink: always emit descriptor set 0 in ntv
the nir_variable value is only set for vulkan drivers and will always
be 0 here
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6981>
Mike Blumenkrantz [Fri, 26 Jun 2020 19:17:32 +0000 (15:17 -0400)]
zink: fix shader buffer size caps to use 65536
using max(Uniform|Storage)BufferRange yields some insane values that aren't
consistent with reality
affects PIPE_CAP_MAX_SHADER_BUFFER_SIZE and PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6981>
Mike Blumenkrantz [Fri, 26 Jun 2020 19:15:07 +0000 (15:15 -0400)]
zink: run nir_lower_uniforms_to_ubo conditionally
if a shader has no uniforms then this pass just messes with the instructions
pointlessly and forces us to need workarounds later on in ntv
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6981>
Mike Blumenkrantz [Mon, 22 Jun 2020 19:11:16 +0000 (15:11 -0400)]
zink: correctly handle ARB_arrays_of_arrays in ntv for samplers
this extension allows for array nesting with no clear limitations, so we need
to ensure that we use the "unrolled" array size in a couple places in order to
correctly bind and access these types of arrays in shaders
fixes spec@arb_separate_shader_objects@active sampler conflict and others
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6981>
Samuel Pitoiset [Thu, 1 Oct 2020 08:11:33 +0000 (10:11 +0200)]
aco/tests: add disassembler tests to reproduce the add3+clamp crash
Like some other v_add instructions, LLVM fails to disassemble
v_add3_u32 + clamp.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6961>
Samuel Pitoiset [Thu, 1 Oct 2020 08:12:44 +0000 (10:12 +0200)]
aco: apply the clamped integer addition disassembly workaround for v_add3
LLVM fails to disassemble v_add3 + clamp.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3563
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6961>
Italo Nicola [Sat, 19 Sep 2020 10:36:08 +0000 (10:36 +0000)]
pan/mdg: map uabs_i/usub to i/uabsdiff
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6823>
Italo Nicola [Wed, 23 Sep 2020 05:41:38 +0000 (05:41 +0000)]
pan/mdg: remove unused arg from ALU_CHECK_CMP and ALU_CASE_CMP
Since commit
eb28a366 there's no need for the sext parameter.
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6837>
Rhys Perry [Thu, 1 Oct 2020 18:51:38 +0000 (19:51 +0100)]
aco: fix get_buffer_resource_flags()
Looks like a rebase error. After switching to derefs, we have to look
through a nir_op_mov.
fossil-db (Navi):
Totals from 846 (0.62% of 137413) affected shaders:
SGPRs: 36856 -> 44144 (+19.77%); split: -0.20%, +19.97%
VGPRs: 35968 -> 27852 (-22.56%); split: -22.64%, +0.08%
SpillSGPRs: 1366 -> 1662 (+21.67%); split: -0.95%, +22.62%
SpillVGPRs: 1909 -> 1893 (-0.84%)
CodeSize: 5209588 -> 5146536 (-1.21%); split: -1.89%, +0.68%
Scratch: 221184 -> 217088 (-1.85%)
MaxWaves: 11488 -> 14266 (+24.18%); split: +24.20%, -0.02%
Instrs: 994831 -> 974318 (-2.06%); split: -2.53%, +0.47%
Cycles:
45719692 ->
45843260 (+0.27%); split: -0.99%, +1.26%
VMEM: 147562 -> 94468 (-35.98%); split: +9.75%, -45.74%
SMEM: 32122 -> 66023 (+105.54%); split: +120.34%, -14.80%
VClause: 41051 -> 20565 (-49.90%); split: -50.00%, +0.09%
SClause: 18076 -> 40142 (+122.07%)
Copies: 100092 -> 103521 (+3.43%); split: -0.98%, +4.40%
Branches: 51244 -> 51533 (+0.56%); split: -0.02%, +0.58%
PreSGPRs: 32290 -> 34267 (+6.12%)
PreVGPRs: 27458 -> 25290 (-7.90%); split: -7.91%, +0.01%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes:
05b6612b4ec ('radv: do not lower UBO/SSBO access to offsets')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6966>
Jason Ekstrand [Fri, 25 Sep 2020 22:43:33 +0000 (17:43 -0500)]
nir: Add a pass to lower vec3s to vec4s
LLVM loves take advantage of the fact that vec3s in OpenCL are 16B
aligned and so it can just read/write them as vec4s. This results in a
LOT of vec4->vec3 casts on loads and stores. One solution to this
problem is to get rid of all vec3 variables.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6871>
Jason Ekstrand [Fri, 25 Sep 2020 21:03:36 +0000 (16:03 -0500)]
nir/opt_deref: Add an optimization for bitcasts
LLVM loves take advantage of the fact that vec3s in OpenCL are 16B
aligned so it can just read/write them as vec4s. This is questionably
legal except that it uses a xyz write-mask when it does it. The result
is a LOT of vec4->vec3 casts on loads and stores. This optimization
detects this case as well as other bit-cast cases and rewrites them to
get rid of the cast.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6871>
Jason Ekstrand [Sat, 15 Aug 2020 16:02:46 +0000 (11:02 -0500)]
nir/opt_deref: Add an instruction type switch
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6871>
Jason Ekstrand [Fri, 25 Sep 2020 21:01:03 +0000 (16:01 -0500)]
nir: Add component mask re-interpret helpers
These are based on the ones which already existed in the load/store
vectorization pass but I made some improvements while moving them. In
particular,
1. They're both faster if the bit sizes are equal
2. The check is faster if old_bit_size > new_bit_size
3. The check now fails if it would use more than NIR_MAX_VEC_COMPONENTS
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6871>
Jason Ekstrand [Fri, 25 Sep 2020 21:29:23 +0000 (16:29 -0500)]
nir/opt_load_store_vectorize: Use bit sizes when checking mask compatibility
Without this, it was checking bit size compatibility with bit sizes such
as 96 which is clearly invalid.
No shader-db changes on Ice Lake
Fixes:
ce9205c03bd20d "nir: add a load/store vectorization pass"
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6871>
Jason Ekstrand [Fri, 25 Sep 2020 18:02:25 +0000 (13:02 -0500)]
nir: Add a memcpy optimization pass
This pass attempts to optimize three broad categories of memcpy:
1. Self-copies: These we can discard out-of-hand.
2. Vector copies: It doesn't matter what the vector size is or if the
source and destination have different vector types, it's still easy
enough to emit a load/store pair.
3. Tightly packed copies: In the case where a type is tightly packed
(no padding bits), we can replace the memcpy with a copy_deref
instruction which the optimizer is far better at handling.
This has proven capable of getting rid of many of the memcpy instances
in some rather gnarly OpenCL C kernels I've been looking at, even after
coming out of LLVM's optimizer.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6871>
Jason Ekstrand [Sat, 26 Sep 2020 04:42:08 +0000 (23:42 -0500)]
nir: Handle memcpy in copy_prop_vars and combine_stores
Fixes:
b2899f72657 "nir: Add a new memcpy intrinsic"
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6871>
Jason Ekstrand [Thu, 24 Sep 2020 18:35:52 +0000 (13:35 -0500)]
nir/find_array_copies: Properly discard copies for casts
In
9f3c595dfc4cd, we attempted to handle casts in opt_find_array_copies
but missed a critical case. In particular, in the case where we begin
finding a copy but then encounter a cast, we need to discard everything
which might alias that cast.
Fixes:
9f3c595dfc4cd "nir/find_array_copies: Handle cast derefs"
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6871>
Erik Faye-Lund [Thu, 1 Oct 2020 11:02:34 +0000 (13:02 +0200)]
gallium/util: allow scissored blits for stencil-fallback
It's also useful to be able to use scissor-testing for fallback-blits,
as an CTS test-case does just that.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6960>
Erik Faye-Lund [Thu, 1 Oct 2020 11:25:08 +0000 (13:25 +0200)]
gallium/util: fix memory-leak
When I originally wrote this code, I forgot to release the views the
code creates, leaking a bit of memory that never gets cleaned up. That's
not great, so let's plug it.
Fixes:
e8a40715a8b ("gallium/util: add blitter-support for stencil-fallback")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6960>
Philipp Zabel [Tue, 18 Aug 2020 13:28:41 +0000 (15:28 +0200)]
meson: fix power8 option
Do not throw a deprecation warning if the power8 option is set to the
new 'disabled' value. Instead, warn if it is still set to the legacy
value 'false'.
Fixes:
138c003d2273 ("meson: deprecated 'true' and 'false' in combo options for 'enabled' and 'disabled'")
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6370>
Samuel Iglesias Gonsálvez [Fri, 11 Sep 2020 10:51:21 +0000 (12:51 +0200)]
turnip: don't initialize GRAS_LRZ_CNTL/RB_LRZ_CNTL tu6_init_hw()
They will be initialized when emitting the draw state.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5146>
Samuel Iglesias Gonsálvez [Tue, 19 May 2020 15:47:58 +0000 (17:47 +0200)]
turnip: enable LRZ
v2:
* Use sub_cs when creating the IB in tu6_build_lrz(). (Jonathan Marek)
* Emit tu6_build_lrz() only when pipeline state changes or there is a
clear. (Jonathan Marek)
v3:
* Don't modify tu_pipeline object, track the changes in command buffer
state.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5146>
Samuel Iglesias Gonsálvez [Mon, 6 Jul 2020 07:24:05 +0000 (09:24 +0200)]
turnip: disable LRZ on vkCmdClearattachments() 3D fallback path
Partial clears are not supported and we may end up having LRZ enabled
from past commands.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5146>
Samuel Iglesias Gonsálvez [Thu, 9 Jul 2020 14:10:19 +0000 (16:10 +0200)]
turnip: disable LRZ on vkCmdClearAttachments()
We don't support partial clears on LRZ. Blob disables them too.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5146>
Samuel Iglesias Gonsálvez [Wed, 16 Sep 2020 13:12:56 +0000 (15:12 +0200)]
turnip: emit correct LRZ fast clear setup
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5146>
Samuel Iglesias Gonsálvez [Tue, 19 May 2020 15:50:15 +0000 (17:50 +0200)]
turnip: add support to clear LRZ
v2:
* Don't emit tu6_clear_lrz() using a IB but in the command stream
provided. (Jonathan Marek)
* Valid_clear_ib is always false if TU_DEBUG_NOLRZ is set. Remove the
useless condition. (Jonathan Marek)
* Added more comments.
* Use r2d function for blitting LRZ. (Jonathan Marek)
v3:
* Do LRZ tracking in the command buffer state (Connor).
v4:
* Simplify the emission of source setup (Jonathan Marek)
v5:
* Separate LRZ setup in a different function.
* Not hide LRZ setup inside GMEM path (Jonathan Marek)
* Fix iova address emission in tu6_clear_lrz() (Jonathan Marek)
* Add CCU sysmem flushes (Jonathan Marek)
v6:
* Fixed bug related to storing a VkClearValue pointer that could be
out-of-scope when we access to it for emitting LRZ clear.
v7:
* Merge tu6_clear_lrz() and tu6_clear_lrz_setup() into the same
function and emit LRZ clear at the beginning of the renderpass.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5146>
Samuel Iglesias Gonsálvez [Thu, 18 Jun 2020 09:04:50 +0000 (11:04 +0200)]
turnip: add LRZ valid tracking for secondary command buffers
After a secondary command buffer is executed, LRZ is not valid
until it is cleared again.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5146>
Samuel Iglesias Gonsálvez [Mon, 15 Jun 2020 07:39:36 +0000 (09:39 +0200)]
turnip: add LRZ tracking to command buffer state
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5146>
Samuel Iglesias Gonsálvez [Wed, 10 Jun 2020 07:35:59 +0000 (09:35 +0200)]
turnip: disable LRZ depending on fragment changes
Disable LRZ write if the fragment shader discard the fragments, modify
its position or if early-Z is disabled.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5146>
Samuel Iglesias Gonsálvez [Fri, 11 Sep 2020 13:16:39 +0000 (15:16 +0200)]
turnip: disable LRZ writes when blend is enabled
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5146>
Samuel Iglesias Gonsálvez [Tue, 19 May 2020 15:19:29 +0000 (17:19 +0200)]
turnip: disable LRZ on specific cases
There are depth compare op modes that are not supported by LRZ in the
HW. Also, it is not supported when blend or stencil are enabled.
v2:
* Set pipeline->lrz.write to the same value than depthWriteEnable.
* Improve comment on disabling LRZ write on blend.
* Remove pipeline's lrz invalidation when there is no clear mask in
render pass. It is confusing. (Jonathan Marek)
* Mark the pipeline state as changed.
* Add comment on not using GREATER flag.
v3:
* Replace {rb,gras}_lrz_cntl by flags in struct tu_pipeline.
* Added z_test_enable flag.
v4:
* Created struct tu_lrz_pipeline to avoid modifying immutable objects.
v5:
* Fixed crashes when pDepthStencilState pointer is NULL.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5146>
Samuel Iglesias Gonsálvez [Tue, 19 May 2020 15:37:39 +0000 (17:37 +0200)]
turnip: create LRZ buffer
v2:
- Add missing vulkan subpass support. (Jonathan Marek)
- When creating the BO, mark it as not valid until it is cleared.
- Move LRZ struct to tu_image. (Jonathan Marek)
- Destroy BO when we destroy the image. (Jonathan Marek)
v3:
- Allocate the buffer as part of the image's BO (Connor)
- Moved image's LRZ values to its layout.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5146>
Samuel Iglesias Gonsálvez [Tue, 19 May 2020 15:08:34 +0000 (17:08 +0200)]
turnip: add environment variable to disable LRZ
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5146>
Eric Anholt [Thu, 1 Oct 2020 22:16:02 +0000 (15:16 -0700)]
ci/bare-metal: Move the "POWER_GOOD not seen in time" check to the right time.
The poweron failure happens before we get to the bootloader
("load_archive: loading locale_en.bin") not after we're trying to boot the
kernel and we're waiting for the deqp run to complete.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6970>
Jason Ekstrand [Thu, 1 Oct 2020 23:39:12 +0000 (18:39 -0500)]
nir: Fix a misspelling
Fixes:
cb95065dd122a "nir: Add lowering from regular ALU conversions..."
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6975>
Timothy Arceri [Thu, 1 Oct 2020 10:23:28 +0000 (20:23 +1000)]
glsl: don't duplicate state vars as uniforms in the NIR linker
The linker was adding all state vars as uniforms, doubling the storage size
for shaders using only builtin uniforms, which increased CPU overhead for
constant buffer uploads.
When this code was originally ported from the GLSL IR linker we forgot
to exclude builtins because the check was not done in the
add_uniform_to_shader class but rather a check was done when passing
variables to this class for processing.
Fixes:
664e4a610dc8 ("glsl/nir: Fill in the Parameters in NIR linker")
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Tested-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6958>
Jonathan Marek [Thu, 1 Oct 2020 19:41:58 +0000 (15:41 -0400)]
freedreno/cffdec: fix decoding of bindless descriptors
Add ADDR suffix so that regbase() doesn't fail and return 0.
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6968>
Jason Ekstrand [Tue, 22 Sep 2020 22:42:10 +0000 (17:42 -0500)]
intel/fs: NoMask initialize the address register for shuffles
Cc: mesa-stable@lists.freedesktop.org
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2979
Tested-by: Iván Briano <ivan.briano@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6825>
Gurchetan Singh [Wed, 2 Oct 2019 01:03:11 +0000 (18:03 -0700)]
virgl: fix stride + layer_stride inconsistency
With blob resources, stride doesn't necesarily have to
equal width * bpp. The use case for this a minigbm blob
resource with blob mem BLOB_MEM_HOST3D_GUEST imported into
guest Mesa. In addition, for BLOB_MEM_HOST we can repurpose
the transfer ioctls to also flush caches if need be, so this
seems a good time to fix this issue.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4821>
Gurchetan Singh [Thu, 11 Jun 2020 18:21:36 +0000 (11:21 -0700)]
virgl: query blob mem
Resource blob also modifies resource info. Let's use this
functionality.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4821>
Gurchetan Singh [Wed, 29 Apr 2020 00:26:18 +0000 (17:26 -0700)]
virgl: support PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT
We should have GL4.5 with this. Piglit tests should now pass.
In terms of performance, we're between 70% to 80% of host
performance on Iris, based on a apitrace of a 2013 GL4.5
game:
11.204 FPS (guest)
15.947 FPS (host)
This is still better than the status quo, when said game was unplayable
with Virgl due to an inefficient GL4.3 fallback.
TEST=piglit -t arb_buffer_storage all results/ passes
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4821>
Gurchetan Singh [Wed, 29 Apr 2020 00:13:46 +0000 (17:13 -0700)]
virgl/drm: add resource create blob function
A blob resource is a container for:
- VIRTGPU_BLOB_MEM_GUEST: a guest memory allocation
(referred to as a "guest-only blob resource")
- VIRTGPU_BLOB_MEM_HOST3D: a host3d memory allocation
(referred to as a "host-only blob resource")
- VIRTGPU_BLOB_MEM_HOST3D_GUEST: a guest + host3d memory allocation
(referred to as a "default blob resource").
Blob resources can be used to implement new features and fix shortcomings
with the current resource create path. The subsequent patches how
blob resources may be leveraged to implement GL_ARB_buffer_storage
and get GL4.5.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4821>
Gurchetan Singh [Tue, 28 Apr 2020 23:54:27 +0000 (16:54 -0700)]
virgl/drm: query for resource blob and host visible memory region
Check for these features.
v2: refactor querying params in general (@shadeslayer)
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4821>
Gurchetan Singh [Tue, 28 Apr 2020 23:45:30 +0000 (16:45 -0700)]
drm-uapi: virtgpu_drm.h: resource create blob + host visible memory region
Matches current API at virgl/resource_blob. Of course, don't
submit until this lands in drm.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4821>