platform/upstream/llvm.git
4 years ago[AMDGPU] Cluster MIMG instructions
Jay Foad [Wed, 5 Feb 2020 09:52:32 +0000 (09:52 +0000)]
[AMDGPU] Cluster MIMG instructions

Differential Revision: https://reviews.llvm.org/D74035

4 years agoDbgEntityHistoryCalculator.h - reduce DebugInfoMetadata.h include to forward declarat...
Simon Pilgrim [Mon, 8 Jun 2020 12:58:11 +0000 (13:58 +0100)]
DbgEntityHistoryCalculator.h - reduce DebugInfoMetadata.h include to forward declarations. NFC.

4 years agoYAMLRemarkParser.cpp - remove duplicate RemarkParser.h include. NFC.
Simon Pilgrim [Mon, 8 Jun 2020 12:07:27 +0000 (13:07 +0100)]
YAMLRemarkParser.cpp - remove duplicate RemarkParser.h include. NFC.

This is already defined in the YAMLRemarkParser.h module header

4 years ago[lldb/DWARF] Fix PC value for artificial tail call frames for the "GNU" case
Pavel Labath [Tue, 2 Jun 2020 14:01:11 +0000 (16:01 +0200)]
[lldb/DWARF] Fix PC value for artificial tail call frames for the "GNU" case

Summary:
The way that the support for the GNU dialect of tail call frames was
implemented in D80519 meant that the were reporting very bogus PC values
which pointed into the middle of an instruction: the -1 trick is
necessary for the address to resolve to the right function, but we
should still be reporting a more realistic PC value -- I say "realistic"
and not "real", because it's very debatable what should be the correct
PC value for frames like this.

This patch achieves that my moving the -1 from SymbolFileDWARF into the
stack frame computation code. The idea is that SymbolFileDWARF will
merely report whether it has provided an address of the instruction
after the tail call, or the address of the call instruction itself. The
StackFrameList machinery uses this information to set the "behaves like
frame zero" property of the artificial frames (the main thing this flag
does is it controls the -1 subtraction when looking up the function
address).

This required a moderate refactor of the CallEdge class, because it was
implicitly assuming that edges pointing after the call were real calls
and those pointing the the call insn were tail calls. The class now
carries this information explicitly -- it carries three mostly
independent pieces of information:
- an address of interest in the caller
- a bit saying whether this address points to the call insn or after it
- whether this is a tail call

Reviewers: vsk, dblaikie

Subscribers: aprantl, mgrang, lldb-commits

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D81010

4 years ago[mlir][gpu] Fix logic error in D79508 computing number of private attributions.
Wen-Heng (Jack) Chung [Mon, 1 Jun 2020 15:48:23 +0000 (10:48 -0500)]
[mlir][gpu] Fix logic error in D79508 computing number of private attributions.

Fix logic error in D79508. The old logic would make the first check in
`GPUFuncOp::verifyBody` always pass.

4 years ago[clang-format] treat 'lock' as a keyword for C# code
Jonathan Coe [Fri, 5 Jun 2020 12:23:34 +0000 (13:23 +0100)]
[clang-format] treat 'lock' as a keyword for C# code

Summary: This will put a space in `lock (process)` when spaces are required after keywords.

Reviewers: krasimir

Reviewed By: krasimir

Subscribers: cfe-commits

Tags: #clang-format, #clang

Differential Revision: https://reviews.llvm.org/D81255

4 years ago[Preamble] Invalidate preamble when missing headers become present.
Sam McCall [Sat, 11 Apr 2020 09:02:46 +0000 (11:02 +0200)]
[Preamble] Invalidate preamble when missing headers become present.

Summary:
To avoid excessive extra stat()s, only check the possible locations of
headers that weren't found at all (leading to a compile error).
For headers that *were* found, we don't check for files earlier on the
search path that could override them.

Reviewers: kadircet

Subscribers: javed.absar, jkorous, arphaman, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D77942

4 years ago[SVE] Remove getNumElements() calls in Verifier::visitIntrinsicCall
David Sherwood [Mon, 8 Jun 2020 10:20:13 +0000 (11:20 +0100)]
[SVE] Remove getNumElements() calls in Verifier::visitIntrinsicCall

Replace getNumElements() with getElementCount() when asserting that
two types have the same element counts.

Differential Revision: https://reviews.llvm.org/D81371

4 years ago[lldb] Fix YAMLModuleTester for the rename in 67b4afc4
Pavel Labath [Mon, 8 Jun 2020 11:33:22 +0000 (13:33 +0200)]
[lldb] Fix YAMLModuleTester for the rename in 67b4afc4

4 years ago[clangd] Change ParseInputs to store FSProvider rather than VFS
Kadir Cetinkaya [Thu, 4 Jun 2020 16:26:52 +0000 (18:26 +0200)]
[clangd] Change ParseInputs to store FSProvider rather than VFS

Summary: This ensures ParseInputs provides a read-only access to FS.

Reviewers: sammccall

Subscribers: ilya-biryukov, javed.absar, MaskRay, jkorous, arphaman, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D81173

4 years ago[AArch64][SVE] Implement vector tuple intrinsics
Cullen Rhodes [Tue, 19 May 2020 12:55:53 +0000 (12:55 +0000)]
[AArch64][SVE] Implement vector tuple intrinsics

Summary:
This patch adds the following intrinsics for creating two-tuple,
three-tuple and four-tuple scalable vectors:

    * llvm.aarch64.sve.tuple.create2
    * llvm.aarch64.sve.tuple.create3
    * llvm.aarch64.sve.tuple.create4

As well as:

    * llvm.aarch64.sve.tuple.get
    * llvm.aarch64.sve.tuple.set

For extracting and inserting scalable vectors from vector tuples. These
intrinsics are intended to be used by the ACLE functions svcreate<n>,
svget and svset.

This patch also includes calling convention support for passing and
returning tuples of scalable vectors to/from functions.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D75674

4 years ago[Alignment][NFC] Migrate HandleByVal to Align
Guillaume Chatelet [Mon, 8 Jun 2020 08:48:49 +0000 (08:48 +0000)]
[Alignment][NFC] Migrate HandleByVal to Align

Summary: Note to downstream target maintainers: this might silently change the semantics of your code if you override `TargetLowering::HandleByVal` without marking it `override`.

This patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: sdardis, hiraditya, jrtc27, atanasyan, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81365

4 years agoReverte AArch64 changes to popcount test, they break most bots.
Nico Weber [Mon, 8 Jun 2020 10:48:14 +0000 (06:48 -0400)]
Reverte AArch64 changes to popcount test, they break most bots.

See http://lab.llvm.org:8011/console.

This reverts commit 0fa3a03327909a27c0ed372b46e3ef3cccd1d827.
This reverts commit 5787ad6c918a240301ba5881c939c8a565da174e.

4 years agoRevert "[clang] Implement VectorType logic not operator."
Nico Weber [Mon, 8 Jun 2020 10:45:21 +0000 (06:45 -0400)]
Revert "[clang] Implement VectorType logic not operator."

This reverts commit a0de3335edcf19305dad592d21ebe402825184f6.
Breaks check-clang on Windows, see e.g.
https://reviews.llvm.org/D80979#2078750 (but fails on all
other Windows bots too).

4 years ago[MLIR][Shape] Add support for `OpAsmInterface` in `shape.const_size`
Frederik Gossen [Mon, 8 Jun 2020 10:24:50 +0000 (10:24 +0000)]
[MLIR][Shape] Add support for `OpAsmInterface` in `shape.const_size`

The SSA values created with `shape.const_size` are now named depending on the
value.
A constant size of 3, e.g., is now automatically named `%c3`.

Differential Revision: https://reviews.llvm.org/D81249

4 years ago[AArch64] Add combine-load test; NFC
Shawn Landden [Mon, 8 Jun 2020 10:23:20 +0000 (14:23 +0400)]
[AArch64] Add combine-load test; NFC

Problem discovered in https://reviews.llvm.org/D81343

4 years agoRevert "Revert "[MLIR] Lower shape.num_elements -> shape.reduce.""
Alexander Belyaev [Mon, 8 Jun 2020 10:14:19 +0000 (12:14 +0200)]
Revert "Revert "[MLIR] Lower shape.num_elements -> shape.reduce.""

This reverts commit a25f5cd70cef6f74eed45a61c14abca98cd416e4.

Now the build with `-DBUILD_SHARED_LIBS=ON` is fixed.

4 years agoVersionTuple.h - reduce includes to forward declarations. NFC.
Simon Pilgrim [Mon, 8 Jun 2020 09:56:26 +0000 (10:56 +0100)]
VersionTuple.h - reduce includes to forward declarations. NFC.

4 years agoRecognize *.hxx as a C++ header extension, like *.hpp.
Sam McCall [Mon, 8 Jun 2020 08:55:10 +0000 (10:55 +0200)]
Recognize *.hxx as a C++ header extension, like *.hpp.

Reviewers: kadircet

Subscribers: cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D81366

4 years ago[ELF] Adding accessor method for getting Note Desc as StringRef
Dineshkumar Bhaskaran [Mon, 8 Jun 2020 09:42:02 +0000 (09:42 +0000)]
[ELF] Adding accessor method for getting Note Desc as StringRef

Summary: One more way to access note desc.

Reviewers: arsenm, scott.linder, saiislam

Reviewed By: scott.linder

Subscribers: wdng, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81185

4 years ago[VE] Support control instructions in MC layer
Kazushi (Jam) Marukawa [Mon, 8 Jun 2020 09:41:41 +0000 (11:41 +0200)]
[VE] Support control instructions in MC layer

Summary:
Add regression tests of asmparser, mccodeemitter, and disassembler for
control instructions.  Add not defined LPM/SPM/LFR/SFR/SMIR/NOP/LCR/
SCR/TSCR/FIDCR control isntructions newly.  Define MISC registers which
SMIR instruction reads and IC register which SIC instruction reads.
Change asmparser to support Zero, UImm3, and UImm6 operands and MISC
registers.  Change instprinter to support MISC registers also.
Change to use auto to receive dyn_cast also.

Differential Revision: https://reviews.llvm.org/D81370

4 years ago[CodeGen][SVE] CopyToReg: Split scalable EVTs that are not powers of 2
Sander de Smalen [Fri, 5 Jun 2020 17:29:43 +0000 (18:29 +0100)]
[CodeGen][SVE] CopyToReg: Split scalable EVTs that are not powers of 2

Scalable vectors cannot use 'BUILD_VECTOR', so it is necessary to
properly split and widen scalable vectors when passing them
to CopyToReg/CopyFromReg.

This functionality is added to TargetLoweringBase::getVectorTypeBreakdown().

This patch only adds support for 'splitting' scalable vectors that
are a multiple of some legal type, e.g.

      <vscale x 6 x i64> -> 3 x <vscale x 2 x i64>

Reviewers: efriedma, c-rhodes

Reviewed By: efriedma

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80139

4 years ago[MLIR] Add `to/from_extent_tensor` lowering to the standard dialect
Frederik Gossen [Mon, 8 Jun 2020 09:37:43 +0000 (09:37 +0000)]
[MLIR] Add `to/from_extent_tensor` lowering to the standard dialect

The operations `to_extent_tensor` and `from_extent_tensor` become no-ops when
lowered to the standard dialect.
This is possible with a lowering from `shape.shape` to `tensor<?xindex>`.

Differential Revision: https://reviews.llvm.org/D81162

4 years ago[MLIR] Add type conversion for `shape.shape`
Frederik Gossen [Mon, 8 Jun 2020 09:33:24 +0000 (09:33 +0000)]
[MLIR] Add type conversion for `shape.shape`

Convert `shape.shape` to `tensor<?xindex>` when lowering the `shape` to the
`std` dialect.

Differential Revision: https://reviews.llvm.org/D81161

4 years ago[DWARFYAML] Rename function names to match the coding style. NFC.
Xing GUO [Mon, 8 Jun 2020 09:30:23 +0000 (17:30 +0800)]
[DWARFYAML] Rename function names to match the coding style. NFC.

4 years ago[AArch64] update popcount pre-patch test, take 2; NFC
Shawn Landden [Mon, 8 Jun 2020 09:16:26 +0000 (13:16 +0400)]
[AArch64] update popcount pre-patch test, take 2; NFC

accidentally pushed the post-patch test results

The change from before is the use of -O0 to see better what changed

4 years ago[AArch64] update popcount pre-patch test; NFC
Shawn Landden [Mon, 8 Jun 2020 09:12:47 +0000 (13:12 +0400)]
[AArch64] update popcount pre-patch test; NFC

4 years ago[MLIR] Clean up `shape` to `std` lowering
Frederik Gossen [Mon, 8 Jun 2020 08:58:06 +0000 (08:58 +0000)]
[MLIR] Clean up `shape` to `std` lowering

Apply post-commit suggestions to the new lowering.

Differential Revision: https://reviews.llvm.org/D81160

4 years ago[NFC][PowerPC] Modify the test case to test RM
Kang Zhang [Mon, 8 Jun 2020 08:55:31 +0000 (08:55 +0000)]
[NFC][PowerPC] Modify the test case to test RM

4 years agoRevert "[KernelAddressSanitizer] Make globals constructors compatible with kernel"
Marco Elver [Mon, 8 Jun 2020 08:30:50 +0000 (10:30 +0200)]
Revert "[KernelAddressSanitizer] Make globals constructors compatible with kernel"

This reverts commit 866ee2353f7d0224644799d0d1faed53c7f3a06d.

Building the kernel results in modpost failures due to modpost relying
on debug info and inspecting kernel modules' globals:
https://github.com/ClangBuiltLinux/linux/issues/1045#issuecomment-640381783

4 years ago[lldb] Disable remove-add module test on Windows
Jaroslav Sevcik [Mon, 8 Jun 2020 07:41:48 +0000 (07:41 +0000)]
[lldb] Disable remove-add module test on Windows

This disables the test introduced by
https://github.com/llvm/llvm-project/commit/1beffc18886ae4cd72dfe1f9b6b79204cac51e5e
on Windows.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D81363

4 years ago[VE] Support shift operation instructions in MC layer
Kazushi (Jam) Marukawa [Mon, 8 Jun 2020 08:19:04 +0000 (10:19 +0200)]
[VE] Support shift operation instructions in MC layer

Summary:
Add regression tests of asmparser, mccodeemitter, and disassembler for
shift operation instructions. Also change asmparser to support UImm7
operand. And, add new SLD/SRD/SLA instructions also.

Differential Revision: https://reviews.llvm.org/D81324

4 years ago[PPC] Try to fix builbots
Sam Parker [Mon, 8 Jun 2020 08:11:08 +0000 (09:11 +0100)]
[PPC] Try to fix builbots

Attempt to handle unsupported types, such as structs, in
getMemoryOpCost. The backend now checks for a supported type and
calls into BasicTTI as a fallback. BasicTTI will now also perform
the same check and will default to an expensive cost of 4 for 'Other'
MVTs.

Differential Revision: https://reviews.llvm.org/D80984

4 years agoRevert "Revert "[mlir] Folding and canonicalization of shape.cstr_eq""
Tres Popp [Mon, 8 Jun 2020 08:03:15 +0000 (10:03 +0200)]
Revert "Revert "[mlir] Folding and canonicalization of shape.cstr_eq""

This reverts commit 12e31f6e407ff98ce431b19a492721d19711d0a0.

4 years agoRevert "Revert "[mlir] Canonicalization and folding of shape.cstr_broadcastable""
Tres Popp [Mon, 8 Jun 2020 08:03:05 +0000 (10:03 +0200)]
Revert "Revert "[mlir] Canonicalization and folding of shape.cstr_broadcastable""

This reverts commit 4261b026ad5b97231be25f28fe2b0f8a84d82d13.

4 years ago[mlir] Restructure Shape dialect's CMakeLists.
Tres Popp [Sat, 6 Jun 2020 08:17:58 +0000 (10:17 +0200)]
[mlir] Restructure Shape dialect's CMakeLists.

Now targets are only built with files in the same directory.

Differential Revision: https://reviews.llvm.org/D81328

4 years ago[mlir] Introduce allowMemrefFunctionResults for the helper operation converters of...
Ehsan Toosi [Tue, 2 Jun 2020 16:12:57 +0000 (18:12 +0200)]
[mlir] Introduce allowMemrefFunctionResults for the helper operation converters of buffer placement

This parameter gives the developers the freedom to choose their desired function
signature conversion for preparing their functions for buffer placement. It is
introduced for BufferAssignmentFuncOpConverter, and also for
BufferAssignmentReturnOpConverter, and BufferAssignmentCallOpConverter to adapt
the return and call operations with the selected function signature conversion.
If the parameter is set, buffer placement won't also deallocate the returned
buffers.

Differential Revision: https://reviews.llvm.org/D81137

4 years ago[Alignment][NFC] Migrate the rest of backends
Guillaume Chatelet [Fri, 5 Jun 2020 16:51:33 +0000 (16:51 +0000)]
[Alignment][NFC] Migrate the rest of backends

Summary: This is a followup on D81196

Reviewers: courbet

Subscribers: arsenm, dschuff, jyknight, dylanmckay, sdardis, nemanjai, jvesely, nhaehnle, sbc100, jgravelle-google, hiraditya, aheejin, kbarton, fedor.sergeev, asb, rbar, johnrusso, simoncook, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, Jim, lenary, s.egerton, pzheng, sameer.abuasal, apazos, luismarques, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81278

4 years ago[Alignment][NFC] Migrate part of Arm/AArch64 backend
Guillaume Chatelet [Fri, 5 Jun 2020 16:04:42 +0000 (16:04 +0000)]
[Alignment][NFC] Migrate part of Arm/AArch64 backend

Summary: Follow up on D81196

Reviewers: courbet

Subscribers: kristof.beyls, hiraditya, danielkiss, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81274

4 years ago[ARM][XO] Execute-only miscompiles double literals for big-endian
Simon Wallis [Mon, 8 Jun 2020 07:10:42 +0000 (08:10 +0100)]
[ARM][XO] Execute-only miscompiles double literals for big-endian

Summary:
With -mbig-endian -mexecute-only and targeting an fpu,
an incorrect sequence of movw/movt was generated to construct a double literal.
The test suite was hardwired to check these wrong values.

The fault was caused by the explicit word swap in LowerConstantFP().

With -mbig-endian -mexecute-only -mfpu=none, a correct sequence of
movw/movt is generated to construct a double literal.
The test suite did not test this no fpu case.

The test suite expected values have been corrected.
The test file is updated to add testing of fpu=none case

Reviewers: christof, llvm-commits, dmgreen

Reviewed By: dmgreen

Subscribers: dmgreen, kristof.beyls, hiraditya, danielkiss

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81259

Change-Id: Ia3737df243218c89c82f02b7f9f4032ecd5a3917

4 years ago[Alignment][NFC] Migrate CallingConv tablegen code
Guillaume Chatelet [Fri, 5 Jun 2020 15:58:20 +0000 (15:58 +0000)]
[Alignment][NFC] Migrate CallingConv tablegen code

Summary: This is a follow up on D81196, fixing one more call site.

Reviewers: courbet

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81268

4 years ago[Test] Add test showing InstCombine missing simplification opportunity
Max Kazantsev [Mon, 8 Jun 2020 06:17:54 +0000 (13:17 +0700)]
[Test] Add test showing InstCombine missing simplification opportunity

4 years ago[X86] Support load shrinking for strict fp nodes in combineCVTPH2PS
Craig Topper [Mon, 8 Jun 2020 03:14:40 +0000 (20:14 -0700)]
[X86] Support load shrinking for strict fp nodes in combineCVTPH2PS

4 years ago[NFC] Remove the extra ; to avoid the warning of build compiler
QingShan Zhang [Mon, 8 Jun 2020 03:51:05 +0000 (03:51 +0000)]
[NFC] Remove the extra ; to avoid the warning of build compiler

4 years ago[PowerPC] Do not assume operand of ADDI is an immediate
Nemanja Ivanovic [Mon, 8 Jun 2020 03:16:35 +0000 (22:16 -0500)]
[PowerPC] Do not assume operand of ADDI is an immediate

After pseudo-expansion, we may end up with ADDI (add immediate)
instructions where the operand is not an immediate but a relocation.
For such instructions, attempts to get the immediate result in
assertion failures for obvious reasons.

Fixes: https://bugs.llvm.org/show_bug.cgi?id=45432

4 years ago[X86] Improve (vzmovl (insert_subvector)) combine to handle a bitcast between the...
Craig Topper [Mon, 8 Jun 2020 01:55:33 +0000 (18:55 -0700)]
[X86] Improve (vzmovl (insert_subvector)) combine to handle a bitcast between the vzmovl and insert

This combine tries shrink a vzmovl if its input is an
insert_subvector. This patch improves it to turn
(vzmovl (bitcast (insert_subvector))) into
(insert_subvector (vzmovl (bitcast))) potentially allowing the
bitcast to be folded with a load.

4 years ago[X86] Teach combineCVTP2I_CVTTP2I to handle STRICT_CVTTP2SI/STRICT_CVTTP2UI
Craig Topper [Mon, 8 Jun 2020 01:28:31 +0000 (18:28 -0700)]
[X86] Teach combineCVTP2I_CVTTP2I to handle STRICT_CVTTP2SI/STRICT_CVTTP2UI

Allows us to shrink 128-bit simple load to enable folding for
v2f32->v2i64 vcvttps2qq/vcvttps2uqq.

4 years ago[Power9] Add addi post-ra scheduling heuristic
QingShan Zhang [Mon, 8 Jun 2020 01:31:07 +0000 (01:31 +0000)]
[Power9] Add addi post-ra scheduling heuristic

The instruction addi is usually used to post increase the loop indvar, which looks like this:

label_X:
 load x, base(i)
 ...
 y = op x
 ...
 i = addi i, 1
 goto label_X

However, for PowerPC, if there are too many vsx instructions that between y = op x and  i = addi i, 1,
it will use all the hw resource that block the execution of i = addi, i, 1, which result in the stall
of the load instruction in next iteration. So, a heuristic is added to move the addi as early as possible
to have the load hide the latency of vsx instructions, if other heuristic didn't apply to avoid the starve.

Reviewed By: jji

Differential Revision: https://reviews.llvm.org/D80269

4 years ago[clang] Implement VectorType logic not operator.
Jun Ma [Fri, 5 Jun 2020 01:40:30 +0000 (09:40 +0800)]
[clang] Implement VectorType logic not operator.

Differential Revision: https://reviews.llvm.org/D80979

4 years ago[X86] Don't scalarize v2f32->v2i64 strict_fp_to_sint/uint with avx512dq and not avx512vl.
Craig Topper [Sun, 7 Jun 2020 21:44:17 +0000 (14:44 -0700)]
[X86] Don't scalarize v2f32->v2i64 strict_fp_to_sint/uint with avx512dq and not avx512vl.

We can pad the v2f32 with 0s up to v8f32 and use a v8f32->v8i64
operation. This is what we end up with on non-strict nodes except
we don't pad with 0s since we don't care about exceptions.

4 years agoSmallPtrSet::find -> SmallPtrSet::count
Benjamin Kramer [Sun, 7 Jun 2020 20:36:10 +0000 (22:36 +0200)]
SmallPtrSet::find -> SmallPtrSet::count

The latter is more readable and more efficient. While there clean up
some double lookups. NFCI.

4 years agoReland D80966 [codeview] Put !heapallocsite on calls to operator new
Fangrui Song [Sun, 7 Jun 2020 20:35:01 +0000 (13:35 -0700)]
Reland D80966 [codeview] Put !heapallocsite on calls to operator new

With a change to use `CGM.getCodeGenOpts().getDebugInfo() != codegenoptions::NoDebugInfo`
instead of `getDebugInfo()`,
to fix `Profile-<arch> :: instrprof-gcov-multithread_fork.test`

See CodeGenModule::CodeGenModule, `EmitGcovArcs || EmitGcovNotes` can
set `clang::CodeGen::CodeGenModule::DebugInfo`.

---

Clang marks calls to operator new as heap allocation sites, but the
operator declared at global scope returns a void pointer. There is no
explicit cast in the code, so the compiler has to write down the
allocated type itself.

Also generalize a cast to use CallBase, so that we mark heap alloc sites
when exceptions are enabled.

Differential Revision: https://reviews.llvm.org/D80966

4 years ago[X86][AVX2] combineSetCCMOVMSK - handle all_of patterns for PMOVMSKB(PACKSSBW(LO...
Simon Pilgrim [Sun, 7 Jun 2020 20:08:35 +0000 (21:08 +0100)]
[X86][AVX2] combineSetCCMOVMSK - handle all_of patterns for PMOVMSKB(PACKSSBW(LO(X), HI(X)))

In the sign splat case, we can fold PMOVMSKB(PACKSSBW(LO(X), HI(X))) -> PMOVMSKB(BITCAST_v32i8(X)) without introducing a signmask + comparison (which unlike for any_of won't fold into a single TEST).

4 years agoRevert "[MLIR] Lower shape.num_elements -> shape.reduce."
Mehdi Amini [Sun, 7 Jun 2020 19:32:36 +0000 (19:32 +0000)]
Revert "[MLIR] Lower shape.num_elements -> shape.reduce."

This reverts commit e80617df894b00d12d5afb9d819e6ff9141cc29e.

This broke the build with `-DBUILD_SHARED_LIBS=ON`

4 years ago[Driver] Omit -mthread-model posix which is the CC1 default
Fangrui Song [Sun, 7 Jun 2020 19:27:11 +0000 (12:27 -0700)]
[Driver] Omit -mthread-model posix which is the CC1 default

4 years ago[gcov] Support .gcno/.gcda in gcov 8, 9 or 10 compatible formats
Fangrui Song [Sun, 7 Jun 2020 18:25:40 +0000 (11:25 -0700)]
[gcov] Support .gcno/.gcda in gcov 8, 9 or 10 compatible formats

4 years ago[Driver] Simplify code. NFCI.
Benjamin Kramer [Sun, 7 Jun 2020 18:12:52 +0000 (20:12 +0200)]
[Driver] Simplify code. NFCI.

4 years agoAdd cl::ZeroOrMore to get around build system issues
AK [Sun, 7 Jun 2020 17:14:22 +0000 (10:14 -0700)]
Add cl::ZeroOrMore to get around build system issues

It is quite common to get multiple instances of optimization flags while building.
The following optimizations does not have cl::ZeroOrMore which causes errors during the build.

Reviewers: alexbdv,spop

Differential Revision: https://reviews.llvm.org/D81187

4 years ago[NFC][PowerPC] Add a new case to test ctrloop for fp128
Kang Zhang [Sun, 7 Jun 2020 16:35:32 +0000 (16:35 +0000)]
[NFC][PowerPC] Add a new case to test ctrloop for fp128

4 years ago[gcov] Fix instrprof-gcov-__gcov_flush-terminate.test
Fangrui Song [Sun, 7 Jun 2020 16:31:48 +0000 (09:31 -0700)]
[gcov] Fix instrprof-gcov-__gcov_flush-terminate.test

4 years agoCFG.h - reduce includes to forward declarations. NFC.
Simon Pilgrim [Sun, 7 Jun 2020 16:25:35 +0000 (17:25 +0100)]
CFG.h - reduce includes to forward declarations. NFC.

4 years agoUnbreak the build
Benjamin Kramer [Sun, 7 Jun 2020 16:17:21 +0000 (18:17 +0200)]
Unbreak the build

4 years agoTry to make msvc crash less
Benjamin Kramer [Sun, 7 Jun 2020 16:06:03 +0000 (18:06 +0200)]
Try to make msvc crash less

llvm-project\clang\lib\Driver\Types.cpp(44): fatal error C1001: An internal error has occurred in the compiler.
(compiler file 'msc1.cpp', line 1518)

4 years agoDomTreeUpdater.h - refine includes. NFC.
Simon Pilgrim [Sun, 7 Jun 2020 15:56:09 +0000 (16:56 +0100)]
DomTreeUpdater.h - refine includes. NFC.

We don't need any of its defs or many of its includes inside PostDominators.h - so split it and reduce the frontend load.

4 years ago[gcov][test] Delete UNSUPPORTED: host-byteorder-big-endian from test/profile tests
Fangrui Song [Sun, 7 Jun 2020 15:40:03 +0000 (08:40 -0700)]
[gcov][test] Delete UNSUPPORTED: host-byteorder-big-endian from test/profile tests

It seems that after dc52ce424bb1818b3270e20927447bf17e062e66, all big-endian problems have been fixed.

01899bb4e41178af6f4cf7b32833e661fe1e3322 seems to have fixed XFAIL: * of
profile/instrprof-gcov-__gcov_flush-terminate.test

This essentially reverts commit 5a9b792d7251e19f69f96c9619cde49497c79a07 and
93d5ae3af18f3e5d4232510274d59c1b4e5b8e77.

4 years agoPut back definitions. We're still not C++17 :/
Benjamin Kramer [Sun, 7 Jun 2020 15:41:02 +0000 (17:41 +0200)]
Put back definitions. We're still not C++17 :/

4 years agoPut compilation phases from Types.def into a bit set
Benjamin Kramer [Sun, 7 Jun 2020 15:21:29 +0000 (17:21 +0200)]
Put compilation phases from Types.def into a bit set

This avoids a global constructor and is a bit more efficient for
"contained" queries. No functionality change intended.

4 years agoRemove global std::string. StringRef is sufficient. NFC.
Benjamin Kramer [Sun, 7 Jun 2020 15:15:31 +0000 (17:15 +0200)]
Remove global std::string. StringRef is sufficient. NFC.

4 years ago[AArch64] add test for large popcount; NFC
Shawn Landden [Sun, 7 Jun 2020 14:27:26 +0000 (18:27 +0400)]
[AArch64] add test for large popcount; NFC

4 years ago[Docs] fix typos for llvm-mca; NFC
Sanjay Patel [Sun, 7 Jun 2020 15:13:50 +0000 (11:13 -0400)]
[Docs] fix typos for llvm-mca; NFC

4 years ago[X86][SSE] combineSetCCMOVMSK - add initial support for allof patterns.
Simon Pilgrim [Sun, 7 Jun 2020 14:59:12 +0000 (15:59 +0100)]
[X86][SSE] combineSetCCMOVMSK - add initial support for allof patterns.

Handle MOVMSK 'allof' comparisons (X86ISD::SUB X, AllBitsMask) as well as 'anyof' patterns.

This allows us to handle these patterns in the MOVMSK(BITCAST(X)) pattern to fix PR37087.

4 years ago[llvm-cov] Fix gcov version detection on big-endian
Fangrui Song [Sun, 7 Jun 2020 15:05:44 +0000 (08:05 -0700)]
[llvm-cov] Fix gcov version detection on big-endian

4 years ago[ObjectYAML][test] Address comments in D80203
Xing GUO [Sun, 7 Jun 2020 14:55:07 +0000 (22:55 +0800)]
[ObjectYAML][test] Address comments in D80203

This patch addresses comments in [D80203](https://reviews.llvm.org/D80203?vs=on&id=266415&whitespace=ignore-most#2062287)

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D80862

4 years ago[DWARFYAML][debug_ranges] Fix inappropriate assertion. NFC.
Xing GUO [Sun, 7 Jun 2020 14:43:37 +0000 (22:43 +0800)]
[DWARFYAML][debug_ranges] Fix inappropriate assertion. NFC.

4 years ago[MLIR] Lower shape.num_elements -> shape.reduce.
Alexander Belyaev [Sun, 7 Jun 2020 14:25:11 +0000 (16:25 +0200)]
[MLIR] Lower shape.num_elements -> shape.reduce.

Differential Revision: https://reviews.llvm.org/D81279

4 years ago[mlir] Add verifier for `shape.yield`.
Alexander Belyaev [Fri, 5 Jun 2020 15:01:43 +0000 (17:01 +0200)]
[mlir] Add verifier for `shape.yield`.

Differential Revision: https://reviews.llvm.org/D81262

4 years ago[InstCombine] fold mask op into casted shift (PR46013)
Sanjay Patel [Sun, 7 Jun 2020 13:03:45 +0000 (09:03 -0400)]
[InstCombine] fold mask op into casted shift (PR46013)

https://rise4fun.com/Alive/Qply8

  Pre: C2 == (-1 u>> zext(C1))
  %a = ashr %x, C1
  %s = sext %a to i16
  %r = and i16 %s, C2
    =>
  %s2 = sext %x to i16
  %r = lshr i16 %s2, zext(C1)

https://bugs.llvm.org/show_bug.cgi?id=46013

4 years ago[InstCombine] add tests for bitmask of casted shift; NFC (PR46013)
Sanjay Patel [Sat, 6 Jun 2020 14:53:45 +0000 (10:53 -0400)]
[InstCombine] add tests for bitmask of casted shift; NFC (PR46013)

4 years ago[clang][BFloat] Add reinterpret cast intrinsics
Ties Stuij [Sun, 7 Jun 2020 12:45:16 +0000 (13:45 +0100)]
[clang][BFloat] Add reinterpret cast intrinsics

Summary:
This patch is part of a series implementing the Bfloat16 extension of the
Armv8.6-a architecture, as detailed here:

https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/arm-architecture-developments-armv8-6-a

The bfloat type, and its properties is specified in the Arm C language
extension specification:

https://developer.arm.com/docs/ihi0055/d/procedure-call-standard-for-the-arm-64-bit-architecture

Subscribers: kristof.beyls, ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D79869

The following people contributed to this patch:

- Luke Cheeseman
- Alexandros Lamprineas
- Luke Geeson
- Ties Stuij

4 years agoAlignmentFromAssumptions.h - reduce includes to forward declarations. NFC.
Simon Pilgrim [Sun, 7 Jun 2020 12:51:48 +0000 (13:51 +0100)]
AlignmentFromAssumptions.h - reduce includes to forward declarations. NFC.

4 years agoMemorySSAUpdater.h - reduce includes to forward declarations. NFC.
Simon Pilgrim [Sun, 7 Jun 2020 12:16:31 +0000 (13:16 +0100)]
MemorySSAUpdater.h - reduce includes to forward declarations. NFC.

4 years agoDependenceAnalysis.h - reduce AliasAnalysis.h include to forward declaration. NFC.
Simon Pilgrim [Sun, 7 Jun 2020 11:47:37 +0000 (12:47 +0100)]
DependenceAnalysis.h - reduce AliasAnalysis.h include to forward declaration. NFC.

This requires the replacement of legacy class AliasAnalysis usages with AAResults (which it typedefs to anyhow)

4 years agoMustExecute.h - remove unnecessary Instruction.h include. NFC.
Simon Pilgrim [Sun, 7 Jun 2020 11:10:50 +0000 (12:10 +0100)]
MustExecute.h - remove unnecessary Instruction.h include. NFC.

We already have the Instruction forward declaration.

4 years agoObjCARCAnalysisUtils.h - remove unused LLVMContext.h include. NFC.
Simon Pilgrim [Sun, 7 Jun 2020 10:48:46 +0000 (11:48 +0100)]
ObjCARCAnalysisUtils.h - remove unused LLVMContext.h include. NFC.

4 years agoOrderedInstructions.h - reduce includes to forward declarations. NFC.
Simon Pilgrim [Sun, 7 Jun 2020 10:44:27 +0000 (11:44 +0100)]
OrderedInstructions.h - reduce includes to forward declarations. NFC.

4 years ago[X86][SSE] Extend ICMP(MOVMSK(BITCAST(X))) tests to allof patterns as well as the...
Simon Pilgrim [Sun, 7 Jun 2020 10:43:41 +0000 (11:43 +0100)]
[X86][SSE] Extend ICMP(MOVMSK(BITCAST(X))) tests to allof patterns as well as the existing noneof/anyof patterns.

4 years ago[X86][SSE] Attempt to widen MOVMSK vector input if the signbits are splatted.
Simon Pilgrim [Sun, 7 Jun 2020 10:19:45 +0000 (11:19 +0100)]
[X86][SSE] Attempt to widen MOVMSK vector input if the signbits are splatted.

As shown on PR37087, if we have a MOVMSK(BICAST(X)) from a wider vector, then by using MOVMSK from the wider type (32/64-bit elements) we can improve the chances of further combines with SimplifyDemandedBits/Elts and on some targets (skylake) can be more efficient.

4 years ago[Matrix] Implement * binary operator for MatrixType.
Florian Hahn [Sun, 7 Jun 2020 10:11:27 +0000 (11:11 +0100)]
[Matrix] Implement * binary operator for MatrixType.

This patch implements the * binary operator for values of
MatrixType. It adds support for matrix * matrix, scalar * matrix and
matrix * scalar.

For the matrix, matrix case, the number of columns of the first operand
must match the number of rows of the second. For the scalar,matrix variants,
the element type of the matrix must match the scalar type.

Reviewers: rjmccall, anemet, Bigcheese, rsmith, martong

Reviewed By: rjmccall

Differential Revision: https://reviews.llvm.org/D76794

4 years agoSupport build-ids of other sizes than 16 in UUID::SetFromStringRef
Jaroslav Sevcik [Mon, 1 Jun 2020 20:43:18 +0000 (20:43 +0000)]
Support build-ids of other sizes than 16 in UUID::SetFromStringRef

SBTarget::AddModule currently handles the UUID parameter in a very
weird way: UUIDs with more than 16 bytes are trimmed to 16 bytes. On
the other hand, shorter-than-16-bytes UUIDs are completely ignored. In
this patch, we change the parsing code to handle UUIDs of arbitrary
size.

To support arbitrary size UUIDs in SBTarget::AddModule, this patch
changes UUID::SetFromStringRef to parse UUIDs of arbitrary length. We
subtly change the semantics of SetFromStringRef - SetFromStringRef now
only succeeds if the entire input is consumed to prevent some
prefix-parsing confusion. This is up for discussion, but I believe
this is more consistent - we always return false for invalid UUIDs
rather than sometimes truncating to a valid prefix. Also, all the
call-sites except the API and interpreter seem to expect to consume
the entire input.

This also adds tests for adding existing modules 4-, 16-, and 20-byte
build-ids. Finally, we took the liberty of testing the minidump
scenario we care about - removing placeholder module from minidump and
replacing it with the real module.

Reviewed By: labath, friss

Differential Revision: https://reviews.llvm.org/D80755

4 years ago[X86][SSE] Add MOVMSK tests where we're using a more narrow vector elements than...
Simon Pilgrim [Sun, 7 Jun 2020 09:48:11 +0000 (10:48 +0100)]
[X86][SSE] Add MOVMSK tests where we're using a more narrow vector elements than necessary

First step towards fixing PR37087

4 years ago[ObjectYAML][DWARF] Support emitting .debug_ranges section in ELFYAML.
Xing GUO [Sun, 7 Jun 2020 07:47:14 +0000 (15:47 +0800)]
[ObjectYAML][DWARF] Support emitting .debug_ranges section in ELFYAML.

This patch enables yaml2elf to emit the .debug_ranges section.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D81217

4 years ago[gcov] Improve tests and lower the minimum supported version to gcov 3.4
Fangrui Song [Sun, 7 Jun 2020 06:11:31 +0000 (23:11 -0700)]
[gcov] Improve tests and lower the minimum supported version to gcov 3.4

global-ctor.ll no longer checks what it intended to check
(@_GLOBAL__sub_I_global-ctor.ll needs a !dbg to work).
Rewrite it.

gcov 3.4 and gcov 4.2 use the same format, thus we can lower the version
requirement to 3.4

4 years ago[gcov] Delete unneeded code
Fangrui Song [Sun, 7 Jun 2020 03:36:46 +0000 (20:36 -0700)]
[gcov] Delete unneeded code

4 years agoSimplify MachineVerifier's block-successor verification.
James Y Knight [Tue, 12 May 2020 14:36:34 +0000 (10:36 -0400)]
Simplify MachineVerifier's block-successor verification.

There's two properties we want to verify:

1. That the successors returned by analyzeBranch are in the CFG
   successor list, and
2. That there are no extraneous successors are in the CFG successor
   list.

The previous implementation mostly accomplished this, but in a very
convoluted manner.

Differential Revision: https://reviews.llvm.org/D79793

4 years agoMachineBasicBlock::updateTerminator now requires an explicit layout successor.
James Y Knight [Wed, 19 Feb 2020 15:41:28 +0000 (10:41 -0500)]
MachineBasicBlock::updateTerminator now requires an explicit layout successor.

Previously, it tried to infer the correct destination block from the
successor list, but this is a rather tricky propspect, given the
existence of successors that occur mid-block, such as invoke, and
potentially in the future, callbr/INLINEASM_BR. (INLINEASM_BR, in
particular would be problematic, because its successor blocks are not
distinct from "normal" successors, as EHPads are.)

Instead, require the caller to pass in the expected fallthrough
successor explicitly. In most callers, the correct block is
immediately clear. But, in MachineBlockPlacement, we do need to record
the original ordering, before starting to reorder blocks.

Unfortunately, the goal of decoupling the behavior of end-of-block
jumps from the successor list has not been fully accomplished in this
patch, as there is currently no other way to determine whether a block
is intended to fall-through, or end as unreachable. Further work is
needed there.

Differential Revision: https://reviews.llvm.org/D79605

4 years ago[RISCV] Fix a typo in RISCVISelLowering.cpp
Ben Shi [Sun, 7 Jun 2020 01:40:59 +0000 (18:40 -0700)]
[RISCV] Fix a typo in RISCVISelLowering.cpp

The 9th parameter of "static bool CC_RISCV(...)" is isFixed, not isRet.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D81333

4 years ago[LIT] NFC adding max-failures option to lit documentation.
Mike Edwards [Sat, 6 Jun 2020 23:53:58 +0000 (16:53 -0700)]
[LIT] NFC adding max-failures option to lit documentation.

Differential Revision: https://reviews.llvm.org/D81337

4 years ago[X86] Correct some isel patterns for v1i1 KNOT/KANDN/KXNOR.
Craig Topper [Sun, 7 Jun 2020 00:24:06 +0000 (17:24 -0700)]
[X86] Correct some isel patterns for v1i1 KNOT/KANDN/KXNOR.

The KNOT pattern was missing. The others were
looking for a v1i1 -1 instead of a vector all ones.

4 years agoRevert "[codeview] Put !heapallocsite on calls to operator new"
Douglas Yung [Sat, 6 Jun 2020 23:30:46 +0000 (23:30 +0000)]
Revert "[codeview] Put !heapallocsite on calls to operator new"

This reverts commit 672ed5386024ba5cee53e19d637b7920a4889837.

This commit is hitting an assertion failure across multiple bots in the test:
Profile-<arch> :: instrprof-gcov-multithread_fork.test

Failing bots include:
http://lab.llvm.org:8011/builders/llvm-avr-linux/builds/2205
http://lab.llvm.org:8011/builders/clang-cmake-aarch64-lld/builds/8967
http://lab.llvm.org:8011/builders/clang-cmake-armv7-full/builds/10789
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux/builds/27750
http://lab.llvm.org:8011/builders/sanitizer-ppc64be-linux/builds/16751

4 years ago[lldb] [nfc] Fix comment in testcase DW_TAG_variable-DW_AT_const_value.s
Jan Kratochvil [Sat, 6 Jun 2020 21:31:30 +0000 (23:31 +0200)]
[lldb] [nfc] Fix comment in testcase DW_TAG_variable-DW_AT_const_value.s