Sam McCall [Wed, 10 Oct 2018 07:46:15 +0000 (07:46 +0000)]
[clangd] Make FSProvider const-correct. NFC
llvm-svn: 344118
Craig Topper [Wed, 10 Oct 2018 07:43:45 +0000 (07:43 +0000)]
[X86] Remove FeatureRTM from Skylake processor list
Summary:
There are a LOT of Skylakes and later without TSX-NI. Examples:
- SKL: https://ark.intel.com/products/136863/Intel-Core-i3-8121U-Processor-4M-Cache-up-to-3-20-GHz-
- KBL: https://ark.intel.com/products/97540/Intel-Core-i7-7560U-Processor-4M-Cache-up-to-3-80-GHz-
- KBL-R: https://ark.intel.com/products/149091/Intel-Core-i7-8565U-Processor-8M-Cache-up-to-4-60-GHz-
- CNL: https://ark.intel.com/products/136863/Intel-Core-i3-8121U-Processor-4M-Cache-up-to-3_20-GHz
This feature seems to be present only on high-end desktop and server
chips (I can't find any SKX without). This commit leaves it disabled
for all processors, but can be re-enabled for specific builds with
-mrtm.
Matches https://reviews.llvm.org/D53041
Patch by Thiago Macieira
Reviewers: erichkeane, craig.topper
Reviewed By: craig.topper
Subscribers: lebedev.ri, cfe-commits
Differential Revision: https://reviews.llvm.org/D53042
llvm-svn: 344117
Craig Topper [Wed, 10 Oct 2018 07:43:35 +0000 (07:43 +0000)]
[X86] Remove FeatureRTM from Skylake processor list
Summary:
There are a LOT of Skylakes and later without TSX-NI. Examples:
- SKL: https://ark.intel.com/products/136863/Intel-Core-i3-8121U-Processor-4M-Cache-up-to-3-20-GHz-
- KBL: https://ark.intel.com/products/97540/Intel-Core-i7-7560U-Processor-4M-Cache-up-to-3-80-GHz-
- KBL-R: https://ark.intel.com/products/149091/Intel-Core-i7-8565U-Processor-8M-Cache-up-to-4-60-GHz-
- CNL: https://ark.intel.com/products/136863/Intel-Core-i3-8121U-Processor-4M-Cache-up-to-3_20-GHz
This feature seems to be present only on high-end desktop and server
chips (I can't find any SKX without). This commit leaves it disabled
for all processors, but can be re-enabled for specific builds with
-mrtm.
Patch by Thiago Macieira
Reviewers: erichkeane, craig.topper
Reviewed By: craig.topper
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D53041
llvm-svn: 344116
Jonas Paulsson [Wed, 10 Oct 2018 07:36:27 +0000 (07:36 +0000)]
[SystemZ] Take better care when computing needed vector registers in TTI.
A new function getNumVectorRegs() is better to use for the number of needed
vector registers instead of getNumberOfParts(). This is to make sure that the
number of vector registers (and typically operations) required for a vector
type is accurate.
getNumberOfParts() which was previously used works by splitting the vector
type until it is legal gives incorrect results for types with a non
power of two number of elements (rare).
A new static function getScalarSizeInBits() that also checks for a pointer
type and returns 64U for it since otherwise it gets a value of 0). Used in a
few places where Ty may be pointer.
Review: Ulrich Weigand
llvm-svn: 344115
George Burgess IV [Wed, 10 Oct 2018 06:39:40 +0000 (06:39 +0000)]
[Analysis] Make LocationSizes carry an 'imprecise' bit
There are places where we need to merge multiple LocationSizes of
different sizes into one, and get a sensible result.
There are other places where we want to optimize aggressively based on
the value of a LocationSizes (e.g. how can a store of four bytes be to
an area of storage that's only two bytes large?)
This patch makes LocationSize hold an 'imprecise' bit to note whether
the LocationSize can be treated as an upper-bound and lower-bound for
the size of a location, or just an upper-bound.
This concludes the series of patches leading up to this. The most recent
of which is r344108.
Fixes PR36228.
Differential Revision: https://reviews.llvm.org/D44748
llvm-svn: 344114
Max Kazantsev [Wed, 10 Oct 2018 04:19:38 +0000 (04:19 +0000)]
[NFC] Make a variable const
llvm-svn: 344113
Nemanja Ivanovic [Wed, 10 Oct 2018 04:18:35 +0000 (04:18 +0000)]
[PowerPC][NFC] Add a test case for extract and store patterns
An upcoming patch will change the codegen for these patterns. This test case is
added now so that the patch can show the differences in codegen.
llvm-svn: 344112
Dylan McKay [Wed, 10 Oct 2018 03:21:42 +0000 (03:21 +0000)]
[AVR] Fix the 'call.ll' CodeGen test
Commit r343851 changed the format of the generated instructions.
An unnecessary load has been removed. Previously, a value would be moved
from r24 into a temporary register just to be copied into r30 before the
indirect call. Now, codegen immediately loads r24 into r30, saving a
MOVW instruction.
llvm-svn: 344111
James Y Knight [Wed, 10 Oct 2018 02:53:43 +0000 (02:53 +0000)]
ExprConstant: Make __builtin_object_size use EM_IgnoreSideEffects.
And, since EM_OffsetFold is now unused, remove it.
While builtin_object_size intends to ignore the presence of
side-effects in its argument, the EM_OffsetFold mode was NOT
configured to ignore side-effects. Rather it was effectively identical
to EM_ConstantFold -- its explanatory comment
notwithstanding.
However, currently, keepEvaluatingAfterSideEffect() is not always
honored -- sometimes evaluation continues despite it returning
false. Therefore, since the b_o_s code was only checking the return
value from evaluation, and not additionally checking the
HasSideEffects flag, side-effects _were_ in many cases actually being
ignored.
This change is a prerequisite cleanup towards fixing that issue.
Differential Revision: https://reviews.llvm.org/D52924
llvm-svn: 344110
QingShan Zhang [Wed, 10 Oct 2018 02:33:48 +0000 (02:33 +0000)]
[PowerPC] Fix the assert of ISD::SIGN_EXTEND_INREG when type is v2i16 and v2i8
For ISD::SIGN_EXTEND_INREG operation of v2i16 and v2i8 types will cause assert because they are registered as custom operation.
So that the type legalization phase will enter the custom hook, which do not handle ISD::SIGN_EXTEND_INREG operation and fall throw into unreachable assert.
Patch By: wuzish (Zixuan Wu)
Differential Revision: https://reviews.llvm.org/D52449
llvm-svn: 344109
George Burgess IV [Wed, 10 Oct 2018 01:35:22 +0000 (01:35 +0000)]
[Analysis] Make LocationSize pretty-printing more descriptive
This is the third patch in a series intended to make
https://reviews.llvm.org/D44748 more easily reviewable. Please see that
patch for more context. The second being r344013.
The intent is to make the output of printing a LocationSize more
precise. The main motivation for this is that we plan to add a bit to
distinguish whether a given LocationSize is an upper-bound or is
precise; making that information available in pretty-printing is nice.
llvm-svn: 344108
Thomas Lively [Wed, 10 Oct 2018 01:09:09 +0000 (01:09 +0000)]
[WebAssembly] Fix fneg lowering
Summary:
Subtraction from zero and floating point negation do not have the same
semantics, so fix lowering.
Reviewers: aheejin, dschuff
Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D52948
llvm-svn: 344107
Heejin Ahn [Wed, 10 Oct 2018 01:04:02 +0000 (01:04 +0000)]
[WebAssembly] Improve comments for SIMD instruction definitions
llvm-svn: 344106
George Karpenkov [Wed, 10 Oct 2018 00:58:03 +0000 (00:58 +0000)]
[libFuzzer] Disable value profiling tests on ARM
Some seem fragile, some fail, and some just take a really long time to run.
It does not seem to make sense to support some subset of value profiling tests.
Differential Revision: https://reviews.llvm.org/D53047
llvm-svn: 344105
George Karpenkov [Wed, 10 Oct 2018 00:57:44 +0000 (00:57 +0000)]
[libFuzzer] Generalize the code for getting the previous offset for different architectures
Without this change, tests in coverage.test and dump_coverage.test are
failing on non-x86_64 platforms.
The diff is copied from sanitizer_common library, an alternative would
be to link it together with libFuzzer.
Differential Revision: https://reviews.llvm.org/D53040
llvm-svn: 344104
George Karpenkov [Wed, 10 Oct 2018 00:57:24 +0000 (00:57 +0000)]
[sancov] Generalize the code to get the previous instruction to multiple architectures
sancov subtracts one from the address to get the previous instruction,
which makes sense on x86_64, but not on other platforms.
This change ensures that the offset is correct for different platforms.
The logic for computing the offset is copied from sanitizer_common.
Differential Revision: https://reviews.llvm.org/D53039
llvm-svn: 344103
Jim Ingham [Wed, 10 Oct 2018 00:51:30 +0000 (00:51 +0000)]
Add "var" and "vo" aliases for "frame variable" and "frame variable -O".
Differential Revision: https://reviews.llvm.org/D53010
llvm-svn: 344102
Erik Pilkington [Wed, 10 Oct 2018 00:40:50 +0000 (00:40 +0000)]
[Basic] Split out -Wimplicit-int-conversion and -Wimplicit-float-conversion from -Wconversion
These two diagnostics are noisy, so its reasonable for users to opt-out of them
when -Wconversion is enabled.
rdar://
45058981
Differential revision: https://reviews.llvm.org/D53048
llvm-svn: 344101
Ed Maste [Wed, 10 Oct 2018 00:34:17 +0000 (00:34 +0000)]
clang: Allow ifunc resolvers to accept arguments
When ifunc support was added to Clang (r265917) it did not allow
resolvers to take function arguments. This was based on GCC's
documentation, which states resolvers return a pointer and take no
arguments.
However, GCC actually allows resolvers to take arguments, and glibc (on
non-x86 platforms) and FreeBSD (on x86 and arm64) pass some CPU
identification information as arguments to ifunc resolvers. I believe
GCC's documentation is simply incorrect / out-of-date.
FreeBSD already removed the prohibition in their in-tree Clang copy.
Differential Revision: https://reviews.llvm.org/D52703
llvm-svn: 344100
Fangrui Song [Wed, 10 Oct 2018 00:15:36 +0000 (00:15 +0000)]
Adapt OptTable::PrintHelp change in D51009
Summary: Before, OptTable::PrintHelp append "[options] <inputs>" to its parameter `Help`. It is more flexible to change its semantic to `Usage` and let user customize the usage line.
Reviewers: rupprecht, ruiu, espindola
Reviewed By: rupprecht
Subscribers: emaste, sbc100, arichardson, aheejin, llvm-commits
Differential Revision: https://reviews.llvm.org/D53054
llvm-svn: 344099
Fangrui Song [Wed, 10 Oct 2018 00:15:33 +0000 (00:15 +0000)]
[Driver][cc1][cc1as] Call OptTable::PrintHelp with explicit " [options] file..."
Summary: This is to accommodate a change in llvm/lib/Option/OptTable.cpp D51009
Reviewers: rupprecht, alexshap, jhenderson
Reviewed By: rupprecht
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D51109
llvm-svn: 344098
Fangrui Song [Wed, 10 Oct 2018 00:15:31 +0000 (00:15 +0000)]
[opt] Change the parameter of OptTable::PrintHelp from Name to Usage and don't append "[options] <inputs>"
Summary:
Before, "[options] <inputs>" is unconditionally appended to the `Name` parameter. It is more flexible to change its semantic to `Usage` and let user customize the usage line.
% llvm-objcopy
...
USAGE: llvm-objcopy <input> [ <output> ] [options] <inputs>
With this patch:
% llvm-objcopy
...
USAGE: llvm-objcopy input [output]
Reviewers: rupprecht, alexshap, jhenderson
Reviewed By: rupprecht
Subscribers: jakehehrlich, mehdi_amini, steven_wu, dexonsmith, llvm-commits
Differential Revision: https://reviews.llvm.org/D51009
llvm-svn: 344097
Aaron Puchert [Tue, 9 Oct 2018 23:42:29 +0000 (23:42 +0000)]
Annotate scoped_lock as with scoped_lockable attribute
Summary:
Scoped capabilities need to be annotated as such, otherwise the thread
safety analysis won't work as intended.
Fixes PR39234.
Reviewers: ldionne
Reviewed By: ldionne
Subscribers: christof, libcxx-commits
Differential Revision: https://reviews.llvm.org/D53049
llvm-svn: 344096
Zachary Turner [Tue, 9 Oct 2018 23:42:28 +0000 (23:42 +0000)]
[git-llvm] Fix some issues surrouding EOL conversion on Windows.
This patch fixes three issues.
The first is that we didn't consider files which are explicitly
set to eolstyle CRLF in the repo, and there are a handful of
these.
Second is that dos2unix doesn't have a -q option in GnuWin32,
so this codepath wasn't working properly.
Finally with newer versions of Python (or newer versions of Git,
or some combination of the two) patches can't be applied when
we treat stdin as text, because Python silently undoes all the
work we did to convert the newlines to LF using dos2unix by
using universal_newlines=True and then converting them *back*
to CRLF. So we need to add a way to force stdin to be treated
as binary, and use it when LF-newlines are required.
Differential Revision: https://reviews.llvm.org/D51444
llvm-svn: 344095
Thomas Lively [Tue, 9 Oct 2018 23:33:16 +0000 (23:33 +0000)]
[WebAssembly] Handle V128 register class in explicit locals pass
Summary:
Also add tests to catch crashes in passes that are not normally run in
tests.
Reviewers: aheejin, dschuff
Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D52959
llvm-svn: 344094
Nemanja Ivanovic [Tue, 9 Oct 2018 23:20:11 +0000 (23:20 +0000)]
[DAGCombiner] Expand combining of FP logical ops to sign-setting FP ops
We already do the following combines:
(bitcast int (and (bitcast fp X to int), 0x7fff...) to fp) -> fabs X
(bitcast int (xor (bitcast fp X to int), 0x8000...) to fp) -> fneg X
When the target has "bit preserving fp logic". This patch just extends it
to also combine:
(bitcast int (or (bitcast fp X to int), 0x8000...) to fp) -> fneg (fabs X)
As some targets have fnabs and even those that don't can efficiently lower
both the fabs and the fneg.
Differential revision: https://reviews.llvm.org/D44548
llvm-svn: 344093
Rong Xu [Tue, 9 Oct 2018 23:10:56 +0000 (23:10 +0000)]
[X86] Fix sanitizer bot failure from 344085
Fix the memory issue exposed by sanitizer.
llvm-svn: 344092
Nemanja Ivanovic [Tue, 9 Oct 2018 23:02:53 +0000 (23:02 +0000)]
[PowerPC][NFC] Commit nabs test case in preparation for committing D44548
This just adds the test case so that the different code gen is clearly visible
when the DAG Combine lands.
llvm-svn: 344091
Rui Ueyama [Tue, 9 Oct 2018 22:44:53 +0000 (22:44 +0000)]
Merge two overloaded functions into one function. NFC.
llvm-svn: 344089
Rui Ueyama [Tue, 9 Oct 2018 22:44:42 +0000 (22:44 +0000)]
Return early. NFC.
llvm-svn: 344088
Justin Bogner [Tue, 9 Oct 2018 22:40:04 +0000 (22:40 +0000)]
[LV] Move test for r343954 into x86 subdirectory
This test uses an x86 triple, so it needs to be in the x86 specific
test directory.
llvm-svn: 344087
Heejin Ahn [Tue, 9 Oct 2018 22:23:39 +0000 (22:23 +0000)]
[WebAssembly] Improve readability of SIMD instructions (NFC)
Summary:
- Categorize instructions into the categories as in the SIMD spec
- Move SIMD-related definition to WebAssemblyInstrSIMD.td
- Put definition and use of patterns together
- Add newlines here and there
Reviewers: tlively
Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D53045
llvm-svn: 344086
Rong Xu [Tue, 9 Oct 2018 22:03:40 +0000 (22:03 +0000)]
Recommit r343993: [X86] condition branches folding for three-way conditional codes
Fix the memory issue exposed by sanitizer.
llvm-svn: 344085
Cameron McInally [Tue, 9 Oct 2018 21:48:00 +0000 (21:48 +0000)]
[FPEnv] PatternMatcher support for checking FNEG ignoring signed zeros
https://reviews.llvm.org/D52934
llvm-svn: 344084
Rui Ueyama [Tue, 9 Oct 2018 21:41:53 +0000 (21:41 +0000)]
Attempt to fix ubsan.
Previously, we cast a pointer to Elf{32,64}_Chdr like this
auto *Hdr = reinterpret_cast<const ELF64_Chdr>(Ptr);
and read from its members like this
read32(&Hdr->ch_size);
I was thinking that this does not violate alignment requirement,
since &Hdr->ch_size doesn't really access memory, but seems like
it is a violation in terms of C++ spec (?)
In this patch, I use a different struct that allows unaligned access.
llvm-svn: 344083
Sanjay Patel [Tue, 9 Oct 2018 21:26:01 +0000 (21:26 +0000)]
[InstCombine] reverse 'trunc X to <N x i1>' canonicalization
icmp ne (and X, 1), 0 --> trunc X to N x i1
Ideally, we'd do the same for scalars, but there will likely be
regressions unless we add more trunc folds as we're doing here
for vectors.
The motivating vector case is from PR37549:
https://bugs.llvm.org/show_bug.cgi?id=37549
define <4 x float> @bitwise_select(<4 x float> %x, <4 x float> %y, <4 x float> %z, <4 x float> %w) {
%c = fcmp ole <4 x float> %x, %y
%s = sext <4 x i1> %c to <4 x i32>
%s1 = shufflevector <4 x i32> %s, <4 x i32> undef, <4 x i32> <i32 0, i32 0, i32 1, i32 1>
%s2 = shufflevector <4 x i32> %s, <4 x i32> undef, <4 x i32> <i32 2, i32 2, i32 3, i32 3>
%cond = or <4 x i32> %s1, %s2
%condtr = trunc <4 x i32> %cond to <4 x i1>
%r = select <4 x i1> %condtr, <4 x float> %z, <4 x float> %w
ret <4 x float> %r
}
Here's a sampling of the vector codegen for that case using
mask+icmp (current behavior) vs. trunc (with this patch):
AVX before:
vcmpleps %xmm1, %xmm0, %xmm0
vpermilps $80, %xmm0, %xmm1 ## xmm1 = xmm0[0,0,1,1]
vpermilps $250, %xmm0, %xmm0 ## xmm0 = xmm0[2,2,3,3]
vorps %xmm0, %xmm1, %xmm0
vandps LCPI0_0(%rip), %xmm0, %xmm0
vxorps %xmm1, %xmm1, %xmm1
vpcmpeqd %xmm1, %xmm0, %xmm0
vblendvps %xmm0, %xmm3, %xmm2, %xmm0
AVX after:
vcmpleps %xmm1, %xmm0, %xmm0
vpermilps $80, %xmm0, %xmm1 ## xmm1 = xmm0[0,0,1,1]
vpermilps $250, %xmm0, %xmm0 ## xmm0 = xmm0[2,2,3,3]
vorps %xmm0, %xmm1, %xmm0
vblendvps %xmm0, %xmm2, %xmm3, %xmm0
AVX512f before:
vcmpleps %xmm1, %xmm0, %xmm0
vpermilps $80, %xmm0, %xmm1 ## xmm1 = xmm0[0,0,1,1]
vpermilps $250, %xmm0, %xmm0 ## xmm0 = xmm0[2,2,3,3]
vorps %xmm0, %xmm1, %xmm0
vpbroadcastd LCPI0_0(%rip), %xmm1 ## xmm1 = [1,1,1,1]
vptestnmd %zmm1, %zmm0, %k1
vblendmps %zmm3, %zmm2, %zmm0 {%k1}
AVX512f after:
vcmpleps %xmm1, %xmm0, %xmm0
vpermilps $80, %xmm0, %xmm1 ## xmm1 = xmm0[0,0,1,1]
vpermilps $250, %xmm0, %xmm0 ## xmm0 = xmm0[2,2,3,3]
vorps %xmm0, %xmm1, %xmm0
vpslld $31, %xmm0, %xmm0
vptestmd %zmm0, %zmm0, %k1
vblendmps %zmm2, %zmm3, %zmm0 {%k1}
AArch64 before:
fcmge v0.4s, v1.4s, v0.4s
zip1 v1.4s, v0.4s, v0.4s
zip2 v0.4s, v0.4s, v0.4s
orr v0.16b, v1.16b, v0.16b
movi v1.4s, #1
and v0.16b, v0.16b, v1.16b
cmeq v0.4s, v0.4s, #0
bsl v0.16b, v3.16b, v2.16b
AArch64 after:
fcmge v0.4s, v1.4s, v0.4s
zip1 v1.4s, v0.4s, v0.4s
zip2 v0.4s, v0.4s, v0.4s
orr v0.16b, v1.16b, v0.16b
bsl v0.16b, v2.16b, v3.16b
PowerPC-le before:
xvcmpgesp 34, 35, 34
vspltisw 0, 1
vmrglw 3, 2, 2
vmrghw 2, 2, 2
xxlor 0, 35, 34
xxlxor 35, 35, 35
xxland 34, 0, 32
vcmpequw 2, 2, 3
xxsel 34, 36, 37, 34
PowerPC-le after:
xvcmpgesp 34, 35, 34
vmrglw 3, 2, 2
vmrghw 2, 2, 2
xxlor 0, 35, 34
xxsel 34, 37, 36, 0
Differential Revision: https://reviews.llvm.org/D52747
llvm-svn: 344082
Zachary Turner [Tue, 9 Oct 2018 21:19:03 +0000 (21:19 +0000)]
[PDB] Fix another bug in globals stream name lookup.
When we're on the last bucket the computation is tricky.
We were failing when the last bucket contained multiple
matches. Added a new test for this.
llvm-svn: 344081
Jake Ehrlich [Tue, 9 Oct 2018 21:14:09 +0000 (21:14 +0000)]
[llvm-objcopy] Make -S an alias for --strip-all
-S should be an alias for --strip-all not --strip-all-gnu
llvm-svn: 344080
Adrian Prantl [Tue, 9 Oct 2018 20:51:33 +0000 (20:51 +0000)]
llvm-dwarfdump: Extend --name to also search DW_AT_linkage_name.
rdar://problem/
45132695
llvm-svn: 344079
Lang Hames [Tue, 9 Oct 2018 20:44:32 +0000 (20:44 +0000)]
[ORC] Promote and rename private symbols inside the CompileOnDemand layer,
rather than require them to have been promoted before being passed in.
Dropping this precondition is better for layer composition (CompileOnDemandLayer
was the only one that placed pre-conditions on the modules that could be added).
It also means that the promoted private symbols do not show up in the target
JITDylib's symbol table. Instead, they are confined to the hidden implementation
dylib that contains the actual definitions.
For the 403.gcc testcase this cut down the public symbol table size from ~15,000
symbols to ~4000, substantially reducing symbol dependence tracking costs.
llvm-svn: 344078
Nemanja Ivanovic [Tue, 9 Oct 2018 20:35:15 +0000 (20:35 +0000)]
[PowerPC] Implement hasBitPreservingFPLogic for types that can be supported
This is the PPC-specific non-controversial part of
https://reviews.llvm.org/D44548 that simply enables this combine for PPC
since PPC has these instructions.
This commit will allow the target-independent portion to be truly target
independent.
llvm-svn: 344077
Rui Ueyama [Tue, 9 Oct 2018 20:29:24 +0000 (20:29 +0000)]
Calculate an offset only once. NFC.
llvm-svn: 344076
Rui Ueyama [Tue, 9 Oct 2018 20:22:18 +0000 (20:22 +0000)]
Remove redundant `Symtab->`.
`SymbolTable` is a singleton class and is a global variable for the
unique instance, so we can always refer the symtab by `Symtab->`.
However, we don't need to use the global varaible from member functions
of SymbolTable class.
llvm-svn: 344075
Rui Ueyama [Tue, 9 Oct 2018 20:16:16 +0000 (20:16 +0000)]
Simplify. NFC.
llvm-svn: 344074
Matt Davis [Tue, 9 Oct 2018 20:10:28 +0000 (20:10 +0000)]
[compiler-rt] Remove unused formal parameters from allocateOneNode. NFC.
Summary: This is just a minor cleanup to the allocateOneNode interface. The formals are no-longer used, so I just removed them.
Reviewers: davidxl, void
Reviewed By: davidxl
Subscribers: dberris, llvm-commits
Differential Revision: https://reviews.llvm.org/D52509
llvm-svn: 344073
Rui Ueyama [Tue, 9 Oct 2018 19:54:32 +0000 (19:54 +0000)]
Remove a use of template to make code less abstracted.
Sometimes, code that is a bit longer but doesn't use template is
easier to understand than code that uses template.
llvm-svn: 344072
Craig Topper [Tue, 9 Oct 2018 19:05:50 +0000 (19:05 +0000)]
[X86] When lowering unsigned v2i64 setcc without SSE42, flip the sign bits in the v2i64 type then bitcast to v4i32.
This may give slightly better opportunities for DAG combine to simplify with the operations before the setcc. It also matches the type the xors will eventually be promoted to anyway so it saves a legalization step.
Almost all of the test changes are because our constant pool entry is now v2i64 instead of v4i32 on 64-bit targets. On 32-bit targets getConstant should be emitting a v4i32 build_vector and a v4i32->v2i64 bitcast.
There are a couple test cases where it appears we now combine a bitwise not with one of these xors which caused a new constant vector to be generated. This prevented a constant pool entry from being shared. But if that's an issue we're concerned about, it seems we need to address it another way that just relying a bitcast to hide it.
This came about from experiments I've been trying with pushing the promotion of and/or/xor to vXi64 later than LegalizeVectorOps where it is today. We run LegalizeVectorOps in a bottom up order. So the and/or/xor are promoted before their users are legalized. The bitcasts added for the promotion act as a barrier to computeKnownBits if we try to use it during vector legalization of a later operation. So by moving the promotion out we can hopefully get better results from computeKnownBits/computeNumSignBits like in LowerTruncate on AVX512. I've also looked at running LegalizeVectorOps in a top down order like LegalizeDAG, but thats showing some other issues.
llvm-svn: 344071
Richard Smith [Tue, 9 Oct 2018 18:49:22 +0000 (18:49 +0000)]
PR39231: fix null dereference when diagnosing deduction failure due to
conflicting values for a non-type pack.
llvm-svn: 344070
Sam Clegg [Tue, 9 Oct 2018 18:41:17 +0000 (18:41 +0000)]
[SLPVectorizer] Check that lowered type is floating point before calling isFabsFree
In the case of soft-fp (e.g. fp128 under wasm) the result of
getTypeLegalizationCost() can be an integer type even if the input is
floating point (See LegalizeTypeAction::TypeSoftenFloat).
Before calling isFabsFree() (which asserts if given a non-fp
type) we need to check that that result is fp. This is safe since in
fabs is certainly not free in the soft-fp case.
Fixes PR39168
Differential Revision: https://reviews.llvm.org/D52899
llvm-svn: 344069
Wolfgang Pieb [Tue, 9 Oct 2018 18:38:55 +0000 (18:38 +0000)]
[DWARF] Make llvm-dwarfdump display the .debug_loc.dwo section. Fixes PR38991.
Reviewer: dblaikie
Differential Revision: https://reviews.llvm.org/D52444
llvm-svn: 344068
Sanjay Patel [Tue, 9 Oct 2018 18:37:20 +0000 (18:37 +0000)]
[InstCombine] add tests for extract subvector shuffles; NFC
llvm-svn: 344067
Zachary Turner [Tue, 9 Oct 2018 18:35:06 +0000 (18:35 +0000)]
Fix lld test.
I removed this output from the dumper because it was non-portable,
but I didn't update the test which checked the output.
llvm-svn: 344066
Nico Weber [Tue, 9 Oct 2018 18:19:09 +0000 (18:19 +0000)]
lld-link: attempt to fix tests on Windows after r344061.
llvm-svn: 344065
Adrian Prantl [Tue, 9 Oct 2018 18:12:04 +0000 (18:12 +0000)]
Add missing space
llvm-svn: 344064
Zachary Turner [Tue, 9 Oct 2018 17:58:51 +0000 (17:58 +0000)]
[PDB] Fix failure on big endian machines.
We changed an ArrayRef<uint8_t> to an ArrayRef<uint32_t>, but
it needs to be an ArrayRef<support::ulittle32_t>.
We also change ArrayRef<> to FixedStreamArray<>. Technically
an ArrayRef<> will work, but it can cause a copy in the underlying
implementation if the memory is not contiguous, and there's no
reason not to use a FixedStreamArray<>.
Thanks to nemanjai@ and thakis@ for helping me track this down
and confirm the fix.
llvm-svn: 344063
Rui Ueyama [Tue, 9 Oct 2018 17:53:33 +0000 (17:53 +0000)]
Add an entry to the release notes.
llvm-svn: 344062
Nico Weber [Tue, 9 Oct 2018 17:52:25 +0000 (17:52 +0000)]
lld-link: Use /pdbsourcepath: for more places when present.
/pdbsourcepath: was added in https://reviews.llvm.org/D48882 to make it
possible to have relative paths in the debug info that clang-cl writes.
lld-link then makes the paths absolute at link time, which debuggers require.
This way, clang-cl's output is independent of the absolute path of the build
directory, which is useful for cacheability in distcc-like systems.
This patch extends /pdbsourcepath: (if passed) to also be used for:
1. The "cwd" stored in the env block in the pdb is /pdbsourcepath: if present
2. The "exe" stored in the env block in the pdb is made absolute relative
to /pdbsourcepath: instead of the cwd
3. The "pdb" stored in the env block in the pdb is made absolute relative
to /pdbsourcepath: instead of the cwd
4. For making absolute paths to .obj files referenced from the pdb
/pdbsourcepath: is now useful in three scenarios (the first one already working
before this change):
1. When building with full debug info, passing the real build dir to
/pdbsourcepath: allows having clang-cl's output to be independent
of the build directory path. This patch effectively doesn't change
behavior for this use case (assuming the cwd is the build dir).
2. When building without compile-time debug info but linking with /debug,
a fake fixed /pdbsourcepath: can be passed to get symbolized stacks
while making the pdb and exe independent of the current build dir.
For this two work, lld-link needs to be invoked with relative paths for
the lld-link invocation itself (for "exe"), for the pdb output name, the exe
output name (for "pdb"), and the obj input files, and no absolute path
must appear on the link command (for "cmd" in the pdb's env block).
Since no full debug info is present, it doesn't matter that the absolute
path doesn't exist on disk -- we only get symbols in stacks.
3. When building production builds with full debug info that don't have
local changes, and that get source indexed and their pdbs get uploaded
to a symbol server. /pdbsourcepath: again makes the build output independent
of the current directory, and the fixed path passed to /pdbsourcepath: can
be given the source indexing transform so that it gets mapped to a
repository path. This has the same requirements as 2.
This patch also makes it possible to create PDB files containing Windows-style
absolute paths when cross-compiling on a POSIX system.
Differential Revision: https://reviews.llvm.org/D53021
llvm-svn: 344061
Craig Topper [Tue, 9 Oct 2018 17:52:07 +0000 (17:52 +0000)]
[X86] Autogenerate complete checks. NFC
llvm-svn: 344060
Sanjay Patel [Tue, 9 Oct 2018 17:20:26 +0000 (17:20 +0000)]
[AArch64][x86] add tests for bitcasted fnabs; NFC
Alternate target coverage for D44548.
llvm-svn: 344059
Alexander Kornienko [Tue, 9 Oct 2018 15:58:18 +0000 (15:58 +0000)]
[clang-tidy] Fix handling of parens around new expressions in make_<smartptr> checks.
Summary:
Extra parentheses around a new expression result in incorrect code
after applying fixes.
Reviewers: hokein
Reviewed By: hokein
Subscribers: xazax.hun, cfe-commits
Differential Revision: https://reviews.llvm.org/D52989
llvm-svn: 344058
Yaxun Liu [Tue, 9 Oct 2018 15:53:14 +0000 (15:53 +0000)]
[CUDA][HIP] Fix ShouldDeleteSpecialMember for inherited constructors
ShouldDeleteSpecialMember is called upon inherited constructors.
It calls inferCUDATargetForImplicitSpecialMember.
Normally the special member enum passed to ShouldDeleteSpecialMember
matches the constructor. However this is not true when inherited
constructor is passed, where DefaultConstructor is passed to treat
the inherited constructor as DefaultConstructor. However
inferCUDATargetForImplicitSpecialMember expects the special
member enum argument to match the constructor, which results
in assertion when this expection is not satisfied.
This patch checks whether the constructor is inherited. If true it will
get the real special member enum for the constructor and pass it
to inferCUDATargetForImplicitSpecialMember.
Differential Revision: https://reviews.llvm.org/D51809
llvm-svn: 344057
Sanjay Patel [Tue, 9 Oct 2018 15:29:26 +0000 (15:29 +0000)]
[InstCombine] make helper function 'static'; NFC
llvm-svn: 344056
Eric Liu [Tue, 9 Oct 2018 15:17:16 +0000 (15:17 +0000)]
[clang-move] Fix broken json output.
llvm-svn: 344055
Haojian Wu [Tue, 9 Oct 2018 15:16:14 +0000 (15:16 +0000)]
[clangd] Fix an accident change in r342999.
llvm-svn: 344054
Louis Dionne [Tue, 9 Oct 2018 14:57:40 +0000 (14:57 +0000)]
[libcxx] Mark std::async race condition test as unsupported on Darwin
PR38682 added a test to check for a race condition in std::future.
Part of the fix is part of the dylib, but there is no released version
of mac OS X that ships a dylib containing the fix. Hence, this test can
(and sometimes does) when testing on OS X. This commit marks the test
as unsupported to avoid spurious failures.
llvm-svn: 344053
Louis Dionne [Tue, 9 Oct 2018 14:55:15 +0000 (14:55 +0000)]
[NFC][unwind] Improve error message when a type has more than one RTTIs
The "dynamic_cast error 2" error can apparently happen when the same
type (with RTTI) is defined in more than one translation unit, and
those translation units are linked together. This is technically an
ODR violation, but making the error message more obvious is still
helpful.
llvm-svn: 344052
Guillaume Chatelet [Tue, 9 Oct 2018 14:51:33 +0000 (14:51 +0000)]
Fix function case.
llvm-svn: 344051
Guillaume Chatelet [Tue, 9 Oct 2018 14:51:29 +0000 (14:51 +0000)]
[llvm-exegesis] Fix invalid return type and add a Dump function.
Reviewers: courbet
Subscribers: tschuett, llvm-commits
Differential Revision: https://reviews.llvm.org/D53020
llvm-svn: 344050
Alexey Bataev [Tue, 9 Oct 2018 14:49:00 +0000 (14:49 +0000)]
[OPENMP][NVPTX] Support memory coalescing for globalized variables.
Added support for memory coalescing for better performance for
globalized variables. From now on all the globalized variables are
represented as arrays of 32 elements and each thread accesses these
elements using `tid & 31` as index.
llvm-svn: 344049
Sanjay Patel [Tue, 9 Oct 2018 14:04:14 +0000 (14:04 +0000)]
[x86] use demanded bits to simplify masked store codegen
As noted in D52747, if we prefer IR to use trunc for bool vectors rather
than and+icmp, we can expose codegen shortcomings as seen here with masked store.
Replace a hard-coded PCMPGT simplification with the more general demanded bits call
to improve things.
Differential Revision: https://reviews.llvm.org/D52964
llvm-svn: 344048
Kamil Rytarowski [Tue, 9 Oct 2018 13:32:52 +0000 (13:32 +0000)]
Mark intercept-rethrow-exception.cc as XFAIL on NetBSD
This is an ASan test for functionality that has not been
ported to NetBSD so far.
llvm-svn: 344047
Jonas Toth [Tue, 9 Oct 2018 13:29:31 +0000 (13:29 +0000)]
[clang-tidy] NFC fix warnings from missing braces
The std::array create multiple StringRef but did not wrap
them in braces. Some compilers warned for that. Adding the
braces is not possible and result in a compilation error.
This commit changes the array to vector which works without warning.
llvm-svn: 344046
Kamil Rytarowski [Tue, 9 Oct 2018 13:25:13 +0000 (13:25 +0000)]
Disable failing tests lib/asan/tests on NetBSD
These isses are not analyzed.
llvm-svn: 344045
Jonas Toth [Tue, 9 Oct 2018 13:24:50 +0000 (13:24 +0000)]
[clangd] fix miscompiling lower_bound call
llvm-svn: 344044
Simon Pilgrim [Tue, 9 Oct 2018 13:13:35 +0000 (13:13 +0000)]
[SelectionDAG] Add SIGN_EXTEND_VECTOR_INREG and CONCAT_VECTORS support to SimplifyDemandedBits
Fix for AVX1 masked load/store regression on D52964
llvm-svn: 344043
Kamil Rytarowski [Tue, 9 Oct 2018 12:58:35 +0000 (12:58 +0000)]
Skip unsupported MSan tests on NetBSD
libm functions remquol and lgammal are missing on NetBSD.
llvm-svn: 344042
Kamil Rytarowski [Tue, 9 Oct 2018 12:55:29 +0000 (12:55 +0000)]
Mark 4 MSan tests as XFAIL for NetBSD
Failing ones:
- chained_origin_with_signals
- dtls_test
- ioctl_custom
- signal_stress_test
llvm-svn: 344041
Simon Atanasyan [Tue, 9 Oct 2018 11:29:51 +0000 (11:29 +0000)]
[mips] Fix FDE/CFI encoding in case of N32 ABI
For O32 and N32 ABI FDE/CFI encoding should be `DW_EH_PE_sdata4` and only
N64 ABI uses `DW_EH_PE_sdata8`. To cover all cases this patch check code
pointer size and setup a correct FDE/CFI encoding type.
Differential revision: https://reviews.llvm.org/D52876
llvm-svn: 344040
Simon Atanasyan [Tue, 9 Oct 2018 11:29:45 +0000 (11:29 +0000)]
[mips] Set pointer size to 4 bytes for N32 ABI
CodePointerSize and CalleeSaveStackSlotSize values are used in DWARF
generation. In case of MIPS it's incorrect to check for Triple::isMIPS64()
only this function returns true for N32 ABI too.
Now we do not have a method to recognize N32 if it's specified by a command
line option and is not a part of a target triple. So we check for
Triple::GNUABIN32 only. It's better than nothing.
Differential revision: https://reviews.llvm.org/D52874
llvm-svn: 344039
Kamil Rytarowski [Tue, 9 Oct 2018 11:24:10 +0000 (11:24 +0000)]
Mark MSan fork test as UNSUPPORTED on NetBSD
This test sometimes hangs for unknown reason.
llvm-svn: 344038
Nemanja Ivanovic [Tue, 9 Oct 2018 11:17:47 +0000 (11:17 +0000)]
Fix buildbot failures with the newly added test case (triple was missing).
llvm-svn: 344037
Nemanja Ivanovic [Tue, 9 Oct 2018 10:54:04 +0000 (10:54 +0000)]
[PowerPC] Remove self-copies in pre-emit peephole
There are occasionally instances where AADB rewrites registers in such a way
that a reg-reg copy becomes a self-copy. Such an instruction is obviously
redundant and can be removed. This patch does precisely that.
Note that this will not remove various nop's that we insert (which are
themselves just self-copies). The reason those are left alone is that all of
them have their own opcodes (that just encode to a self-copy).
What prompted this patch is the fact that these self-copies sometimes end up
using registers that make the instruction a priority-setting nop, thereby
having a significant effect on performance.
Differential revision: https://reviews.llvm.org/D52432
llvm-svn: 344036
Kamil Rytarowski [Tue, 9 Oct 2018 10:34:36 +0000 (10:34 +0000)]
Reflect the current reality and disable lsan tests on NetBSD
LSan/NetBSD is still in development (Stop-The-World routine missed).
llvm-svn: 344035
Kamil Rytarowski [Tue, 9 Oct 2018 10:32:01 +0000 (10:32 +0000)]
Use PTHREAD_STACK_MIN conditionally in a test
PTHREAD_STACK_MIN is not available on NetBSD as it's not
clear what the value shall be represented by this constant
on a multiplatform OS.
llvm-svn: 344034
Kadir Cetinkaya [Tue, 9 Oct 2018 10:29:54 +0000 (10:29 +0000)]
[clangd] Mark colon as a safe character when percent-encoding.
Summary: Also change output of percent-encoding to use upper-case letters.
Reviewers: sammccall
Reviewed By: sammccall
Subscribers: ilya-biryukov, ioeric, MaskRay, jkorous, arphaman, cfe-commits
Differential Revision: https://reviews.llvm.org/D53016
llvm-svn: 344033
Guillaume Chatelet [Tue, 9 Oct 2018 10:06:19 +0000 (10:06 +0000)]
[llvm-exegesis] Fix wrong index type.
llvm-svn: 344032
Kristof Umann [Tue, 9 Oct 2018 10:05:08 +0000 (10:05 +0000)]
[analyzer][www] Add more useful links
Differential Revision: https://reviews.llvm.org/D52993
llvm-svn: 344031
Sam McCall [Tue, 9 Oct 2018 10:02:02 +0000 (10:02 +0000)]
[clangd] Fix nondeterministic test
llvm-svn: 344030
Guillaume Chatelet [Tue, 9 Oct 2018 09:33:29 +0000 (09:33 +0000)]
[llvm-exegesis] Fix unused lambda capture.
llvm-svn: 344029
Guillaume Chatelet [Tue, 9 Oct 2018 08:59:10 +0000 (08:59 +0000)]
[llvm-exegesis][NFC] Use accessors for Operand.
Summary:
This moves checking logic into the accessors and makes the structure smaller.
It will also help when/if Operand are generated from the TD files.
Subscribers: tschuett, courbet, llvm-commits
Differential Revision: https://reviews.llvm.org/D52982
llvm-svn: 344028
Aleksandr Urakov [Tue, 9 Oct 2018 08:50:50 +0000 (08:50 +0000)]
[ADT] Force the alignment of the `data` field of `IntervalMap`
Summary:
This patch forces the alignment of the `data` field of `IntervalMap`.
It is because x86 MSVC doesn't apply automatically
(without `__declspec(align(...))`) alignments more than 4 bytes,
even if `alignof` has returned so. Consider the example:
https://godbolt.org/z/zIPa_G
Here `alignof` for both `S0` and `S1` returns `8`, but only `S1` is really
aligned on x86. The explanation of this behavior is here:
https://docs.microsoft.com/en-us/cpp/build/conflicts-with-the-x86-compiler
Reviewers: bkramer, stoklund, hans, rnk
Reviewed By: rnk
Subscribers: dexonsmith, llvm-commits
Differential Revision: https://reviews.llvm.org/D52613
llvm-svn: 344027
Stephen Kelly [Tue, 9 Oct 2018 08:44:28 +0000 (08:44 +0000)]
[ASTMatcher] Add missing imaginaryLiteral
llvm-svn: 344026
Kadir Cetinkaya [Tue, 9 Oct 2018 08:41:12 +0000 (08:41 +0000)]
[clangd] Revert back to previous heuristic for diagnostic range extraction.
Summary: Also add a few new test cases and a special case into handling of empty fixit ranges that collides with location of a diag.
Reviewers: sammccall, ilya-biryukov
Reviewed By: sammccall
Subscribers: ilya-biryukov, ioeric, MaskRay, jkorous, arphaman, cfe-commits
Differential Revision: https://reviews.llvm.org/D52889
llvm-svn: 344025
Eric Liu [Tue, 9 Oct 2018 08:27:31 +0000 (08:27 +0000)]
[clangd] Avoid cache main file status in preamble.
Summary: Main file can certainly change when reusing preamble.
Reviewers: sammccall
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet, cfe-commits
Differential Revision: https://reviews.llvm.org/D52991
llvm-svn: 344024
Stephen Kelly [Tue, 9 Oct 2018 08:24:18 +0000 (08:24 +0000)]
Remove non-existant typeloc matchers from documentation
llvm-svn: 344023
Stephen Kelly [Tue, 9 Oct 2018 08:24:11 +0000 (08:24 +0000)]
Regenerate AST Matcher docs
llvm-svn: 344022
Stephen Kelly [Tue, 9 Oct 2018 08:24:06 +0000 (08:24 +0000)]
Fix indentation
llvm-svn: 344021
Aleksandr Urakov [Tue, 9 Oct 2018 07:44:17 +0000 (07:44 +0000)]
Revert "[ADT] Change the `IntervalMap` alignment assert for x86 MSVC"
This reverts commit
7f9eb168a9a8f5ff4fc931a00aec43e8706afecb.
llvm-svn: 344020
Simon Pilgrim [Tue, 9 Oct 2018 07:42:01 +0000 (07:42 +0000)]
[X86][AVX1] Enable *_EXTEND_VECTOR_INREG lowering of 256-bit vectors
As discussed on D52964, this adds 256-bit *_EXTEND_VECTOR_INREG lowering support for AVX1 targets to help improve SimplifyDemandedBits handling.
Differential Revision: https://reviews.llvm.org/D52980
llvm-svn: 344019
Aleksandr Urakov [Tue, 9 Oct 2018 07:33:09 +0000 (07:33 +0000)]
[ADT] Change the `IntervalMap` alignment assert for x86 MSVC
Summary:
This patch forces the alignment of the `data` field of `IntervalMap`.
It is because x86 MSVC doesn't apply automatically
(without `__declspec(align(...))`) alignments more than 4 bytes,
even if `alignof` has returned so. Consider the example:
https://godbolt.org/z/zIPa_G
Here `alignof` for both `S0` and `S1` returns `8`, but only `S1` is really
aligned on x86. The explanation of this behavior is here:
https://docs.microsoft.com/en-us/cpp/build/conflicts-with-the-x86-compiler
Reviewers: bkramer, stoklund, hans, rnk
Reviewed By: rnk
Subscribers: dexonsmith, llvm-commits
Differential Revision: https://reviews.llvm.org/D52613
llvm-svn: 344018