platform/kernel/linux-rpi3.git
8 years agodrm/amdgpu/virtual_dce: add case for topaz for disable_dce
Alex Deucher [Mon, 8 Aug 2016 18:40:04 +0000 (14:40 -0400)]
drm/amdgpu/virtual_dce: add case for topaz for disable_dce

This asic has no DCE block.  Also clarify the error message
for unmatched chips.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: move vsync_timer_enabled setup to dce virtual early_init
Alex Deucher [Mon, 8 Aug 2016 18:35:55 +0000 (14:35 -0400)]
drm/amdgpu: move vsync_timer_enabled setup to dce virtual early_init

Put it in one place.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Set ip_blocks according variable amdgpu_virtual_display.
Emily Deng [Mon, 8 Aug 2016 03:37:50 +0000 (11:37 +0800)]
drm/amdgpu: Set ip_blocks according variable amdgpu_virtual_display.

For virtual display feature, if user set the option "amdgpu.virtual_display=1"
when load amdgpu.ko. Then need to set the ip_blocks with virtual display ip
blocks. And when enable virtual display, the amdgpu_dal need to be set to zero.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Define one variable for virtual display.
Emily Deng [Mon, 8 Aug 2016 03:37:29 +0000 (11:37 +0800)]
drm/amdgpu: Define one variable for virtual display.

For virtual display feature, define on variable in amdgpu.ko. When want to
enable virtual display feature, need set the option "amdgpu.virtual_display=1".
And then disable vga render and crtc if have DCE engine.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Define virtual display ip blocks.
Emily Deng [Mon, 8 Aug 2016 03:36:45 +0000 (11:36 +0800)]
drm/amdgpu: Define virtual display ip blocks.

For virtual display feature, define virtual display ip blocks, and set
dce_virtual_ip_funcs to DCE block.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Add DRM_MODE_CONNECTOR_VIRTUAL connector in amdgpu_connector_add.
Emily Deng [Mon, 8 Aug 2016 03:36:31 +0000 (11:36 +0800)]
drm/amdgpu: Add DRM_MODE_CONNECTOR_VIRTUAL connector in amdgpu_connector_add.

For virtual display feature, add one connector type in amdgpu_connector_add.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Call pageflip irq funtion when receiced vsync interrupt.
Emily Deng [Mon, 8 Aug 2016 03:36:07 +0000 (11:36 +0800)]
drm/amdgpu: Call pageflip irq funtion when receiced vsync interrupt.

For virtual display feature, as there is no dce engine, so no pageflip irq
generated. So directly call pageflip irq funtion when received vysn interrupt.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Use software timer to generate vsync interrupt.
Emily Deng [Mon, 8 Aug 2016 03:35:39 +0000 (11:35 +0800)]
drm/amdgpu: Use software timer to generate vsync interrupt.

For virtual display feature, use the software timer to
simulate the vsync interrupt.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Disable VGA render and crtc when init GMC.
Emily Deng [Mon, 8 Aug 2016 03:33:11 +0000 (11:33 +0800)]
drm/amdgpu: Disable VGA render and crtc when init GMC.

For virtual display feature, when the GPU has DCE engine, need to disable
the VGA render and CRTC, or it will hang when initialize GMC.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: To define whether the GPU has DCE engine.
Emily Deng [Mon, 8 Aug 2016 03:32:35 +0000 (11:32 +0800)]
drm/amdgpu: To define whether the GPU has DCE engine.

For virtual display feature, when the GPU has DCE engine, need to disable
the VGA render and CRTC, or it will hang when initialize GMC. So first detect
whether the GPU has DCE engine.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Initialize dce_virtual_crtc_funcs. (v2)
Emily Deng [Mon, 8 Aug 2016 03:32:22 +0000 (11:32 +0800)]
drm/amdgpu: Initialize dce_virtual_crtc_funcs. (v2)

For virtual display feature, initialize dce_virtual_crtc_funcs.

v2: agd: rebase on upstream

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Initialize dce_virtual_crtc_helper_funcs
Emily Deng [Mon, 8 Aug 2016 03:32:00 +0000 (11:32 +0800)]
drm/amdgpu: Initialize dce_virtual_crtc_helper_funcs

For virtual display feature, initialize dce_virtual_crtc_helper_funcs.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Initialize crtc, pageflip irq funcs (v2)
Emily Deng [Mon, 8 Aug 2016 03:31:37 +0000 (11:31 +0800)]
drm/amdgpu: Initialize crtc, pageflip irq funcs (v2)

For virtual display feature, initialize dce_virtual_crtc_irq_funcs,
dce_virtual_pageflip_irq_funcs. As it has no dce engine, so the
pageflip interrupt won't be generated, and the vsync interrupt will
be generated by smu's periodic timer or software timer which will
be implemented later.

v2: agd: rebase on upstream

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Initialize dce_virtual_display_funcs.
Emily Deng [Mon, 8 Aug 2016 03:31:13 +0000 (11:31 +0800)]
drm/amdgpu: Initialize dce_virtual_display_funcs.

For virtual display feature, initialize dce_virtual_display_funcs,
which will be used in function dce_virtual_set_display_funcs.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Initialize dce_virtual_ip_funcs
Emily Deng [Mon, 8 Aug 2016 03:30:50 +0000 (11:30 +0800)]
drm/amdgpu: Initialize dce_virtual_ip_funcs

For virtual display feature, first need to initialize dce_virtual_ip_funcs,
which will be used when set ip blocks.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Add virtual connector and encoder macros.
Emily Deng [Mon, 8 Aug 2016 03:30:34 +0000 (11:30 +0800)]
drm/amdgpu: Add virtual connector and encoder macros.

For virtual display feature, add virtual connector and encoder macros.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Don't retry 7 times in amdgpu_atombios_dp_get_dpcd()
Lyude [Sat, 6 Aug 2016 00:30:37 +0000 (20:30 -0400)]
drm/amdgpu: Don't retry 7 times in amdgpu_atombios_dp_get_dpcd()

When this code was written, we didn't retry DP aux transactions on any
error, which required retrying important transactions like this in
individual drivers. Since that's no longer the case, retrying here is
not necessary. As well, we retry any aux transaction on any error 32
times. 7 * 32 = 224, which means this loop causes us to retry grabbing
the dpcd 224 times. This is definitely far more then we actually need to
do.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Lyude <cpaul@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: Don't print error on aux transaction timeouts
Lyude [Sat, 6 Aug 2016 00:30:36 +0000 (20:30 -0400)]
drm/amdgpu: Don't print error on aux transaction timeouts

Since it's normal for DRM to retry our aux transaction helpers multiple
times in a row, up to 32 times for each attempted transaction, we're
making a lot of noise that is no longer necessary now that DRM will just
print the return code we give it.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Lyude <cpaul@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon: Don't retry 7 times in radeon_dp_dpcd()
Lyude [Sat, 6 Aug 2016 00:30:35 +0000 (20:30 -0400)]
drm/radeon: Don't retry 7 times in radeon_dp_dpcd()

When this code was written, we didn't retry DP aux transactions on any
error, which required retrying important transactions like this in
individual drivers. Since that's no longer the case, retrying here is
not necessary. As well, we retry any aux transaction on any error 32
times. 7 * 32 = 224, which means this loop causes us to retry grabbing
the dpcd 224 times. This is definitely far more then we actually need to
do.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Lyude <cpaul@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/radeon: Don't print error on aux transaction timeouts
Lyude [Sat, 6 Aug 2016 00:30:34 +0000 (20:30 -0400)]
drm/radeon: Don't print error on aux transaction timeouts

Since it's normal for DRM to retry our aux transaction helpers multiple
times in a row, up to 32 times for each attempted transaction, we're
making a lot of noise that is no longer necessary now that DRM will just
print the return code we give it.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Lyude <cpaul@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/ttm: Remove unused parameter evict from ttm_bo_move_memcpy
Michel Dänzer [Mon, 8 Aug 2016 03:28:26 +0000 (12:28 +0900)]
drm/ttm: Remove unused parameter evict from ttm_bo_move_memcpy

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/ttm: Remove unused parameter evict from ttm_bo_move_ttm
Michel Dänzer [Mon, 8 Aug 2016 03:28:25 +0000 (12:28 +0900)]
drm/ttm: Remove unused parameter evict from ttm_bo_move_ttm

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/ttm: Wait for a BO to become idle before unbinding it from GTT
Michel Dänzer [Fri, 5 Aug 2016 09:36:10 +0000 (18:36 +0900)]
drm/ttm: Wait for a BO to become idle before unbinding it from GTT

Fixes hangs under memory pressure, e.g. running the piglit test
tex3d-maxsize concurrently with other tests.

Fixes: 17d33bc9d6ef ("drm/ttm: drop waiting for idle in ttm_bo_evict.")
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: move all Kconfig options to amdgpu/Kconfig
Alex Deucher [Thu, 31 Mar 2016 22:18:28 +0000 (18:18 -0400)]
drm/amdgpu: move all Kconfig options to amdgpu/Kconfig

For consistency.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: enable powerplay as default on CZ/ST
Huang Rui [Mon, 18 Apr 2016 15:29:32 +0000 (23:29 +0800)]
drm/amd/powerplay: enable powerplay as default on CZ/ST

Enable powerplay as default on Carrizo and Stoney. And it can be
disabled with amdgpu.powerplay=0.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Cc: Rex Zhu <Rex.Zhu@amd.com>
Cc: Flora Cui <Flora.Cui@amd.com>
Cc: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: change structure variable name.
Rex Zhu [Mon, 1 Aug 2016 02:49:00 +0000 (10:49 +0800)]
drm/amd/powerplay: change structure variable name.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: delete code set/unset deep_sleep/power_containment.
Rex Zhu [Wed, 3 Aug 2016 06:37:19 +0000 (14:37 +0800)]
drm/amd/powerplay: delete code set/unset deep_sleep/power_containment.

they were controled by module parameter.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: enable VCE soft reset
Chunming Zhou [Wed, 3 Aug 2016 07:15:37 +0000 (15:15 +0800)]
drm/amdgpu: enable VCE soft reset

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: remove RB1_BUSY bit checking
Rex Zhu [Wed, 3 Aug 2016 07:10:28 +0000 (15:10 +0800)]
drm/amdgpu: remove RB1_BUSY bit checking

This is a workaround to let VCE soft reset work.
RB1_BUSY bit is always set, so remove its checking now, and we
will depend on RB0_BUSY currently.
After we find the root cause of RB1_BUSY, we can add it back.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: fix harvest config checking in vce3 check_soft_reset
Chunming Zhou [Wed, 3 Aug 2016 06:55:46 +0000 (14:55 +0800)]
drm/amdgpu: fix harvest config checking in vce3 check_soft_reset

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: irq resume should be immediately after gpu resume
Chunming Zhou [Wed, 27 Jul 2016 05:15:20 +0000 (13:15 +0800)]
drm/amdgpu: irq resume should be immediately after gpu resume

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: Partially revert change to UVD v3 CG
Tom St Denis [Wed, 3 Aug 2016 16:37:23 +0000 (12:37 -0400)]
drm/amd/amdgpu: Partially revert change to UVD v3 CG

Partially undo changes made by commit:

drm/amd/amdgpu: don't track state in UVD clockgating

To keep bypass even if CG flags are not set.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: Enable VCE MGCG for Stoney
Tom St Denis [Wed, 3 Aug 2016 15:34:35 +0000 (11:34 -0400)]
drm/amd/amdgpu: Enable VCE MGCG for Stoney

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: Enable VCE MGCG for Carrizo
Tom St Denis [Wed, 3 Aug 2016 14:16:17 +0000 (10:16 -0400)]
drm/amd/amdgpu: Enable VCE MGCG for Carrizo

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: Don't set VCE CG in startup
Tom St Denis [Wed, 3 Aug 2016 14:15:48 +0000 (10:15 -0400)]
drm/amd/amdgpu: Don't set VCE CG in startup

It's handled by DPM/PP properly.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: Fix VCE CG order and resume defaults
Tom St Denis [Wed, 3 Aug 2016 14:15:24 +0000 (10:15 -0400)]
drm/amd/amdgpu: Fix VCE CG order and resume defaults

CG was being enabled in reverse sense from dpm/powerplay.
Also fix the default CLK_EN signal to enable all of the blocks.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: fix indentation in vce3 CG
Tom St Denis [Wed, 3 Aug 2016 14:14:44 +0000 (10:14 -0400)]
drm/amd/amdgpu: fix indentation in vce3 CG

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: remove the check for sessions being closed
Leo Liu [Wed, 3 Aug 2016 13:25:59 +0000 (09:25 -0400)]
drm/amdgpu: remove the check for sessions being closed

This will make clock and power gated when no block decoded, for example
when paused during the playback.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: print more accurate error messages on IB submission failure
Marek Olšák [Fri, 29 Jul 2016 22:48:39 +0000 (00:48 +0200)]
drm/amdgpu: print more accurate error messages on IB submission failure

It's useful for debugging.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: use the kernel zone memory size as the max remote memory in amdgpu
Ken Wang [Wed, 27 Jul 2016 11:18:01 +0000 (19:18 +0800)]
drm/amdgpu: use the kernel zone memory size as the max remote memory in amdgpu

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/ttm: Add interface to export kernel_zone max memory size in ttm
Ken Wang [Wed, 27 Jul 2016 11:12:15 +0000 (19:12 +0800)]
drm/ttm: Add interface to export kernel_zone max memory size in ttm

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powrplay: delete code no longer in use on Polaris.
Rex Zhu [Sun, 31 Jul 2016 05:46:01 +0000 (13:46 +0800)]
drm/amd/powrplay: delete code no longer in use on Polaris.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powrplay: workaround Memory EDC Error for certain partner boards.
Rex Zhu [Fri, 29 Jul 2016 11:26:36 +0000 (19:26 +0800)]
drm/amd/powrplay: workaround Memory EDC Error for certain partner boards.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: AMD SW workaround for certain partner boards
Rex Zhu [Fri, 29 Jul 2016 11:19:26 +0000 (19:19 +0800)]
drm/amdgpu: AMD SW workaround for certain partner boards

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: pass sub_device_id and sub_vendor_id to powerplay.
Rex Zhu [Fri, 29 Jul 2016 11:15:52 +0000 (19:15 +0800)]
drm/amd/powerplay: pass sub_device_id and sub_vendor_id to powerplay.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: delete useless code in hwmgr.
Rex Zhu [Fri, 29 Jul 2016 08:30:04 +0000 (16:30 +0800)]
drm/amd/powerplay: delete useless code in hwmgr.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: expose AMDGPU_GEM_CREATE_VRAM_CLEARED to user space
Flora Cui [Wed, 20 Jul 2016 06:44:38 +0000 (14:44 +0800)]
drm/amdgpu: expose AMDGPU_GEM_CREATE_VRAM_CLEARED to user space

V2: fix the return value for fill failure and validate bo before
filling data

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: implement amdgpu_fill_buffer()
Flora Cui [Tue, 19 Jul 2016 08:48:22 +0000 (16:48 +0800)]
drm/amdgpu: implement amdgpu_fill_buffer()

so that bo could be set to some pattern

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/gfx8: remove stale function declaration
Alex Deucher [Mon, 1 Aug 2016 18:29:15 +0000 (14:29 -0400)]
drm/amdgpu/gfx8: remove stale function declaration

This got leftover somehow when I cleaned this up.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: change pptable output format from ASCII to binary
Eric Huang [Thu, 28 Jul 2016 21:25:01 +0000 (17:25 -0400)]
drm/amd/amdgpu: change pptable output format from ASCII to binary

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Eric Huang <JinHuiEric.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/ci: add mullins to default case for smc ucode
Alex Deucher [Fri, 29 Jul 2016 22:14:39 +0000 (18:14 -0400)]
drm/amdgpu/ci: add mullins to default case for smc ucode

It's already covered by the default case, but add it for
consistency.

Reviewed-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/gmc7: add missing mullins case
Alex Deucher [Fri, 29 Jul 2016 22:03:42 +0000 (18:03 -0400)]
drm/amdgpu/gmc7: add missing mullins case

Looks like this got missed when we ported the code from radeon.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
8 years agodrm/amdgpu: use modules parameter to ctrl deep sleep feature in dpm
Rex Zhu [Thu, 28 Jul 2016 09:36:35 +0000 (17:36 +0800)]
drm/amdgpu: use modules parameter to ctrl deep sleep feature in dpm

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add module parameters to ctrl powerplay feature
Rex Zhu [Thu, 28 Jul 2016 08:51:47 +0000 (16:51 +0800)]
drm/amdgpu: add module parameters to ctrl powerplay feature

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: fix typos of volt/millivolt symbols in comment.
Rex Zhu [Thu, 7 Jul 2016 11:39:15 +0000 (19:39 +0800)]
drm/amd/powerplay: fix typos of volt/millivolt symbols in comment.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: Enable stoney VCE PG
Tom St Denis [Thu, 28 Jul 2016 13:38:45 +0000 (09:38 -0400)]
drm/amd/amdgpu: Enable stoney VCE PG

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: Enable stoney UVD PG
Tom St Denis [Thu, 28 Jul 2016 13:38:29 +0000 (09:38 -0400)]
drm/amd/amdgpu: Enable stoney UVD PG

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: Enable stoney GFX PG
Tom St Denis [Thu, 28 Jul 2016 13:38:13 +0000 (09:38 -0400)]
drm/amd/amdgpu: Enable stoney GFX PG

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: Enable carrizo VCE PG
Tom St Denis [Thu, 28 Jul 2016 13:36:26 +0000 (09:36 -0400)]
drm/amd/amdgpu: Enable carrizo VCE PG

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: Enable carrizo UVD PG
Tom St Denis [Thu, 28 Jul 2016 13:35:57 +0000 (09:35 -0400)]
drm/amd/amdgpu: Enable carrizo UVD PG

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: Enable carrizo GFX PG
Tom St Denis [Thu, 28 Jul 2016 13:33:56 +0000 (09:33 -0400)]
drm/amd/amdgpu: Enable carrizo GFX PG

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: Add error messages to UVD PG in DPM
Tom St Denis [Thu, 28 Jul 2016 13:46:00 +0000 (09:46 -0400)]
drm/amd/amdgpu: Add error messages to UVD PG in DPM

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: enable PG_EN bit in powergating UVD
Tom St Denis [Thu, 28 Jul 2016 13:45:07 +0000 (09:45 -0400)]
drm/amd/amdgpu: enable PG_EN bit in powergating UVD

Enable the PG_EN bit just before the SMU would be tasked
with the PG transition.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: don't track state in UVD clockgating
Tom St Denis [Thu, 28 Jul 2016 13:44:49 +0000 (09:44 -0400)]
drm/amd/amdgpu: don't track state in UVD clockgating

There's no need to track CG state anymore.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: don't set clockgating in uvd_v6_0_start()
Tom St Denis [Thu, 28 Jul 2016 13:44:14 +0000 (09:44 -0400)]
drm/amd/amdgpu: don't set clockgating in uvd_v6_0_start()

This is handled properly by both DPM and PP externally.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: add pm lock to debugfs mmio entry
Tom St Denis [Thu, 28 Jul 2016 13:39:22 +0000 (09:39 -0400)]
drm/amd/amdgpu: add pm lock to debugfs mmio entry

Adds support for PM locks around access to registers that might
have race conditions on PG transistions.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/amdgpu: add mutex locking for both DPM and PP based powergating for UVD/VCE
Tom St Denis [Thu, 28 Jul 2016 13:40:07 +0000 (09:40 -0400)]
drm/amd/amdgpu: add mutex locking for both DPM and PP based powergating for UVD/VCE

This adds a mutex lock for both DPM/PP around the changes in
power gating state so that userspace can poll registers without
a race condition on power state.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu/powerplay: enable powerplay by default on TOPAZ
Alex Deucher [Thu, 28 Jul 2016 17:35:42 +0000 (13:35 -0400)]
drm/amdgpu/powerplay: enable powerplay by default on TOPAZ

Now that the implementation is complete.

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: add DPM running checking back
Huang Rui [Tue, 26 Jul 2016 08:38:36 +0000 (16:38 +0800)]
drm/amd/powerplay: add DPM running checking back

This patch adds DPM running checking back, because the DPM issue is
fixed.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: add enabling voltage controller back
Huang Rui [Tue, 26 Jul 2016 08:33:41 +0000 (16:33 +0800)]
drm/amd/powerplay: add enabling voltage controller back

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: set the platform capability flags for iceland
Huang Rui [Tue, 26 Jul 2016 08:25:57 +0000 (16:25 +0800)]
drm/amd/powerplay: set the platform capability flags for iceland

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: add deep sleep initialization
Huang Rui [Tue, 26 Jul 2016 07:57:07 +0000 (15:57 +0800)]
drm/amd/powerplay: add deep sleep initialization

This patch adds the deep sleep initialization at DPM, it needs send a
message to SMC to enable this feature before enable voltage controller.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: fix the incorrect checking condition
Huang Rui [Tue, 26 Jul 2016 08:42:11 +0000 (16:42 +0800)]
drm/amd/powerplay: fix the incorrect checking condition

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: enable iceland powerplay manually
Huang Rui [Mon, 20 Jun 2016 05:35:28 +0000 (13:35 +0800)]
drm/amdgpu: enable iceland powerplay manually

It's able to enable iceland powerplay manually via the module
parameter. The default state is disabled.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: add iceland HW manager
Huang Rui [Tue, 12 Jul 2016 07:45:12 +0000 (15:45 +0800)]
drm/amd/powerplay: add iceland HW manager

This patch introduces the iceland HW manager of powerplay which
includes HW manager, clockpowergating, thermal, and powertune.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: add iceland_dyn_defaults header
Huang Rui [Mon, 11 Jul 2016 16:52:24 +0000 (00:52 +0800)]
drm/amd/powerplay: add iceland_dyn_defaults header

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: add iceland SMU mananger
Huang Rui [Sun, 19 Jun 2016 16:42:01 +0000 (00:42 +0800)]
drm/amd/powerplay: add iceland SMU mananger

The system management unit (SMU) is a subcomponent of the northbridge
that is responsible for a variety of system and power management tasks
during boot and runtime for GPU. In powerplay, it will be used on
firmware loading and power task management. This patch adds SMU
mananger for iceland.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amd/powerplay: add SMU71 header files for iceland (v2)
Huang Rui [Tue, 21 Jun 2016 02:26:26 +0000 (10:26 +0800)]
drm/amd/powerplay: add SMU71 header files for iceland (v2)

v2: cleanup headers, add copyright

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: use amdgpu_bo_create_kernel in amdgpu_ring.c
Christian König [Tue, 26 Jul 2016 07:58:45 +0000 (09:58 +0200)]
drm/amdgpu: use amdgpu_bo_create_kernel in amdgpu_ring.c

Saves us quite a bunch of code.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: use amdgpu_bo_create_kernel in amdgpu_ih.c
Christian König [Mon, 25 Jul 2016 16:06:30 +0000 (18:06 +0200)]
drm/amdgpu: use amdgpu_bo_create_kernel in amdgpu_ih.c

Saves us quite a bunch of code.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: user amdgpu_bo_create_kernel for the UVD BO
Christian König [Mon, 25 Jul 2016 15:37:38 +0000 (17:37 +0200)]
drm/amdgpu: user amdgpu_bo_create_kernel for the UVD BO

Saves us some code.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add more warning to amdgpu_bo_offset
Christian König [Mon, 25 Jul 2016 15:56:18 +0000 (17:56 +0200)]
drm/amdgpu: add more warning to amdgpu_bo_offset

Warn when we try to get the address and the BO isn't locked or reserved.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: pin shared GWS, GDS and OA resources
Christian König [Mon, 14 Dec 2015 12:23:57 +0000 (13:23 +0100)]
drm/amdgpu: pin shared GWS, GDS and OA resources

They can't move anyway, but just to be clean here.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add new helper for in kernel allocations
Christian König [Mon, 14 Dec 2015 12:18:01 +0000 (13:18 +0100)]
drm/amdgpu: add new helper for in kernel allocations

We often allocate, pin and map things at the same time in the kernel.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add dce10 check_soft_reset
Chunming Zhou [Wed, 20 Jul 2016 05:42:25 +0000 (13:42 +0800)]
drm/amdgpu: add dce10 check_soft_reset

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: implement vce3 check/post_soft_reset
Chunming Zhou [Mon, 18 Jul 2016 09:38:50 +0000 (17:38 +0800)]
drm/amdgpu: implement vce3 check/post_soft_reset

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: implement UVD6 check/pre/post_soft_reset
Chunming Zhou [Mon, 18 Jul 2016 09:18:01 +0000 (17:18 +0800)]
drm/amdgpu: implement UVD6 check/pre/post_soft_reset

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: implement vi ih check/pre/post_soft_reset
Chunming Zhou [Mon, 18 Jul 2016 09:02:57 +0000 (17:02 +0800)]
drm/amdgpu: implement vi ih check/pre/post_soft_reset

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: implement gmc8 check/pre/post_soft_reset
Chunming Zhou [Mon, 18 Jul 2016 08:59:24 +0000 (16:59 +0800)]
drm/amdgpu: implement gmc8 check/pre/post_soft_reset

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: implement sdma3 check/pre/post_soft_reset
Chunming Zhou [Wed, 13 Jul 2016 02:28:56 +0000 (10:28 +0800)]
drm/amdgpu: implement sdma3 check/pre/post_soft_reset

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: implement gfx8 post_soft_reset
Chunming Zhou [Fri, 15 Jul 2016 08:24:25 +0000 (16:24 +0800)]
drm/amdgpu: implement gfx8 post_soft_reset

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add amdgpu soft reset
Chunming Zhou [Fri, 15 Jul 2016 07:57:13 +0000 (15:57 +0800)]
drm/amdgpu: add amdgpu soft reset

Check gpu status first, if MC/VMC/DISPLAY hang, directly triger full reset.
If engine hangs, then triger engine soft reset, if soft reset fails, will
fallback to full reset.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add gfx8 pre soft reset
Chunming Zhou [Fri, 15 Jul 2016 07:18:25 +0000 (15:18 +0800)]
drm/amdgpu: add gfx8 pre soft reset

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add pre_soft_reset ip func
Chunming Zhou [Mon, 18 Jul 2016 02:04:34 +0000 (10:04 +0800)]
drm/amdgpu: add pre_soft_reset ip func

It will be used before soft_reset to do some preparing work for reset.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: implement gfx8 check_soft_reset
Chunming Zhou [Fri, 15 Jul 2016 03:28:30 +0000 (11:28 +0800)]
drm/amdgpu: implement gfx8 check_soft_reset

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm/amdgpu: add check_soft_reset ip func
Chunming Zhou [Fri, 15 Jul 2016 03:19:20 +0000 (11:19 +0800)]
drm/amdgpu: add check_soft_reset ip func

It is used to identify if the ip block is hang.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
8 years agodrm: Paper over locking inversion after registration rework
Daniel Vetter [Thu, 4 Aug 2016 16:35:48 +0000 (18:35 +0200)]
drm: Paper over locking inversion after registration rework

drm_connector_register_all requires a few too many locks because our
connector_list locking is busted. Add another FIXME+hack to work
around this. This should address the below lockdep splat:

======================================================
[ INFO: possible circular locking dependency detected ]
4.7.0-rc5+ #524 Tainted: G           O
-------------------------------------------------------
kworker/u8:0/6 is trying to acquire lock:
 (&dev->mode_config.mutex){+.+.+.}, at: [<ffffffff815afde0>] drm_modeset_lock_all+0x40/0x120

but task is already holding lock:
 ((fb_notifier_list).rwsem){++++.+}, at: [<ffffffff810ac195>] __blocking_notifier_call_chain+0x35/0x70

which lock already depends on the new lock.

the existing dependency chain (in reverse order) is:

-> #1 ((fb_notifier_list).rwsem){++++.+}:
       [<ffffffff810df611>] lock_acquire+0xb1/0x200
       [<ffffffff819a55b4>] down_write+0x44/0x80
       [<ffffffff810abf91>] blocking_notifier_chain_register+0x21/0xb0
       [<ffffffff814c7448>] fb_register_client+0x18/0x20
       [<ffffffff814c6c86>] backlight_device_register+0x136/0x260
       [<ffffffffa0127eb2>] intel_backlight_device_register+0xa2/0x160 [i915]
       [<ffffffffa00f46be>] intel_connector_register+0xe/0x10 [i915]
       [<ffffffffa0112bfb>] intel_dp_connector_register+0x1b/0x80 [i915]
       [<ffffffff8159dfea>] drm_connector_register+0x4a/0x80
       [<ffffffff8159fe44>] drm_connector_register_all+0x64/0xf0
       [<ffffffff815a2a64>] drm_modeset_register_all+0x174/0x1c0
       [<ffffffff81599b72>] drm_dev_register+0xc2/0xd0
       [<ffffffffa00621d7>] i915_driver_load+0x1547/0x2200 [i915]
       [<ffffffffa006d80f>] i915_pci_probe+0x4f/0x70 [i915]
       [<ffffffff814a2135>] local_pci_probe+0x45/0xa0
       [<ffffffff814a349b>] pci_device_probe+0xdb/0x130
       [<ffffffff815c07e3>] driver_probe_device+0x223/0x440
       [<ffffffff815c0ad5>] __driver_attach+0xd5/0x100
       [<ffffffff815be386>] bus_for_each_dev+0x66/0xa0
       [<ffffffff815c002e>] driver_attach+0x1e/0x20
       [<ffffffff815bf9be>] bus_add_driver+0x1ee/0x280
       [<ffffffff815c1810>] driver_register+0x60/0xe0
       [<ffffffff814a1a10>] __pci_register_driver+0x60/0x70
       [<ffffffffa01a905b>] i915_init+0x5b/0x62 [i915]
       [<ffffffff8100042d>] do_one_initcall+0x3d/0x150
       [<ffffffff811a935b>] do_init_module+0x5f/0x1d9
       [<ffffffff81124416>] load_module+0x20e6/0x27e0
       [<ffffffff81124d63>] SYSC_finit_module+0xc3/0xf0
       [<ffffffff81124dae>] SyS_finit_module+0xe/0x10
       [<ffffffff819a83a9>] entry_SYSCALL_64_fastpath+0x1c/0xac

-> #0 (&dev->mode_config.mutex){+.+.+.}:
       [<ffffffff810df0ac>] __lock_acquire+0x10fc/0x1260
       [<ffffffff810df611>] lock_acquire+0xb1/0x200
       [<ffffffff819a3097>] mutex_lock_nested+0x67/0x3c0
       [<ffffffff815afde0>] drm_modeset_lock_all+0x40/0x120
       [<ffffffff8158f79b>] drm_fb_helper_restore_fbdev_mode_unlocked+0x2b/0x80
       [<ffffffff8158f81d>] drm_fb_helper_set_par+0x2d/0x50
       [<ffffffffa0105f7a>] intel_fbdev_set_par+0x1a/0x60 [i915]
       [<ffffffff814c13c6>] fbcon_init+0x586/0x610
       [<ffffffff8154d16a>] visual_init+0xca/0x130
       [<ffffffff8154e611>] do_bind_con_driver+0x1c1/0x3a0
       [<ffffffff8154eaf6>] do_take_over_console+0x116/0x180
       [<ffffffff814bd3a7>] do_fbcon_takeover+0x57/0xb0
       [<ffffffff814c1e48>] fbcon_event_notify+0x658/0x750
       [<ffffffff810abcae>] notifier_call_chain+0x3e/0xb0
       [<ffffffff810ac1ad>] __blocking_notifier_call_chain+0x4d/0x70
       [<ffffffff810ac1e6>] blocking_notifier_call_chain+0x16/0x20
       [<ffffffff814c748b>] fb_notifier_call_chain+0x1b/0x20
       [<ffffffff814c86b1>] register_framebuffer+0x251/0x330
       [<ffffffff8158fa9f>] drm_fb_helper_initial_config+0x25f/0x3f0
       [<ffffffffa0106b48>] intel_fbdev_initial_config+0x18/0x30 [i915]
       [<ffffffff810adfd8>] async_run_entry_fn+0x48/0x150
       [<ffffffff810a3947>] process_one_work+0x1e7/0x750
       [<ffffffff810a3efb>] worker_thread+0x4b/0x4f0
       [<ffffffff810aad4f>] kthread+0xef/0x110
       [<ffffffff819a85ef>] ret_from_fork+0x1f/0x40

other info that might help us debug this:

 Possible unsafe locking scenario:

       CPU0                    CPU1
       ----                    ----
  lock((fb_notifier_list).rwsem);
                               lock(&dev->mode_config.mutex);
                               lock((fb_notifier_list).rwsem);
  lock(&dev->mode_config.mutex);

 *** DEADLOCK ***

6 locks held by kworker/u8:0/6:
 #0:  ("events_unbound"){.+.+.+}, at: [<ffffffff810a38c9>] process_one_work+0x169/0x750
 #1:  ((&entry->work)){+.+.+.}, at: [<ffffffff810a38c9>] process_one_work+0x169/0x750
 #2:  (registration_lock){+.+.+.}, at: [<ffffffff814c8487>] register_framebuffer+0x27/0x330
 #3:  (console_lock){+.+.+.}, at: [<ffffffff814c86ce>] register_framebuffer+0x26e/0x330
 #4:  (&fb_info->lock){+.+.+.}, at: [<ffffffff814c78dd>] lock_fb_info+0x1d/0x40
 #5:  ((fb_notifier_list).rwsem){++++.+}, at: [<ffffffff810ac195>] __blocking_notifier_call_chain+0x35/0x70

stack backtrace:
CPU: 2 PID: 6 Comm: kworker/u8:0 Tainted: G           O    4.7.0-rc5+ #524
Hardware name: Intel Corp. Broxton P/NOTEBOOK, BIOS APLKRVPA.X64.0138.B33.1606250842 06/25/2016
Workqueue: events_unbound async_run_entry_fn
 0000000000000000 ffff8800758577f0 ffffffff814507a5 ffffffff828b9900
 ffffffff828b9900 ffff880075857830 ffffffff810dc6fa ffff880075857880
 ffff88007584d688 0000000000000005 0000000000000006 ffff88007584d6b0
Call Trace:
 [<ffffffff814507a5>] dump_stack+0x67/0x92
 [<ffffffff810dc6fa>] print_circular_bug+0x1aa/0x200
 [<ffffffff810df0ac>] __lock_acquire+0x10fc/0x1260
 [<ffffffff810df611>] lock_acquire+0xb1/0x200
 [<ffffffff815afde0>] ? drm_modeset_lock_all+0x40/0x120
 [<ffffffff815afde0>] ? drm_modeset_lock_all+0x40/0x120
 [<ffffffff819a3097>] mutex_lock_nested+0x67/0x3c0
 [<ffffffff815afde0>] ? drm_modeset_lock_all+0x40/0x120
 [<ffffffff810fa85f>] ? rcu_read_lock_sched_held+0x7f/0x90
 [<ffffffff81208218>] ? kmem_cache_alloc_trace+0x248/0x2b0
 [<ffffffff815afdc5>] ? drm_modeset_lock_all+0x25/0x120
 [<ffffffff815afde0>] drm_modeset_lock_all+0x40/0x120
 [<ffffffff8158f79b>] drm_fb_helper_restore_fbdev_mode_unlocked+0x2b/0x80
 [<ffffffff8158f81d>] drm_fb_helper_set_par+0x2d/0x50
 [<ffffffffa0105f7a>] intel_fbdev_set_par+0x1a/0x60 [i915]
 [<ffffffff814c13c6>] fbcon_init+0x586/0x610
 [<ffffffff8154d16a>] visual_init+0xca/0x130
 [<ffffffff8154e611>] do_bind_con_driver+0x1c1/0x3a0
 [<ffffffff8154eaf6>] do_take_over_console+0x116/0x180
 [<ffffffff814bd3a7>] do_fbcon_takeover+0x57/0xb0
 [<ffffffff814c1e48>] fbcon_event_notify+0x658/0x750
 [<ffffffff810abcae>] notifier_call_chain+0x3e/0xb0
 [<ffffffff810ac1ad>] __blocking_notifier_call_chain+0x4d/0x70
 [<ffffffff810ac1e6>] blocking_notifier_call_chain+0x16/0x20
 [<ffffffff814c748b>] fb_notifier_call_chain+0x1b/0x20
 [<ffffffff814c86b1>] register_framebuffer+0x251/0x330
 [<ffffffff815b7e8d>] ? vga_switcheroo_client_fb_set+0x5d/0x70
 [<ffffffff8158fa9f>] drm_fb_helper_initial_config+0x25f/0x3f0
 [<ffffffffa0106b48>] intel_fbdev_initial_config+0x18/0x30 [i915]
 [<ffffffff810adfd8>] async_run_entry_fn+0x48/0x150
 [<ffffffff810a3947>] process_one_work+0x1e7/0x750
 [<ffffffff810a38c9>] ? process_one_work+0x169/0x750
 [<ffffffff810a3efb>] worker_thread+0x4b/0x4f0
 [<ffffffff810a3eb0>] ? process_one_work+0x750/0x750
 [<ffffffff810aad4f>] kthread+0xef/0x110
 [<ffffffff819a85ef>] ret_from_fork+0x1f/0x40
 [<ffffffff810aac60>] ? kthread_stop+0x2e0/0x2e0

v2: Rebase onto the right branch (hand-editing patches ftw) and add more
reporters.

Reported-by: Imre Deak <imre.deak@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Reported-by: Jiri Kosina <jikos@kernel.org>
Cc: Jiri Kosina <jikos@kernel.org>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
8 years agodrm: rcar-du: Link HDMI encoder with bridge
Laurent Pinchart [Wed, 3 Aug 2016 20:31:36 +0000 (23:31 +0300)]
drm: rcar-du: Link HDMI encoder with bridge

The conversion of the rcar-du driver from the I2C slave encoder to the
DRM bridge API left the HDMI encoder's bridge pointer NULL, preventing
the bridge from being handled automatically by the DRM core. Fix it.

Fixes: 1d926114d8f4 ("drm: rcar-du: Remove i2c slave encoder interface for hdmi encoder")
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
8 years agoLinux 4.8-rc1
Linus Torvalds [Mon, 8 Aug 2016 01:18:00 +0000 (18:18 -0700)]
Linux 4.8-rc1

8 years agoMerge branch 'for-linus' of git://git.kernel.dk/linux-block
Linus Torvalds [Sun, 7 Aug 2016 23:38:45 +0000 (16:38 -0700)]
Merge branch 'for-linus' of git://git.kernel.dk/linux-block

Pull more block fixes from Jens Axboe:
 "As mentioned in the pull the other day, a few more fixes for this
  round, all related to the bio op changes in this series.

  Two fixes, and then a cleanup, renaming bio->bi_rw to bio->bi_opf.  I
  wanted to do that change right after or right before -rc1, so that
  risk of conflict was reduced.  I just rebased the series on top of
  current master, and no new ->bi_rw usage has snuck in"

* 'for-linus' of git://git.kernel.dk/linux-block:
  block: rename bio bi_rw to bi_opf
  target: iblock_execute_sync_cache() should use bio_set_op_attrs()
  mm: make __swap_writepage() use bio_set_op_attrs()
  block/mm: make bdev_ops->rw_page() take a bool for read/write