T Karthik Reddy [Fri, 2 Apr 2021 07:49:17 +0000 (01:49 -0600)]
xilinx: common: Fix boot script address
Currently u-boot supports addresses upto 39-bits only. If anybody
wants to use addresses of more than 39-bits in Linux they will have
a separate memory node in DT. In such cases they will have multiple
memory nodes.
Currently u-boot selects and runs on lower memory bank region.
But bootscript is being loaded on dram bank 0, where dram bank 0 will
point to 1st memory node in DT. If first memory node is mentioned as
higher ddr(>39-bits address) then u-boot cannot load the bootscript.
So fix this issue by setting bootscript address within the lower memory
bank region.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
T Karthik Reddy [Wed, 31 Mar 2021 05:24:59 +0000 (23:24 -0600)]
xilinx: Enable DFU_TIMEOUT config
Enable CONFIG_DFU_TIMEOUT to set timeout waiting for dfu command.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
T Karthik Reddy [Wed, 31 Mar 2021 05:24:58 +0000 (23:24 -0600)]
xilinx: zynq: Add usb dfu/thor distro boot support
Add support for usb dfu & thor to distro boot on zynq platform.
Add 60s timeout of dfu-utils to start transaction. Remove
DFU_ALT_INFO_RAM as we use bootcmd_usb_dfu instead of dfu_ram.
Remove DFU_ALT_INFO_MMC as part of distro boot cleanup.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
T Karthik Reddy [Wed, 31 Mar 2021 05:24:57 +0000 (23:24 -0600)]
xilinx: versal: Add usb dfu/thor distro boot support
Change "dfu_usb" to "usb_dfu" for better representation and change
required macros. Add 60s timeout of dfu-utils to start transaction.
Add support for usb thor to distro boot. Remove DFU_ALT_INFO_RAM
as we use bootcmd_usb_dfu instead of dfu_ram.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 25 Mar 2021 08:55:30 +0000 (09:55 +0100)]
xilinx: zynqmp: Remove dfu_ram_info setup
The dfu ram info is wired in connection to Linux kernel and certain setup.
We should change this to be more generic as others command. That's why
using boot via script is the way to go.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
T Karthik Reddy [Thu, 25 Mar 2021 05:37:57 +0000 (23:37 -0600)]
xilinx: zynqmp: Add usb dfu/thor distro boot support
In usb boot mode distro boot should select usb device as primary boot
device instead of usb host. So make usb dfu as primary boot device. But do
not list it in boot_targets as fallback option because it is not classic
mode for booting. Using 60s timeout by default should be enough time for
dfu-utils to start transaction. In case none needs this please change
timeout value in the command or disable CONFIG_DFU_TIMEOUT.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 31 Mar 2021 07:05:52 +0000 (09:05 +0200)]
cmd: dfu: Propagate error if dfu gadget fails
On systems without usb gadget dfu core fails which was reported by error
but command itself returns pass which breaks any usage in a script.
That's why propagate error from run_usb_dnl_gadget().
Fixes:
16297cfb2a20 ("usb: new board-specific USB init interface")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 24 Feb 2021 09:44:20 +0000 (10:44 +0100)]
xilinx: Enable redundant variable handling
Enable this feature by default to be able to work with env import/export
commands which are done in this slightly changed variable format (There is
addtional flag fields in variable file which is changing CRC calculation).
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Ashok Reddy Soma [Tue, 23 Feb 2021 15:07:46 +0000 (08:07 -0700)]
xilinx: versal: Add support for saving env based on bootmode
Enable saving variables to MMC(FAT) and SPI based on primary
bootmode. If bootmode is JTAG, dont save env anywhere(NOWHERE).
Enable ENV_FAT_DEVICE_AND_PART="0:auto" for Versal platforms as well.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Ashok Reddy Soma [Tue, 23 Feb 2021 15:07:45 +0000 (08:07 -0700)]
xilinx: zynq: Add support for saving env based on bootmode
Enable saving variables to MMC(FAT), NAND, SPI based on primary
bootmode. If bootmode is JTAG, dont save env anywhere(NOWHERE).
Since most of the flashes on zynq evaluation boards are 16MB in size,
set default ENV_OFFSET to 15MB(0xE00000).
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 24 Feb 2021 09:33:45 +0000 (10:33 +0100)]
env: Setup default value for ENV_OFFSET_REDUND
This variable is used for pointing to location where redundant variables
are located. There is no default value. And it doesn't need to be specified
which is showing as warning when savedefconfig is called.
make xilinx_zynqmp_virt_defconfig
#
# configuration written to .config
#
make savedefconfig
scripts/kconfig/conf --savedefconfig=defconfig Kconfig
.config:199:warning: symbol value '' invalid for ENV_OFFSET_REDUND
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tom Rini [Thu, 22 Apr 2021 15:29:32 +0000 (11:29 -0400)]
Merge branch '2021-04-22-udoo_neo-update'
- Update the udoo_neo platform for DM support
Peter Robinson [Thu, 1 Apr 2021 20:08:13 +0000 (21:08 +0100)]
ARM: imx: udoo_neo: Convert to ethernet DM
Convert the UDOO Neo to ethernet DM support.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Francesco Montefoschi <francesco.montefoschi@udoo.org>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Peter Robinson [Thu, 1 Apr 2021 20:08:12 +0000 (21:08 +0100)]
ARM: imx: udoo_neo: convert to DM_MMC
Convert UDOO Neo to use DM MMC.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Francesco Montefoschi <francesco.montefoschi@udoo.org>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Peter Robinson [Thu, 1 Apr 2021 20:08:11 +0000 (21:08 +0100)]
ARM: imx: udoo_neo: Enable OF_CONTROL and DM gpio/pin control
Enable OF_CONTROL and DM for gpio and pin control support
on the i.MX6SX based Udoo Neo.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Francesco Montefoschi <francesco.montefoschi@udoo.org>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Peter Robinson [Thu, 1 Apr 2021 20:08:10 +0000 (21:08 +0100)]
ARM: board: udoo_neo: Import UDOO Neo dts files
Import the i.MX6SX based UDOO Neo dts files from Linux 5.12-rc1
and sync the i.MX6SX pinfunc.h
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Francesco Montefoschi <francesco.montefoschi@udoo.org>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Tom Rini [Tue, 20 Apr 2021 11:32:04 +0000 (07:32 -0400)]
Merge branch '2021-04-20-assorted-improvements'
- ARM64 GIC fix, CONFIG_IRQ now moved to Kconfig
- IDE, lz4 fixes
- octeontx cleanups / enhancements
- highbank DM migration
- psci updates
- Enable use of -fstack-protector
Joel Peshkin [Sun, 11 Apr 2021 09:21:58 +0000 (11:21 +0200)]
Add support for stack-protector
Add support for stack protector for UBOOT, SPL, and TPL
as well as new pytest for stackprotector
Signed-off-by: Joel Peshkin <joel.peshkin@broadcom.com>
Adjust UEFI build flags.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sun, 11 Apr 2021 09:21:57 +0000 (11:21 +0200)]
x86: correct usage of CFLAGS_NON_EFI
The current usage of the variable CFLAGS_NON_EFI on the x86 architecture
deviates from other architectures.
Variable CFLAGS_NON_EFI is the list of compiler flags to be removed when
building UEFI applications. It is not a list of flags to be added anywhere.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sun, 11 Apr 2021 09:21:56 +0000 (11:21 +0200)]
test: fix test/dm/regmap.c
regmap_read() only fills the first two bytes of val. The last two bytes are
random data from the stack. This means the test will fail randomly.
For low endian systems we could simply initialize val to 0 and get correct
results. But tests should not depend on endianness. So let's use a pointer
conversion instead.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Denys Drozdov [Wed, 7 Apr 2021 12:28:24 +0000 (15:28 +0300)]
toradex: configblock: fix module revision in config block
U-boot might display wrong module revision information
for modules with an assembly version 'K'. "cfgblock create"
does not takes into account all revision digits from PID8.
This fix takes into account all digits of PID8
to store module revision.
Signed-off-by: Denys Drozdov <denys.drozdov@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Igor Opaniuk [Wed, 31 Mar 2021 23:01:56 +0000 (02:01 +0300)]
doc: usage: add usage details for reset cmd
Add usage details for reset command.
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Igor Opaniuk [Wed, 31 Mar 2021 23:01:55 +0000 (02:01 +0300)]
sysreset: provide type of reset in do_reset cmd
Add additional param for reset cmd, which provides type of reset.
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Igor Opaniuk [Wed, 31 Mar 2021 23:01:54 +0000 (02:01 +0300)]
sysreset: psci: use psci driver exported functions
Use psci driver exported functions for reset/poweroff, instead of
invoking directly invoke_psci_fn.
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Igor Opaniuk [Wed, 31 Mar 2021 23:01:53 +0000 (02:01 +0300)]
psci: add features/reset2 support
Adds support for:
* PSCI_FEATURES, which was introduced in PSCI 1.0. This provides API
that allows discovering whether a specific PSCI function is implemented
and its features.
* SYSTEM_RESET2, which was introduced in PSCI 1.1, which extends existing
SYSTEM_RESET. It provides support for vendor-specific resets, providing
reset_type as an additional param.
For additional details visit [1].
Implementations of some functions were borrowed from Linux PSCI driver
code [2].
[1] https://developer.arm.com/documentation/den0022/latest/
[2] drivers/firmware/psci/psci.c
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Igor Opaniuk [Wed, 31 Mar 2021 23:01:52 +0000 (02:01 +0300)]
psci: add v1.0/v1.1 definitions from Linux
Sync and add PSCI API versions 1.0/1.1 definitions from Linux.
Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io>
Tom Rini [Mon, 19 Apr 2021 20:18:49 +0000 (16:18 -0400)]
sysinfo.h: Add re-inclusion guard
Add #ifndef __SYSINFO_H__ ... #endif to prevent re-inclusion of this
file.
Signed-off-by: Tom Rini <trini@konsulko.com>
Andre Przywara [Mon, 12 Apr 2021 00:04:55 +0000 (01:04 +0100)]
arm: highbank: Update maintainership
Rob does not have access to any Calxeda systems anymore, also has
expressed a lack of interest in those systems in the past.
I have multiple working Midway nodes under my desk in the office, so
am happy to take over maintainership.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Mon, 12 Apr 2021 00:04:54 +0000 (01:04 +0100)]
arm: highbank: Do DRAM init from DT
So far U-Boot was hard coding a (surely sufficient) memory size of 512
MB, even though all machines out there have at least 4GB of DRAM.
Since U-Boot uses its memory knowledge to populate the EFI memory map,
we are missing out here, at best losing everything beyond 4GB on Midway
boxes (which typically come with 8GB of DRAM).
Since the management processor populated the DT memory node already with
the detected DRAM size and configuration, we use that to populate
U-Boot's memory bank information, which is the base for the UEFI memory
map.
This finally allows us to get rid of the NR_DRAM_BANKS=0 hack, that we
had in place to avoid U-Boot messing up the DT memory node before
loading the kernel.
Also, to cover the whole of memory, we need to enable PHYS_64BIT.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Mon, 12 Apr 2021 00:04:53 +0000 (01:04 +0100)]
arm: highbank: Remove artificial SDRAM size
So far we were defining a somewhat confusing PHYS_SDRAM_1_SIZE variable,
which originally was only used for setting the memtest boundaries. This
definition in highbank.h has been removed about a year ago (moved to
Kconfig), so we also don't need the hard-coded size definition any longer.
Get rid of the misleading memory size definition, which was actually wrong
anyway (it's 4088 MB for those machines with just 4GB of DRAM).
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Mon, 12 Apr 2021 00:04:52 +0000 (01:04 +0100)]
net: calxedagmac: Convert to DM_ETH
To squash that nasty warning message and make better use of the newly
gained OF_CONTROL feature, let's convert the calxedagmac driver to the
"new" driver model.
The conversion is pretty straight forward, mostly just adjusting the
use of the involved data structures.
The only actual change is the required split of the receive routine into
a receive and free_pkt part.
Also this allows us to get rid of the hardcoded platform information and
explicit init calls.
This also uses the opportunity to wrap the code decoding the MMIO
register base address, to make it safe for using PHYS_64BIT later.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Andre Przywara [Mon, 12 Apr 2021 00:04:51 +0000 (01:04 +0100)]
arm: highbank: Enable OF_CONTROL
All Calxeda machines are actually a poster book example of device tree
usage: the DT is loaded from flash by the management processor into
DRAM, the memory node is populated with the detected DRAM size and this
DT is then handed over to the kernel.
So it's a shame that U-Boot didn't participate in this chain, but
fortunately this is easy to fix:
Define CONFIG_OF_CONTROL and CONFIG_OF_BOARD, and provide a trivial
function to tell U-Boot about the (fixed) location of the DTB in DRAM.
Then enable DM_SERIAL, to let the PL011 driver pick up the UART platform
data from the DT. Also define AHCI, to bring this driver into the driver
model world as well.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Mon, 12 Apr 2021 00:04:50 +0000 (01:04 +0100)]
arm: highbank: Limit FDT and initrd load addresses
So far on Highbank/Midway machines U-Boot only ever uses 512MB of DRAM,
even though the machines have typically 4GB and 8GB, respectively.
That means that so far we didn't need an extra limit for placing the DTB
and initrd, as the 512MB are lower than the kernel's limit ("lowmem",
typically 768MB).
With U-Boot now needing to learn about the actual memory size (to
correctly populate the EFI memory map), it might relocate fdt and initrd
to the end of DRAM, which is out of reach of the kernel.
So add limiting values to the fdt_high and initrd_high environment
variables, to prevent U-Boot from using too high addresses.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Ying-Chun Liu (PaulLiu) [Sat, 27 Mar 2021 13:46:52 +0000 (21:46 +0800)]
doc: device-tree-bindings: regulator: anatop regulator
Document the bindings for fsl,anatop-regulator
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Ying-Chun Liu (PaulLiu) [Sat, 27 Mar 2021 13:46:51 +0000 (21:46 +0800)]
power: regulator: add driver for ANATOP regulator
Anatop is an integrated regulator inside i.MX6 SoC.
There are 3 digital regulators which controls PU, CORE (ARM), and SOC.
And 3 analog regulators which controls 1P1, 2P5, 3P0 (USB).
This patch adds the Anatop regulator driver.
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Heinrich Schuchardt [Sat, 27 Mar 2021 10:43:54 +0000 (11:43 +0100)]
cmd: CONFIG_CMD_MMC depends on CONFIG_MMC
Trying to compile with CONFIG_CMD_MMC=y and CONFIG_MMC=n leads to errors:
riscv64-linux-gnu-ld.bfd: cmd/built-in.o: in function `do_mmcops':
cmd/mmc.c:984: undefined reference to `get_mmc_num'
riscv64-linux-gnu-ld.bfd: cmd/built-in.o: in function `do_mmc_setdsr':
cmd/mmc.c:873: undefined reference to `find_mmc_device'
Add missing dependency.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Tim Harvey [Fri, 26 Mar 2021 00:07:37 +0000 (17:07 -0700)]
net: octeontx: smi: fix mii probe
The fdt node offset is apparently not set properly when probed
causing no MDIO busses to be found. Fix this by obtaining the
offset.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Suneel Garapati [Fri, 26 Mar 2021 00:07:36 +0000 (17:07 -0700)]
drivers: ata: ahci: update max id if it is more than available ports
After check for maximum between max id and available ports, also check
if available port count is less than max id and update.
In the case of the CN8030 OcteonTX SoC max_id needs to be reduced to
the number of ports found otherwise the following occurs on a scan:
GW6404-B> scsi scan
scanning bus for devices...
Target spinup took 0 ms.
AHCI 0001.0300 32 slots 1 ports 6 Gbps 0x1 impl SATA mode
flags: 64bit ncq ilck stag pm led clo only pmp fbss pio slum part ccc
apst
Device 0: (0:0) Vendor: ATA Prod.: SanDisk SD8SFAT0 Rev: Z233
Type: Hard Disk
Capacity: 61057.3 MB = 59.6 GB (
125045424 x 512)
"Synchronous Abort" handler, esr 0x96000006
elr:
000000000052f824 lr :
000000000052fa10 (reloc)
elr:
000000007fee9824 lr :
000000007fee9a10
x0 :
0000000000000001 x1 :
0000000000000001
x2 :
000000007bea3528 x3 :
000000007bea3580
x4 :
0000000000000200 x5 :
0000000000000000
x6 :
0000000000000002 x7 :
000000007bea3540
x8 :
00000000fffffff8 x9 :
0000000000000008
x10:
00000000000186a0 x11:
000000000000000d
x12:
0000000000000006 x13:
000000000001869f
x14:
0000000000000007 x15:
00000000ffffffff
x16:
000000007ff439a5 x17:
000000007ff5730c
x18:
000000007bea9de0 x19:
000000007ff7a580
x20:
000000007bec79f8 x21:
0000000000000000
x22:
000000007bea3580 x23:
0000000000000000
x24:
0000000000000000 x25:
000000007bec7a00
x26:
00000000ffffffc0 x27:
000000007bec79d0
x28:
000000007beb51c0 x29:
000000007bea3480
Code:
91246800 940130c2 12800000 1400004f (
b9402ae0)
Resetting CPU ...
Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tim Harvey [Fri, 26 Mar 2021 00:07:35 +0000 (17:07 -0700)]
drivers: net: octeontx: fix QSGMII
Revert a change that occured between the Marvell SDK-10.1.1.0
and SDK-10.3.1.1 which broke QSMII phy support.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Tim Harvey [Fri, 26 Mar 2021 00:07:34 +0000 (17:07 -0700)]
arm: octeontx: enable WDT_SBSA
The OcteonTX uses ARM's SBSA Watchdog device
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tim Harvey [Fri, 26 Mar 2021 00:07:33 +0000 (17:07 -0700)]
arm: octeontx: support generic distro config
Support Generic Distro Default config
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tim Harvey [Fri, 26 Mar 2021 00:07:32 +0000 (17:07 -0700)]
arm: octeontx: move CONFIG_SUPPORT_RAW_INITRD to configs
Move CONFIG_SUPPORT_RAW_INITRD out of the octeontx_common header
and into the defconfig files.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Karl Beldan [Wed, 17 Mar 2021 22:31:58 +0000 (22:31 +0000)]
lz4: Fix unaligned accesses
Signed-off-by: Karl Beldan <karl.beldan+oss@gmail.com>
Reinoud Zandijk [Wed, 24 Feb 2021 16:44:42 +0000 (17:44 +0100)]
Fix IDE commands issued, fix endian issues, fix non MMIO
Fixes IDE issues found on the Malta board under Qemu:
1) DMA implied commands were sent to the controller in stead of the PIO
variants. The rest of the code is DMA free and written for PIO operation.
2) direct pointer access was used to read and write the registers instead
of the inb/inw/outb/outw functions/macros. Registers don't have to be
memory mapped and ATA_CURR_BASE() does not have to return an offset from
address zero.
3) Endian isues in ide_ident() and reading/writing data in general. Names
were corrupted and sizes misreported.
Tested malta_defconfig and maltael_defconfig to work again in Qemu.
Signed-off-by: Reinoud Zandijk <reinoud@NetBSD.org>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Wasim Khan [Mon, 8 Mar 2021 15:48:16 +0000 (16:48 +0100)]
sandbox: enable IRQ using select for sandbox architecture
Enable IRQ using select for sandbox architecture.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Wasim Khan [Mon, 8 Mar 2021 15:48:15 +0000 (16:48 +0100)]
arch: Kconfig: enable IRQ using select for x86 architecture
use 'select' to enable IRQ as it does not have architecture
specific dependency.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Wasim Khan [Mon, 8 Mar 2021 15:48:14 +0000 (16:48 +0100)]
arch: arm: update Kconfig to select IRQ when GIC_V3_ITS is enabled
GIC_V3_ITS uses UCLASS_IRQ driver. Update Kconfig to select
IRQ when GIC_V3_ITS is enabled.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Wasim Khan [Mon, 8 Mar 2021 15:48:13 +0000 (16:48 +0100)]
misc: make CONFIG_IRQ selectable for all platforms
UCLASS_IRQ driver is not Intel specific. Make CONFIG_IRQ
selectable for all platforms.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Hou Zhiqiang [Fri, 5 Mar 2021 07:02:35 +0000 (15:02 +0800)]
arm64: gic-v3-its: Clear the Pending table before enabling LPIs
The GICv3 RM requires "The first 1KB of memory for the LPI Pending tables
must contain only zeros on initial allocation, and this must be visible
to the Redistributors, or else the effect is UNPREDICTABLE".
And as the following statement, we here clear the whole Pending tables
instead of the first 1KB.
"An LPI Pending table that contains only zeros, including in the first 1KB,
indicates that there are no pending LPIs.
The first 1KB of the LPI Pending table is IMPLEMENTATION DEFINED. However,
if the first 1KB of the LPI Pending table and the rest of the table contain
only zeros, this must indicate that there are no pending LPIs."
And there isn't any pending LPI under U-Boot, so it's unnecessary to
load the contents of the Pending table during the enablement, then set
the GICR_PENDBASER.PTZ flag.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com> # NXP LS1028A
Reviewed-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Neil Armstrong [Fri, 16 Apr 2021 12:22:31 +0000 (14:22 +0200)]
boards: amlogic: update documentation for PCIe support
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Fri, 26 Feb 2021 14:17:36 +0000 (15:17 +0100)]
configs: meson64: add NVME boot target
Let's add a boot target for NVMe so we can do a full boot over NVMe.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Fri, 26 Feb 2021 13:47:06 +0000 (14:47 +0100)]
configs: khadas-vim3: enable PCIe and NVMe
Now we have PCIe, let's also enable NVMe to access an eventual NVMe SSDs
connected on the M.2 slot.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Thu, 25 Feb 2021 17:47:05 +0000 (18:47 +0100)]
arm: dts: meson-khadas-vim3: enable PCIe in U-boot
Enable PCIe by default in u-boot, this should eventually be made dynamic
in the runtime board config depending on the MCU configuration.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Thu, 25 Feb 2021 16:53:23 +0000 (17:53 +0100)]
phy: meson-g12a-usb3-pcie: add support for PCIe ops
Add the PCIe part of the G12A USB3 PCIe Combo PHY driver.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Thu, 25 Feb 2021 17:46:12 +0000 (18:46 +0100)]
clk: meson-g12a: add PCIe gates
Add missing gates used for PCIe.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Stefan Agner [Thu, 8 Apr 2021 08:25:28 +0000 (10:25 +0200)]
arm64: dts: meson: odroidc2: readd PHY reset properties
The sync of the device tree and dt-bindings from Linux v5.6-rc2
11a48a5a18c6 ("Linux 5.6-rc2") causes Ethernet to break on some
ODROID-C2. The PHY seems to need proper reset timing to be functional
in U-Boot and Linux afterwards. Readd the old PHY reset bindings for
dwmac until we support the new bindings in the PHY node.
Fixes:
dd5f2351e99a ("arm64: dts: meson: sync dt and bindings from v5.6-rc2")
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tom Rini [Mon, 19 Apr 2021 17:35:23 +0000 (13:35 -0400)]
Merge tag 'u-boot-amlogic-
20210419' of https://source.denx.de/u-boot/custodians/u-boot-amlogic
- fix Ethernet on Odroid-C2 by re-adding old bindings style PHY reset
- add G12A PCIe clock gates
- add G12A PCIe PHY OPs
- enable PCIe for Khadas VIM3/VIM3L boards DT
- enable PCIe and NVME for Khadas VIM3/VIM3L boards config
- update Amlogic board documentation for PCIe support
Tom Rini [Mon, 19 Apr 2021 15:34:17 +0000 (11:34 -0400)]
Merge tag 'u-boot-atmel-2021.07-b' of https://source.denx.de/u-boot/custodians/u-boot-atmel
Second set of u-boot-atmel features for 2021.07 cycle:
This small feature set include support for 5th PIO bank on pio4 pinctrl
driver and a fix for the SPL on sama5d3.
Alexandru Gagniuc [Thu, 8 Apr 2021 16:56:11 +0000 (11:56 -0500)]
Revert "spl: Drop bd_info in the data section"
This reverts commit
38d6b7ebdaee3e0e8426ef1b9df88bdce8ae2e75.
struct global_data contains a pointer to the bd_info structure. This
pointer was populated spl_set_bd() to a pre-allocated bd_info in the
".data" section. The referenced commit replaced this mechanism to one
that uses malloc(). That new mechanism is only used if SPL_ALLOC_BD=y.
which very few boards do.
The result is that (struct global_data)->bd is NULL in SPL on most
platforms. This breaks falcon mode, since arch_fixup_fdt() tries to
access (struct global_data)->bd and set the "/memory" node in the
devicetree. The result is that the "/memory" node contains garbage
values, causing linux to panic() as it sets up the page table.
Instead of trying to fix the mess, potentially causing other issues,
revert to the code that worked, while this change is reworked.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Neil Armstrong [Fri, 16 Apr 2021 12:22:31 +0000 (14:22 +0200)]
boards: amlogic: update documentation for PCIe support
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Fri, 26 Feb 2021 14:17:36 +0000 (15:17 +0100)]
configs: meson64: add NVME boot target
Let's add a boot target for NVMe so we can do a full boot over NVMe.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Fri, 26 Feb 2021 13:47:06 +0000 (14:47 +0100)]
configs: khadas-vim3: enable PCIe and NVMe
Now we have PCIe, let's also enable NVMe to access an eventual NVMe SSDs
connected on the M.2 slot.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Thu, 25 Feb 2021 17:47:05 +0000 (18:47 +0100)]
arm: dts: meson-khadas-vim3: enable PCIe in U-boot
Enable PCIe by default in u-boot, this should eventually be made dynamic
in the runtime board config depending on the MCU configuration.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Thu, 25 Feb 2021 16:53:23 +0000 (17:53 +0100)]
phy: meson-g12a-usb3-pcie: add support for PCIe ops
Add the PCIe part of the G12A USB3 PCIe Combo PHY driver.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Thu, 25 Feb 2021 17:46:12 +0000 (18:46 +0100)]
clk: meson-g12a: add PCIe gates
Add missing gates used for PCIe.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Stefan Agner [Thu, 8 Apr 2021 08:25:28 +0000 (10:25 +0200)]
arm64: dts: meson: odroidc2: readd PHY reset properties
The sync of the device tree and dt-bindings from Linux v5.6-rc2
11a48a5a18c6 ("Linux 5.6-rc2") causes Ethernet to break on some
ODROID-C2. The PHY seems to need proper reset timing to be functional
in U-Boot and Linux afterwards. Readd the old PHY reset bindings for
dwmac until we support the new bindings in the PHY node.
Fixes:
dd5f2351e99a ("arm64: dts: meson: sync dt and bindings from v5.6-rc2")
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Manuel Reis [Tue, 6 Apr 2021 09:39:53 +0000 (10:39 +0100)]
ARM: dts: at91: sama5d3: add u-boot properties to sama5d3 pit timer
in the early SPL boot stage whenever there is a call to udelay,
dm_timer_init fails to find the pit timer whenever it traverses
the device tree, if this property is not present
Signed-off-by: Manuel Reis <mluis.reis@gmail.com>
CC: Eugen Hristev <eugen.hristev@microchip.com>
Tested-by: Derald D. Woods <woods.technical@gmail.com>
Reviewed-by: Eugen Hristev <eugen.hristev@microchip.com>
Eugen Hristev [Wed, 7 Apr 2021 08:39:29 +0000 (11:39 +0300)]
ARM: dts: at91: sama7g5: change pinctrl compatible to sama7g5
Change the pinctrl compatible to sama7g5, the right one for this product.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Eugen Hristev [Wed, 7 Apr 2021 08:39:28 +0000 (11:39 +0300)]
gpio: atmel_pio4: add support for sama7g5 pio4 version with 5 banks
Add support for sama7g5 pinctrl variant, with 5 banks with a degraded
8 line only 5th bank.
Based on Linux Kernel implementation.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Tom Rini [Sun, 18 Apr 2021 12:47:27 +0000 (08:47 -0400)]
Merge tag 'efi-2021-07-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2021-07-rc1-2
Documentation:
man-page for fatinfo
Bug fixes:
memory leak in efi_capsule_scan_dir()
incorrect invocations of EFI_CALL macro creating ESRT table
buffer overflow in tcg2_create_digest()
Tom Rini [Sun, 18 Apr 2021 12:46:58 +0000 (08:46 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-usb
This is a patchset which makes away with the .bind() controller indexing
workaround which was broken since before v2021.04, and then adds PHY
support and MX8M support on top of that. Better add it into the release
early to get as much testing as possible done, because this really does
a lot of changes to the ehci-mx6 driver.
Tom Rini [Sun, 18 Apr 2021 12:46:39 +0000 (08:46 -0400)]
Merge tag 'ti-v2021.07-rc1' of https://source.denx.de/u-boot/custodians/u-boot-ti
- Support for pinmux status command on beaglebone
- Updates for MMC speed modes for J721e-evm
- Fix MMC booting on omap35_logic_somlv board
Tom Rini [Sun, 18 Apr 2021 12:44:25 +0000 (08:44 -0400)]
Merge branch '2021-04-16-env-updates'
- SPI Flash ENV improvements / cleanups
- Redundant support for FAT
- Assorted bugfixes
Marek Vasut [Wed, 31 Mar 2021 21:46:35 +0000 (23:46 +0200)]
ARM: imx8m: verdin-imx8mm: Enable USB Host support
Enable USB host support on MX8MM Verdin.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Max Krummenacher <max.krummenacher@toradex.com>
Cc: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Marek Vasut [Fri, 2 Apr 2021 12:07:22 +0000 (14:07 +0200)]
usb: ehci-mx6: Add iMX8M support
The iMX8M uses nop PHY, select PHY and NOP_PHY automatically.
Otherwise, the DM capable driver is now perfectly compatible.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Marek Vasut [Tue, 6 Apr 2021 18:37:16 +0000 (20:37 +0200)]
usb: ehci-mx6: Fix aarch64 build warnings
Fix cast from pointer to integer of different size by casting the
pointer to uintptr_t instead of uint32_t, the former has correct
size on both 32bit and 64bit architectures.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Marek Vasut [Fri, 2 Apr 2021 11:07:59 +0000 (13:07 +0200)]
usb: ehci-mx6: Add fsl,imx7d-usb compatible string
Add new compatible string, used by some more up-to-date DTs.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Marek Vasut [Sat, 10 Apr 2021 14:03:04 +0000 (16:03 +0200)]
usb: ehci-mx6: Set default CONFIG_MXC_USB_PORTSC if not defined
There is now multiple copies of CONFIG_MXC_USB_PORTSC in configs set to
PORT_PTS_UTMI | PORT_PTS_PTW, which is in fact the default register value
for MX6, MX7 and MX7ULP. Define the default value of CONFIG_MXC_USB_PORTSC
in the driver and use it in case CONFIG_MXC_USB_PORTSC is not defined in
config, to reduce the duplication.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Marek Vasut [Fri, 2 Apr 2021 11:07:49 +0000 (13:07 +0200)]
usb: ehci-mx6: Add generic EHCI PHY support
In case PHY support is enabled, use the generic EHCI PHY support
to start and stop the PHY.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Marek Vasut [Fri, 2 Apr 2021 11:56:28 +0000 (13:56 +0200)]
usb: ehci-mx6: Use portnr from DT in DM case
In case the platform uses DM, determine port number, which is
used as offset in USBMISC registers, from PHY node DT aliases,
just like Linux does.
Fixes:
4de51cc25b5 ("usb: ehci-mx6: Drop assignment of sequence number")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Marek Vasut [Wed, 31 Mar 2021 21:24:41 +0000 (23:24 +0200)]
usb: ehci-mx6: Pass MISC address to usb_oc_config()
Instead of passing ad-hoc sequence number to usb_oc_config(), pass in
the USB MISC address itself. The USB MISC address comes from DT in DM
case, and from the old method using controller index in non-DM case.
Fixes:
4de51cc25b5 ("usb: ehci-mx6: Drop assignment of sequence number")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Marek Vasut [Wed, 31 Mar 2021 21:00:23 +0000 (23:00 +0200)]
usb: ehci-mx6: Split usb_power_config()
Split usb_power_config() per SoC and pass in USB PHY, USBNC and ANATOP
addresses instead of ad-hoc sequence numbers. This is only applicable
on legacy systems which do not implement proper PHY support. Once PHY
support is available, parts of this can be removed altogether and moved
to the PHY driver, similar to Linux phy-mxs-usb.c .
Fixes:
4de51cc25b5 ("usb: ehci-mx6: Drop assignment of sequence number")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Marek Vasut [Wed, 31 Mar 2021 20:10:35 +0000 (22:10 +0200)]
usb: ehci-mx6: Pass PHY address to usb_*_phy*()
Instead of passing ad-hoc index to USB PHY handling functions and then
try and figure out the PHY address, pass in the PHY address itself. For
DM case, this address comes easily from DT. For non-DM case, the previous
method is still present, however the non-DM case will soon be removed.
Fixes:
4de51cc25b5 ("usb: ehci-mx6: Drop assignment of sequence number")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Marek Vasut [Wed, 31 Mar 2021 19:40:24 +0000 (21:40 +0200)]
usb: ehci-mx6: Split ehci_mx6_common_init()
In order to pass component addresses around easily instead of passing
ad-hoc sequence numbers, it is necessary to split ehci_mx6_common_init().
Make it so and call the separate functions instead.
Since board_ehci_hcd_init() makes no sense in DM case, do not call it
in DM case.
Fixes:
4de51cc25b5 ("usb: ehci-mx6: Drop assignment of sequence number")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Marek Vasut [Wed, 31 Mar 2021 21:06:07 +0000 (23:06 +0200)]
usb: ehci-mx6: Parse USB PHY and MISC offsets from DT
In case DM and OF controler is enabled, but PHY support is disabled,
parse USB PHY and MISC component addresses from DT manually. Those
component addresses will be used in subsequent patches to access the
ANATOP, PHY and MISC registers matching the controller and thus get
rid of the ad-hoc controller sequence number mapping.
Fixes:
4de51cc25b5 ("usb: ehci-mx6: Drop assignment of sequence number")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Marek Vasut [Wed, 31 Mar 2021 20:19:00 +0000 (22:19 +0200)]
usb: ehci-mx6: Unify USBNC registers
Merge USBNC register layout structure into a single one, instead of
having three separate structures and a lot of ifdeffery. No functional
change.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Marek Vasut [Wed, 31 Mar 2021 10:28:03 +0000 (12:28 +0200)]
usb: ehci-mx6: Add DM clock support
Add support for using DM clock framework to enable and disable all the
necessary clock for the USB controller.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Marek Vasut [Wed, 31 Mar 2021 10:19:27 +0000 (12:19 +0200)]
usb: ehci-mx6: Turn off Vbus on probe failure
The driver turns on Vbus regulator in probe, but fails to turn it back
off in case of probe failure. Add the missing code.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Marek Vasut [Fri, 9 Apr 2021 22:19:27 +0000 (00:19 +0200)]
imx: power-domain: Add fsl,imx8mn-gpc compatible string
The driver is compatible with iMX8MN, add missing compatible string.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Marek Vasut [Fri, 2 Apr 2021 11:32:40 +0000 (13:32 +0200)]
imx: power-domain: Add fsl,imx8mm-gpc compatible string
The driver is compatible with iMX8MM, add missing compatible string.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Marek Vasut [Fri, 9 Apr 2021 22:16:06 +0000 (00:16 +0200)]
ARM: dts: imx8mn: Add power domain nodes
Add power domain nodes to DT.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Marek Vasut [Fri, 2 Apr 2021 11:14:53 +0000 (13:14 +0200)]
ARM: dts: imx8mm: Add power domain nodes
Add power domain nodes to DT.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Marek Vasut [Fri, 9 Apr 2021 22:12:03 +0000 (00:12 +0200)]
ARM: dts: imx8mn: Replace deprecated fsl,usbphy DT props with phys
The fsl,usbphy DT property is deprecated, replace it with phys DT
property and specify #phy-cells, so that the generic PHY framework
can parse the PHY bindings without any extra hacking.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Marek Vasut [Wed, 31 Mar 2021 09:47:25 +0000 (11:47 +0200)]
ARM: dts: imx8mm: Replace deprecated fsl,usbphy DT props with phys
The fsl,usbphy DT property is deprecated, replace it with phys DT
property and specify #phy-cells, so that the generic PHY framework
can parse the PHY bindings without any extra hacking.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Marek Vasut [Wed, 31 Mar 2021 09:24:31 +0000 (11:24 +0200)]
ARM: dts: k2g-evm: Use standard compatible string for USB no-op PHY
The standard compatible string is "usb-nop-xceiv", use it.
Note that keystone-k2g.dtsi already uses the aforementioned
compat string, so this patch can only remove the override.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Murali Karicheri <m-karicheri2@ti.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Marek Vasut [Wed, 31 Mar 2021 09:23:36 +0000 (11:23 +0200)]
arc: emsdp/iotdk: Use standard compatible string for USB no-op PHY
The standard compatible string is "usb-nop-xceiv", use it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Murali Karicheri <m-karicheri2@ti.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Marek Vasut [Wed, 31 Mar 2021 09:21:07 +0000 (11:21 +0200)]
phy: nop-phy: Add standard usb-nop-xceiv compat string
The USB no-op PHY uses "usb-nop-xceiv" compatible string. This driver is
compatible with USB no-op PHY, so add the compatible string.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Murali Karicheri <m-karicheri2@ti.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Masahisa Kojima [Wed, 14 Apr 2021 02:55:49 +0000 (11:55 +0900)]
efi_loader: fix possible buffer overflow
Variable "final" will have SHA512 digest, but currently
the array size is not sufficient. Let's fix it.
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Sun, 11 Apr 2021 04:53:04 +0000 (06:53 +0200)]
efi_loader: memory leak in efi_capsule_scan_dir()
If realloc() fails, we should free the old buffer.
Fixes:
c74cd8bd08d1: ("efi_loader: capsule: add capsule_on_disk support")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Sughosh Ganu [Wed, 14 Apr 2021 07:08:25 +0000 (12:38 +0530)]
efi_loader: esrt: Remove incorrect invocations of EFI_CALL macro
Remove function invocations using the EFI_CALL macro for those
functions that do not have an EFI_ENTRY call in their definition. Such
functions can use u-boot api's which rely on u-boot global data(gd)
pointer. The Arm and RiscV architectures maintain a separate gd
pointer, one for u-boot, and a separate gd for the efi application.
Calling a function through the EFI_CALL macro changes the gd pointer
to that used for the efi application, with u-boot gd being
unavailable. Any function then trying to dereference u-boot's gd will
result in an abort.
Fix this issue by removing the EFI_CALL macro for all of such
functions which do not begin by an EFI_ENTRY function call.
Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>