Mathias Fröhlich [Sun, 25 Mar 2018 17:16:54 +0000 (19:16 +0200)]
vbo: Readd the arrays argument to the legacy draw methods.
The legacy draw paths from back before 2012 contained a gl_vertex_array
array for the inputs to be used for draw. So all draw methods from legacy
drivers and everything that goes through tnl are originally written
for this calling convention. The same goes for tools like t_rebase or
vbo_split*, that even partly still have the original calling convention
with a currently unused such pointer.
Back in 2012 patch 50f7e75
mesa: move gl_client_array*[] from vbo_draw_func into gl_context
introduced Array._DrawArrays, which was something that was IMO aiming for
a similar direction than Array._DrawVAO introduced recently.
Now several tools like t_rebase and vbo_split*, which are mostly used by
tnl based drivers, would need to be converted to use the internal
Array._DrawVAO instead of Array._DrawArrays. The same goes for the driver
backends that use any of these tools.
Alternatively we can reintroduce the gl_vertex_array array in its call
argument list and put these tools finally into the tnl directory.
So this change reintroduces this gl_vertex_array array for the legacy
draw paths that are still required for the tools t_rebase and vbo_split*.
A followup will move vbo_split also into tnl.
Note that none of the affected drivers use the DriverFlags.NewArray
driver bit. So it should be safe to remove this also for the legacy
draw path.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 25 Mar 2018 17:16:54 +0000 (19:16 +0200)]
vbo: Remove the now unused vbo draw path.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 25 Mar 2018 17:16:54 +0000 (19:16 +0200)]
tnl: Push down the gl_vertex_array inputs into tnl drivers.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 25 Mar 2018 17:16:54 +0000 (19:16 +0200)]
vbo: Remove vbo_indirect_draw_func.
Remove the vbo_indirect_draw_func vbo callback and make the default
implementation use the drivers main draw callback function directly.
This will be needed with the next changes when drivers without own main
drivers DrawIndirect implementation get moved to the main drivers
Draw method.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 25 Mar 2018 17:16:54 +0000 (19:16 +0200)]
i965: Push down the gl_vertex_array inputs into i965.
Let the i965 backend have its own gl_vertex_array array and basically
reimplement the way _vbo_draw works.
Note that brw_draw_indirect_prims calls brw_draw_prims internally
and gets its update to Array._DrawArray by this way.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Mathias Fröhlich [Sun, 25 Mar 2018 17:16:54 +0000 (19:16 +0200)]
gallium: Push down the gl_vertex_array inputs into gallium.
Let the gallium backend have its own gl_vertex_array array and basically
reimplement the way _vbo_draw works.
Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Jason Ekstrand [Tue, 20 Mar 2018 23:57:51 +0000 (16:57 -0700)]
nir/validator: Validate that all used variables exist
We were validating this for locals but nothing else.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Fri, 23 Mar 2018 16:27:55 +0000 (09:27 -0700)]
intel/vec4: Set channel_sizes for MOV_INDIRECT sources
Otherwise, any indirect push constant access results in an assertion
failure when we start digging through the channel_sizes array. This
fixes dEQP-VK.pipeline.push_constant.graphics_pipeline.dynamic_index_vert
on Haswell. It should be a harmless no-op for GL since indirect push
constants aren't used there.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Fixes:
e69e5c7006d "i965/vec4: load dvec3/4 uniforms first in the..."
Jason Ekstrand [Tue, 20 Mar 2018 19:12:12 +0000 (12:12 -0700)]
nir/lower_indirect_derefs: Support interp_var_at intrinsics
This fixes the fs-interpolateAtCentroid-block-array piglit test on i965.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
Jason Ekstrand [Thu, 15 Mar 2018 23:42:13 +0000 (16:42 -0700)]
nir/vars_to_ssa: Remove copies from the correct set
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable@lists.freedesktop.org
Jason Ekstrand [Fri, 16 Mar 2018 16:52:04 +0000 (09:52 -0700)]
nir: Return a cursor from nir_instr_remove
Because nir_instr_remove is an inline wrapper around nir_instr_remove_v,
the compiler should be able to tell that the return value is unused and
not emit the extra code in most cases.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Thu, 15 Mar 2018 04:44:51 +0000 (21:44 -0700)]
nir: Add src/dest num_components helpers
We already have these for bit_size
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Brian Paul [Tue, 27 Mar 2018 18:39:05 +0000 (12:39 -0600)]
docs: document WGL_SWAP_INTERVAL env var
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Fri, 30 Mar 2018 20:44:50 +0000 (14:44 -0600)]
st/wgl: check if WGL_SWAP_INTERVAL is defined in wglSwapIntervalEXT()
This allows the WGL_SWAP_INTERVAL env var to override any application
calls to wglSwapIntervalEXT(). Useful for debugging, or to set the
interval to zero to effectively disable the swap interval.
Note: we also rename the previous instance of SVGA_SWAP_INTERVAL to
WGL_SWAP_INTERVAL since this is a WGL feature and not related to the
svga driver.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Brian Paul [Tue, 27 Mar 2018 18:56:49 +0000 (12:56 -0600)]
glapi: define GL_API to be KEYWORD1 in glapi_dispatch.c (v2)
This fixes a Windows build warning where the prototypes for the ES
function in the header file don't match the prototypes in this file
because the GL_API and GLAPI macros are defined differently.
v2: defined GL_API to KEYWORD1 instead of GLAPI, per Mathias.
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Brian Paul [Fri, 30 Mar 2018 17:30:05 +0000 (11:30 -0600)]
spirv: s/uint/unsigned/ to fix MSVC build
Reviewed-by: Neil Roberts <nroberts@igalia.com>
Brian Paul [Fri, 30 Mar 2018 17:10:11 +0000 (11:10 -0600)]
nir/spirv: s/uint32_t/SpvOp/ in various functions
The MSVC compiler warns when the function parameter types don't
exactly match with respect to enum vs. uint32_t. Use SpvOp everywhere.
Alternately, uint32_t could be used everywhere. There doesn't seem
to be an advantage to one over the other.
Reviewed-by: Neil Roberts <nroberts@igalia.com>
Brian Paul [Fri, 30 Mar 2018 17:09:07 +0000 (11:09 -0600)]
nir/spirv: fix MSVC syntax error in vtn_handle_texture()
Reviewed-by: Neil Roberts <nroberts@igalia.com>
Brian Paul [Fri, 30 Mar 2018 17:07:46 +0000 (11:07 -0600)]
nir/spirv: move NORETURN annotation on _vtn_fail() prototype
This needs to before the function, not after, to compile with MSVC.
This works with gcc too.
Reviewed-by: Neil Roberts <nroberts@igalia.com>
Brian Paul [Fri, 30 Mar 2018 17:06:50 +0000 (11:06 -0600)]
nir/spirv: fix MSVC warning in vtn_align_u32()
Fixes warning that "negation of an unsigned value results in an
unsigned value".
Reviewed-by: Neil Roberts <nroberts@igalia.com>
Neil Roberts [Fri, 30 Mar 2018 15:12:00 +0000 (09:12 -0600)]
spirv: Fix building with SCons
The SCons build broke with commit
ba975140d3c9 because a SPIR-V
function is called from Mesa main. This adds a convenience library for
SPIR-V and adds it to everything that was including nir. It also adds
both nir and spirv to drivers/x11/SConscript.
Also add nir/spirv modules to osmesa and libgl-gdi targets. (Brian Paul)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105817
Reviewed-by: Brian Paul <brianp@vmware.com>
Tested-by: Brian Paul <brianp@vmware.com>
Brian Paul [Fri, 30 Mar 2018 15:06:01 +0000 (09:06 -0600)]
mesa: fix MSVC bitshift overflow warnings
In the BITFIELD_MASK() macro, if b==32 the expression evaluates to
~0u, but the compiler still sees the expression (1 << 32) in the
unused part and issues a warning about integer bitshift overflow.
Fix that by using (b) % 32 to ensure the max shift is 31 bits.
This issue has been present for a while, but shows up much more
often because of the recent VBO changes.
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Brian Paul [Thu, 29 Mar 2018 01:38:00 +0000 (19:38 -0600)]
st/mesa: add missing GLSL_TYPE_[U]INT8 cases in st_glsl_type_dword_size()
Silences a compiler warning about unhandled enum switch cases.
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Jakob Bornecrantz [Fri, 30 Mar 2018 15:00:09 +0000 (16:00 +0100)]
vbo: MaxVertexAttribStride is not always set
This assert is hit on hardware which does not expose GL 4.4 or GLES 3.1.
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Signed-off-by: Jakob Bornecrantz <jakob@collabora.com>
Daniel Stone [Thu, 22 Mar 2018 15:23:49 +0000 (15:23 +0000)]
x11: Only report supported DRI3/Present versions
The version passed to QueryVersion requests is the version that the
client supports. We were just passing in whatever version of XCB was
present on the system, which may not be a version that Mesa actually
explicitly supports, e.g. it might bring unwanted semantics.
Set specific protocol versions which we support, and only pass those.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Fixes:
7aeef2d4efd ("dri3: allow building against older xcb (v3)")
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Samuel Pitoiset [Mon, 26 Mar 2018 09:28:48 +0000 (11:28 +0200)]
radv: set SAMPLE_RATE to the number of samples of the current fb
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Brian Paul [Fri, 30 Mar 2018 04:02:37 +0000 (22:02 -0600)]
nir: s/uint/unsigned/ to fix MSVC/MinGW build
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Eduardo Lima Mitev [Tue, 10 Oct 2017 12:08:35 +0000 (14:08 +0200)]
i965: Don't call process_glsl_ir() for SPIR-V shaders
v2: Use 'spirv_data' from gl_linked_shader instead, to check if shader
is SPIR-V. (Timothy Arceri)
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Eduardo Lima Mitev [Tue, 10 Oct 2017 12:55:56 +0000 (14:55 +0200)]
i965: Call spirv_to_nir() instead of glsl_to_nir() for SPIR-V shaders
This is the main fork of the shader compilation code-path, where a NIR
shader is obtained by calling spirv_to_nir() or glsl_to_nir(),
depending on its nature..
v2: Use 'spirv_data' member from gl_linked_shader to know which method
to call. (Timothy Arceri)
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Eduardo Lima Mitev [Fri, 13 Oct 2017 08:31:50 +0000 (10:31 +0200)]
mesa/glspirv: Add a _mesa_spirv_to_nir() function
This is basically a wrapper around spirv_to_nir() that includes
arguments setup and post-conversion validation.
v2: * Rebase update (SpirVCapabilities not a pointer anymore,
spirv_to_nir_options added, and others).
* Code-style improvements and remove debug hunk. (Timothy Arceri)
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Eduardo Lima Mitev [Tue, 10 Oct 2017 12:01:45 +0000 (14:01 +0200)]
mesa/program: Link SPIR-V shaders using the SPIR-V code-path
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Eduardo Lima Mitev [Tue, 10 Oct 2017 08:46:29 +0000 (10:46 +0200)]
mesa/glspirv: Add _mesa_spirv_link_shaders() function
This is the equivalent to link_shaders() from
src/compiler/glsl/linker.cpp, but for SPIR-V programs. It just
creates the program and its gl_linked_shader objects, giving drivers
the opportunity to implement any linking of SPIR-V shaders they choose,
at a later stage.
v2: Bail out if we see more that one shader for the same stage, and
add a corresponding comment. (Timothy Arceri)
v3:
* Adds also a linker error log to the condition above, with a
reference to the specification issue. (Timothy Arceri)
* Squash with the patch adding the function boilerplate (Timothy
Arceri)
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Eduardo Lima Mitev [Mon, 13 Nov 2017 18:44:47 +0000 (19:44 +0100)]
mesa: Add a reference to gl_shader_spirv_data to gl_linked_shader
This is a reference to the spirv_data object stored in gl_shader, which
stores shader SPIR-V data that is needed during linking too.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Nicolai Hähnle [Sat, 10 Jun 2017 19:36:24 +0000 (21:36 +0200)]
mesa: Implement glSpecializeShaderARB
v2:
* Use gl_spirv_validation instead of spirv_to_nir. This method just
validates the shader. The conversion to NIR will happen later,
during linking. (Alejandro Piñeiro)
* Use gl_shader_spirv_data struct to store the SPIR-V data.
(Eduardo Lima)
* Use the 'spirv_data' member to tell if the gl_shader is a SPIR-V
shader, instead of a dedicated flag. (Timothy Arceri)
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Signed-off-by: Alejandro Piñeiro <apinheiro@igalia.com>
Signed-off-by: Eduardo Lima Mitev <elima@igalia.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Alejandro Piñeiro [Thu, 18 Jan 2018 11:31:52 +0000 (12:31 +0100)]
nir/spirv: add gl_spirv_validation method
ARB_gl_spirv adds the ability to use SPIR-V binaries, and a new
method, glSpecializeShader. Here we add a new function to do the
validation for this function:
From OpenGL 4.6 spec, section 7.2.1"
"Shader Specialization", error table:
INVALID_VALUE is generated if <pEntryPoint> does not name a valid
entry point for <shader>.
INVALID_VALUE is generated if any element of <pConstantIndex>
refers to a specialization constant that does not exist in the
shader module contained in <shader>.""
v2: rebase update (spirv_to_nir options added, changes on the warning
logging, and others)
v3: include passing options on common initialization, doesn't call
setjmp on common_initialization
v4: (after Jason comments):
* Rename common_initialization to vtn_builder_create
* Move validation method and their helpers to own source file.
* Create own handle_constant_decoration_cb instead of reuse existing one
v5: put vtn_build_create refactoring to their own patch (Jason)
v6: update after vtn_builder_create method renamed, add explanatory
comment, tweak existing comment and commit message (Timothy)
Alejandro Piñeiro [Thu, 18 Jan 2018 11:24:38 +0000 (12:24 +0100)]
spirv: add vtn_create_builder
Refactored from spirv_to_nir, in order to be reused later.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
v2: renamed method (from vtn_builder_create), add explanatory comment
(Timothy)
Alejandro Piñeiro [Sat, 14 Oct 2017 07:23:24 +0000 (09:23 +0200)]
i965: initialize SPIR-V capabilities
Needed for ARB_gl_spirv. Those are not the same that the Intel vulkan
driver. From the ARB_spirv_extensions spec:
"3. If a new GL extension is added that includes SPIR-V support via
a new SPIR-V extension does it's SPIR-V extension also get
enumerated by the SPIR_V_EXTENSIONS_ARB query?.
RESOLVED. Yes. It's good to include it for consistency. Any SPIR-V
functionality supported beyond the SPIR-V version that is required
for the GL API version should be enumerated."
So in addition to the core SPIR-V support, there is the possibility of
specific GL extensions enabling specific SPIR-V extensions (so
capabilities). That would mean that it is possible that OpenGL and
Vulkan not having the same capabilities supported, even for the same
driver. For this reason it is better to keep them separated.
As an example: at the time of this patch writing Intel vulkan driver
support multiview, but there isn't any OpenGL multiview GL extension
supported.
Note: we initialize SPIR-V capabilities at brwCreateContext instead of
the usual brw_initialize_context_constants because we want to do that
only if the extension is enabled.
v2:
* Rebase update (SpirVCapabilities not a pointer anymore)
* Fill spirv capabilities for OpenGL >= 3.3 (Ian Romanick)
v3:
* Drop multiview support, as i965 doesn't support any multiview GL
extension (Jason)
* Fill spirv capabilities only if the extension is enabled (Jason)
v4: Capabilities are supported only on gen7+. Added comment and assert
(Jason)
Nicolai Hähnle [Sat, 10 Jun 2017 19:35:26 +0000 (21:35 +0200)]
mesa: add gl_constants::SpirVCapabilities
For drivers to declare which SPIR-V features they support.
v2: Don't use a pointer (Ian Romanick)
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Ian Romanick [Wed, 18 Oct 2017 15:59:47 +0000 (08:59 -0700)]
i965: Don't request GLSL IR lowering of gl_VertexID
Let the lowering in NIR handle it instead.
This hurts one shader that occurs twice in shader-db (SynMark GSCloth)
on IVB and HSW. No other shaders or platforms were affected.
total cycles in shared programs:
253438422 ->
253438426 (0.00%)
cycles in affected programs: 412 -> 416 (0.97%)
helped: 0
HURT: 2
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Antia Puentes <apuentes@igalia.com>
Ian Romanick [Tue, 27 Mar 2018 00:25:27 +0000 (17:25 -0700)]
i965: Silence unused parameter warning
src/mesa/drivers/dri/i965/brw_draw_upload.c: In function ‘double_types’:
src/mesa/drivers/dri/i965/brw_draw_upload.c:225:34: warning: unused parameter ‘brw’ [-Wunused-parameter]
double_types(struct brw_context *brw,
^~~
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Ian Romanick [Mon, 14 Aug 2017 17:40:09 +0000 (10:40 -0700)]
spirv: Move SPIR-V building to Makefile.spirv.am and spirv/meson.build
Future changes will add generated files used only from
src/compiler/glsl. These can't be built from Makefile.nir.am, and we
can't move all the rules from Makefile.nir.am to Makefile.spirv.am (and
it would be silly anyway).
v2: Do it for meson too.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com> (the meson bits)
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com> (the automake bits)
Ian Romanick [Mon, 14 Aug 2017 17:38:10 +0000 (10:38 -0700)]
compiler: All leaf Makefile.am should use +=
This slightly simplifies later changes that add more Makefile.*.am
files.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Ian Romanick [Wed, 26 Jul 2017 20:32:01 +0000 (13:32 -0700)]
util: Include bitscan.h directly
Previously bitset.h would include u_math.h to get bitscan.h. u_math.h
lives in src/gallium/auxiliary/util while both bitset.h and bitscan.h
live in src/util. Having the one file directly include another file
that lives in the same directory makes much more sense.
As a side-effect, several files need to directly include standard header
files that were previously indirectly included.
v2: Fix build break in src/amd/common/ac_nir_to_llvm.c.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Ian Romanick [Mon, 13 Nov 2017 21:11:09 +0000 (13:11 -0800)]
util: Optimize util_is_power_of_two_nonzero
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Suggested-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Ian Romanick [Mon, 26 Mar 2018 17:52:43 +0000 (10:52 -0700)]
util: Use util_is_power_of_two_nonzero in u_vector
Previously size=0, element_size=0 would have been allowed. That
combination can only lead to despair.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Ian Romanick [Mon, 13 Nov 2017 21:00:53 +0000 (13:00 -0800)]
util: Add and use util_is_power_of_two_nonzero
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Ian Romanick [Mon, 13 Nov 2017 19:17:41 +0000 (11:17 -0800)]
util: Move util_is_power_of_two to bitscan.h and rename to util_is_power_of_two_or_zero
The new name make the zero-input behavior more obvious. The next
patch adds a new function with different zero-input behavior.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Suggested-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Dylan Baker [Mon, 12 Mar 2018 23:39:01 +0000 (16:39 -0700)]
meson: use dep_libdrm version for pkg-config
This corrects pkg-config to use the libdrm version (as computed by the
previous patch) instead of using a hardcoded value that may or may not
(probably not) be right.
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Dylan Baker [Mon, 12 Mar 2018 23:32:59 +0000 (16:32 -0700)]
meson: Use the same version for all libdrm checks
Currently each driver specifies it's own version, and core libdrm
specifies a version. In the most common case this is fine, since there
will be exactly one libdrm installed on a system, but if there are more
than one it's possible that mesa will be linked against different
versions of libdrm. There is also the possibility that the current
approach makes the pkg-config files we generate incorrect, since there
could be #defines that use newer features if they're available.
This patch corrects all of that. All of the versions are still set by
driver (along with a default core version). Then all of the drivers that
are enabled have their versions compared and the highest version is
selected, then all libdrm checks are made with that version.
v2: - Reorder the list to have the name first and whether the dependency
is needed second (Eric)
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Dylan Baker [Mon, 12 Mar 2018 22:58:40 +0000 (15:58 -0700)]
meson: group libdrm dependencies
The reason libdrm is after libdrm_* will be made clear in later patches.
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Brian Paul [Tue, 27 Mar 2018 18:56:19 +0000 (12:56 -0600)]
gl.h: remove stale comment, trailing whitespace
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Brian Paul [Mon, 26 Mar 2018 22:47:46 +0000 (16:47 -0600)]
glapi: add glBlendBarrier(), glPrimitiveBoundingBox() prototypes
in glapi_dispatch.c, as we have for many other GLES functions.
Fixes a cross-compile issue (missing prototype) when GLES support
is disabled.
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Brian Paul [Thu, 22 Mar 2018 15:23:09 +0000 (09:23 -0600)]
st/mesa: silence unhandled switch case warning
And improve the unreachable() error message.
Reviewed-by: Mathias Fröhlich <mathias.froehlich@web.de>
Henri Verbeet [Mon, 26 Mar 2018 14:36:08 +0000 (19:06 +0430)]
mesa: Inherit texture view multi-sample information from the original texture images.
Found running "The Witness" in Wine. Without this patch, texture views created
on multi-sample textures would have a GL_TEXTURE_SAMPLES of 0. All things
considered such views actually work surprisingly well, but when combined with
(plain) multi-sample textures in a framebuffer object, the resulting FBO is
incomplete because the sample counts don't match.
CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Henri Verbeet <hverbeet@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Samuel Pitoiset [Thu, 22 Mar 2018 17:38:04 +0000 (18:38 +0100)]
radv: fix scanning output_usage_mask with structs
To fix a regression in:
dEQP-VK.spirv_assembly.instruction.graphics.variable_init.output.struct
And the following regressions (Polaris only):
dEQP-VK.glsl.indexing.varying_array.*
Fixes:
f3275ca01c ("ac/nir: only enable used channels when exporting parameters")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Karol Herbst [Tue, 27 Mar 2018 01:25:28 +0000 (03:25 +0200)]
nvc0/ir: fix emiting NOTs with predicates
Signed-off-by: Karol Herbst <karolherbst@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Aaron Watry [Wed, 28 Mar 2018 01:26:18 +0000 (20:26 -0500)]
broadcom/vc4: Fix out-of-tree build with automake.
Signed-off-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Eric Anholt [Wed, 28 Mar 2018 18:19:35 +0000 (11:19 -0700)]
broadcom/vc5: Start using nir_opt_move_load_ubo().
In the absence of a general NIR or VIR-level scheduler, this at least
avoids spilling in
GTF-GLES3.gtf.GL3Tests.uniform_buffer_object.uniform_buffer_object_storage_layouts
Eric Anholt [Wed, 28 Mar 2018 05:02:17 +0000 (22:02 -0700)]
broadcom/vc5: Fix setup of integer surface clear values.
I'm disappointed that the compiler didn't warn me about use of
uninitialized uc in these paths. Just use the incoming clear color
instead of the packing temporary if we're doing our own packing.
Fixes GTF-GLES3.gtf.GL3Tests.color_buffer_float.color_buffer_float_clamp_*
Eric Anholt [Wed, 28 Mar 2018 04:52:35 +0000 (21:52 -0700)]
broadcom/vc5: Stop trying to swizzle around RGBA4 clear color.
We always want A in the A slot in the tile buffer, and any other swapping
should happen elsewhere.
Fixes RGBA4-using cases in fbo-clear-formats and
GTF-GLES3.gtf.GL3Tests.color_buffer_float.color_buffer_float_clamp_fixed.
Eric Anholt [Wed, 28 Mar 2018 04:30:42 +0000 (21:30 -0700)]
broadcom/vc5: Work around scissor w/h==0 bug same as rasterizer discard.
The 7268 HW apparently lets some rendering through in this case. Fixes
GTF-GLES2.gtf.GL2FixedTests.scissor.scissor
Eric Anholt [Tue, 27 Mar 2018 22:39:49 +0000 (15:39 -0700)]
st: Don't try to finalize the texture in st_render_texture().
We can't necessarily finalize the texture at this point if we're rendering
to a texture image whose format is different from the baselevel's format.
This was introduced as a fix for fbo-incomplete-texture-03 in
de414f491526610bb260c73805c81ba413388e20, but the later fix for vmware on
that testcase in
95d5c48f68b598cfa6db25f44aac52b3e11403cc made it
unnecessary.
Fixes assertion failures in util_resource_copy_region() in
KHR-GLES3.copy_tex_image_conversions.forbidden.* when trying to finalize
an R8 texture image to the RG8 texture object's pt.
Reviewed-by: Brian Paul <brianp@vmware.com>
Marek Olšák [Wed, 28 Mar 2018 23:59:57 +0000 (19:59 -0400)]
drirc: whitelist glthread for Medieval II: TW, Carnivores: DHR, Far Cry 2
Daniel Schürmann [Thu, 8 Mar 2018 22:13:43 +0000 (23:13 +0100)]
radv: enable VK_AMD_shader_trinary_minmax extension
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Daniel Schürmann [Thu, 8 Mar 2018 21:45:04 +0000 (22:45 +0100)]
ac: add support for trinary_minmax instructions
v2: Add missing break (Bas)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Dave Airlie [Wed, 28 Dec 2016 00:33:07 +0000 (00:33 +0000)]
spirv: add support for SPV_AMD_shader_trinary_minmax
Co-authored-by: Daniel Schürmann <daniel.schuermann@campus.tu-berlin.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Dave Airlie [Wed, 28 Dec 2016 00:31:02 +0000 (00:31 +0000)]
nir: add support for min/max/median of 3 srcs
These are needed for SPV_AMD_shader_trinary_minmax,
the AMD HW supports these.
Co-authored-by: Daniel Schürmann <daniel.schuermann@campus.tu-berlin.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Marek Olšák [Mon, 26 Mar 2018 22:52:23 +0000 (18:52 -0400)]
radeonsi: simplify DCC format categories
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Marek Olšák [Mon, 26 Mar 2018 21:13:31 +0000 (17:13 -0400)]
radeonsi: don't use the SPI barrier management bug workaround
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Marek Olšák [Mon, 26 Mar 2018 21:11:51 +0000 (17:11 -0400)]
radeonsi: use maximum OFFCHIP_BUFFERING on Vega12
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Bas Nieuwenhuizen [Wed, 28 Mar 2018 21:54:40 +0000 (23:54 +0200)]
ac/nir: Add workaround for GFX9 buffer views.
On GFX9 whether the buffer size is interpreted as elements or bytes
depends on whether IDXEN is enabled in the instruction. If the index
is a constant zero, LLVM optimizes IDXEN to 0.
Now the size in elements is interpreted in bytes which of course
results in out of bounds accesses.
The correct fix is most likely to disable the LLVM optimization,
but we need something to work with LLVM <= 6.0.
radeonsi does the max between stride and element count on the CPU
but that results in the size intrinsics returning the wrong size
for the buffer. This would cause CTS errors for radv.
v2: Also include the store changes.
Fixes:
e38685cc62e 'Revert "radv: disable support for VEGA for now."'
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Marek Olšák [Mon, 26 Mar 2018 18:32:56 +0000 (14:32 -0400)]
ac/surface: set AddrSurfInfoIn.format = ADDR_FMT_8 for stencil, add assertions
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105738
Tested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Fri, 16 Mar 2018 17:53:51 +0000 (18:53 +0100)]
radv: enable VK_EXT_sampler_filter_minmax
Only enable for CIK+ because it's buggy on SI.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Sun, 25 Mar 2018 18:05:42 +0000 (20:05 +0200)]
radv: add support for VK_EXT_sampler_filter_minmax
The driver only supports the required formats for now.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Thu, 22 Mar 2018 15:41:43 +0000 (16:41 +0100)]
radv: rename VEGA10 device name
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Thu, 22 Mar 2018 15:41:42 +0000 (16:41 +0100)]
radv: add support for Vega12
Based on RadeonSI. Untested.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Matt Turner [Wed, 28 Mar 2018 18:07:36 +0000 (11:07 -0700)]
build: Fix up nir_intrinsics.Plo
nir_intrinsics.c existed as a static file until commit
76dfed8ae2d5 began
generating it as part of the build process. autotools is incapable of
coping, and so a build-tree from before this commit would then fail with
it:
[4]: *** No rule to make target '../../../mesa/src/compiler/nir/nir_intrinsics.c', needed by 'nir/nir_intrinsics.lo'. Stop.
Add a few lines to configure.ac to update the broken build files.
Fixes:
76dfed8ae2d5 ("nir: mako all the intrinsics")
Dylan Baker [Mon, 26 Mar 2018 18:13:27 +0000 (11:13 -0700)]
autotools: Include intel/dev/meson.build in tarball
Fixes:
272bef0601a1bdb5292771aefc8d62fcbdf4c47f
("intel: Split gen_device_info out into libintel_dev")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Dylan Baker [Mon, 26 Mar 2018 18:10:16 +0000 (11:10 -0700)]
autotools: include meson_get_version
Otherwise meson won't read the VERSION file and won't set a version.
That means that pkg-config files will have version unset as well.
Fixes:
3e9533d9b88d75d99632fa40e38cfed842d10842
("meson: Add script to use VERSION file for getting version")
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Eric Engestrom [Wed, 28 Mar 2018 10:14:40 +0000 (11:14 +0100)]
docs: fix 18.0 release note version
Fixes:
839fb3a696679bfe975c2 "docs: Update 18.0.0 release notes"
Cc: "18.0" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Marek Olšák [Tue, 7 Nov 2017 01:57:36 +0000 (02:57 +0100)]
radeonsi: add support for Vega12
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Mon, 20 Nov 2017 21:02:11 +0000 (22:02 +0100)]
amd/addrlib: update to the latest version for Vega12
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Eric Engestrom [Mon, 26 Mar 2018 14:11:45 +0000 (15:11 +0100)]
gbm: remove never-implemented function
I assume this was implemented in a previous version of that commit, but
was removed in the version that actually landed.
Fixes:
8430af5ebe1ee8119e14 "Add support for swrast to the DRM EGL platform"
Cc: Giovanni Campagna <gcampagna@src.gnome.org>
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Stefan Schake [Tue, 27 Mar 2018 19:40:40 +0000 (21:40 +0200)]
android: Use new nir intrinsics python scripts
Fixes:
76dfed8ae2d5 ("nir: mako all the intrinsics")
Signed-off-by: Stefan Schake <stschake@gmail.com>
Acked-by: Rob Clark <robdclark@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Eric Anholt [Tue, 27 Mar 2018 23:29:10 +0000 (16:29 -0700)]
broadcom/vc5: Fix padding of NPOT miplevels >= 2.
The power-of-two padded size that gets minified is based on level 1's
dimensions, not level 0's, which starts to differ at a width of 9.
Fixes all failures on texelFetch fs sampler2D 1x1x1-64x64x1
Timothy Arceri [Tue, 20 Feb 2018 00:08:11 +0000 (11:08 +1100)]
ac/radeonsi: pass bindless bool to load_sampler_desc()
We also fix the base_index for bindless by using the driver
location.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Timothy Arceri [Tue, 20 Feb 2018 00:06:27 +0000 (11:06 +1100)]
st/glsl_to_nir: set driver location for bindless images and samplers
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Timothy Arceri [Tue, 20 Feb 2018 03:06:27 +0000 (14:06 +1100)]
radeonsi/nir: set uses_bindless_samplers for samplers
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Timothy Arceri [Sun, 18 Feb 2018 21:41:56 +0000 (08:41 +1100)]
nir: add bindless to nir data
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Kenneth Graunke [Mon, 26 Mar 2018 23:10:02 +0000 (16:10 -0700)]
i965: Drop unnecessary bo->align field.
bo->align is always 0; there's no need to waste 8 bytes storing it.
Thanks to C99 initializers zeroing fields, we can completely drop the
only read of the field altogether.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Mon, 26 Mar 2018 22:58:05 +0000 (15:58 -0700)]
i965: Drop unused alignment parameter from brw_bo_alloc().
brw_bo_alloc no longer uses this parameter, so there's no point.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Mon, 26 Mar 2018 22:53:06 +0000 (15:53 -0700)]
i965: Drop alignment parameter from bo_alloc_internal().
Buffers are always page aligned on 965+ hardware; I believe this extra
parameter is a vestige from the Gen2-3 era.
All callers pass 0, and in fact we assert that the alignment is 0 unless
BO_ALLOC_BUSY is set (for some reason). We can just drop the parameter
and set the value to 0 explicitly.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Mon, 26 Mar 2018 22:19:15 +0000 (15:19 -0700)]
i965: Drop BO_ALLOC_BUSY in intel_miptree_create_for_bo().
intel_miptree_create_for_bo does not actually allocate a BO, so
specifying allocation flags accomplishes nothing and is confusing.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Fri, 17 Nov 2017 07:43:48 +0000 (23:43 -0800)]
i965: Drop PIPE_CONTROL_NO_WRITE from various calls.
This is just zero - passing nothing already gives us a post-sync
operation of "nothing".
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Jason Ekstrand [Tue, 27 Mar 2018 23:12:16 +0000 (16:12 -0700)]
nir/intrinsics: Don't report negative dest_components
I have no idea why but having dest_components == -1 was causing a memory
leak somewhere. Without this, you can't get through a full shader-db
run without running out of memory.
Reviewed-by: Rob Clark <robdclark@gmail.com>
Jason Ekstrand [Tue, 27 Mar 2018 23:27:20 +0000 (16:27 -0700)]
intel/fs: Don't emit a des copy for image ops with has_dest == false
This was causing us to walk dest_components times over a thing with no
destination. This happened to work because all of the image intrinsics
without a destination also happened to have dest_components == 0. We
shouldn't be reading dest_components if has_dest == false.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Ilia Mirkin [Sat, 24 Mar 2018 19:15:45 +0000 (15:15 -0400)]
nvc0/ir: fix INTERP_* with indirect inputs
There were two problems, both of which are fixed now:
- The indirect address was not being shifted by 4
- The indirect address was being placed as an argument in the offset case
This fixes some of the new interpolateAt* piglits which now test for
these situations.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Timothy Arceri [Mon, 26 Mar 2018 00:41:51 +0000 (11:41 +1100)]
nir: fix crash in loop unroll corner case
When an if nesting inside anouther if is optimised away we can
end up with a loop terminator and following block that looks like
this:
if ssa_596 {
block block_5:
/* preds: block_4 */
vec1 32 ssa_601 = load_const (0xffffffff /* -nan */)
break
/* succs: block_8 */
} else {
block block_6:
/* preds: block_4 */
/* succs: block_7 */
}
block block_7:
/* preds: block_6 */
vec1 32 ssa_602 = phi block_6: ssa_552
vec1 32 ssa_603 = phi block_6: ssa_553
vec1 32 ssa_604 = iadd ssa_551, ssa_66
The problem is the phis. Loop unrolling expects the last block in
the loop to be empty once we splice the instructions in the last
block into the continue branch. The problem is we cant move phis
so here we lower the phis to regs when preparing the loop for
unrolling. As it could be possible to have multiple additional
blocks/ifs following the terminator we just convert all phis at
the top level of the loop body for simplicity.
We also add some comments to loop_prepare_for_unroll() while we
are here.
Fixes:
51daccb289eb "nir: add a loop unrolling pass"
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105670
Timothy Arceri [Fri, 23 Mar 2018 01:17:07 +0000 (12:17 +1100)]
st/glsl_to_nir: correctly handle arrays packed across multiple vars
Fixes piglit test:
tests/spec/arb_enhanced_layouts/execution/component-layout/vs-fs-array-interleave-range.shader_test
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Timothy Arceri [Fri, 23 Mar 2018 01:10:42 +0000 (12:10 +1100)]
radeonsi/nir: fix input processing for packed varyings
The location was only being incremented the first time we processed a
location. This meant we would incorrectly skip some elements of
an array if the first element was packed and proccessed previously
but other elements were not.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>