Krishna Yarlagadda [Mon, 27 Feb 2023 20:04:28 +0000 (01:34 +0530)]
spi: tegra210-quad: Fix iterator outside loop
Fix warn: iterator used outside loop: 'xfer'. 'xfer' variable contain
invalid value in few conditions. Complete transfer within DATA phase
in successful case and at the end for failed transfer.
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Link:https://lore.kernel.org/all/
202210191211.46FkzKmv-lkp@intel.com/
Fixes: 8777dd9dff40 ("spi: tegra210-quad: Fix combined sequence")
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Link: https://lore.kernel.org/r/20230227200428.45832-1-kyarlagadda@nvidia.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Krishna Yarlagadda [Fri, 24 Feb 2023 16:40:34 +0000 (22:10 +0530)]
spi: tegra210-quad: Fix validate combined sequence
Check for non dma transfers that do not fit in FIFO has issue and skips
combined sequence for Tegra234 & Tegra241 which does not have GPCDMA.
Fixes: 1b8342cc4a38 ("spi: tegra210-quad: combined sequence mode")
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Link: https://lore.kernel.org/r/20230224164034.56933-1-kyarlagadda@nvidia.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Krishna Yarlagadda [Thu, 23 Feb 2023 16:26:34 +0000 (21:56 +0530)]
spi: tegra210-quad: set half duplex flag
Tegra QSPI controller only supports half duplex transfers.
Set half duplex constrain flag.
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Link: https://lore.kernel.org/r/20230223162635.19747-3-kyarlagadda@nvidia.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Dhruva Gole [Thu, 23 Feb 2023 09:52:02 +0000 (15:22 +0530)]
spi: spi-sn-f-ospi: fix duplicate flag while assigning to mode_bits
Replace the SPI_TX_OCTAL flag that appeared two time with SPI_RX_OCTAL
in the chain of '|' operators while assigning to mode_bits
Fixes: 1b74dd64c861 ("spi: Add Socionext F_OSPI SPI flash controller driver")
Reported-by: David Binderman <dcb314@hotmail.com>
Link: https://lore.kernel.org/all/DB6P189MB0568F3BE9384315F5C8C1A3E9CA49@DB6P189MB0568.EURP189.PROD.OUTLOOK.COM/
Cc: stable@vger.kernel.org
Signed-off-by: Dhruva Gole <d-gole@ti.com>
Link: https://lore.kernel.org/r/20230223095202.924626-1-d-gole@ti.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Hongbin Ji [Wed, 22 Feb 2023 09:21:28 +0000 (17:21 +0800)]
spi: cadence-quadspi: Fix cancel the indirect read mask
This is to cancel the indirect read transfer process,
so should be use CQSPI_REG_INDIRECTRD_CANCEL_MASK
Signed-off-by: Hongbin Ji <jhb_ee@163.com>
Link: https://lore.kernel.org/r/20230222092128.4237-1-jhb_ee@163.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Krzysztof Kozlowski [Fri, 17 Feb 2023 15:58:02 +0000 (16:58 +0100)]
spi: dt-bindings: qcom,spi-qcom-qspi: document OPP and power-domains
QSPI on Qualcomm SDM845, SC7180 and SC7280 SoCs uses OPP table (both in
DTS and Linux driver) and is suuplied by CX power domain. Document
missing properties to fix:
sc7280-idp2.dtb: spi@
88dc000: Unevaluated properties are not allowed ('operating-points-v2', 'power-domains' were unexpected)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230217155802.848178-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Bartosz Golaszewski [Thu, 16 Feb 2023 12:30:14 +0000 (13:30 +0100)]
spi: spidev: drop the incorrect notice from Kconfig
The spidev interface has been de-facto stable for many years. This notice
has been unchanged since 2007 and is incorrect so remove it.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Link: https://lore.kernel.org/r/20230216123014.110541-1-brgl@bgdev.pl
Signed-off-by: Mark Brown <broonie@kernel.org>
Dan Carpenter [Wed, 15 Feb 2023 14:05:20 +0000 (17:05 +0300)]
spi: bcm63xx-hsspi: fix error code in probe
This code accidentally returns success instead of a negative error code.
Fixes: 50a6620dd1fb ("spi: bcm63xx-hsspi: Add polling mode support")
Signed-off-by: Dan Carpenter <error27@gmail.com>
Reviewed-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/Y+zmoGH6LubPhiI0@kili
Signed-off-by: Mark Brown <broonie@kernel.org>
Dan Carpenter [Wed, 15 Feb 2023 14:05:32 +0000 (17:05 +0300)]
spi: bcmbca-hsspi: Fix error code in probe() function
This code accidentally returns success instead of a negative error code.
Fixes: a38a2233f23b ("spi: bcmbca-hsspi: Add driver for newer HSSPI controller")
Signed-off-by: Dan Carpenter <error27@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/Y+zmrNJ9zjNQpzWq@kili
Signed-off-by: Mark Brown <broonie@kernel.org>
Christophe JAILLET [Wed, 15 Feb 2023 13:01:28 +0000 (14:01 +0100)]
spi: synquacer: Fix timeout handling in synquacer_spi_transfer_one()
wait_for_completion_timeout() never returns a <0 value. It returns either
on timeout or a positive value (at least 1, or number of jiffies left
till timeout)
So, fix the error handling path and return -ETIMEDOUT should a timeout
occur.
Fixes: b0823ee35cf9 ("spi: Add spi driver for Socionext SynQuacer platform")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
Link: https://lore.kernel.org/r/c2040bf3cfa201fd8890cfab14fa5a701ffeca14.1676466072.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Mark Brown <broonie@kernel.org>
Vadim Fedorenko [Tue, 14 Feb 2023 13:59:28 +0000 (05:59 -0800)]
spi: xilinx: add force_irq for QSPI mode
Xilinx PG158 page 80 [1] states that master transaction inhibit bit must
be set to properly setup the transaction in QSPI mode. Add the force_irq
flag to follow this sequence.
[1] https://docs.xilinx.com/r/en-US/pg153-axi-quad-spi/Dual/Quad-SPI-Mode-Transactions
Signed-off-by: Vadim Fedorenko <vadfed@meta.com>
Link: https://lore.kernel.org/r/20230214135928.1253205-1-vadfed@meta.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Mark Brown [Tue, 14 Feb 2023 18:04:11 +0000 (18:04 +0000)]
spi: STIG Mode Fixes for spi-cadence-qspi driver
Merge series from Dhruva Gole <d-gole@ti.com>:
* Reset the CMD_CTRL Register, without which read/writes in STIG mode
were failing in some cases. The issue came to light while using STIG
Mode for small reads.
* Also add a flag that can allow us to do direct reads but distinguish
direct writes, thus enabling us to disable writes in DAC mode in some
cases that require it. (Like to write to some connected Flash registers)
* Fix register reads in STIG mode and also use STIG mode while reading flash
registers.
Currently if you try to read a register while in STIG mode there is no
support for ADDR and thus naturally a register never gets read from the
flash.
This patch series has been tested on a TI AM625-SK-EVM with both a quad
spi nor flash (s25hs) and OSPI NOR Flash (s28hs).
Output of ltp-ddt test, "DD_RW_ERASESIZE_UBIFS" run with s25hs512t flash:
...
[ 2.334068] spi-nor spi0.0: s25hs512t (65536 Kbytes)
[ 2.339185] 7 fixed-partitions partitions found on MTD device
fc40000.spi.0
[ 2.346158] Creating 7 MTD partitions on "
fc40000.spi.0":
[ 2.351555] 0x000000000000-0x000000080000 : "ospi.tiboot3"
[ 2.358344] 0x000000080000-0x000000280000 : "ospi.tispl"
[ 2.364788] 0x000000280000-0x000000680000 : "ospi.u-boot"
[ 2.371311] 0x000000680000-0x0000006c0000 : "ospi.env"
[ 2.377519] 0x0000006c0000-0x000000700000 : "ospi.env.backup"
[ 2.384419] 0x000000800000-0x000003fc0000 : "ospi.rootfs"
[ 2.390890] 0x000003fc0000-0x000004000000 : "ospi.phypattern"
..snip..
Test Start Time: Wed Jan 11 21:14:31 2023
-----------------------------------------
Testcase Result Exit Value
-------- ------ ----------
OSPI_S_FUNC_DD_RW_ERASESIZE_UBIFS PASS 0
-----------------------------------------------
Total Tests: 1
Total Skipped Tests: 0
Total Failures: 0
Kernel Version:
6.2.0-rc1-00040-g700d796a94e0-dirty
Machine Architecture: aarch64
Hostname: am62xx-evm
Alain Volmat [Mon, 13 Feb 2023 19:23:48 +0000 (20:23 +0100)]
spi: spi-st-ssc: convert to DT schema
Convert spi-st-ssc.txt into st,ssc-spi.yaml for the
ST Microelectronics SSC SPI driver.
Signed-off-by: Alain Volmat <avolmat@me.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230213192349.17101-1-avolmat@me.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Christophe JAILLET [Tue, 14 Feb 2023 10:34:50 +0000 (11:34 +0100)]
spi: Reorder fields in 'struct spi_transfer'
Group some variables based on their sizes to reduce hole and avoid padding.
On x86_64, this shrinks the size from 144 to 128 bytes.
Turn 'timestamped' into a bitfield so that it can be easily merged with
some other bifields and move 'error'.
This should have no real impact on memory allocation because 'struct
spi_transfer' is mostly used on stack, but it can save a few cycles
when the structure is initialized or copied.
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Link: https://lore.kernel.org/r/93a051da85a895bc6003aedfb00a13e1c2fc6338.1676370870.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Mark Brown <broonie@kernel.org>
Dhruva Gole [Wed, 25 Jan 2023 08:10:23 +0000 (13:40 +0530)]
spi: cadence-quadspi: use STIG mode for small reads
Fix the issue where some flash chips like cypress S25HS256T return the
value of the same register over and over in DAC mode.
For example in the TI K3-AM62x Processors refer [0] Technical Reference
Manual there is a layer of digital logic in front of the QSPI/OSPI
Drive when used in DAC mode. This is part of the Flash Subsystem (FSS)
which provides access to external Flash devices.
The FSS0_0_SYSCONFIG Register (Offset = 4h) has a BIT Field for
OSPI_32B_DISABLE_MODE which has a Reset value = 0. This means, OSPI 32bit
mode enabled by default.
Thus, by default controller operates in 32 bit mode causing it to always
align all data to 4 bytes from a 4byte aligned address. In some flash
chips like cypress for example if we try to read some regs in DAC mode
then it keeps sending the value of the first register that was requested
and inorder to read the next reg, we have to stop and re-initiate a new
transaction.
This causes wrong register values to be read than what is desired when
registers are read in DAC mode. Hence if the data.nbytes is very less
then prefer STIG mode for such small reads.
[0] https://www.ti.com/lit/ug/spruiv7a/spruiv7a.pdf
Signed-off-by: Dhruva Gole <d-gole@ti.com>
Link: https://lore.kernel.org/r/20230125081023.1573712-5-d-gole@ti.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Dhruva Gole [Wed, 25 Jan 2023 08:10:22 +0000 (13:40 +0530)]
spi: cadence-quadspi: setup ADDR Bits in cmd reads
Setup the Addr bit field while issuing register reads in STIG mode. This
is needed for example flashes like cypress define in their transaction
table that to read any register there is 1 cmd byte and a few more address
bytes trailing the cmd byte. Absence of addr bytes will obviously fail
to read correct data from flash register that maybe requested by flash
driver because the controller doesn't even specify which address of the
flash register the read is being requested from.
Signed-off-by: Dhruva Gole <d-gole@ti.com>
Link: https://lore.kernel.org/r/20230125081023.1573712-4-d-gole@ti.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Dhruva Gole [Wed, 25 Jan 2023 08:10:21 +0000 (13:40 +0530)]
spi: cadence-quadspi: Add flag for direct mode writes
Create new flag inorder to avoid playing with use_direct_mode
flag currently being used throughout the driver.
Disable DAC write if auto polling is disabled or CQSPI_DISABLE_DAC_MODE
is set.
Signed-off-by: Dhruva Gole <d-gole@ti.com>
Link: https://lore.kernel.org/r/20230125081023.1573712-3-d-gole@ti.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Dhruva Gole [Wed, 25 Jan 2023 08:10:20 +0000 (13:40 +0530)]
spi: cadence-quadspi: Reset CMD_CTRL Reg on cmd r/w completion
If one leaves the CQSPI_REG_CMDCTRL in an unclean state this may cause
issues in future command reads. This issue came to light when some flash
reads in STIG mode were coming back dirty.
Signed-off-by: Dhruva Gole <d-gole@ti.com>
Link: https://lore.kernel.org/r/20230125081023.1573712-2-d-gole@ti.com
Signed-off-by: Mark Brown <broonie@kernel.org>
William Zhang [Sun, 12 Feb 2023 20:50:54 +0000 (12:50 -0800)]
MAINTAINERS: Remove file reference for Broadcom Broadband SoC HS SPI driver entry
brcm,bcm63xx-hsspi-peripheral-props.yaml is not in use at least for now.
Remove it from the maintainer entry.
Fixes: 80323599e33f ("MAINTAINERS: Add entry for Broadcom Broadband SoC HS SPI drivers")
Reported-by: kernel test robot <lkp@intel.com>
https://lore.kernel.org/oe-kbuild-all/
202302121840.GtduUT37-lkp@intel.com/
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230212205054.26348-1-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
William Zhang [Sat, 11 Feb 2023 03:27:59 +0000 (19:27 -0800)]
spi: bcm63xx-hsspi: bcmbca-hsspi: fix _be16 type usage
sparse tool report warnings: drivers/spi/spi-bcm63xx-hsspi.c:197:31:
sparse: sparse: cast from restricted __be16.
The controller requires big endian 16 bit data. Define an intermediate
u16 value and use __be16 piointer dereferncing for the data to avoid
directly casting to u16 and sparse warning.
Fixes: 85a84a616999 ("spi: bcm63xx-hsspi: Endianness fix for ARM based SoC")
Reported-by: kernel test robot <lkp@intel.com>
Link: https://lore.kernel.org/oe-kbuild-all/202302110438.sQwQnU54-lkp@intel.com/
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230211032759.72967-1-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
William Zhang [Thu, 9 Feb 2023 20:02:46 +0000 (12:02 -0800)]
MAINTAINERS: Add entry for Broadcom Broadband SoC HS SPI drivers
The driver and device tree doc were originally authored by Jonas Gorski
and it has been updated from Broadcom recently including the dts yaml
file and a new driver for the updated controller. Add Jonas Gorski and
Broadcom engineers William Zhang and Kursad Oney as the maintainers.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20230209200246.141520-16-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
William Zhang [Thu, 9 Feb 2023 20:02:45 +0000 (12:02 -0800)]
spi: bcmbca-hsspi: Add driver for newer HSSPI controller
The newer BCMBCA SoCs such as BCM6756, BCM4912 and BCM6855 include an
updated SPI controller that add the capability to allow the driver to
control chip select explicitly. Driver can control and keep cs low
between the transfers natively. Hence the dummy cs workaround or prepend
mode found in the bcm63xx-hsspi driver are no longer needed and this new
driver is much cleaner.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230209200246.141520-15-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
William Zhang [Thu, 9 Feb 2023 20:02:44 +0000 (12:02 -0800)]
spi: bcm63xx-hsspi: Disable spi mem dual io read op support
In general the controller supports SPI dual mode operation but the
particular SPI flash dual io read op switches from single mode in cmd
phase to dual mode in address and data phase. This is not compatible
with prepend operation where cmd and address are sent out through the
prepend buffer and they must use same the number of io pins.
This patch disables these SPI flash dual io read ops through the mem_ops
supports_op interface. This makes sure the SPI flash driver selects the
compatible read ops at run time.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230209200246.141520-14-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
William Zhang [Thu, 9 Feb 2023 20:02:43 +0000 (12:02 -0800)]
spi: spi-mem: Allow controller supporting mem_ops without exec_op
Currently exec_op is always required if controller driver provides
mem_ops. But some controller such as bcm63xx-hsspi may only need to
implement other operation like supports_op and use the default
execution operation. This patch removes this restriction.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230209200246.141520-13-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
William Zhang [Thu, 9 Feb 2023 20:02:42 +0000 (12:02 -0800)]
spi: bcm63xx-hsspi: Add prepend mode support
Due to the controller limitation to keep the chip select low during the
bus idle time between the transfer, a dummy cs workaround was used when
this driver was first upstreamed to the kernel. It basically picks the
dummy cs as !actual_cs so typically dummy cs is 1 when most of the case
only cs 0 is used in the board design. Then invert the polarity of both
cs and tell the controller to start the transfers using dummy cs.
Assuming both cs are active low before the inversion, effectively this
keeps dummy cs high and actual cs low during the transfer and workaround
the issue.
This workaround implies that dummy cs 1 pin has to be set to chip
selection function in the pinmux when the transfer clock is above
25MHz. The old chips likely have default pinmux set to chip select on
the dummy cs pin so it works but this is not case for the new Broadband
BCA chips and this workaround stop working. This is specifically an
issue to support SPI NAND and SPI NOR flash because these flash devices
can typically run at or above 100MHz.
This patch utilizes the prepend feature of the controller to combine the
multiple transfers in the same message to a single transfer when
possible. This way there is no need to keep clock low between transfers
and solve the issue without any hardware requirement.
Multiple transfers within a SPI message may be combined into one
transfer if the following are all true:
* One or more half duplex write transfer in single bit mode
* Optional full duplex read/write at the end
* No delay and cs_change between transfers
Most of the SPI device meets this requirements such as SPI NOR,
SPI NAND flash, Broadcom SPI voice card and etc. For any SPI message
that does not meet the above requirement to combine the transfers, we
switch to original dummy cs mode but limit the clock rate to the safe
25MHz. This is the default auto transfer mode and it makes sure all the
SPI message can be supported automatically under the hood.
This patch also adds the driver sysfs node xfer_mode to provide
the option for overriding the default auto mode and force it to dummy cs
or prepend mode.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230209200246.141520-12-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
William Zhang [Thu, 9 Feb 2023 20:02:41 +0000 (12:02 -0800)]
spi: bcm63xx-hsspi: Fix multi-bit mode setting
Currently the driver always sets the controller to dual data bit mode
for both tx and rx data in the profile mode control register even for
single data bit transfer. Luckily the opcode is set correctly according
to SPI transfer data bit width so it does not actually cause issues.
This change fixes the problem by setting tx and rx data bit mode field
correctly according to the actual SPI transfer tx and rx data bit width.
Fixes: 142168eba9dc ("spi: bcm63xx-hsspi: add bcm63xx HSSPI driver")
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230209200246.141520-11-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
William Zhang [Thu, 9 Feb 2023 20:02:40 +0000 (12:02 -0800)]
spi: bcm63xx-hsspi: Handle cs_change correctly
The kernel SPI interface includes the cs_change flag that alters how
the CS behaves.
If we're in the middle of transfers, it tells us to unselect the
CS momentarily since the target device requires that.
If we're at the end of a transfer, it tells us to keep the CS
selected, perhaps because the next transfer is likely targeted
to the same device.
We implement this scheme in the HSSPI driver in this change.
Prior to this change, the CS would toggle momentarily if cs_change
was set for the last transfer. This can be ignored by some or
most devices, but the Microchip TPM2 device does not ignore it.
With the change, the behavior is corrected and the 'glitch' is
eliminated.
Signed-off-by: Kursad Oney <kursad.oney@broadcom.com>
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230209200246.141520-10-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
William Zhang [Thu, 9 Feb 2023 20:02:39 +0000 (12:02 -0800)]
spi: export spi_transfer_cs_change_delay_exec function
For SPI controller that implements transfer_one_message, it needs to
insert the delay that required by cs change event between the transfers.
Add a wrapper for the local function _spi_transfer_cs_change_delay_exec
and export it for SPI controller driver to use.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230209200246.141520-9-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Mauro Lima [Fri, 10 Feb 2023 16:41:58 +0000 (13:41 -0300)]
spi: intel: Update help text of PCI and Platform drivers
Modern intel hardware uses controllers that work in hardware
sequencing mode. In this mode, the controller exposes a subset
of operations, like read, write and erase, making it easier
and less error-prone for use.
On the other hand, most of the controllers handled by the
platform driver use software sequencing that exposes the
entire set of operations i.e. exposes the low level SPI-NOR
opcodes to the software for use.
Update PCI and Platform help text with this information.
Signed-off-by: Mauro Lima <mauro.lima@eclypsium.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Link: https://lore.kernel.org/r/20230210164158.211065-1-mauro.lima@eclypsium.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Mark Brown [Thu, 9 Feb 2023 19:17:56 +0000 (19:17 +0000)]
Add MediaTek MT7986 SPI NAND support
Merge series from Xiangsheng Hou <xiangsheng.hou@mediatek.com>:
This patch series split from bellow series which pick-up spi relevant patches
https://lore.kernel.org/all/
20230130030656.12127-1-xiangsheng.hou@mediatek.com.
This series add MediaTek MT7986 SPI NAND controller support, add read latch
latency, smaple delay adjust and add optional nfi_hclk.
Xiangsheng Hou [Wed, 1 Feb 2023 02:09:21 +0000 (10:09 +0800)]
spi: dt-bindings: mtk-snfi: Add read latch latency property
Add mediatek,rx-latch-latency-ns property which adjust data read
latch latency in the unit of nanoseconds.
Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230201020921.26712-6-xiangsheng.hou@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Xiangsheng Hou [Wed, 1 Feb 2023 02:09:19 +0000 (10:09 +0800)]
spi: dt-bindings: mtk-snfi: Add compatible for MT7986
Add dt-bindings documentation of SPI NAND controller
for MediaTek MT7986 SoC platform. And add optional
nfi_hclk property which is needed for MT7986.
Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230201020921.26712-4-xiangsheng.hou@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Xiangsheng Hou [Wed, 1 Feb 2023 02:09:20 +0000 (10:09 +0800)]
spi: mtk-snfi: Add snfi sample delay and read latency adjustment
Add snfi sample delay and read latency adjustment which can get
from dts property.
Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230201020921.26712-5-xiangsheng.hou@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Xiangsheng Hou [Wed, 1 Feb 2023 02:09:18 +0000 (10:09 +0800)]
spi: mtk-snfi: Add optional nfi_hclk which is needed for MT7986
Add optional nfi_hclk which is needed for MT7986.
Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230201020921.26712-3-xiangsheng.hou@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Xiangsheng Hou [Wed, 1 Feb 2023 02:09:17 +0000 (10:09 +0800)]
spi: mtk-snfi: Change default page format to setup default setting
Change default page format to setup default setting since the sector
size 1024 on MT7986 will lead to probe fail.
Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
Link: https://lore.kernel.org/r/20230201020921.26712-2-xiangsheng.hou@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
William Zhang [Tue, 7 Feb 2023 06:58:18 +0000 (22:58 -0800)]
spi: bcm63xx-hsspi: Add polling mode support
Polling mode provides better throughput in general by avoiding the
interrupt overhead as the maximum data size one interrupt can handle is
only 512 bytes. So switch to polling mode as the default mode but add
a driver sysfs option wait_mode to allow user manually changing the mode
at run time between interrupt and polling. Also add driver banner
message when the driver is loaded successfully.
When test on a Broadcom BCM47622(ARM A7 dual core) reference board with
WINBOND W25N01GV SPI NAND chip at 100MHz SPI clock using the MTD speed
test suite, it shows about 15% improvement on the write and 30% on
the read:
** Interrupt mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size
134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3072 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 6690 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3066 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 6762 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3071 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 6772 KiB/s
** Polling mode **
mtd_speedtest: MTD device: 0 count: 16
mtd_speedtest: MTD device size
134217728, eraseblock size 131072, page
size 2048, count of eraseblocks 1024, pages per eraseblock 64, OOB size
64
mtd_test: scanning for bad eraseblocks
mtd_test: scanned 16 eraseblocks, 0 are bad
mtd_speedtest: testing eraseblock write speed
mtd_speedtest: eraseblock write speed is 3542 KiB/s
mtd_speedtest: testing eraseblock read speed
mtd_speedtest: eraseblock read speed is 8825 KiB/s
mtd_speedtest: testing page write speed
mtd_speedtest: page write speed is 3563 KiB/s
mtd_speedtest: testing page read speed
mtd_speedtest: page read speed is 8787 KiB/s
mtd_speedtest: testing 2 page write speed
mtd_speedtest: 2 page write speed is 3572 KiB/s
mtd_speedtest: testing 2 page read speed
mtd_speedtest: 2 page read speed is 8806 KiB/s
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230207065826.285013-8-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
William Zhang [Tue, 7 Feb 2023 06:58:17 +0000 (22:58 -0800)]
spi: bcm63xx-hsspi: Endianness fix for ARM based SoC
HSSPI controller uses big endian for the opcode in the message to the
controller ping pong buffer. Use cpu_to_be16 to properly handle the
endianness for both big and little endian host.
Fixes: 142168eba9dc ("spi: bcm63xx-hsspi: add bcm63xx HSSPI driver")
Signed-off-by: Kursad Oney <kursad.oney@broadcom.com>
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Link: https://lore.kernel.org/r/20230207065826.285013-7-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
William Zhang [Tue, 7 Feb 2023 06:58:16 +0000 (22:58 -0800)]
spi: bcm63xx-hsspi: Add new compatible string support
New compatible string brcm,bcmbca-hsspi-v1.0 is introduced based on dts
document brcm,bcm63xx-hsspi.yaml. Add it to the driver to support this
new binding.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230207065826.285013-6-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
William Zhang [Tue, 7 Feb 2023 06:58:13 +0000 (22:58 -0800)]
spi: Add bcmbca-hsspi controller bindings
The new Broadcom Broadband BCMBCA SoCs includes a updated HSSPI
controller. Add new compatible strings to differentiate the old and new
controller while keeping MIPS based chip with the old compatible. Update
property requirements for these two revisions of the controller. Also
add myself and Kursad as the maintainers.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230207065826.285013-3-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
William Zhang [Tue, 7 Feb 2023 06:58:12 +0000 (22:58 -0800)]
spi: Convert bcm63xx-hsspi bindings to json-schema
This is the preparation for updates on the bcm63xx hsspi driver. Convert
the text based bindings to json-schema per new dts requirement.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230207065826.285013-2-william.zhang@broadcom.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Mauro Lima [Mon, 6 Feb 2023 18:31:43 +0000 (15:31 -0300)]
spi: intel: Remove DANGEROUS tag from pci driver
Modern CPUs exposes this controller as PCI device that only uses
hardware sequencing capabilities which is safer than software
sequencing.
Leave the platform driver as *DANGEROUS* and update help text since
most of these controllers are using software sequencing.
Signed-off-by: Mauro Lima <mauro.lima@eclypsium.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Link: https://lore.kernel.org/r/20230206183143.75274-2-mauro.lima@eclypsium.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Dan Carpenter [Mon, 6 Feb 2023 14:47:38 +0000 (17:47 +0300)]
spi: spidev: Fix double unlock in spidev_sync()
This unlocks twice due to a merge issue.
Fixes: 35bba23e6732 ("Merge remote-tracking branch 'spi/for-6.2' into spi-6.2")
Signed-off-by: Dan Carpenter <error27@gmail.com>
Link: https://lore.kernel.org/r/Y+ETCk7XKfAy8yWQ@kili
Signed-off-by: Mark Brown <broonie@kernel.org>
Mark Brown [Mon, 6 Feb 2023 14:50:53 +0000 (14:50 +0000)]
spi: Merge fixes
The automated merge for the spidev locking fixes is going wrong and
merging the unlock twice.
Mauro Lima [Wed, 1 Feb 2023 20:54:55 +0000 (17:54 -0300)]
spi: intel: Add support for controllers
Add Device IDs to the module table for the following controllers:
- 9da4 Cannon Lake 300 Series On-Package
- a2a4 200 Series/Z370 Chipset Family SPI Controller
- 9d24 Intel® 200 Series Chipset Family (Including Intel® X299),
Intel® Z370 Intel® H310C,B365,
also Intel® B460 and H410 Chipset Platform Controller Hub
Signed-off-by: Mauro Lima <mauro.lima@eclypsium.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Link: https://lore.kernel.org/r/20230201205455.550308-3-mauro.lima@eclypsium.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Mauro Lima [Wed, 1 Feb 2023 20:54:54 +0000 (17:54 -0300)]
spi: intel: Fix device private data and PR_NUM for Broxton controllers
Some private data fields have to change from bxt_info to cnl_info.
Here is the list of Device IDs with the respective documentation taken for
validation:
0xa0a4 - Intel® 500 Series Chipset Family On-Package PCH
0x02a4 - Intel® 400 Series Chipset Family On-Package PCH
0x06a4 - Intel® 400 Series Chipset Family Platform Controller Hub
0x34a4 - Intel® 495 Chipset Family On-Package
0xa3a4 - Intel® B460 and H410 Chipset
According to documentation Broxton controller type has five PR registers.
Signed-off-by: Mauro Lima <mauro.lima@eclypsium.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Link: https://lore.kernel.org/r/20230201205455.550308-2-mauro.lima@eclypsium.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Mark Brown [Wed, 1 Feb 2023 16:56:47 +0000 (16:56 +0000)]
spi: Abstract access to chip selects
Merge series from Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>:
In preparation for supporting devices with multiple chip selects add an
interface for accessing the chip selects via a function.
Amit Kumar Mahapatra [Thu, 19 Jan 2023 18:53:30 +0000 (00:23 +0530)]
spi: Add APIs in spi core to set/get spi->chip_select and spi->cs_gpiod
Supporting multi-cs in spi core and spi controller drivers would require
the chip_select & cs_gpiod members of struct spi_device to be an array.
But changing the type of these members to array would break the spi driver
functionality. To make the transition smoother introduced four new APIs to
get/set the spi->chip_select & spi->cs_gpiod and replaced all
spi->chip_select and spi->cs_gpiod references in spi core with the API
calls.
While adding multi-cs support in further patches the chip_select & cs_gpiod
members of the spi_device structure would be converted to arrays & the
"idx" parameter of the APIs would be used as array index i.e.,
spi->chip_select[idx] & spi->cs_gpiod[idx] respectively.
Suggested-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>
Reviewed-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20230119185342.2093323-2-amit.kumar-mahapatra@amd.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Arnd Bergmann [Mon, 30 Jan 2023 14:01:40 +0000 (15:01 +0100)]
spi: dw_bt1: fix MUX_MMIO dependencies
Selecting a symbol with additional dependencies requires
adding the same dependency here:
WARNING: unmet direct dependencies detected for MUX_MMIO
Depends on [n]: MULTIPLEXER [=y] && OF [=n]
Selected by [y]:
- SPI_DW_BT1 [=y] && SPI [=y] && SPI_MASTER [=y] && SPI_DESIGNWARE [=y] && (MIPS_BAIKAL_T1 || COMPILE_TEST [=y])
Drop the 'select' here to avoid the problem. Anyone using
the dw-bt1 SPI driver should make sure they include the
mux driver as well now.
Fixes: 7218838109fe ("spi: dw-bt1: Fix undefined devm_mux_control_get symbol")
Fixes: abf00907538e ("spi: dw: Add Baikal-T1 SPI Controller glue driver")
Link: https://lore.kernel.org/all/20221218192523.c6vnfo26ua6xqf26@mobilestation/
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Link: https://lore.kernel.org/r/20230130140156.3620863-1-arnd@kernel.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Mark Brown [Mon, 30 Jan 2023 10:47:16 +0000 (10:47 +0000)]
Merge remote-tracking branch 'spi/for-6.2' into spi-6.2
Bartosz Golaszewski [Mon, 16 Jan 2023 14:41:49 +0000 (15:41 +0100)]
spi: spidev: fix a recursive locking error
When calling spidev_message() from the one of the ioctl() callbacks, the
spi_lock is already taken. When we then end up calling spidev_sync(), we
get the following splat:
[ 214.047619]
[ 214.049198] ============================================
[ 214.054533] WARNING: possible recursive locking detected
[ 214.059858] 6.2.0-rc3-0.0.0-devel+git.
97ec4d559d93 #1 Not tainted
[ 214.065969] --------------------------------------------
[ 214.071290] spidev_test/1454 is trying to acquire lock:
[ 214.076530]
c4925dbc (&spidev->spi_lock){+.+.}-{3:3}, at: spidev_ioctl+0x8e0/0xab8
[ 214.084164]
[ 214.084164] but task is already holding lock:
[ 214.090007]
c4925dbc (&spidev->spi_lock){+.+.}-{3:3}, at: spidev_ioctl+0x44/0xab8
[ 214.097537]
[ 214.097537] other info that might help us debug this:
[ 214.104075] Possible unsafe locking scenario:
[ 214.104075]
[ 214.110004] CPU0
[ 214.112461] ----
[ 214.114916] lock(&spidev->spi_lock);
[ 214.118687] lock(&spidev->spi_lock);
[ 214.122457]
[ 214.122457] *** DEADLOCK ***
[ 214.122457]
[ 214.128386] May be due to missing lock nesting notation
[ 214.128386]
[ 214.135183] 2 locks held by spidev_test/1454:
[ 214.139553] #0:
c4925dbc (&spidev->spi_lock){+.+.}-{3:3}, at: spidev_ioctl+0x44/0xab8
[ 214.147524] #1:
c4925e14 (&spidev->buf_lock){+.+.}-{3:3}, at: spidev_ioctl+0x70/0xab8
[ 214.155493]
[ 214.155493] stack backtrace:
[ 214.159861] CPU: 0 PID: 1454 Comm: spidev_test Not tainted 6.2.0-rc3-0.0.0-devel+git.
97ec4d559d93 #1
[ 214.169012] Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree)
[ 214.175555] unwind_backtrace from show_stack+0x10/0x14
[ 214.180819] show_stack from dump_stack_lvl+0x60/0x90
[ 214.185900] dump_stack_lvl from __lock_acquire+0x874/0x2858
[ 214.191584] __lock_acquire from lock_acquire+0xfc/0x378
[ 214.196918] lock_acquire from __mutex_lock+0x9c/0x8a8
[ 214.202083] __mutex_lock from mutex_lock_nested+0x1c/0x24
[ 214.207597] mutex_lock_nested from spidev_ioctl+0x8e0/0xab8
[ 214.213284] spidev_ioctl from sys_ioctl+0x4d0/0xe2c
[ 214.218277] sys_ioctl from ret_fast_syscall+0x0/0x1c
[ 214.223351] Exception stack(0xe75cdfa8 to 0xe75cdff0)
[ 214.228422] dfa0:
00000000 00001000 00000003 40206b00 bee266e8 bee266e0
[ 214.236617] dfc0:
00000000 00001000 006a71a0 00000036 004c0040 004bfd18 00000000 00000003
[ 214.244809] dfe0:
00000036 bee266c8 b6f16dc5 b6e8e5f6
Fix it by introducing an unlocked variant of spidev_sync() and calling it
from spidev_message() while other users who don't check the spidev->spi's
existence keep on using the locking flavor.
Reported-by: Francesco Dolcini <francesco@dolcini.it>
Fixes: 1f4d2dd45b6e ("spi: spidev: fix a race condition when accessing spidev->spi")
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Tested-by: Max Krummenacher <max.krummenacher@toradex.com>
Link: https://lore.kernel.org/r/20230116144149.305560-1-brgl@bgdev.pl
Signed-off-by: Mark Brown <broonie@kernel.org>
Serge Semin [Fri, 13 Jan 2023 18:59:42 +0000 (21:59 +0300)]
spi: dw: Fix wrong FIFO level setting for long xfers
Due to using the u16 type in the min_t() macros the SPI transfer length
will be cast to word before participating in the conditional statement
implied by the macro. Thus if the transfer length is greater than 64KB the
Tx/Rx FIFO threshold level value will be determined by the leftover of the
truncated after the type-case length. In the worst case it will cause the
dramatical performance drop due to the "Tx FIFO Empty" or "Rx FIFO Full"
interrupts triggered on each xfer word sent/received to/from the bus.
The problem can be easily fixed by specifying the unsigned int type in the
min_t() macros thus preventing the possible data loss.
Fixes: ea11370fffdf ("spi: dw: get TX level without an additional variable")
Reported-by: Sergey Nazarov <Sergey.Nazarov@baikalelectronics.ru>
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20230113185942.2516-1-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Mark Brown <broonie@kernel.org>
Randy Dunlap [Fri, 27 Jan 2023 06:39:57 +0000 (22:39 -0800)]
spi: correct spelling
Correct spelling problems for Documentation/spi/ as reported
by codespell.
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Link: https://lore.kernel.org/r/20230127064005.1558-28-rdunlap@infradead.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Randy Dunlap [Tue, 24 Jan 2023 23:35:02 +0000 (15:35 -0800)]
spi: Kconfig: fix a spelling mistake & hyphenation
Correct a spelling mistake (reported by codespell).
Also hyphenate "8-bit".
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Mark Brown <broonie@kernel.org>
Cc: linux-spi@vger.kernel.org
Link: https://lore.kernel.org/r/20230124233502.23330-1-rdunlap@infradead.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Krzysztof Kozlowski [Tue, 24 Jan 2023 08:33:42 +0000 (09:33 +0100)]
spi: dt-bindings: cleanup examples - indentation, lowercase hex
Cleanup examples:
- use 4-space indentation (for cases when it is neither 4 not 2 space),
- drop redundant blank lines,
- use lowercase hex.
No functional impact except adjusting to preferred coding style.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> # renesas
Reviewed-by: Andrew Jeffery <andrew@aj.id.au> # aspeed
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> # meson
Link: https://lore.kernel.org/r/20230124083342.34869-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Krzysztof Kozlowski [Tue, 24 Jan 2023 08:33:41 +0000 (09:33 +0100)]
spi: dt-bindings: drop unneeded quotes
Cleanup by removing unneeded quotes from refs and redundant blank lines.
No functional impact except adjusting to preferred coding style.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au> # aspeed
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> # meson
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> # st
Reviewed-by: Heiko Stuebner <heiko@sntech.de> # rockchip
Reviewed-by: Serge Semin <fancer.lancer@gmail.com> # synopsys
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230124083342.34869-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Mark Brown [Mon, 23 Jan 2023 17:34:29 +0000 (17:34 +0000)]
spi: atmel: switch to use modern name
Merge series from Yang Yingliang <yangyingliang@huawei.com>:
After introducing devm_spi_alloc_host/spi_alloc_host(), the legacy
named function devm_spi_alloc_master/spi_alloc_master() can be replaced.
And also change other legacy name master/slave to modern name host/target
or controller.
Krzysztof Kozlowski [Fri, 20 Jan 2023 07:56:18 +0000 (08:56 +0100)]
dt-bindings: trivial-devices: document SPI dev compatibles
Document existing SPI dev compatibles.
Cc: Mark Brown <broonie@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230120075618.153664-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Yang Yingliang [Tue, 10 Jan 2023 13:18:05 +0000 (21:18 +0800)]
spi: atmel-quadspi: switch to use modern name
Change legacy name master to modern name host or controller.
No functional changed.
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Link: https://lore.kernel.org/r/20230110131805.2827248-4-yangyingliang@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Yang Yingliang [Tue, 10 Jan 2023 13:18:04 +0000 (21:18 +0800)]
spi: at91-usart: switch to use modern name
Change legacy name master to modern name host or controller.
No functional changed.
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Link: https://lore.kernel.org/r/20230110131805.2827248-3-yangyingliang@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Yang Yingliang [Tue, 10 Jan 2023 13:18:03 +0000 (21:18 +0800)]
spi: atmel: switch to use modern name
Change legacy name master to modern name host or controller.
No functional changed.
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Link: https://lore.kernel.org/r/20230110131805.2827248-2-yangyingliang@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Krzysztof Kozlowski [Fri, 20 Jan 2023 07:56:51 +0000 (08:56 +0100)]
spi: spidev: order compatibles alphabetically
Bring some order to reduce possibilities of conflicts.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230120075651.153763-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Mark Brown [Fri, 13 Jan 2023 15:56:45 +0000 (15:56 +0000)]
spi: SPI core CS delay fixes and additions
Merge series from Hector Martin <marcan@marcan.st>:
Commits
f6c911f3308c ("spi: dt-bindings: Introduce
spi-cs-setup-ns property") and
33a2fde5f77b ("spi: Introduce
spi-cs-setup-ns property") introduced a new property to represent the
CS setup delay in the device tree, but they have some issues:
- The property is only parsed as a 16-bit integer number of nanoseconds,
which limits the maximum value to ~65us. This is not a reasonable
upper limit, as some devices might need a lot more.
- The property name is inconsistent with other delay properties, which
use a "*-delay-ns" naming scheme.
- Only the setup delay is introduced, but not the related hold and
inactive delay times.
This series fixes the issues and adds support for the two missing
properties. Please pull in the first 3 patches as fixes for 6.2, to
avoid introducing a problematic DT API in this release. The last two
patches can wait until 6.3, though are probably harmless to throw in
as fixes too, since they're trivial.
Janne Grunau [Fri, 13 Jan 2023 10:23:10 +0000 (19:23 +0900)]
spi: Parse hold/inactive CS delay values from the DT
Now that we support parsing the setup time from the Device Tree, we can
also easily support the remaining hold and inactive time delay values.
Signed-off-by: Janne Grunau <j@jannau.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
Link: https://lore.kernel.org/r/20230113102309.18308-4-marcan@marcan.st
Signed-off-by: Mark Brown <broonie@kernel.org>
Janne Grunau [Fri, 13 Jan 2023 10:23:09 +0000 (19:23 +0900)]
spi: dt-bindings: Add hold/inactive CS delay peripheral properties
These two properties complete the bindings for the Linux spi_device cs
model, which includes cs_setup, cs_hold and cs_inactive delay values.
Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>
Link: https://lore.kernel.org/r/20230113102309.18308-3-marcan@marcan.st
Signed-off-by: Mark Brown <broonie@kernel.org>
Janne Grunau [Fri, 13 Jan 2023 10:23:08 +0000 (19:23 +0900)]
spi: Use a 32-bit DT property for spi-cs-setup-delay-ns
65us is not a reasonable maximum for this property, as some devices
might need a much longer setup time (e.g. those driven by firmware on
the other end). Plus, device tree property values are in 32-bit cells
and smaller widths should not be used without good reason.
Also move the logic to a helper function, since this will later be used
to parse other CS delay properties too.
Fixes: 33a2fde5f77b ("spi: Introduce spi-cs-setup-ns property")
Signed-off-by: Janne Grunau <j@jannau.net>
Signed-off-by: Hector Martin <marcan@marcan.st>
Link: https://lore.kernel.org/r/20230113102309.18308-2-marcan@marcan.st
Signed-off-by: Mark Brown <broonie@kernel.org>
Geert Uytterhoeven [Wed, 11 Jan 2023 08:19:53 +0000 (09:19 +0100)]
dt-bindings: trivial-devices: Remove trailing whitespace
Remove trailing whitespace that hurts my eyes.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/7c1b2700f3727e94600f5f7e10beef16f8dc64ed.1673425053.git.geert+renesas@glider.be
Signed-off-by: Mark Brown <broonie@kernel.org>
Mark Brown [Wed, 11 Jan 2023 14:15:22 +0000 (14:15 +0000)]
spi: Merge rename of spi-cs-setup-ns DT property
The newly added spi-cs-setup-ns doesn't really fit with the existing
property names for delays, rename it so that it does before it makes it
into a release and becomes ABI.
Bartosz Golaszewski [Fri, 6 Jan 2023 10:07:19 +0000 (11:07 +0100)]
spi: spidev: remove debug messages that access spidev->spi without locking
The two debug messages in spidev_open() dereference spidev->spi without
taking the lock and without checking if it's not null. This can lead to
a crash. Drop the messages as they're not needed - the user-space will
get informed about ENOMEM with the syscall return value.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Link: https://lore.kernel.org/r/20230106100719.196243-2-brgl@bgdev.pl
Signed-off-by: Mark Brown <broonie@kernel.org>
Bartosz Golaszewski [Fri, 6 Jan 2023 10:07:18 +0000 (11:07 +0100)]
spi: spidev: fix a race condition when accessing spidev->spi
There's a spinlock in place that is taken in file_operations callbacks
whenever we check if spidev->spi is still alive (not null). It's also
taken when spidev->spi is set to NULL in remove().
This however doesn't protect the code against driver unbind event while
one of the syscalls is still in progress. To that end we need a lock taken
continuously as long as we may still access spidev->spi. As both the file
ops and the remove callback are never called from interrupt context, we
can replace the spinlock with a mutex.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Link: https://lore.kernel.org/r/20230106100719.196243-1-brgl@bgdev.pl
Signed-off-by: Mark Brown <broonie@kernel.org>
Bartosz Golaszewski [Fri, 6 Jan 2023 10:07:19 +0000 (11:07 +0100)]
spi: spidev: remove debug messages that access spidev->spi without locking
The two debug messages in spidev_open() dereference spidev->spi without
taking the lock and without checking if it's not null. This can lead to
a crash. Drop the messages as they're not needed - the user-space will
get informed about ENOMEM with the syscall return value.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Link: https://lore.kernel.org/r/20230106100719.196243-2-brgl@bgdev.pl
Signed-off-by: Mark Brown <broonie@kernel.org>
Bartosz Golaszewski [Fri, 6 Jan 2023 10:07:18 +0000 (11:07 +0100)]
spi: spidev: fix a race condition when accessing spidev->spi
There's a spinlock in place that is taken in file_operations callbacks
whenever we check if spidev->spi is still alive (not null). It's also
taken when spidev->spi is set to NULL in remove().
This however doesn't protect the code against driver unbind event while
one of the syscalls is still in progress. To that end we need a lock taken
continuously as long as we may still access spidev->spi. As both the file
ops and the remove callback are never called from interrupt context, we
can replace the spinlock with a mutex.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Link: https://lore.kernel.org/r/20230106100719.196243-1-brgl@bgdev.pl
Signed-off-by: Mark Brown <broonie@kernel.org>
Mark Brown [Fri, 6 Jan 2023 17:26:02 +0000 (17:26 +0000)]
SPI core CS delay fixes and additions
Merge series from Hector Martin <marcan@marcan.st>:
This brings the name of the cs-setup-ns parameter which was added during
the merge window into line with other delay properties.
Mark Brown [Fri, 6 Jan 2023 16:31:35 +0000 (16:31 +0000)]
spi: SPI core CS delay property rename
From: Hector Martin <marcan@marcan.st>
Date: Wed, 04 Jan 2023 18:36:26 +0900
Message-Id: <
20230104093631.15611-1-marcan@marcan.st>
MIME-Version: 1.0
Content-Type: text/plain; charset="utf-8"
Content-Transfer-Encoding: 7bit
Merge changes from Hector Martin <marcan@marcan.st>:
This brings the name of the cs-setup-ns parameter which was added during
the merge window into line with other delay properties.
Hector Martin [Wed, 4 Jan 2023 09:36:28 +0000 (18:36 +0900)]
spi: Rename spi-cs-setup-ns property to spi-cs-setup-delay-ns
As mentioned in the corresponding DT binding commit, the naming scheme
for delay properties includes "delay" in the name, so let's keep that
consistent.
Fixes: 33a2fde5f77b ("spi: Introduce spi-cs-setup-ns property")
Signed-off-by: Hector Martin <marcan@marcan.st>
Link: https://lore.kernel.org/r/20230104093631.15611-3-marcan@marcan.st
Signed-off-by: Mark Brown <broonie@kernel.org>
Hector Martin [Wed, 4 Jan 2023 09:36:27 +0000 (18:36 +0900)]
spi: dt-bindings: Rename spi-cs-setup-ns to spi-cs-setup-delay-ns
Other delay values follow the delay-ns naming convention, so unify the
newly introduced spi-cs-setup-ns property for consistency.
Also fix a typo while we're here.
Fixes: f6c911f3308c ("spi: dt-bindings: Introduce spi-cs-setup-ns property")
Signed-off-by: Hector Martin <marcan@marcan.st>
Link: https://lore.kernel.org/r/20230104093631.15611-2-marcan@marcan.st
Signed-off-by: Mark Brown <broonie@kernel.org>
Vincent Whitchurch [Tue, 3 Jan 2023 15:22:10 +0000 (16:22 +0100)]
spi: spi-loopback-test: Allow skipping delays
A 100 ms delay is inserted between tests by default in order to "detect
the individual tests when using a logic analyzer". However, such delays
are unnecessary when using this module for automated regression testing,
so allow them to be disabled with a module parameter.
Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com>
Link: https://lore.kernel.org/r/20230103152211.3034779-1-vincent.whitchurch@axis.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Mark Brown [Tue, 3 Jan 2023 15:11:24 +0000 (15:11 +0000)]
spi: switch to use modern name
Merge series from Yang Yingliang <yangyingliang@huawei.com>:
After introducing devm_spi_alloc_host/spi_alloc_host(), the legacy
named function devm_spi_alloc_master/spi_alloc_master() can be replaced.
And also change other legacy name master/slave to modern name host/target
or controller.
Yang Yingliang [Fri, 30 Dec 2022 09:28:06 +0000 (17:28 +0800)]
spi: ar934x: switch to use modern name
Change legacy name master to modern name host or controller.
No functional changed.
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Link: https://lore.kernel.org/r/20221230092806.1687340-4-yangyingliang@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Yang Yingliang [Fri, 30 Dec 2022 09:28:05 +0000 (17:28 +0800)]
spi: a3700: switch to use modern name
Change legacy name master to modern name host or controller.
No functional changed.
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Link: https://lore.kernel.org/r/20221230092806.1687340-3-yangyingliang@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Yang Yingliang [Fri, 30 Dec 2022 09:28:04 +0000 (17:28 +0800)]
spi: ath79: switch to use modern name
Change legacy name master/slave to modern name host/target or controller.
No functional changed.
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Link: https://lore.kernel.org/r/20221230092806.1687340-2-yangyingliang@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Vincent Whitchurch [Mon, 2 Jan 2023 16:08:51 +0000 (17:08 +0100)]
spi: pl022: Only use DT-specified DMA channels
When a platform is booted with devicetree and does not provide a
platform data structure, the driver creates one internally. enable_dma
should not be set in this structure when creating it; the probe function
will set it later if DMA channels are specified via the devicetree.
Setting enable_dma = 1 when creating this internal platform data can
lead to pl022_dma_probe() finding bogus DMA channels (since there is no
channel filter specified) when no DMA channels are specified in the
devicetree.
Signed-off-by: Vincent Whitchurch <vincent.whitchurch@axis.com>
Acked-by: Dhruva Gole <d-gole@ti.com>
Link: https://lore.kernel.org/r/20230102160852.3090202-1-vincent.whitchurch@axis.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Yang Yingliang [Thu, 29 Dec 2022 10:38:37 +0000 (18:38 +0800)]
spi: spi-altera-platform: switch to use modern name
Change legacy name master to modern name host or controller.
No functional changed.
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Link: https://lore.kernel.org/r/20221229103837.4192759-4-yangyingliang@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Yang Yingliang [Thu, 29 Dec 2022 10:38:36 +0000 (18:38 +0800)]
spi: spi-altera-dfl: switch to use modern name
Change legacy name master to modern name host or controller.
No functional changed.
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Link: https://lore.kernel.org/r/20221229103837.4192759-3-yangyingliang@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Yang Yingliang [Thu, 29 Dec 2022 10:38:35 +0000 (18:38 +0800)]
spi: altera: switch to use modern name
Change legacy name master/slave to modern name host/target or controller.
No functional changed.
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Link: https://lore.kernel.org/r/20221229103837.4192759-2-yangyingliang@huawei.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Vincent Tremblay [Tue, 27 Dec 2022 14:10:08 +0000 (09:10 -0500)]
spidev: Add Silicon Labs SI3210 device compatible
Add compatible string for Silicon Labs SI3210 device.
Signed-off-by: Vincent Tremblay <vincent@vtremblay.dev>
Link: https://lore.kernel.org/r/20221227141011.111410-2-vincent@vtremblay.dev
Signed-off-by: Mark Brown <broonie@kernel.org>
Vincent Tremblay [Tue, 27 Dec 2022 14:10:07 +0000 (09:10 -0500)]
dt-bindings: trivial-devices: Add silabs,si3210
Add Silicon Labs SI3210 to trivial devices.
Signed-off-by: Vincent Tremblay <vincent@vtremblay.dev>
Link: https://lore.kernel.org/r/20221227141011.111410-1-vincent@vtremblay.dev
Signed-off-by: Mark Brown <broonie@kernel.org>
Vincent Tremblay [Tue, 27 Dec 2022 02:35:48 +0000 (21:35 -0500)]
spidev: Add Silicon Labs EM3581 device compatible
Add compatible string for Silicon Labs EM3581 device.
Signed-off-by: Vincent Tremblay <vincent@vtremblay.dev>
Link: https://lore.kernel.org/r/20221227023550.569547-2-vincent@vtremblay.dev
Signed-off-by: Mark Brown <broonie@kernel.org>
Vincent Tremblay [Tue, 27 Dec 2022 02:35:47 +0000 (21:35 -0500)]
dt-bindings: trivial-devices: Add silabs,em3581
Add Silicon Labs EM3581 Zigbee SoC to trivial-devices.
Signed-off-by: Vincent Tremblay <vincent@vtremblay.dev>
Link: https://lore.kernel.org/r/20221227023550.569547-1-vincent@vtremblay.dev
Signed-off-by: Mark Brown <broonie@kernel.org>
Witold Sadowski [Mon, 19 Dec 2022 14:42:48 +0000 (06:42 -0800)]
spi: cadence: Fix busy cycles calculation
If xSPI is in x2/x4/x8 mode to calculate busy
cycles, busy bits count must be divided by the number
of lanes.
If opcommand is using 8 busy bits, but SPI is
in x4 mode, there will be only 2 busy cycles.
Signed-off-by: Witold Sadowski <wsadowski@marvell.com>
Reviewed-by: Chandrakala Chavva <cchavva@marvell.com>
Reviewed-by: Sunil Kovvuri Goutham <sgoutham@marvell.com>
Link: https://lore.kernel.org/r/20221219144254.20883-2-wsadowski@marvell.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Ricardo Ribalda [Sun, 25 Dec 2022 08:37:12 +0000 (09:37 +0100)]
spi: mediatek: Enable irq before the spi registration
If the irq is enabled after the spi si registered, there can be a race
with the initialization of the devices on the spi bus.
Eg:
mtk-spi
1100a000.spi: spi-mem transfer timeout
spi-nor: probe of spi0.0 failed with error -110
Unable to handle kernel NULL pointer dereference at virtual address
0000000000000010
...
Call trace:
mtk_spi_can_dma+0x0/0x2c
Fixes: c6f7874687f7 ("spi: mediatek: Enable irq when pdata is ready")
Reported-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Ricardo Ribalda <ribalda@chromium.org>
Tested-by: Daniel Golle <daniel@makrotopia.org>
Link: https://lore.kernel.org/r/20221225-mtk-spi-fixes-v1-0-bb6c14c232f8@chromium.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Vijaya Krishna Nivarthi [Thu, 8 Dec 2022 14:25:44 +0000 (19:55 +0530)]
spi: spi-geni-qcom: Add support for SE DMA mode
SE DMA mode can be used for larger transfers and FIFO mode
for smaller transfers.
Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/1670509544-15977-1-git-send-email-quic_vnivarth@quicinc.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Linus Torvalds [Sun, 25 Dec 2022 21:41:39 +0000 (13:41 -0800)]
Linux 6.2-rc1
Steven Rostedt (Google) [Tue, 20 Dec 2022 18:45:19 +0000 (13:45 -0500)]
treewide: Convert del_timer*() to timer_shutdown*()
Due to several bugs caused by timers being re-armed after they are
shutdown and just before they are freed, a new state of timers was added
called "shutdown". After a timer is set to this state, then it can no
longer be re-armed.
The following script was run to find all the trivial locations where
del_timer() or del_timer_sync() is called in the same function that the
object holding the timer is freed. It also ignores any locations where
the timer->function is modified between the del_timer*() and the free(),
as that is not considered a "trivial" case.
This was created by using a coccinelle script and the following
commands:
$ cat timer.cocci
@@
expression ptr, slab;
identifier timer, rfield;
@@
(
- del_timer(&ptr->timer);
+ timer_shutdown(&ptr->timer);
|
- del_timer_sync(&ptr->timer);
+ timer_shutdown_sync(&ptr->timer);
)
... when strict
when != ptr->timer
(
kfree_rcu(ptr, rfield);
|
kmem_cache_free(slab, ptr);
|
kfree(ptr);
)
$ spatch timer.cocci . > /tmp/t.patch
$ patch -p1 < /tmp/t.patch
Link: https://lore.kernel.org/lkml/20221123201306.823305113@linutronix.de/
Signed-off-by: Steven Rostedt (Google) <rostedt@goodmis.org>
Acked-by: Pavel Machek <pavel@ucw.cz> [ LED ]
Acked-by: Kalle Valo <kvalo@kernel.org> [ wireless ]
Acked-by: Paolo Abeni <pabeni@redhat.com> [ networking ]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Linus Torvalds [Fri, 23 Dec 2022 22:44:08 +0000 (14:44 -0800)]
Merge tag 'spi-fix-v6.2-rc1' of git://git./linux/kernel/git/broonie/spi
Pull spi fix from Mark Brown:
"One driver specific change here which handles the case where a SPI
device for some reason tries to change the bus speed during a message
on fsl_spi hardware, this should be very unusual"
* tag 'spi-fix-v6.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
spi: fsl_spi: Don't change speed while chipselect is active
Linus Torvalds [Fri, 23 Dec 2022 22:38:00 +0000 (14:38 -0800)]
Merge tag 'regulator-fix-v6.2-rc1' of git://git./linux/kernel/git/broonie/regulator
Pull regulator fixes from Mark Brown:
"Two core fixes here, one for a long standing race which some Qualcomm
systems have started triggering with their UFS driver and another
fixing a problem with supply lookup introduced by the fixes for devm
related use after free issues that were introduced in this merge
window"
* tag 'regulator-fix-v6.2-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator:
regulator: core: fix deadlock on regulator enable
regulator: core: Fix resolve supply lookup issue
Linus Torvalds [Fri, 23 Dec 2022 21:56:41 +0000 (13:56 -0800)]
Merge tag 'coccinelle-6.2' of git://git./linux/kernel/git/jlawall/linux
Pull coccicheck update from Julia Lawall:
"Modernize use of grep in coccicheck:
Use 'grep -E' instead of 'egrep'"
* tag 'coccinelle-6.2' of git://git.kernel.org/pub/scm/linux/kernel/git/jlawall/linux:
scripts: coccicheck: use "grep -E" instead of "egrep"
Linus Torvalds [Fri, 23 Dec 2022 20:00:24 +0000 (12:00 -0800)]
Merge tag 'hardening-v6.2-rc1-fixes' of git://git./linux/kernel/git/kees/linux
Pull kernel hardening fixes from Kees Cook:
- Fix CFI failure with KASAN (Sami Tolvanen)
- Fix LKDTM + CFI under GCC 7 and 8 (Kristina Martsenko)
- Limit CONFIG_ZERO_CALL_USED_REGS to Clang > 15.0.6 (Nathan
Chancellor)
- Ignore "contents" argument in LoadPin's LSM hook handling
- Fix paste-o in /sys/kernel/warn_count API docs
- Use READ_ONCE() consistently for oops/warn limit reading
* tag 'hardening-v6.2-rc1-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux:
cfi: Fix CFI failure with KASAN
exit: Use READ_ONCE() for all oops/warn limit reads
security: Restrict CONFIG_ZERO_CALL_USED_REGS to gcc or clang > 15.0.6
lkdtm: cfi: Make PAC test work with GCC 7 and 8
docs: Fix path paste-o for /sys/kernel/warn_count
LoadPin: Ignore the "contents" argument of the LSM hooks
Linus Torvalds [Fri, 23 Dec 2022 19:55:54 +0000 (11:55 -0800)]
Merge tag 'pstore-v6.2-rc1-fixes' of git://git./linux/kernel/git/kees/linux
Pull pstore fixes from Kees Cook:
- Switch pmsg_lock to an rt_mutex to avoid priority inversion (John
Stultz)
- Correctly assign mem_type property (Luca Stefani)
* tag 'pstore-v6.2-rc1-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux:
pstore: Properly assign mem_type property
pstore: Make sure CONFIG_PSTORE_PMSG selects CONFIG_RT_MUTEXES
pstore: Switch pmsg_lock to an rt_mutex to avoid priority inversion
Linus Torvalds [Fri, 23 Dec 2022 19:44:20 +0000 (11:44 -0800)]
Merge tag 'dma-mapping-2022-12-23' of git://git.infradead.org/users/hch/dma-mapping
Pull dma-mapping fixes from Christoph Hellwig:
"Fix up the sound code to not pass __GFP_COMP to the non-coherent DMA
allocator, as it copes with that just as badly as the coherent
allocator, and then add a check to make sure no one passes the flag
ever again"
* tag 'dma-mapping-2022-12-23' of git://git.infradead.org/users/hch/dma-mapping:
dma-mapping: reject GFP_COMP for noncoherent allocations
ALSA: memalloc: don't use GFP_COMP for non-coherent dma allocations
Linus Torvalds [Fri, 23 Dec 2022 19:39:18 +0000 (11:39 -0800)]
Merge tag '9p-for-6.2-rc1' of https://github.com/martinetd/linux
Pull 9p updates from Dominique Martinet:
- improve p9_check_errors to check buffer size instead of msize when
possible (e.g. not zero-copy)
- some more syzbot and KCSAN fixes
- minor headers include cleanup
* tag '9p-for-6.2-rc1' of https://github.com/martinetd/linux:
9p/client: fix data race on req->status
net/9p: fix response size check in p9_check_errors()
net/9p: distinguish zero-copy requests
9p/xen: do not memcpy header into req->rc
9p: set req refcount to zero to avoid uninitialized usage
9p/net: Remove unneeded idr.h #include
9p/fs: Remove unneeded idr.h #include