Andy Shevchenko [Tue, 8 Jan 2019 14:17:42 +0000 (16:17 +0200)]
doc: Fix CONFIG_OF_SEPARATE description
CONFIG_OF_SEPARATE description is not in align with actual code in Makefile and
thus has misleading instructions and explanation.
Make it aligned with the actual code.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Andy Shevchenko [Tue, 8 Jan 2019 14:17:43 +0000 (16:17 +0200)]
x86: edison: Switch to CONFIG_OF_SEPARATE
There is no need for Intel Edison to have CONFIG_OF_EMBED to be enabled.
Replace it with CONFIG_OF_SEPARATE.
There is no functional change since u-boot.bin always contains DTB
either embedded or attached.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Ferry Toth <ftoth@exalondelft.nl>
Tom Rini [Mon, 11 Feb 2019 16:15:34 +0000 (11:15 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-i2c
- DM I2C improvements
Tom Rini [Mon, 11 Feb 2019 15:35:52 +0000 (10:35 -0500)]
Merge git://git.denx.de/u-boot-marvell
- Fix BUILD_TARGET for ARCH_MVEBU from Baruch
- Fix MVEBU PCIe reset issues from Baruch
- Increase DDR stability on x530 from Chris
Chris Packham [Mon, 11 Feb 2019 01:19:56 +0000 (14:19 +1300)]
ARM: mvebu: x530: use MV_DDR_FREQ_SAR
MV_DDR_FREQ_SAR lets the DDR frequency be determined by hardware
strapping. This also has the side effect of running the DDR clock in
synchronous mode with the CPU core clock rather than from an independent
PLL. We've seen this improve reliability in operation across a number of
boards and temperature ranges.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Baruch Siach [Thu, 7 Feb 2019 11:21:16 +0000 (13:21 +0200)]
Kconfig: fix BUILD_TARGET for ARCH_MVEBU
Commit
dc146ca11187 ("Kconfig: Migrate CONFIG_BUILD_TARGET") made the
mvebu default build target depend on CONFIG_SPL_BUILD. Unfortunately,
there is no such Kconfig symbol. Use the CONFIG_SPL symbol instead to
fix that.
Cc: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Baruch Siach [Sun, 3 Feb 2019 13:15:40 +0000 (15:15 +0200)]
arm: mvebu: cf gt-8k: dts: add PCIe slot reset support
Describe the mini-PCIe slot gpio reset signal. This enables PCIe devices
on Clearfog GT-8K.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Baruch Siach [Sun, 3 Feb 2019 13:15:39 +0000 (15:15 +0200)]
pcie: designware: mvebu: fix reset release polarity
The dm_gpio_set_value() routine sets signal logical level, with
GPIO_ACTIVE_LOW/HIGH value taken into account. Reset active value is 1
(asserted), while reset inactive value is 0 (de-asserted). Fix the reset
toggle code to set the correct reset logic value.
Reported-by: Sven Auhagen <sven.auhagen@voleatech.de>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Baruch Siach [Sun, 3 Feb 2019 13:15:38 +0000 (15:15 +0200)]
arm: mvebu: mcbin: dts: fix PCIe reset polarity
The PCIe slot PERST signal is active low. Fix the gpio signal
description in the dts.
This happened to work because the pcie_dw_mvebu driver sets the reset
gpio level to 1 (high) to release the reset. The following commit will
fix that.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Michal Simek [Thu, 31 Jan 2019 15:31:03 +0000 (16:31 +0100)]
i2c: mux: Generate longer i2c mux name
For !DM case busses are listed as
ZynqMP> i2c bus
Bus 0: zynq_0
Bus 1: zynq_0->PCA9544A@0x75:0
Bus 2: zynq_0->PCA9544A@0x75:1
Bus 3: zynq_0->PCA9544A@0x75:2
Bus 4: zynq_1
Bus 5: zynq_1->PCA9548@0x74:0
Bus 6: zynq_1->PCA9548@0x74:1
Bus 7: zynq_1->PCA9548@0x74:2
Bus 8: zynq_1->PCA9548@0x74:3
Bus 9: zynq_1->PCA9548@0x74:4
Bus 10: zynq_1->PCA9548@0x75:0
Bus 11: zynq_1->PCA9548@0x75:1
Bus 12: zynq_1->PCA9548@0x75:2
Bus 13: zynq_1->PCA9548@0x75:3
Bus 14: zynq_1->PCA9548@0x75:4
Bus 15: zynq_1->PCA9548@0x75:5
Bus 16: zynq_1->PCA9548@0x75:6
Bus 17: zynq_1->PCA9548@0x75:7
where is exactly describing i2c bus topology.
By moving to DM case i2c mux buses are using names from DT and because
i2c-muxes describing sub busses with the same names like i2c@0, etc it
is hard to identify which bus is where.
Linux is adding topology information to i2c-mux busses to identify them
better.
This patch is doing the same and composing bus name with topology
information.
When patch is applied with topology information on zcu102-revA.
ZynqMP> i2c bus
Bus 0: i2c@
ff020000
20: gpio@20, offset len 1, flags 0
21: gpio@21, offset len 1, flags 0
75: i2c-mux@75, offset len 1, flags 0
Bus 2: i2c@
ff020000->i2c-mux@75->i2c@0
Bus 3: i2c@
ff020000->i2c-mux@75->i2c@1
Bus 4: i2c@
ff020000->i2c-mux@75->i2c@2
Bus 1: i2c@
ff030000 (active 1)
74: i2c-mux@74, offset len 1, flags 0
75: i2c-mux@75, offset len 1, flags 0
Bus 5: i2c@
ff030000->i2c-mux@74->i2c@0 (active 5)
54: eeprom@54, offset len 1, flags 0
Bus 6: i2c@
ff030000->i2c-mux@74->i2c@1
Bus 7: i2c@
ff030000->i2c-mux@74->i2c@2
Bus 8: i2c@
ff030000->i2c-mux@74->i2c@3
Bus 9: i2c@
ff030000->i2c-mux@74->i2c@4
Bus 10: i2c@
ff030000->i2c-mux@75->i2c@0
Bus 11: i2c@
ff030000->i2c-mux@75->i2c@1
Bus 12: i2c@
ff030000->i2c-mux@75->i2c@2
Bus 13: i2c@
ff030000->i2c-mux@75->i2c@3
Bus 14: i2c@
ff030000->i2c-mux@75->i2c@4
Bus 15: i2c@
ff030000->i2c-mux@75->i2c@5
Bus 16: i2c@
ff030000->i2c-mux@75->i2c@6
Bus 17: i2c@
ff030000->i2c-mux@75->i2c@7
Behavior before the patch is applied.
ZynqMP> i2c bus
Bus 0: i2c@
ff020000
20: gpio@20, offset len 1, flags 0
21: gpio@21, offset len 1, flags 0
75: i2c-mux@75, offset len 1, flags 0
Bus 2: i2c@0
Bus 3: i2c@1
Bus 4: i2c@2
Bus 1: i2c@
ff030000 (active 1)
74: i2c-mux@74, offset len 1, flags 0
75: i2c-mux@75, offset len 1, flags 0
Bus 5: i2c@0 (active 5)
54: eeprom@54, offset len 1, flags 0
Bus 6: i2c@1
Bus 7: i2c@2
Bus 8: i2c@3
Bus 9: i2c@4
Bus 10: i2c@0
Bus 11: i2c@1
Bus 12: i2c@2
Bus 13: i2c@3
Bus 14: i2c@4
Bus 15: i2c@5
Bus 16: i2c@6
Bus 17: i2c@7
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Michal Simek [Thu, 31 Jan 2019 15:31:02 +0000 (16:31 +0100)]
i2c: Fill req_seq in i2c_post_bind()
For i2c controllers which are missing alias in DT there is no req_seq
setup. This function is setting up proper ID based on highest found
alias ID.
On zcu102 this is the behavior when patch is applied.
ZynqMP> i2c bus
Bus 0: i2c@
ff020000
20: gpio@20, offset len 1, flags 0
21: gpio@21, offset len 1, flags 0
75: i2c-mux@75, offset len 1, flags 0
Bus 2: i2c@0
Bus 3: i2c@1
Bus 4: i2c@2
Bus 1: i2c@
ff030000 (active 1)
74: i2c-mux@74, offset len 1, flags 0
75: i2c-mux@75, offset len 1, flags 0
Bus 5: i2c@0 (active 5)
54: eeprom@54, offset len 1, flags 0
Bus 6: i2c@1
Bus 7: i2c@2
Bus 8: i2c@3
Bus 9: i2c@4
Bus 10: i2c@0
Bus 11: i2c@1
Bus 12: i2c@2
Bus 13: i2c@3
Bus 14: i2c@4
Bus 15: i2c@5
Bus 16: i2c@6
Bus 17: i2c@7
Before this patch applied (controllers have -1 ID)
ZynqMP> i2c bus
Bus 0: i2c@
ff020000
20: gpio@20, offset len 1, flags 0
21: gpio@21, offset len 1, flags 0
75: i2c-mux@75, offset len 1, flags 0
Bus -1: i2c@0
Bus -1: i2c@1
Bus -1: i2c@2
Bus 1: i2c@
ff030000 (active 1)
74: i2c-mux@74, offset len 1, flags 0
75: i2c-mux@75, offset len 1, flags 0
Bus -1: i2c@0 (active 0)
54: eeprom@54, offset len 1, flags 0
Bus -1: i2c@1
Bus -1: i2c@2
Bus -1: i2c@3
Bus -1: i2c@4
Bus -1: i2c@0
Bus -1: i2c@1
Bus -1: i2c@2
Bus -1: i2c@3
Bus -1: i2c@4
Bus -1: i2c@5
Bus -1: i2c@6
Bus -1: i2c@7
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Michal Simek [Thu, 31 Jan 2019 15:31:01 +0000 (16:31 +0100)]
i2c: dm: Record maximum id of devices before probing devices
There is a need to find out the first free i2c ID which can be used for
i2s buses (including i2c buses connected to i2c mux). Do it early in
init and share this variable with other i2c classes for uniq bus
identification.
add from hs:
fix build problem in i2c-uclass.c for omap devices
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tom Rini [Sun, 10 Feb 2019 13:11:53 +0000 (08:11 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-sh
- SD/MMC fixes and ext4 memory leak fix
Tom Rini [Sun, 10 Feb 2019 13:11:32 +0000 (08:11 -0500)]
Merge tag 'dm-pull-10feb19' of git://git.denx.de/u-boot-dm
Samsung sound patches (applied for Samsung maintainer)
Common sound support
buildman environment support
of-platdata documentation improvements
Tom Rini [Sun, 10 Feb 2019 13:04:53 +0000 (08:04 -0500)]
Merge branch '2019-02-08-master-imports'
- bcm6345 watchdog, bcm63158/bcm963158 initial support.
- Various TI platform resyncs and improvements.
- FDT support in Android-format images.
- stm32mp1 improvements.
Simon Glass [Thu, 27 Dec 2018 20:24:39 +0000 (13:24 -0700)]
sound: Allow audio codecs to be used by other SoCs
At present there is still some samsung-specific code in the audio codecs.
Remove it so that these can be used by other SoCs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 27 Dec 2018 20:24:38 +0000 (13:24 -0700)]
sound: i2s: Tidy up a few comments
Fix a struct typo and drop a comment (and function prototype) which is not
actually used.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 27 Dec 2018 20:24:37 +0000 (13:24 -0700)]
sound: samsung: Fix 'regiter' typo
Fix a typo that appears many times in this file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 27 Dec 2018 20:24:36 +0000 (13:24 -0700)]
misc: Allow child devices
Allow misc devices to have children, so that we can use this uclass for
cases where a child device (e.g. I2S) needs to access a misc driver for
transferring data.
Signed-off-by: Simon Glass <sjg@chromium.org>
Chris Packham [Fri, 18 Jan 2019 07:40:29 +0000 (20:40 +1300)]
buildman: fix typo
Fix a typo in the error message from CheckOutputDir().
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Goldschmidt [Wed, 16 Jan 2019 19:40:18 +0000 (20:40 +0100)]
of-platdata: improve documentation
Improve some things in the documentation of OF_PLATDATA that I found
while porting socfgpa_gen5 to it.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 7 Jan 2019 23:44:23 +0000 (16:44 -0700)]
buildman: Write the environment out to an 'env' file
Sometimes it is useful to see the environment that was used to build
U-Boot. Write this out to a file in the build directory.
Signed-off-by: Simon Glass <sjg@chromium.org>
Lokesh Vutla [Fri, 11 Jan 2019 09:45:52 +0000 (15:15 +0530)]
mmc: omap_hsmmc: Use regulator_set_enable_if_allowed for enabling regulator
Use regulator_set_enable_if_allowed() api instead of regulator_set_enable()
while enabling io regulators. This way the driver doesn't see an error
when disabling an always-on regulator and when enabling is not supported.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Lokesh Vutla [Fri, 11 Jan 2019 09:45:51 +0000 (15:15 +0530)]
power: regulator: Introduce regulator_set_enable_if_allowed api
regulator_set_enable() api throws an error in the following three cases:
- when requested to disable an always-on regulator
- when set_enable() ops not provided by regulator driver
- when enabling is actually failed.(Error returned by the regulator driver)
Sometimes consumer drivers doesn't want to track the first two scenarios
and just need to worry about the case where enabling is actually failed.
But it is also a good practice to have an error value returned in the
first two cases.
So introduce an api regulator_set_enable_if_allowed() which ignores the
first two error cases and returns an error as given by regulator driver.
Consumer drivers can use this api need not worry about the first two
error conditions.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Lokesh Vutla [Fri, 11 Jan 2019 09:45:50 +0000 (15:15 +0530)]
Revert "power: regulator: Return success on attempt to disable an always-on regulator"
This reverts commit
e17e0ceb83538c015a50b965547f2f4d38f81c5d.
It is advised to return an error when trying to disable an always-on
regulator and let the consumer driver handle the error if needed.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Simon Glass [Sat, 12 Jan 2019 01:37:15 +0000 (18:37 -0700)]
fdt: tegra: Drop COMPAT_AMS_AS3722
This is no-longer used. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Simon Glass [Sat, 12 Jan 2019 01:37:14 +0000 (18:37 -0700)]
fdt: samsung: Drop unused fdt_compat_id values
This enum still exists but we can shrink it a little based on recent
driver-model conversions with samsung. Update it to remove unused items.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Simon Glass [Sat, 12 Jan 2019 01:37:13 +0000 (18:37 -0700)]
samsung: mmc: Drop old MMC init code
Now that these boards use driver model we can drop the old code. At
present s5p_mmc_init() is still used by goni and smdkv310 so cannot be
removed unless we remove those boards.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Simon Glass [Sat, 12 Jan 2019 01:37:12 +0000 (18:37 -0700)]
samsung: Drop board_enable_audio_codec()
This function is not needed now since the audio codecs have been converted
to proper drivers. The codec-enable GPIO is handled there.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Simon Glass [Sat, 12 Jan 2019 01:37:11 +0000 (18:37 -0700)]
spring: Update flashmap details
Update the flashmap so that this board can be started over USB A-A. It
is slightly different from snow.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Simon Glass [Sat, 12 Jan 2019 01:37:10 +0000 (18:37 -0700)]
spring: Update sound to use max98088 codec
Update the spring settings to use this codec, which is what it actually
shipped with.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Simon Glass [Sat, 12 Jan 2019 01:37:09 +0000 (18:37 -0700)]
sound: Add a driver for max98088
This chip is used by spring. Add a driver for it and update the
samsung_sound driver to pick it up.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sat, 12 Jan 2019 01:37:08 +0000 (18:37 -0700)]
exynos: Convert to use CONFIG_BLK
Move all exynos boards over to use CONFIG_BLK.
This converts s5p_goni also, but adding dummy functions for pinmux and
peripheral ID. This will not function correctly, but gives the maintainer
more time to convert the board if desired.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Simon Glass [Sat, 12 Jan 2019 01:37:07 +0000 (18:37 -0700)]
exynos: Drop duplicate 'model' line
At present the model is shown twice, once in the generic code and once
in the exynos code. Drop the latter.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Simon Glass [Sat, 12 Jan 2019 01:37:06 +0000 (18:37 -0700)]
Convert CONFIG_BOARD_TYPES to Kconfig
This converts the following to Kconfig:
CONFIG_BOARD_TYPES
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Andreas Dannenberg [Mon, 4 Feb 2019 18:58:47 +0000 (12:58 -0600)]
arm: mach-k3: common: Clean up ATF image startup function
Perform some cosmetic cleanup of the ATF image startup function, namely
fixing a spelling mistake, capitalization of a few words, spacing, as
well aligning how errors are printed and as using panic() for cases that
were using a combination of printf() + hang().
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Philippe Reynes [Mon, 4 Feb 2019 14:14:18 +0000 (15:14 +0100)]
bcm968580xref: switch to CONFIG_OF_SEPARATE
The option OF_EMBED is deprecated,
so we switch to CONFIG_OF_SEPARATE
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Mon, 4 Feb 2019 14:14:17 +0000 (15:14 +0100)]
bcm968580: rename to bcm968580xref
The name of the board is bcm968580xref,
so rename the config to bcm968580xref too.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Andrew F. Davis [Fri, 1 Feb 2019 21:04:58 +0000 (15:04 -0600)]
armv7R: K3: am654: Fix order of debug elements in x509 template
The first element in the debug section is expected to be debugUID.
ROM will not parse this correctly when out of order, fix this here.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Andrew F. Davis [Fri, 1 Feb 2019 21:04:57 +0000 (15:04 -0600)]
am65x_evm: Allow bootm to load larger kernels
Bootm will fail to load kernels over 8MB, this is not enough
for our 64bit kernel images. Increase this to 64MB.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Andrew F. Davis [Fri, 1 Feb 2019 21:04:56 +0000 (15:04 -0600)]
configs: am65x_evm_r5: Enable GPT support
The second loader stages may be stored on GPT partitions,
enable support for this here.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Marcel Ziswiler [Fri, 1 Feb 2019 15:01:08 +0000 (16:01 +0100)]
cmd: sata: add null pointer check for dev
Calling sata_scan() with a null pointer probably won't make much sense.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Marcel Ziswiler [Fri, 1 Feb 2019 15:01:07 +0000 (16:01 +0100)]
dm: device: fail uclass_find_first_device() if list_empty
While uclass_find_device() fails with -ENODEV in case of list_empty
strangely uclass_find_first_device() returns 0.
Fix uclass_find_first_device() to also fail with -ENODEV instead.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Philippe Reynes [Thu, 31 Jan 2019 17:57:39 +0000 (18:57 +0100)]
bcm963158: enable watchdog and reboot with watchdog
Enable watchdog and reboot with watchdog in the configuration.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Thu, 31 Jan 2019 17:57:38 +0000 (18:57 +0100)]
dt: bcm63158: add watchdog
This commit add watchdog and sysreset watchdog
in the bcm63158 device tree.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Thu, 31 Jan 2019 17:57:37 +0000 (18:57 +0100)]
watchdog: bcm6345: allow to use this driver on arm bcm63158
This IP is also used on some arm SoC, so we allow to
use it on arm bcm63158 too.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Thu, 31 Jan 2019 17:57:36 +0000 (18:57 +0100)]
bcm963158: add initial support
This add the initial support of the broadcom reference
board bcm963158 with a bcm63158 SoC.
This board has 1 GB of ram, 512 MB of flash (nand),
2 usb port, 1 uart, 4 ethernet ports (LAN), 1 ethernet port (WAN).
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Thu, 31 Jan 2019 17:57:35 +0000 (18:57 +0100)]
bcm63158: add initial support
This add the initial support of the broadcom bcm63158 SoC family,
only the cpu, dram and uart are supported.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Alexander Graf [Thu, 31 Jan 2019 15:06:23 +0000 (16:06 +0100)]
initcall: Move to inline function
The board_r init function was complaining that we are looping through
an array, calling all our tiny init stubs sequentially via indirect
function calls (which can't be speculated, so they are slow).
The solution to that is pretty easy though. All we need to do is inline
the function that loops through the functions and the compiler will
automatically convert almost all indirect calls into direct inlined code.
With this patch, the overall code size drops (by 40 bytes on riscv64)
and boot time should become measurably faster for every target.
Signed-off-by: Alexander Graf <agraf@suse.de>
Hannes Schmelzer [Thu, 31 Jan 2019 08:24:45 +0000 (09:24 +0100)]
board/BuR/brppt1: drop DM_I2C_COMPAT
The TPS62517 PMIC driver has been partially converted to DM, so the
legacy I2C access layer isn't needed anymore.
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Faiz Abbas [Wed, 30 Jan 2019 12:38:42 +0000 (18:08 +0530)]
mmc: omap_hsmmc: Workaround errata regarding SDR104/HS200 tuning failures (i929)
Errata i929 in certain OMAP5/DRA7XX/AM57XX silicon revisions
(SPRZ426D - November 2014 - Revised February 2018 [1]) mentions
unexpected tuning pattern errors. A small failure band may be present
in the tuning range which may be missed by the current algorithm.
Furthermore, the failure bands vary with temperature leading to
different optimum tuning values for different temperatures.
As suggested in the related Application Report (SPRACA9B - October 2017
- Revised July 2018 [2]), tuning should be done in two stages.
In stage 1, assign the optimum ratio in the maximum pass window for the
current temperature. In stage 2, if the chosen value is close to the
small failure band, move away from it in the appropriate direction.
References:
[1] http://www.ti.com/lit/pdf/sprz426
[2] http://www.ti.com/lit/pdf/SPRACA9
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Patrick Delaunay [Wed, 30 Jan 2019 12:07:06 +0000 (13:07 +0100)]
clk: stm32mp1: correctly handle Clock Spreading Generator
To activate the csg option, the driver need to set the bit2
of PLLNCR register = SSCG_CTRL: Spread Spectrum Clock Generator
of PLLn enable.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Wed, 30 Jan 2019 12:07:05 +0000 (13:07 +0100)]
dts: stm32mp1: clock tree update
- Add st,digbypass on clk_hse node (needed for board rev.C)
- MLAHB/AHB max frequency increased from 200 to 209MHz, with:
- PLL3P set to 208.8MHz for MCU sub-system
- PLL3Q set to 24.57MHz for 48kHz SAI/SPI2S
- PLL3R set to 11.29MHz for 44.1kHz SAI/SPI2S
- PLL4P set to 99MHz for SDMMC and SPDIFRX
- PLL4Q set to 74.25MHz for EVAL board
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Wed, 30 Jan 2019 12:07:04 +0000 (13:07 +0100)]
clk: stm32mp1: add debug information
Add support of clk dump command and
display information during probe (under CONFIG_DISPLAY_CPUINFO).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Wed, 30 Jan 2019 12:07:03 +0000 (13:07 +0100)]
clk: stm32mp1: recalculate counter when switching freq
Because stgen is initialized with HSI clock, we need to
recalculate the counter when changing frequency.
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Wed, 30 Jan 2019 12:07:02 +0000 (13:07 +0100)]
clk: stm32mp1: correct access to RCC_OCENSETR/RCC_OCENCLRR
Remove unnecessary setbits on set/clear registers.
Avoid to deactivate HSI with HSE.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Wed, 30 Jan 2019 12:07:01 +0000 (13:07 +0100)]
clk: stm32mp1: add IPCC clock
Add support for enable/disable of IPCC clock using AHB3 registers
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Wed, 30 Jan 2019 12:07:00 +0000 (13:07 +0100)]
clk: stm32mp1: no more get ck_usbo_48m in device tree
Remove support of ck_usbo_48m clock node in device tree,
but force 48MHz frequency to prepare alignment
with kernel device tree.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Vabhav Sharma [Wed, 30 Jan 2019 11:24:00 +0000 (11:24 +0000)]
drivers: serial: dm: Enable DM_FLAG_PRE_RELOC in SBSA pl011 uart driver
The DM_FLAG_PRE_RELOC shall be enabled in SBSA PL011 uart driver
as this driver is used in NXP based SoCs
It is necessary to have Serial console running before relocation
The !CONFIG_IS_ENABLED(OF_CONTROL) [*] check is set as "workaround"
for DM problem :
4687919684e
This flag is set if board does not support device-tree and using
platform data, In DM Model either of device tree or platform data
can be used to fetch device configuration
It is possible to use SBSA UART with CONFIG_DM_SERIAL but witout
corresponding device tree description (OF_CONTROL)
Other board/SoCs have this flag set unconditionally
Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Roman Kapl [Wed, 30 Jan 2019 10:39:54 +0000 (11:39 +0100)]
hashtable: fix environment variable corruption
Only first previously deleted entry was recognized, leading hsearch_r
to think that there was no previously deleted entry. It then conluded
that a free entry was found, even if there were no free entries and it
overwrote a random entry.
This patch makes sure all deleted or free entries are always found and
also introduces constants for the 0 and -1 numbers. Unit tests to excersise a
simple hash table usage and catch the corruption were added.
To trash your environment, simply run this loop:
setenv i 0
while true; do
setenv v_$i $i
setenv v_$i
setexpr i $i + 1
done
Signed-off-by: Roman Kapl <rka@sysgo.com>
Chris Packham [Wed, 30 Jan 2019 07:23:16 +0000 (20:23 +1300)]
moveconfig: add a second pass for empty #if/#endif blocks
Moveconfig already attempts to remove empty #if/#endif blocks when there
is a matching CONFIG_ being moved. Add a second pass which covers files
without a match.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Chris Packham [Wed, 30 Jan 2019 07:19:28 +0000 (20:19 +1300)]
omap3_cairo: remove empty #ifdef/#endif block
The content between these guards was removed in commit
9baa2bce2890
("Removed unused references to CONFIG_SERIALx"). Remove the now
empty #ifdef/#endif block and the accompanying comment.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Heinrich Schuchardt [Wed, 30 Jan 2019 06:53:31 +0000 (07:53 +0100)]
test: provide unit test for memory functions
Memory functions may have architecture specific implementations. These
should be tested.
Provide unit tests for memset(), memcpy(), memmove().
Provide a 'ut lib' sub-command to execute the tests.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Andrew F. Davis [Mon, 28 Jan 2019 17:43:26 +0000 (11:43 -0600)]
doc: ti-secure: Add ULO info for AM57xx/DRA7xx secure devices from TI
Booting from UART and USB on HS devices is now supported for this
platform. Update documentation for the same.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Andrew F. Davis [Mon, 28 Jan 2019 17:43:25 +0000 (11:43 -0600)]
defconfigs: Add config for AM57xx High Security EVM with USB/UART Boot support
Add a new defconfig file for the AM57xx High Security EVM. This config
is specific for the case of USB/UART booting.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Andrew F. Davis [Mon, 28 Jan 2019 17:43:24 +0000 (11:43 -0600)]
defconfigs: Add config for DRA7xx High Security EVM with USB Boot support
Add a new defconfig file for the DRA7xx High Security EVM. This config
is specific for the case of USB booting.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Andrew F. Davis [Mon, 28 Jan 2019 17:43:23 +0000 (11:43 -0600)]
defconfigs: am57xx_hs_evm: Sync HS and non-HS defconfigs
Additions have been made to the non-HS defconfig without the same
being made to the HS defconfig, sync them.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Andrew F. Davis [Mon, 28 Jan 2019 17:43:22 +0000 (11:43 -0600)]
defconfigs: dra7xx_hs_evm: Sync HS and non-HS defconfigs
Additions have been made to the non-HS defconfig without the same
being made to the HS defconfig, sync them.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Philippe Reynes [Mon, 28 Jan 2019 14:37:32 +0000 (15:37 +0100)]
bcm968580: enable watchdog and reboot with watchdog
Enable watchdog and reboot with watchdog in the configuration.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Mon, 28 Jan 2019 14:37:31 +0000 (15:37 +0100)]
bcm968380gerg: enable watchdog and reboot with watchdog
Enable watchdog and reboot with watchdog in the configuration.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Mon, 28 Jan 2019 14:37:30 +0000 (15:37 +0100)]
dt: bcm6858: add watchdog
This commit add watchdog and sysreset watchdog
in the bcm6858 device tree.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Mon, 28 Jan 2019 14:37:29 +0000 (15:37 +0100)]
dt: bcm6838: add watchdog
This commit add watchdog and sysreset watchdog
in the bcm6838 device tree.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Mon, 28 Jan 2019 14:37:28 +0000 (15:37 +0100)]
watchdog: bcm6345: allow to use this driver on arm bcm6858
This IP is also used on some arm SoC, so we allow to
use it on arm bcm6858 too.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Philippe Reynes [Mon, 28 Jan 2019 14:37:27 +0000 (15:37 +0100)]
watchdog: bcm6345: switch to raw I/O functions
This driver is used on several big endian mips board.
So we could use raw I/O function instead of forcing
big endian access.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Marek Vasut [Wed, 6 Feb 2019 12:19:29 +0000 (13:19 +0100)]
fs: ext4: Unmount FS in do_fs_type()
Unlike other generic FS accessors, fs_get_info() does not call fs_close()
at the end of it's operation. Thus, using fs_get_info() in do_fs_type()
without calling fs_close() causes potential memory leak by creating new
filesystem structures on each call of do_fs_type().
The test case to trigger this problem is as follows. It is required to
have ext4 filesystem on the first partition of the SDMMC device, since
ext4 requires stateful mount and causes memory allocation.
=> while true ; do mmc rescan ; fstype mmc 1 ; done
Eventually, the mounting of ext4 will fail due to malloc failures
and the filesystem will not be correctly detected.
This patch fixes the problem by adding the missing fs_close().
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Marek Vasut [Wed, 6 Feb 2019 10:34:27 +0000 (11:34 +0100)]
mmc: Do not poll using CMD13 when changing timing
When using CMD6 to switch eMMC card timing from HS200/HS400 to HS/legacy,
do not poll for the completion status using CMD13, but rather wait 50mS.
Once the card receives the CMD6 and starts executing it, the bus is in
undefined state until both the card finishes executing the command and
until the controller switches the bus to matching timing configuration.
During this time, it is not possible to transport any commands or data
across the bus, which includes the CMD13.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Marek Vasut [Fri, 11 Jan 2019 22:38:07 +0000 (23:38 +0100)]
mmc: tmio: renesas: Add 1uS delay after DMA completion on older IPs
The internal DMAC asserts DMA transfer end bit too early on older
version of the TMIO IPs which use bit 17 for DTRAEND. Add 1uS
delay after the completion of DMA transfer and before invalidating
the cache to let the DMAC fully complete the transfer. Otherwise,
it could happen that the last few bytes of a transferred data are
not available.
A test case to trigger this behavior is the following command, ran
on the U-Boot command line, with Sandisk 16 GiB UHS-I card inserted
into SDHI slot 0 and with first partition being of type FAT:
=> while true ; do mmc rescan ; fstype mmc 0:1 ; done
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Fri, 11 Jan 2019 22:45:54 +0000 (23:45 +0100)]
mmc: tmio: Make DMA transfer end bit configurable
Different versions of the SDHI core use either bit 17 or bit 20 for the
DTRAEND indication, which can differ even between SoC revisions. Make
the DTRAEND bit position part of the driver private data, so that the
probe function can set this accordingly. Set this to 20 on Socionext
SoCs and either 17 or 20 on Renesas SoCs, depending on the SoC.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Shawn Guo [Tue, 15 Jan 2019 14:26:37 +0000 (22:26 +0800)]
fdt: support booting with dtb in Android image
Some platforms choose to store device tree blob in Android image second
area. Let's try to look for dtb from there when booting an Android
image, and use it for booting if found.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Michal Simek [Thu, 31 Jan 2019 15:31:00 +0000 (16:31 +0100)]
dm: core: Add tests for dev_read_alias_highest_id()
It is checking the highest alias ID for eth, gpio, pci, i2c and error
code on non existing alias.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Simek [Thu, 31 Jan 2019 15:30:59 +0000 (16:30 +0100)]
dm: core: Introduce dev_read_alias_highest_id()
It is wrapper for calling of_alias_get_highest_id() when live tree is
enabled and fdtdec_get_alias_highest_id() if not.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Simek [Thu, 31 Jan 2019 15:30:58 +0000 (16:30 +0100)]
fdt: Introduce fdtdec_get_alias_highest_id()
Find out the highest alias ID used for certain subsystem.
This call will be used for alocating IDs for i2c buses which are not
described in DT.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Simek [Thu, 31 Jan 2019 15:30:57 +0000 (16:30 +0100)]
dm: core: Add of_alias_get_highest_id()
The same functionality was added to Linux for i2c bus registration with this
commit message:
"
of: base: add function to get highest id of an alias stem
I2C supports adding adapters using either a dynamic or fixed id. The
latter is provided by aliases in the DT case. To prevent id collisions
of those two types, install this function which gives us the highest
fixed id, so we can then let the dynamically created ones come after
this highest number.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
"
Add it also to U-Boot for DM I2C support.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Fri, 8 Feb 2019 02:32:19 +0000 (21:32 -0500)]
Prepare v2019.04-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 7 Feb 2019 19:53:03 +0000 (14:53 -0500)]
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 7 Feb 2019 19:48:56 +0000 (14:48 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-spi
- SPI-NOR support
Vignesh R [Tue, 5 Feb 2019 05:59:29 +0000 (11:29 +0530)]
MAINTAINERS: Add an entry for SPI NOR
Add myself as co-maintainer for U-Boot SPI NOR subsystem.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
[jagan: drop mtd/spi file from SPI entry]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Vignesh R [Tue, 5 Feb 2019 05:59:28 +0000 (11:29 +0530)]
configs: Don't use SPI_FLASH_BAR as default
Now that new SPI NOR layer uses stateless 4 byte opcodes by default,
don't enable SPI_FLASH_BAR. For SPI controllers that cannot support
4-byte addressing, (stm32_qspi.c, fsl_qspi.c, mtk_qspi.c, ich.c,
renesas_rpc_spi.c) add an imply clause to enable SPI_FLASH_BAR so as to
not break functionality.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
Vignesh R [Tue, 5 Feb 2019 05:59:27 +0000 (11:29 +0530)]
configs: Remove SF_DUAL_FLASH
SF_DUAL_FLASH claims to enable support for SF_DUAL_STACKED_FLASH and
SF_DUAL_PARALLEL_FLASH. But, in current U-Boot code, grepping for above
enums yield no user and therefore support seems to be incomplete. Remove
these configs so as to avoid confusion.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
Vignesh R [Tue, 5 Feb 2019 05:59:26 +0000 (11:29 +0530)]
spl: Kconfig: Enable SPI_FLASH_TINY by default for SPL
SPL only needs to be able to read from SPI Flash to load next stage and
does not really need write/erase etc. Therefore in order to reduce SPI
Flash code size in SPL, enable SPI_FLASH_TINY, that only supports
reading from SPI flash, as default.
Note: Since, SPI_FLASH_TINY does not support SPI_FLASH_BAR,
SPI_FLASH_TINY is not enabled for boards with SPI controllers that
cannot support 4 byte addressing.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
Vignesh R [Tue, 5 Feb 2019 05:59:25 +0000 (11:29 +0530)]
mtd: spi: Add lightweight SPI flash stack for SPL
Add a tiny SPI flash stack that just supports reading data/images from
SPI flash. This is useful for boards that have SPL size constraints and
would need to use SPI flash framework just to read images/data from
flash. There is approximately 1.5 to 2KB savings with this.
Based on prior work of reducing spi flash id table by
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
Vignesh R [Tue, 5 Feb 2019 05:59:24 +0000 (11:29 +0530)]
mtd: spi: Remove unused files
spi_flash and spi_flash_ids are no longer needed after SPI NOR
migration. Remove them.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
Vignesh R [Tue, 5 Feb 2019 05:59:23 +0000 (11:29 +0530)]
mtd: spi: Switch to new SPI NOR framework
Switch spi_flash_* interfaces to call into new SPI NOR framework via MTD
layer. Fix up sf_dataflash to work in legacy way. And update sandbox to
use new interfaces/definitions
Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
Vignesh R [Tue, 5 Feb 2019 05:59:22 +0000 (11:29 +0530)]
mtd: spi: sf_probe: Add "jedec, spi-nor" compatible string
Linux uses "jedec,spi-nor" as compatible string for JEDEC compatible
SPI Flash device nodes. Therefore make U-Boot also to look for the same
compatible string so that we can use Linux DTS files as is.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
Vignesh R [Tue, 5 Feb 2019 05:59:21 +0000 (11:29 +0530)]
mtd: spi: spi-nor-core: Add back U-Boot specific features
For legacy reasons, we will have to keep around U-Boot specific
SPI_FLASH_BAR and SPI_TX_BYTE. Add them back to the new framework
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
Vignesh R [Tue, 5 Feb 2019 05:59:20 +0000 (11:29 +0530)]
mtd: spi: spi-nor-core: Add SFDP support
Sync Serial Flash Discoverable Parameters (SFDP) parsing support from
Linux. This allows auto detection and configuration of Flash parameters.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
Vignesh R [Tue, 5 Feb 2019 05:59:19 +0000 (11:29 +0530)]
mtd: spi: spi-nor-core: Add 4 Byte addressing support
Sync changes from Linux SPI NOR framework to add 4 byte addressing
support. This is required in order to support flashes like MT35x
that no longer support legacy Bank Address Register(BAR) way of accessing
>16MB region.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
Vignesh R [Tue, 5 Feb 2019 05:59:18 +0000 (11:29 +0530)]
mtd: spi: spi-nor-core: Add SPI MEM support
Many SPI controllers have special MMIO interfaces which provide
accelerated read/write access but require knowledge of flash parameters
to make use of it. Recent spi-mem layer provides a way to support such
controllers.
Therefore, add spi-mem support to spi-nor-core as a way to support SPI
controllers with MMIO interface. SPI MEM layer takes care of translating
spi_mem_ops to spi_xfer()s in case of legacy SPI controllers.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
Vignesh R [Tue, 5 Feb 2019 05:59:17 +0000 (11:29 +0530)]
mtd: spi: Port SPI NOR framework from Linux
Current U-Boot SPI NOR support (sf layer) is quite outdated as it does not
support 4 byte addressing opcodes, SFDP table parsing and different types of
quad mode enable sequences. Many newer flashes no longer support BANK
registers used by sf layer to a access >16MB of flash address space.
So, sync SPI NOR framework from Linux v4.19 that supports all the
above features. Start with basic sync up that brings in basic framework
subsequent commits will bring in more features.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Stefan Roese <sr@denx.de>
Tested-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> #zynq-microzed
Vignesh R [Tue, 5 Feb 2019 05:59:16 +0000 (11:29 +0530)]
sh: bitops: add hweight*() macros
Add hweight*() macros required for moving to new SF layer
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>