Ryder Lee [Thu, 15 Nov 2018 02:07:57 +0000 (10:07 +0800)]
watchdog: MediaTek: add watchdog driver for MediaTek SoCs
This patch adds a common driver for the Mediatek SoC integrated
watchdog.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Tested-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Ryder Lee [Thu, 15 Nov 2018 02:07:56 +0000 (10:07 +0800)]
timer: MediaTek: add timer driver for MediaTek SoCs
This patch adds clock source and clock event for the timer found
on the Mediatek SoCs.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Tested-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Ryder Lee [Thu, 15 Nov 2018 02:07:55 +0000 (10:07 +0800)]
clk: MediaTek: add clock driver for MT7623 SoC.
This patch adds a driver for MT7623 clock blocks.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Tested-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Ryder Lee [Thu, 15 Nov 2018 02:07:54 +0000 (10:07 +0800)]
clk: MediaTek: add clock driver for MT7629 SoC.
This patch adds clock modules for MediaTek SoCs:
- Shared part: a common driver which contains the general operations
for plls, muxes, dividers and gates so that we can reuse it in future.
- Specific SoC part: the group of structures used to hold the hardware
configuration for each SoC.
We take MT7629 as an example to demonstrate how to implement driver if
any other MediaTek chips would like to use it.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Weijie Gao [Thu, 15 Nov 2018 02:07:53 +0000 (10:07 +0800)]
arm: MediaTek: add basic support for MT7623 boards
This adds a general board file based on MT7623 SoCs from MediaTek.
As this u-boot is loaded by MTK proprietary preloader, there is no
low level initializtion codes.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Tested-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Ryder Lee [Thu, 15 Nov 2018 02:07:52 +0000 (10:07 +0800)]
arm: MediaTek: add basic support for MT7629 boards
This adds a general board file based on MT7629 SoCs from MediaTek.
Apart from the generic parts (cpu) we add some low level init codes
and initialize the early clocks.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Ryder Lee [Thu, 15 Nov 2018 02:07:51 +0000 (10:07 +0800)]
arm: dts: MediaTek: add device tree for MT7623
This adds device tree for MT7623 development board - Bananapi R2
Detailed hardware information for BPI-R2 which could be found on
http://wiki.banana-pi.org/Banana_Pi_BPI-R2.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Tested-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Ryder Lee [Thu, 15 Nov 2018 02:07:50 +0000 (10:07 +0800)]
arm: dts: MediaTek: add device tree for MT7629
This patch adds MT7629 device tree and the includes it needs.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Ryder Lee [Thu, 15 Nov 2018 02:07:49 +0000 (10:07 +0800)]
tools: MediaTek: add MTK boot header generation to mkimage
This patch adds support for MTK boot image generation.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Tue, 27 Nov 2018 19:01:45 +0000 (14:01 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-usb
- Introduce CONFIG_SPL_DM_USB
Tom Rini [Tue, 27 Nov 2018 03:52:19 +0000 (22:52 -0500)]
Merge branch '2018-11-26-master-imports'
- chiliboard updates
- misc TI platform updates
Marcin Niestroj [Wed, 21 Nov 2018 19:32:03 +0000 (20:32 +0100)]
ARM: chiliboard: remove dead !CONFIG_DM_SERIAL code
DM_SERIAL is selected by TARGET_CHILIBOARD, so there is no reason to
keep code that will not be built. Remove it.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Marcin Niestroj [Wed, 21 Nov 2018 19:32:02 +0000 (20:32 +0100)]
ARM: chiliboard: move towards driver model and device-tree boot
This patch mostly enables DM drivers in board defconfig and all their
dependencies. Additionally we remove ethernet platform data, as all
details are in device-tree now.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Marcin Niestroj [Wed, 21 Nov 2018 19:32:01 +0000 (20:32 +0100)]
ARM: dts: am335x-chiliboard: add /chosen/stdout-path
Add that node path in u-boot overlay dtsi file for now to keep
am335x-chiliboard.dts in sync with Linux.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Marcin Niestroj [Wed, 21 Nov 2018 19:32:00 +0000 (20:32 +0100)]
ARM: dts: am335x-chili*: add chiliSOM and chiliboard DTS files
Import chiliSOM and chiliboard dts files from Linux v4.19. They will
be used after transition to driver model and device-tree based boot.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Chris Packham [Wed, 21 Nov 2018 07:24:51 +0000 (20:24 +1300)]
configs: Remove CONFIG_MARVELL
This option is defined by a few boards but doesn't guard any code.
Remove it from the boards and config_whitelist.txt.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Otavio Salvador [Tue, 20 Nov 2018 18:47:12 +0000 (16:47 -0200)]
ARM: vexpress_*_defconfig: Enable CMD_UBI support
This allow for convenient use of QEMU machine to test loading of UBI
filesystem. There are a couple of changes made together of this which
are required:
1) The malloc must be at least 512 KiB to allow the use of UBI
filesystem. We are going to enable it in a next patch.
2) MTD_DEVICE must be enabled, otherwise we get missing symbols
during the build
Following configs were change:
- vexpress_aemv8a_dram_defconfig
- vexpress_aemv8a_juno_defconfig
- vexpress_aemv8a_semi_defconfig
- vexpress_ca15_tc2_defconfig
- vexpress_ca5x2_defconfig
- vexpress_ca9x4_defconfig
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Adam Ford [Tue, 20 Nov 2018 14:43:13 +0000 (08:43 -0600)]
board: da8xxevm: Fix Environmental CRC error
When the spi_flash_probe_bus_cs() was previously called, it was
called using 0's for two values where CONFIG_ENV_SPI_MAX_HZ and
CONFIG_ENV_SPI_MODE are now used. When changed this
caused the environment to fail the CRC check and the default
was used. This patch defines both of these values back 0.
Fixes:
25a17652c9c2 ("fix: env: Fix the SPI flash device setup
for DM mode")
Signed-off-by: Adam Ford <aford173@gmail.com>
Andrew F. Davis [Mon, 19 Nov 2018 20:47:53 +0000 (14:47 -0600)]
ARM: armv7: Add early stack for erratum workarounds
Some erratum workarounds call into C code before the stack
is setup, this can lead to values pushed onto the stack
being lost, firewall exceptions, and other undefined behavior.
Setup a temporary stack to allow these functions to work
correctly.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Acked-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Jonathan Gray [Sun, 18 Nov 2018 02:03:39 +0000 (13:03 +1100)]
tools/file2include: don't use malloc.h for malloc
stdlib.h is the header for malloc since at least c89/c90.
Previously this would fail to build on OpenBSD and fallback to the wrong
header:
In file included from u-boot/tools/file2include.c:21:
u-boot/include/malloc.h:875:5: error: function-like macro
'CONFIG_IS_ENABLED' is not defined
Signed-off-by: Jonathan Gray <jsg@jsg.id.au>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Sam Protsenko [Thu, 15 Nov 2018 20:26:17 +0000 (22:26 +0200)]
arm: ti: boot: Fix U-Boot environment partition address
Recent removal of obsolete partition led to shifting of starting address
of "reserved" partition (which reflects U-Boot environment). Fix its
start address to keep it in sync with ENV_OFFSET and DFU environment.
This patch also provides fixed start address for "reserved" partition,
so that we can track when it's shifted next time.
While at it, move it before "misc" partition to keep all Android
partitions together.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Acked-By: Praneeth Bajjuri <praneeth@ti.com>
Lokesh Vutla [Thu, 15 Nov 2018 05:34:50 +0000 (11:04 +0530)]
armv7r: K3: Allow SPL to run only on core 0
Based on the MCU R5 efuse settings, R5F cores in MCU domain
either work in split mode or in lock step mode.
If efuse settings are in lockstep mode: ROM release R5 cores
and SPL continues to run on the R5 core is lockstep mode.
If efuse settings are in split mode: ROM releases both the R5
cores simultaneously and allow SPL to run on both the cores.
In this case it is bootloader's responsibility to detect core
1 and park it. Else both the core will be running bootloader
independently which might result in an unexpected behaviour.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Frank Wunderlich [Fri, 5 Oct 2018 09:41:59 +0000 (11:41 +0200)]
add default-option to bootmenu
with this patch the selected Entry in bootmenu can be set by
environment-var bootmenu_default=<number>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Tom Rini [Mon, 26 Nov 2018 20:52:51 +0000 (15:52 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-video
Tom Rini [Mon, 26 Nov 2018 20:52:47 +0000 (15:52 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-sunxi
Tom Rini [Mon, 26 Nov 2018 18:45:29 +0000 (13:45 -0500)]
Merge git://git.denx.de/u-boot-riscv
Sven Schwermer [Wed, 21 Nov 2018 07:43:57 +0000 (08:43 +0100)]
usb: storage: s/CONFIG_BLK/CONFIG_IS_ENABLED(BLK)/
This fixes link issues when building the SPL without USB driver model
but with USB storage support. CONFIG_BLK can be enabled and disabled
independently for SPL and non-SPL builds. We leverage that existing
functionality here.
Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
Sven Schwermer [Wed, 21 Nov 2018 07:43:56 +0000 (08:43 +0100)]
usb: s/CONFIG_DM_USB/CONFIG_IS_ENABLED(DM_USB)/
This allows to disable the USB driver model in SPL because it checks
the CONFIG_SPL_DM_USB variable for SPL builds. Nothing changes for
regular non-SPL builds.
Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
Sven Schwermer [Wed, 21 Nov 2018 07:43:55 +0000 (08:43 +0100)]
usb: Remove CMD_USB dependency for common code
Common USB code is built whenever USB is enabled (in non-SPL builds).
The USB uclass is built whenever (SPL_)DM_USB is enabled. Both need to
be independent from CMD_USB.
Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
Sven Schwermer [Wed, 21 Nov 2018 07:43:54 +0000 (08:43 +0100)]
usb: am335x_evm: Disable CONFIG_SPL_DM_USB
This configuration doesn't use USB in the SPL, so we need to disable
driver model for USB in the SPL.
Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
Sven Schwermer [Wed, 21 Nov 2018 07:43:53 +0000 (08:43 +0100)]
usb: Introduce CONFIG_SPL_DM_USB
This allows building the SPL without driver model for USB. Since
CONFIG_SPL_DM_USB is enabled if and only if CONFIG_DM_USB was enabled
before, this patch does not change the build behaviour.
Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
Tom Rini [Mon, 26 Nov 2018 17:40:22 +0000 (12:40 -0500)]
Merge branch '2018-11-25-master-imports'
- Bring in the series from Simon for SPL logging support and bloblist
Neil Armstrong [Fri, 27 Jul 2018 12:10:00 +0000 (14:10 +0200)]
ARM: meson: Add boot device discovery
The Amlogic Meson SoCs ROM supports a boot over USB with a custom protocol.
When no other boot medium are available (or by forcing the USB mode), the
ROM sets the primary USB port as device mode and waits for a Host to
enumerate.
When enumerated, a custom protocol described at [1] permits writing to
memory and execute some specific FIP init code to run the loaded
Arm Trusted Firmware BL2 and BL3 stages before running the BL33 stage.
In this mode, we can load different binaries that can be used by U-boot
like a script image file.
This adds support for a custom USB boot stage only available when the
boot mode is USB and the script file at a pre-defined address is valid.
This support was heavily copied from the Sunxi Allwinner FEL U-Boot support.
The tool pyamlboot described at [2], permits using this boot mode on boards
exposing the first USB port, either as OTG or Host port.
[1] https://github.com/superna9999/pyamlboot/blob/master/PROTOCOL.md
[2] https://github.com/superna9999/pyamlboot/blob/master/README.md
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Jerome Brunet [Wed, 24 Oct 2018 12:57:54 +0000 (14:57 +0200)]
ARM: meson: factorize common code out amlogic's boards
Now we have moved all the Amlogic board support to common generic board code,
we can move the identical board_init() and ft_board_setup() functions to
weak functions into the board-common mach-meson file.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Wed, 5 Sep 2018 13:57:11 +0000 (15:57 +0200)]
board: amlogic: add support for S400 board
The S400 board is the Amlogic AXG SoC reference board including :
- Amlogic A113DX ARM Cortex-A53 quad-core SoC @ 1.2GHz
- 1GB DDR4 SDRAM
- 10/100 Ethernet
- 2 x USB 2.0 Host
- eMMC
- Infrared receiver
- SDIO WiFi Module
- MIPI DSI Connector
- Audio HAT Connector
- PCI-E M.2 Connectors
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Fri, 7 Sep 2018 15:25:13 +0000 (17:25 +0200)]
clk: Add clock driver for AXG
This patch adds a minimal clock driver for the Amlogic AXG SoC to handle
the basic gates and PLLs.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Wed, 5 Sep 2018 13:56:52 +0000 (15:56 +0200)]
ARM: dts: Sync Amlogic Meson AXG DT from Linux 4.20-rc1
Synchronize the Amlogic AXG Device Tree files and bindings include from
the recent Linux 4.20-rc1, because it includes patches fixing support for
U-boot.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Wed, 5 Sep 2018 13:56:12 +0000 (15:56 +0200)]
ARM: meson: Add support for AXG family
This patch adds support for the Amlogic AXG SoC, which is very close from
the Amlogic GXL SoCs with :
- Same 4xCortex-A53 CPUs but clocked at 1.2GHZ max
- DDR Interface limited to DDR4 16bit
- The whole physical register address space has been moved to 0xfxxxxxxx
- The pinctrl setup has changed
- The clock tree is different enough to use a different driver
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Jerome Brunet [Fri, 5 Oct 2018 15:00:37 +0000 (17:00 +0200)]
ARM: meson: rework soc arch file to prepare for new SoC
We are about to add support for the Amlogic AXG SoC. While very close to
the Gx SoC family, we will need to handle a few thing which are different
in this SoC. Rework the meson arch directory to prepare for this.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Jerome Brunet [Fri, 26 Oct 2018 13:42:50 +0000 (15:42 +0200)]
clk: meson: silence debug print
This debug print was not designed to be active in non-debug mode.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Thu, 8 Nov 2018 16:17:41 +0000 (17:17 +0100)]
clk: meson: add static to meson_gates table
The meson_gates table should be set static in the clk_meson driver.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Jerome Brunet [Fri, 5 Oct 2018 07:36:37 +0000 (09:36 +0200)]
pinctrl: meson: add axg support
This adds support for the Amlogic AXG SoC pinctrl and GPIO controller
using a specific set of pinctrl functions which differs from the GX SoCs.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Jerome Brunet [Thu, 25 Oct 2018 11:15:34 +0000 (13:15 +0200)]
pinctrl: meson: select generic pinctrl
Meson pinctrl needs generic pinctrl, rather than depending on it
select it
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Jerome Brunet [Fri, 5 Oct 2018 07:35:26 +0000 (09:35 +0200)]
pinctrl: meson: rework gx pmx function
In preparation of supporting the new Amlogix AGX SoCs, we need to move
the Amlogic GX pinmux functions out of the common code to be able to
add a different set of SoC specific pinmux functions for AXG.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Jerome Brunet [Wed, 24 Oct 2018 14:27:51 +0000 (16:27 +0200)]
configs: meson: change default load addresses
The original chosen addresses conflict with the BL2 initialisation.
So far there was no issue with them but if we preload binaries in
RAM (ROMUSB boot) before running the BL2 they get corrupted by the
execution of BL2 init.
If we load them around 0x08000000, there is no such issue.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Jerome Brunet [Thu, 25 Oct 2018 14:41:37 +0000 (16:41 +0200)]
ARM: rework amlogic configuration
Rework the board SYS_BOARD, SYS_VENDOR and SYS_CONFIG_NAME setup by moving
the board Kconfig into the mach-meson Kconfig to make it easier to add
new boards for a SoC architecture and add a custom config header or custom
board handler for a platform.
This drops the board CONFIGs and the duplicate boards configs headers in
favor of a single meson64.h config header.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Jerome Brunet [Fri, 19 Oct 2018 11:27:40 +0000 (13:27 +0200)]
board: amlogic: factorise gxbb boards
The nanopi-k2 and the odroid-c2 are similar enough to be supported
by the same u-boot board. This change use odroid-c2 u-boot board
for the nanopi-k2 as well. Dedicated defconfig are kept to customize
the names and device tree.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Fri, 9 Nov 2018 10:57:47 +0000 (11:57 +0100)]
board: amlogic: move khadas-vim2 as q200 ref board
The Khadas vim2 derive from amlogic s912 reference design (Q200).
This patch moves the khadas-vim2 board support to a generic Q200 board,
while keeping a dedicated defconfig to customize the names and device tree.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Jerome Brunet [Fri, 19 Oct 2018 10:14:57 +0000 (12:14 +0200)]
board: amlogic: remove p212 derivatives
The Khadas vim and the libretech aml-s905x-cc (aka Potato) derive
from amlogic s905x reference design (P212).
All the code in these board is a copy/paste from the p212, which is
tedious to maintain. This change use p212 u-boot board for all these
boards, while keeping a dedicated defconfig to customize the names
and device tree.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Jerome Brunet [Fri, 19 Oct 2018 10:00:51 +0000 (12:00 +0200)]
configs: meson: remove unnecessary MESON_FDTFILE_SETTING
MESON_FDTFILE_SETTING is used to define the default name of the fdt
file in u-boot environment. We can easily derive it from
CONFIG_DEFAULT_DEVICE_TREE instead. This will help factorize the code
a bit
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Jerome Brunet [Fri, 5 Oct 2018 08:25:47 +0000 (10:25 +0200)]
ARM: meson: clean-up platform selection
Even if multiple board are selected through Kconfig, u-boot will only
compile one. This makes sense since compiling these targets will export
global symbols, such as board_init()
The change rework amlogic Kconfig so only one board may be selected at
a time
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Thu, 8 Nov 2018 16:16:11 +0000 (17:16 +0100)]
net: designware: add meson meson axg compatible
Add the compatible string for the upcoming Amlogic AXG SoC family.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Mon, 10 Sep 2018 14:44:14 +0000 (16:44 +0200)]
net: designware: add meson meson gxbb compatible
Add the compatible string for the Amlogic GXBB SoC family.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Mon, 10 Sep 2018 14:43:46 +0000 (16:43 +0200)]
mmc: meson-gx: Add AXG compatible
Add the compatible string for the upcoming Amlogic AXG SoC family.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Simon Glass [Fri, 16 Nov 2018 01:44:09 +0000 (18:44 -0700)]
spl: Add support for passing handoff info to U-Boot proper
There is some basic informaton that SPL normally wants to pass through to
U-Boot, such as the SDRAM size and bank information.
Mkae use of the new bloblist structure for this. Add a new 'handoff' blob
which is set up in SPL and passed to U-Boot proper. Also adda test for
sandbox_spl that checks that this works correctly and a new 'sb' command
to show the information passed from SPL.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 16 Nov 2018 01:44:08 +0000 (18:44 -0700)]
sandbox: Boot in U-Boot through the standard call
Most architectures use jump_to_image_no_args() to jump from SPL to U-Boot.
At present sandbox is special in that it jumps in its
spl_board_load_image() call. This is not strictly correct, and means that
sandbox misses out some parts of board_init_r(), just as calling
bloblist_finish(), for example.
Change spl_board_load_image() to just identify the filename to boot, and
implement jump_to_image_no_args() to actually jump to it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 16 Nov 2018 01:44:07 +0000 (18:44 -0700)]
sandbox: Filter arguments when starting U-Boot
The current method of starting U-Boot from U-Boot adds arguments to pass
the memory file through, so that memory is preserved. This is fine for a
single call, but if we call from TPL -> SPL -> U-Boot the arguments build
up and we have several memory files in the argument list.
Adjust the implementation to filter out arguments that we want to replace
with new ones. Also print a useful error if the exec() call fails.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 16 Nov 2018 01:44:06 +0000 (18:44 -0700)]
sandbox: Use malloc() and free() from os layer
At present sandbox calls malloc() from various places in the OS layer and
this results in calls to U-Boot's malloc() implementation. It is better to
use the on in the OS layer, since it does not mix allocations with the
main U-Boot code.
Fix this by replacing calls with malloc() to os_malloc(), etc.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Simon Glass [Fri, 16 Nov 2018 01:44:05 +0000 (18:44 -0700)]
sandbox: Refactor code to create os_jump_to_file()
At present os_jump_to_image() jumps to a given image, and this is written
to a file. But it is useful to be able to jump to a file also.
To avoid duplicating code, split out the implementation of
os_jump_to_image() into a new function that jumps to a file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 16 Nov 2018 01:44:04 +0000 (18:44 -0700)]
sandbox: Allow puts() output before global_data is set up
We support putc() in this case but not puts(), but this is more useful
since it is what printf() uses.
This particularly affects debugging early in SPL, where currently printf()
statements result in no output. Fix this by adding a special case into
puts() for sandbox, just like putc().
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Simon Glass [Fri, 16 Nov 2018 01:44:03 +0000 (18:44 -0700)]
sandbox: Add a new 'sb' command
The old 'sb' command was deprecated in 2015 and replaced with 'host'. It
is useful to be able to access some internal sandbox state, particularly
for testing.
Resurrect the old command and provide a way to print some basic state
information (currently just the arguments to sandbox).
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 16 Nov 2018 01:44:02 +0000 (18:44 -0700)]
sandbox: Drop the deprecated 'sb' command
The old 'sb' command was deprecated in 2015 and replaced with 'host'.
Remove the remaining users and the command, so that the name is available
for other purposes.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 16 Nov 2018 01:44:01 +0000 (18:44 -0700)]
sandbox: Add an option to display of-platdata in SPL
At present we don't have a test that of-platdata can be accessed in SPL.
Add this in as a command-line option to SPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 16 Nov 2018 01:44:00 +0000 (18:44 -0700)]
test/py: Add a way to pass flags to sandbox
It is sometimes useful to restart sandbox with some particular flags to
test certain functionality. Add a new method to ConsoleSandbox to handle
this, without changing the existing APIs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Simon Glass [Fri, 16 Nov 2018 01:43:59 +0000 (18:43 -0700)]
sandbox: Add a memory map to the sandbox README
We have a few things in the memory map now, so add documentation for this
to avoid confusion. Also note that it is possible to run all tests now.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 16 Nov 2018 01:43:58 +0000 (18:43 -0700)]
spl: Add a comment to spl_set_bd()
There is a strange feature to set global_data to a data-section variable
early in SPL. This only works if SPL actually has access to SRAM which is
not the case on x86, for eaxmple. Add a comment to this effect.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 16 Nov 2018 01:43:57 +0000 (18:43 -0700)]
spl: Make SPL_DISABLE_BANNER_PRINT a positive option
Rather than having a negative option, make this a positive option and
enable it by default. This makes it easier to understand.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 16 Nov 2018 01:43:56 +0000 (18:43 -0700)]
spl: Add a define for SPL_TPL_PROMPT
We should use a macro rather than hard-coding the SPL prompt to 'spl'
since the code can be used by TPL too. Add a macro that works for both
and use it in various places.
This allows TPL to use the same code without printing confusing messages.
Note that the string is lower case ('spl', 'tpl') which is a change from
previously.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 16 Nov 2018 01:43:55 +0000 (18:43 -0700)]
spl: Support hash, input, pch, pci, rtc, tpm in SPL
At present these subsystems are only supported in U-Boot proper but it is
sometimes necessary to support them in SPL, or even TPL. Update the
Kconfig and Makefile to support this. Also adjust GPIO so that it can be
used in TPL if required.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 16 Nov 2018 01:43:54 +0000 (18:43 -0700)]
Add bloblist documentation
Add a description of the purpose of bloblist and how to use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 16 Nov 2018 01:43:53 +0000 (18:43 -0700)]
test: Add a simple test for bloblist
Add a unit test for the bloblist functionality and enable bloblist for
sandbox.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 16 Nov 2018 01:43:52 +0000 (18:43 -0700)]
bloblist: Locate bloblist in U-Boot
Add support for locating a bloblist in U-Boot that has been set up by SPL.
It is copied into RAM during relocation.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 16 Nov 2018 01:43:51 +0000 (18:43 -0700)]
spl: Set up the bloblist in SPL
The bloblist is normally set up in SPL ready for use by U-Boot. Add
a simple implementation of this to the common SPL code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Fri, 16 Nov 2018 01:43:50 +0000 (18:43 -0700)]
Add core support for a bloblist to convey data from SPL
At present there is no standard way in U-Boot to pass information from SPL
to U-Boot proper. But sometimes SPL wants to convey information to U-Boot
that U-Boot cannot easily figure out. For example, if SPL sets up SDRAM
then it might want to pass the size of SDRAM, or the location of each
bank, to U-Boot proper.
Add a new 'bloblist' feature which provides this. A bloblist is set up in
the first phase of U-Boot that runs (i.e. TPL or SPL). The location of
this info may be in SRAM or CAR (x86 cache-as-RAM) or somewhere else.
Information placed in this region is preserved (with a checksum) through
TPL and SPL and ends up in U-Boot. At this point it is copied into SDRAM
so it can be used after relocation.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Andreas Dannenberg <dannenberg@ti.com>
Simon Glass [Fri, 16 Nov 2018 01:43:49 +0000 (18:43 -0700)]
spl: Add support for logging in SPL and TPL
It is sometimes useful to log information in SPL and TPL. Add support for
this.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Tom Rini [Mon, 26 Nov 2018 13:24:51 +0000 (08:24 -0500)]
fs-test.sh: Update to use 'host' not 'sb'
For a long time now, 'sb' has been deprecated as a command in favor of
using 'host' for the sandbox hostfs interface, switch.
Signed-off-by: Tom Rini <trini@konsulko.com>
Rick Chen [Wed, 7 Nov 2018 01:34:06 +0000 (09:34 +0800)]
riscv: cache: Implement i/dcache [status, enable, disable]
AndeStar RISC-V(V5) provide mcache_ctl register which
can configure I/D cache as enabled or disabled.
This CSR will be encapsulated by CONFIG_RISCV_NDS.
If you want to configure cache on AndeStar V5
AE350 platform. YOu can enable [*] AndeStar V5 ISA support
by make menuconfig.
This approach also provide the expansion when the
vender specific features are going to join in.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
Rick Chen [Tue, 13 Nov 2018 08:33:29 +0000 (16:33 +0800)]
riscv: dts: Add ae350_32.dts for RV32I
Add ae350_32.dts for 32 bit. And also rename
ae350.dts to ae350_64.dts for 64 bit.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
Rick Chen [Tue, 13 Nov 2018 08:15:20 +0000 (16:15 +0800)]
configs: ax25-ae350: Separate ax25-ae350 for RV32/64I.
Separate ax25-ae350 from one to two for
32 and 64 bit individually. And also select
different dts for 32 and 64 bit.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
Rick Chen [Tue, 13 Nov 2018 07:13:34 +0000 (15:13 +0800)]
riscv: dts: Sync to Linux Kernel ae350 dts.
Use same dts to boot U-Boot and Kernel.
Following are the change notes :
1 Remove early printk bootargs.
2 Timer frequency are changed to 60MHz.
3 Add dma, snd, lcd, virtio nodes which are used
in kernel drivers. They does not been used by U-Boot.
4 Change spi irq from 3 to 4.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
Lukas Auer [Thu, 22 Nov 2018 10:26:37 +0000 (11:26 +0100)]
riscv: qemu: clear kernel-start/-end in device tree as workaround for BBL
QEMU specifies the location of Linux (supplied with the -kernel
argument) in the device tree using the riscv,kernel-start and
riscv,kernel-end properties. We currently rely on the SBI implementation
of BBL to run Linux and therefore embed Linux as payload in BBL. This
causes an issue, because BBL detects the kernel properties in the device
tree and ignores the Linux payload as a result.
Work around this issue by clearing the kernel properties in the device
tree before booting Linux.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Lukas Auer [Thu, 22 Nov 2018 10:26:36 +0000 (11:26 +0100)]
riscv: qemu: detect and boot the kernel passed by QEMU
QEMU embeds the location of the kernel image in the device tree. Store
this address in the environment as variable kernel_start. It is used in
the board-local distro boot command QEMU to boot the kernel with the
U-Boot device tree. The QEMU boot command is added as the first boot
target device.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Lukas Auer [Thu, 22 Nov 2018 10:26:35 +0000 (11:26 +0100)]
dm: core: add missing prototype for ofnode_read_u64
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Lukas Auer [Thu, 22 Nov 2018 10:26:34 +0000 (11:26 +0100)]
riscv: qemu: enable distro boot
Enable distro boot on the qemu-riscv32/64 boards. Supported boot target
devices are VirtIO and DHCP.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Lukas Auer [Thu, 22 Nov 2018 10:26:33 +0000 (11:26 +0100)]
distro_bootcmd: add VirtIO distro boot command
Add a boot command to distro boot to support disks connected over the
VirtIO bus. The boot command uses the shared block environment.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
Lukas Auer [Thu, 22 Nov 2018 10:26:32 +0000 (11:26 +0100)]
riscv: align bootm implementation with that of other architectures
The bootm implementation of RISC-V diverges from that of other
architectures. Update it to match the implementation of other
architectures. The ARM implementation is used as a reference.
This adds the following features and changes to RISC-V.
* Add support for the BOOTM_STATE_OS_FAKE_GO command
* Call the remove function on devices with the removal flag set before
booting Linux
* Force disconnect USB devices from the host before booting Linux
* Print and add bootstage information to the device tree before booting
Linux
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Lukas Auer [Thu, 22 Nov 2018 10:26:31 +0000 (11:26 +0100)]
riscv: qemu: support booting Linux
Support booting Linux (as payload of BBL) from FIT images. For this, the
default CONFIG_SYS_BOOTM_LEN is increased to 16 MB, and the environment
variables fdt_high and initrd_high are set to mark the device tree and
initrd as in-place.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Lukas Auer [Thu, 22 Nov 2018 10:26:30 +0000 (11:26 +0100)]
riscv: qemu: use device tree passed by prior boot stage
QEMU provides a device tree, which is passed to U-Boot using register
a1. We are now able to directly select the device tree with the
configuration CONFIG_OF_PRIOR_STAGE. Replace the hard-coded address in
qemu-riscv with it.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Lukas Auer [Thu, 22 Nov 2018 10:26:29 +0000 (11:26 +0100)]
riscv: save hart ID and device tree passed by prior boot stage
Store the hart ID and device tree passed by the prior boot stage (in a0
and a1) in registers s0 and s1. Replace one use of s1 in start.S to
avoid overwriting it.
The device tree is also stored in memory to make it available to U-Boot
with the configuration CONFIG_OF_PRIOR_STAGE.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Lukas Auer [Thu, 22 Nov 2018 10:26:28 +0000 (11:26 +0100)]
riscv: do not blindly modify the mstatus CSR
The mstatus CSR includes WPRI (writes preserve values, reads ignore
values) fields and must therefore not be set to zero without preserving
these fields. It is not apparent why mstatus is set to zero here since
it is not required for U-Boot to run. Remove it.
This instruction and others encode zero as an immediate. RISC-V has the
zero register for this purpose. Replace the immediates with the zero
register.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Lukas Auer [Thu, 22 Nov 2018 10:26:27 +0000 (11:26 +0100)]
riscv: remove unused labels in start.S
The labels nmi_vector, trap_vector and handle_reset in start.S are not
used for RISC-V. Remove them.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng [Thu, 22 Nov 2018 10:26:26 +0000 (11:26 +0100)]
Drop CONFIG_INIT_CRITICAL
This is now deprecated and no board is using it. Drop it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Lukas Auer [Thu, 22 Nov 2018 10:26:25 +0000 (11:26 +0100)]
riscv: align mtvec on a 4-byte boundary
The machine trap-vector base address (mtvec) must be aligned on a 4-byte
boundary. Add the necessary align directive to trap_entry.
This patch also removes the global directive for trap_entry, which is
not required.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Lukas Auer [Thu, 22 Nov 2018 10:26:24 +0000 (11:26 +0100)]
riscv: fix inconsistent use of spaces and tabs in start.S
start.S uses both tabs and spaces after instructions. Fix this by only
using tabs after instructions.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Lukas Auer [Thu, 22 Nov 2018 10:26:23 +0000 (11:26 +0100)]
riscv: implement the invalidate_icache_* functions
Implement the functions invalidate_icache_range() and
invalidate_icache_all().
RISC-V does not have instructions for explicit cache-control. The
functions in this patch are implemented with the memory ordering
instruction for synchronizing the instruction and data streams. This may
be implemented as a cache flush or invalidate on simple processors,
others may only invalidate the relevant cache lines.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Lukas Auer [Thu, 22 Nov 2018 10:26:22 +0000 (11:26 +0100)]
riscv: hang on unhandled exceptions
Hang on unhandled exceptions to prevent execution in a faulty state.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Lukas Auer [Thu, 22 Nov 2018 10:26:21 +0000 (11:26 +0100)]
riscv: treat undefined exception codes as reserved
Undefined exception codes currently lead to an out-of-bounds array
access. Prevent this by treating undefined exception codes as
"reserved".
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Lukas Auer [Thu, 22 Nov 2018 10:26:20 +0000 (11:26 +0100)]
riscv: complete the list of exception codes
Only the first four exception codes are defined. Add the missing
exception codes from the definition in RISC-V Privileged Architecture
Version 1.10.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Lukas Auer [Thu, 22 Nov 2018 10:26:19 +0000 (11:26 +0100)]
riscv: do not reimplement generic io functions
RISC-V U-Boot reimplements the generic io functions from
asm-generic/io.h. Remove the redundant implementation and include the
generic io.h instead.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Lukas Auer [Thu, 22 Nov 2018 10:26:18 +0000 (11:26 +0100)]
riscv: make use of the barrier functions from Linux
Replace the barrier functions in arch/riscv/include/asm/io.h with those
defined in barrier.h, which is imported from Linux. This version is
modified to remove the include statement of asm-generic/barrier.h, which
is not available in U-Boot or required.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>