Yonggang Luo [Fri, 21 Oct 2022 18:28:57 +0000 (02:28 +0800)]
st: OpenVG are removed, remove st_api::feature_mask as it's constant
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19197>
Yonggang Luo [Fri, 21 Oct 2022 18:05:55 +0000 (02:05 +0800)]
st: OpenVG are removed, remove st_api::profile_mask as it's constant
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19197>
Yonggang Luo [Fri, 21 Oct 2022 18:32:44 +0000 (02:32 +0800)]
st: move function st_visual_have_buffers into st_manager.c
As it's only accessed in st_manager.c, there is no need expose it
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19197>
Yonggang Luo [Thu, 20 Oct 2022 09:51:50 +0000 (17:51 +0800)]
hgl: Remove non-nused hgl_create_st_api
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19197>
Rhys Perry [Fri, 21 Oct 2022 12:01:01 +0000 (13:01 +0100)]
aco: swap v_perm_b32 operands
I misread the ISA doc and got the order wrong.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes:
dae1629778d ("aco: disable sdwa on gfx11")
Fixes:
e68e6c75ca1 ("aco: use v_perm_b32 to copy 0xff00/0x00ff/0xff/0x00")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19223>
Bas Nieuwenhuizen [Fri, 21 Oct 2022 11:41:06 +0000 (13:41 +0200)]
radv: Use correct primgrp size for gfx11.
From radeonsi, found by inspection.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19222>
Bas Nieuwenhuizen [Fri, 21 Oct 2022 11:40:55 +0000 (13:40 +0200)]
radv: Improve gfx11 clear colors for DCC.
When I wrote the function I did unorms wrong. Let's copy radeonsi
harder.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19222>
Alejandro Piñeiro [Fri, 21 Oct 2022 12:14:41 +0000 (14:14 +0200)]
v3d: replace all TODO around for FIXME
Even if there is a slight difference of meaning between FIXME and
TODO, at some point we agreed to use just FIXME for all pending things
to do, just to make it easier to grepping for things that can be done.
And after all, one could argue that is there is something pending TO
DO, is that needs FIXING.
Acked-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19225>
Pierre-Eric Pelloux-Prayer [Thu, 20 Oct 2022 08:12:42 +0000 (10:12 +0200)]
radeonsi: zero init using the correct components count
This fixes the replay of the trace attached to
https://gitlab.freedesktop.org/mesa/mesa/-/issues/7530 which
would otherwise fail with an LLVM error:
"All operands to PHI node must be the same type as the PHI node!"
Fixes:
ae4379d81e4 ("ac/nir: export some undef as zero")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19189>
Samuel Pitoiset [Thu, 20 Oct 2022 23:25:45 +0000 (23:25 +0000)]
aco,radv/llvm: do not export parameters on GFX11
They will be exported through the attribute ring instead.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19216>
Samuel Pitoiset [Thu, 20 Oct 2022 04:40:50 +0000 (04:40 +0000)]
ac/nir,radv/llvm: add support for the attribute ring
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19216>
Samuel Pitoiset [Thu, 20 Oct 2022 04:40:20 +0000 (04:40 +0000)]
radv/llvm: do not set COMPR for exports on GFX11
Use 0x3 channel mask instead.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19216>
José Roberto de Souza [Fri, 21 Oct 2022 19:14:34 +0000 (12:14 -0700)]
hasvk: Nuke code around local memory
None of the platforms supported by this driver supports local memory.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19240>
António Monteiro [Sun, 23 Oct 2022 16:01:00 +0000 (17:01 +0100)]
freedreno: get timestamp from os_time_get_nano instead of os_time_get
Signed-off-by: António Monteiro <antonio.fmr.monteiro@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19260>
Yusuf Khan [Wed, 19 Oct 2022 09:14:15 +0000 (04:14 -0500)]
nouveau: get timestamp from os_time_get_nano instead of os_time_get
Signed-off-by: Yusuf Khan <yusisamerican@gmail.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19249>
Jan Beich [Wed, 19 Oct 2022 19:43:35 +0000 (19:43 +0000)]
util: unify FreeBSD futex_wait signature with Linux/OpenBSD/Windows
src/util/futex.c:73:5: error: conflicting types for 'futex_wait'
int futex_wait(uint32_t *addr, int32_t value, struct timespec *timeout)
^
src/util/futex.h:50:5: note: previous declaration is here
int futex_wait(uint32_t *addr, int32_t value, const struct timespec *timeout);
^
Fixes:
095dfc6caa29 ("util: Move the implementation of futex_wake and futex_wait from futex.h to futex.c")
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19177>
Mike Blumenkrantz [Fri, 14 Oct 2022 19:18:00 +0000 (15:18 -0400)]
driconf: add mesa_glthread=false for gfxbench
this seems to hurt perf
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19081>
Dave Airlie [Tue, 1 Feb 2022 07:49:25 +0000 (17:49 +1000)]
glsl/types: fix dword slots calc for float16 matricies.
The current uniform query uploader for mat3 calcs things as
if the vector elements are f16vec4 wide, so fix the calcs
here to do the same.
Fixes GTF-GL46.gtf21.GL.mat3.mat3arraysimple_frag on llvmpipe
when 16-bit uniform lowering is allowed.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14817>
Alyssa Rosenzweig [Sat, 22 Oct 2022 18:17:54 +0000 (14:17 -0400)]
agx: Use agx_nir_opt_preamble
Now that everything is in place, we can actually take advantage of
preambles. This wins us a crude form of UBO pushing (accounting for most
of the win here), as well as its intended purpose of optimizing
uniform-on-uniform arithmetic.
shader-db results are excellent. The shader that's regressed for instruction
count is a fragment shader that solely consists of `gl_FragColor = uniform`,
which goes from a vectorized UBO load to four scalar moves. That's more
instructions (and more bytes) but presumably faster, since ALU should be much
cheaper than load/store.
total instructions in shared programs: 6502 -> 5764 (-11.35%)
instructions in affected programs: 5136 -> 4398 (-14.37%)
helped: 60
HURT: 1
helped stats (abs) min: 2.0 max: 47.0 x̄: 12.33 x̃: 8
helped stats (rel) min: 0.84% max: 34.48% x̄: 18.69% x̃: 21.05%
HURT stats (abs) min: 2.0 max: 2.0 x̄: 2.00 x̃: 2
HURT stats (rel) min: 33.33% max: 33.33% x̄: 33.33% x̃: 33.33%
95% mean confidence interval for instructions value: -14.69 -9.51
95% mean confidence interval for instructions %-change: -20.49% -15.20%
Instructions are helped.
total bytes in shared programs: 42186 -> 38310 (-9.19%)
bytes in affected programs: 33182 -> 29306 (-11.68%)
helped: 60
HURT: 1
helped stats (abs) min: 10.0 max: 272.0 x̄: 64.83 x̃: 50
helped stats (rel) min: 0.72% max: 30.00% x̄: 15.16% x̃: 16.67%
HURT stats (abs) min: 14.0 max: 14.0 x̄: 14.00 x̃: 14
HURT stats (rel) min: 31.82% max: 31.82% x̄: 31.82% x̃: 31.82%
95% mean confidence interval for bytes value: -77.73 -49.35
95% mean confidence interval for bytes %-change: -16.66% -12.11%
Bytes are helped.
total halfregs in shared programs: 2370 -> 1639 (-30.84%)
halfregs in affected programs: 1804 -> 1073 (-40.52%)
helped: 60
HURT: 0
helped stats (abs) min: 1.0 max: 40.0 x̄: 12.18 x̃: 8
helped stats (rel) min: 3.85% max: 72.73% x̄: 41.37% x̃: 36.17%
95% mean confidence interval for halfregs value: -14.77 -9.60
95% mean confidence interval for halfregs %-change: -46.00% -36.75%
Halfregs are helped.
Total CPU time (seconds): 2.71 -> 2.80 (3.32%)
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
Alyssa Rosenzweig [Mon, 26 Sep 2022 00:03:26 +0000 (20:03 -0400)]
agx: Add agx_nir_opt_preamble pass
This pass creates preamble shaders. The heavylifting is done by
nir_opt_preamble. We do need to define the cost model for nir_opt_preamble, set
up 16-bit units for the register file, and scalarize the resulting
load/store_preamble intrinsics.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
Alyssa Rosenzweig [Sat, 22 Oct 2022 14:37:10 +0000 (10:37 -0400)]
asahi: Set GPR count accurately
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
Alyssa Rosenzweig [Sat, 22 Oct 2022 14:37:04 +0000 (10:37 -0400)]
asahi: Set uniform counts accurately
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
Alyssa Rosenzweig [Fri, 21 Oct 2022 02:15:54 +0000 (22:15 -0400)]
agx: Report GPRs to the driver
This needs to be passed onto the hardware.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
Alyssa Rosenzweig [Fri, 21 Oct 2022 01:45:23 +0000 (21:45 -0400)]
agx: Avoid reading high uniforms from device_load
This does not seem to be possible architecturally. Exhaustively checked
all bits of the encoding. Avoids regressing
dEQP-GLES3.functional.texture.units.8_units.only_2d.0
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
Alyssa Rosenzweig [Fri, 21 Oct 2022 01:02:20 +0000 (21:02 -0400)]
agx: Handle 64-bit moves
lower_resinfo generates some 64-bit math, so we need to handle it. Even
though we don't have native 64-bit moves, it's convenient to pretend we
do to avoid special cases in the IR. In particular, modelling 64-bit
mov_imm in the IR means our existing small constant propagation code
works, with zero-extension from 8->64.
Fixes dEQP-GLES3.functional.texture.units.2_units.only_2d_array.*
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
Alyssa Rosenzweig [Mon, 26 Sep 2022 00:08:52 +0000 (20:08 -0400)]
agx: Restrict copyprop of uniforms
Some instructions don't accept uniform registers as sources (yet?),
avoid this hazard in the optimizer.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
Alyssa Rosenzweig [Mon, 26 Sep 2022 00:07:26 +0000 (20:07 -0400)]
agx: Handle uniforms passed to COLLECT
It's useful to be able to copyprop uniform registers into COLLECT. That
requires handling of uniform registers in the parallel copy lowering,
which isn't too hard to add.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
Alyssa Rosenzweig [Mon, 26 Sep 2022 00:02:48 +0000 (20:02 -0400)]
agx: Implement scalar load/store_preamble
These need to copy values between GPRs and uniform registers. This is pretty
easy in either direction. This implements scalar versions of the intrinsics. A
backend NIR pass will scalarize for us.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
Alyssa Rosenzweig [Mon, 26 Sep 2022 00:57:24 +0000 (20:57 -0400)]
agx: Strengthen assert for packing ld/st instructions
We really need to autogenerate the packing code... It's on the todo
list, currently in discussions on how to best go about this.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
Alyssa Rosenzweig [Sun, 25 Sep 2022 18:20:15 +0000 (14:20 -0400)]
agx: Allow larger indices for ld/st
For memory load/store instructions, the immediate is 16-bit, not 8-bit
like for ALUs.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
Alyssa Rosenzweig [Mon, 26 Sep 2022 00:08:20 +0000 (20:08 -0400)]
agx: Add uniform_store instruction
Moves data from GPRs to uniform registers. Encoded like load/store
instructions, so reuse the device_load packing code.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
Alyssa Rosenzweig [Mon, 26 Sep 2022 00:55:26 +0000 (20:55 -0400)]
agx: Align preamble shaders
I don't know if it's ok to have unaligned programs, let's not risk it.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
Alyssa Rosenzweig [Sun, 25 Sep 2022 16:42:46 +0000 (12:42 -0400)]
agx: Handle multiple functions
Needed for preambles. Make agx_context map to nir_function_impl and
the (out, key, binary) triple the only global shader state.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
Alyssa Rosenzweig [Sun, 25 Sep 2022 23:58:06 +0000 (19:58 -0400)]
agx: Make push_count public
The driver needs to plumb this information into the hardware. It will
also make it easier to preserve across preamble/main function in a
moment.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
Alyssa Rosenzweig [Sun, 25 Sep 2022 23:26:58 +0000 (19:26 -0400)]
agx: Check that we don't push too much
Currently we don't have a good mechanism for this other than being
careful... assert() at least. The long term plan is to lift the
UBO/VBO lowerings into NIR, making the sysval requirements visible in
the NIR. (And possibly moving to a descriptor set model to better match
Vulkan? I need to talk to jekstrand about what we want to do here long
term.)
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
Alyssa Rosenzweig [Sun, 25 Sep 2022 18:16:31 +0000 (14:16 -0400)]
agx: Be less sloppy about high uniforms
We need 9-bits to index into the uniform file. Fix an overflow and add
some asserts to try to catch these issues earlier.
Sigh, C.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
Alyssa Rosenzweig [Sun, 25 Sep 2022 23:50:16 +0000 (19:50 -0400)]
asahi: Support preamble shaders
Extend the compiler/driver ABI to attach preambles, and plumb them into
the USC hardware when needed. This is the easy part!
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
Alyssa Rosenzweig [Sat, 22 Oct 2022 14:28:47 +0000 (10:28 -0400)]
asahi: Add group tests
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
Alyssa Rosenzweig [Sat, 22 Oct 2022 14:00:12 +0000 (10:00 -0400)]
asahi: Don't use unnecessary test fixture
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
Alyssa Rosenzweig [Sat, 22 Oct 2022 13:59:50 +0000 (09:59 -0400)]
asahi: Rename LOD clamps tests to fit other packing
We'll use for testing the "groups" encoding.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
Alyssa Rosenzweig [Fri, 21 Oct 2022 01:11:02 +0000 (21:11 -0400)]
asahi: Use USC_UNIFORM_HIGH
Abstract it away so we get access to the full uniform file without
special cases.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
Alyssa Rosenzweig [Thu, 20 Oct 2022 22:42:13 +0000 (18:42 -0400)]
asahi: Make agx_varyings a union
More accurate.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
Alyssa Rosenzweig [Tue, 18 Oct 2022 21:03:35 +0000 (17:03 -0400)]
asahi: Remove "padding" field
Trivial.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
Alyssa Rosenzweig [Fri, 14 Oct 2022 03:08:11 +0000 (23:08 -0400)]
asahi: Identify more shader-related fields
The big discovery is the "number of uniform registers" field. I learned
about this one accidentally when my preamble shaders weren't working
right, because we had inadvertently hardcoded "at most 32 registers" :-)
In the course of identifying that field, I found that the pipeline
address is used as a tagged pointer, with some unknown field in the
bottom bits and alignment demanded. The XML is updated to account for
this.
I later found that there's also a "number of general purpose registers
used by the preamble shader" field. I missed this one first, because the
encoding is slightly different from the usual "number of general purpose
registers in the main shader" field. The specification is slightly
coarser. I don't know why the hardware needs that
information anyway -- occupancy of the preamble shader should be
irrelevant -- but it's not a big deal.
Finally I found that the "more than 4 textures?" bit is... not that. I
do not yet know what it is, but it is... not that.
These all use the new groups() modifier for GenXML
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
Alyssa Rosenzweig [Mon, 17 Oct 2022 00:47:18 +0000 (20:47 -0400)]
asahi: Identify "Uniform high" USC word
The start field in the Uniform USC word is only 8-bits, whereas 9-bits
are required to address the entire uniform register file. This other
word gets used for the high half, with start indexed from u128l in
the natural way.
Apparently spending the evening stuffing too many uniforms into Metal is
paying off.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
Alyssa Rosenzweig [Sun, 31 Jul 2022 17:45:00 +0000 (13:45 -0400)]
asahi: Route shader-db stats to debug callback
This way multithreading works correctly in shader-db including CPU time account.
Code from v3d via panfrost.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
Alyssa Rosenzweig [Thu, 9 Jun 2022 12:50:35 +0000 (08:50 -0400)]
asahi: Precompile for shader-db
This gets shader-db's runner working, in conjunction with a shader-db ./run
modified to set ASAHI_MESA_DEBUG=precompile. This flag triggers precompiles of
all shaders witha default key so we can exercise the compiler.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
Alyssa Rosenzweig [Thu, 9 Jun 2022 13:42:58 +0000 (09:42 -0400)]
asahi: Remove AGX_FAKE_DEVICE environment variable
The proper way to fake a device on Linux will be drm-shim.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
Alyssa Rosenzweig [Sat, 22 Oct 2022 18:50:58 +0000 (14:50 -0400)]
agx: Remove command line compiler
It has not been used in quite some time but adds maintainence burden.
Its function is replaced by drm-shim in conjunction with shader-db's
./run, which goes through the actual driver.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
Alyssa Rosenzweig [Sun, 25 Sep 2022 02:26:58 +0000 (22:26 -0400)]
nir/opt_preamble: Move load_texture_base_agx
nir_opt_preamble will be crucial to optimize out the lowering for array
textures on AGX, which involves this AGX-specific sysval.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18813>
Alyssa Rosenzweig [Fri, 21 Oct 2022 02:42:39 +0000 (22:42 -0400)]
asahi: Hold a reference to BOs in a batch
Fixes GPU-side use after frees, e.g. in dEQP-GLES2.functional.texture.vertex.2d.wrap.clamp_mirror
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19215>
Georg Lehmann [Mon, 10 Oct 2022 11:56:51 +0000 (13:56 +0200)]
nir: Fix ifind_msb_rev constant folding.
For example if src0 is 0x80000000 we should return 1, not 0.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes:
a5747f8ab35 ("nir: add opcodes for *find_msb_rev and lowering")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18951>
Georg Lehmann [Tue, 4 Oct 2022 14:02:28 +0000 (16:02 +0200)]
nir/opt_algebraic: Optimize various find_msb_rev patterns.
From dxvk, dxil-spirv, fxc, dxc and others.
Totals from 177 (0.13% of 134913) affected shaders:
CodeSize: 1079504 -> 1059872 (-1.82%)
Instrs: 195381 -> 192269 (-1.59%)
Latency: 3664137 -> 3631951 (-0.88%)
InvThroughput: 599479 -> 585675 (-2.30%)
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18951>
Georg Lehmann [Tue, 4 Oct 2022 13:44:16 +0000 (15:44 +0200)]
radv,aco: Lower uclz in NIR.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18951>
Georg Lehmann [Tue, 4 Oct 2022 13:38:58 +0000 (15:38 +0200)]
nir/opt_algebraic: Add an option to lower uclz.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18951>
Georg Lehmann [Tue, 4 Oct 2022 13:24:59 +0000 (15:24 +0200)]
ac/llvm: Implement [ui]find_msb_rev.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18951>
Georg Lehmann [Tue, 4 Oct 2022 13:08:06 +0000 (15:08 +0200)]
aco: Implement [ui]find_msb_rev.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18951>
Georg Lehmann [Tue, 4 Oct 2022 12:32:50 +0000 (14:32 +0200)]
nir/opt_algebraic: Mirror optimizations for find_msb_rev.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18951>
Konstantin Seurer [Thu, 20 Oct 2022 18:54:26 +0000 (20:54 +0200)]
radv/rt: Fix setting tmax for opaque AABBs
data->vars->tmax will be overwritten by inner_vars.tmax so we have to
set inner_vars.tmax instead. This probably doesn't affect anything in
practise.
cc: mesa-stable
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19207>
Emma Anholt [Wed, 19 Oct 2022 22:54:18 +0000 (15:54 -0700)]
nir/opt_phi_precision: Fix missing swizzles when narrowing phi srcs.
This NIR:
vec4 32 ssa_169 = phi block_1: ssa_168, block_2: ssa_138
vec1 16 ssa_209 = f2fmp ssa_169.x
vec1 16 ssa_210 = f2fmp ssa_169.y
vec1 16 ssa_211 = f2fmp ssa_169.z
vec1 16 ssa_212 = f2fmp ssa_169.w
vec4 16 ssa_213 = vec4 ssa_209, ssa_210, ssa_211, ssa_212
intrinsic store_output (ssa_213, ssa_171) (base=0, wrmask=xyzw /*15*/, component=0, src_type=float16 /*144*/, io location=4 slots=1 mediump /*8388740*/, xfb() /*0*/, xfb2() /*0*/)
would turn into:
vec4 32 ssa_169 = phi block_1: ssa_168, block_2: ssa_138
vec4 16 ssa_216 = phi block_1: ssa_214, block_2: ssa_215
vec1 16 ssa_209 = f2fmp ssa_169.x
vec1 16 ssa_210 = f2fmp ssa_169.y
vec1 16 ssa_211 = f2fmp ssa_169.z
vec1 16 ssa_212 = f2fmp ssa_169.w
vec4 16 ssa_213 = vec4 ssa_216.x, ssa_216.x, ssa_216.x, ssa_216.x
intrinsic store_output (ssa_213, ssa_171) (base=0, wrmask=xyzw /*15*/, component=0, src_type=float16 /*144*/, io location=4 slots=1 mediump /*8388740*/, xfb() /*0*/, xfb2() /*0*/)
ignoring the swizzles from the f2fmp srcs. Fixes failures in
dEQP-GLES2.functional.shaders.random.all_features.fragment.20 on
turnip+ANGLE.
Fixes:
c7b935962b27 ("nir: Add pass to lower phi precision")
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19179>
Yonggang Luo [Fri, 21 Oct 2022 13:36:24 +0000 (21:36 +0800)]
ci/macos: Building both dri and xlib version of glx
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19221>
Yonggang Luo [Fri, 21 Oct 2022 14:07:37 +0000 (22:07 +0800)]
xlib: Remove macro guard with GLX_INDIRECT_RENDERING in xlib.c
According meson about with_glx == 'xlib' check only defied '-DUSE_XSHM',
so the macro check GLX_INDIRECT_RENDERING make no-sense, removed it.
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19221>
Yonggang Luo [Fri, 21 Oct 2022 11:17:08 +0000 (19:17 +0800)]
meson: with_glx never assigned to 'gallium-xlib', remove 'gallium-xlib'
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19221>
Yonggang Luo [Fri, 21 Oct 2022 11:16:28 +0000 (19:16 +0800)]
meson: with_glx never assigned to 'gallium-xlib', so need add with_glx == 'xlib' for dep_glproto
Fixes:
76791db0882b3715cd7d ("mesa/x11: Remove the swrast-classic-based fake libGL")
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19221>
Thomas H.P. Andersen [Tue, 18 Oct 2022 02:25:01 +0000 (04:25 +0200)]
vulkan: drop const for descriptor set
drivers should be able to update the reference count
member of the vk_descriptor_set_layout struct
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19132>
Mike Blumenkrantz [Thu, 20 Oct 2022 17:00:30 +0000 (13:00 -0400)]
zink: fix ds3 line stipple enable handling
ds3 can be used without line stipple enable if the driver doesn't support
line stipple, so this needs special-casing
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19204>
Mike Blumenkrantz [Thu, 20 Oct 2022 17:00:06 +0000 (13:00 -0400)]
zink: fix duplicate VK_DYNAMIC_STATE_LINE_STIPPLE_EXT setting
if ds3 is used, this is already set above
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19204>
Alyssa Rosenzweig [Wed, 5 Oct 2022 16:12:47 +0000 (12:12 -0400)]
panfrost: Remove NIR_SERIALIZED support
Only used by Clover (due to the dynamic pipeloader), which we never
shipped support for. We'll do OpenCL via Rusticl, which does not use the
dynamic pipeloader.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18972>
Rhys Perry [Thu, 20 Oct 2022 14:47:02 +0000 (15:47 +0100)]
aco/gfx11: optimize LS/HS load_local_invocation_index
fossil-db (gfx1100):
Totals from 1361 (1.01% of 135032) affected shaders:
Instrs: 501227 -> 500469 (-0.15%); split: -0.16%, +0.01%
CodeSize: 2730012 -> 2724820 (-0.19%); split: -0.20%, +0.00%
VGPRs: 63716 -> 63688 (-0.04%)
Latency: 2228848 -> 2228858 (+0.00%); split: -0.00%, +0.00%
InvThroughput: 878418 -> 878275 (-0.02%); split: -0.02%, +0.00%
VClause: 14866 -> 14868 (+0.01%); split: -0.03%, +0.04%
SClause: 16674 -> 16645 (-0.17%); split: -0.22%, +0.05%
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19196>
Rhys Perry [Wed, 19 Oct 2022 17:34:12 +0000 (18:34 +0100)]
ac/llvm: ignore g16 if the image opcode doesn't use derivatives
g16 is irrelevant in this case.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19198>
Rhys Perry [Wed, 19 Oct 2022 17:17:29 +0000 (18:17 +0100)]
ac/llvm: fix mixing non-uniform/uniform sampler/texture descriptors
Non-uniform descriptors are not loaded in NIR and instead the pointer is
passed to abi->load_sampler_desc. It can be the case that only the texture
or sampler uses this path.
For the descriptor which doesn't use the path, we would previously pass
NULL to abi->load_sampler_desc.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19198>
Damian Korczowski [Fri, 21 Oct 2022 11:00:09 +0000 (11:00 +0000)]
d3d12: Fix placed footprint of subresources
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19220>
Sil Vilerino [Fri, 21 Oct 2022 13:58:35 +0000 (09:58 -0400)]
d3d12: HEVC Decode - Fix slice size and offsets translation from VA to DXVA
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19231>
Samuel Pitoiset [Fri, 21 Oct 2022 14:05:42 +0000 (16:05 +0200)]
radv: disable AMD_shader_explicit_vertex_parameter on GFX11
Not supported by ACO.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19230>
Samuel Pitoiset [Fri, 21 Oct 2022 14:04:48 +0000 (16:04 +0200)]
radv: disable VK_AMD_texture_gather_bias_lod on GFX11
image_gather4_b_o no longer exists apparently, so this is likely
broken.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19230>
Samuel Pitoiset [Mon, 30 May 2022 13:51:31 +0000 (15:51 +0200)]
radv: advertise VK_EXT_extended_dynamic_state3
Some tricky dynamic states still need to be implemented for full ds3
support with Zink, I will implement them later.
Pass dEQP-VK.pipeline.*extended_dynamic_state* on NAVI21.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18882>
Samuel Pitoiset [Wed, 24 Aug 2022 13:35:57 +0000 (15:35 +0200)]
radv: add support for dynamic depth clamp enable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18882>
Samuel Pitoiset [Wed, 24 Aug 2022 12:41:56 +0000 (14:41 +0200)]
radv: add support for dynamic provoking vertex mode
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18882>
Samuel Pitoiset [Wed, 24 Aug 2022 11:34:50 +0000 (13:34 +0200)]
radv: add support for dynamic depth clip negative one to one
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18882>
Samuel Pitoiset [Wed, 24 Aug 2022 11:27:21 +0000 (13:27 +0200)]
radv: add support for dynamic conservative rasterization mode
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18882>
Samuel Pitoiset [Wed, 24 Aug 2022 11:21:46 +0000 (13:21 +0200)]
radv: add support for dynamic depth clip enable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18882>
Samuel Pitoiset [Wed, 24 Aug 2022 09:03:12 +0000 (11:03 +0200)]
radv: add support for dynamic sample mask
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18882>
Samuel Pitoiset [Wed, 24 Aug 2022 08:59:03 +0000 (10:59 +0200)]
radv: add support for dynamic alpha to coverage enable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18882>
Samuel Pitoiset [Wed, 24 Aug 2022 08:58:31 +0000 (10:58 +0200)]
radv: add support for dynamic line stipple enable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18882>
Samuel Pitoiset [Tue, 31 May 2022 09:29:07 +0000 (11:29 +0200)]
radv: add support for dynamic logic op enable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18882>
Samuel Pitoiset [Tue, 31 May 2022 09:04:49 +0000 (11:04 +0200)]
radv: add support for dynamic tessellation domain origin
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18882>
Samuel Pitoiset [Tue, 31 May 2022 09:04:19 +0000 (11:04 +0200)]
radv: add support for dynamic polygon mode
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18882>
Samuel Pitoiset [Tue, 31 May 2022 09:04:07 +0000 (11:04 +0200)]
radv: declare new dynamic states
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18882>
David Heidelberg [Thu, 20 Oct 2022 23:05:34 +0000 (01:05 +0200)]
ci/freedreno: add Guilherme Gallo into restricted traces access list
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19210>
Simon Ser [Wed, 19 Oct 2022 08:27:01 +0000 (10:27 +0200)]
egl: fix error string for dri2_create_image_dma_buf()
Using dri2_create_image_khr_texture_error() here prints an error
like so:
command: eglCreateImageKHR, error: EGL_BAD_ALLOC (0x3003), message: "dri2_create_image_khr_texture"
This is confusing, because dri2_create_image_khr_texture() is
unrelated to this error.
Instead, print a more accurate error manually.
Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19156>
Karol Herbst [Mon, 17 Oct 2022 23:59:53 +0000 (01:59 +0200)]
zink: handle f2f16_rtz
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19212>
Karol Herbst [Fri, 21 Oct 2022 01:14:26 +0000 (03:14 +0200)]
zink: handle more opcodes for CL
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19212>
Martin Roukala (né Peres) [Thu, 20 Oct 2022 09:01:12 +0000 (12:01 +0300)]
zink: update the RADV expectations
We got 4 more tests passing, let's document that :)
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19190>
Karol Herbst [Fri, 21 Oct 2022 00:26:04 +0000 (02:26 +0200)]
ci/llvmpipe: update to new RUSTICL_ENABLE var
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19149>
Karol Herbst [Tue, 18 Oct 2022 22:10:12 +0000 (00:10 +0200)]
docs: Add documentation for Rusticl's env variables
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19149>
Karol Herbst [Sat, 15 Oct 2022 14:22:17 +0000 (16:22 +0200)]
rusticl: add RUSTICL_ENABLE to have a global way of enabling devices
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19149>
Leandro Ribeiro [Sun, 16 Oct 2022 19:37:47 +0000 (16:37 -0300)]
vulkan/wsi/wayland: avoid useless re-allocations when receiving per-surface dma-buf feedback
It's not just because we received dma-buf feedback that we should
re-allocate, as sometimes it is useless.
We must compare the most recent allocation parameters used and the ones
that we have with the newest feedback. So do that.
Reviewed-by: Simon Ser <contact@emersion.fr>
Signed-off-by: Leandro Ribeiro <leandro.ribeiro@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12226>
Leandro Ribeiro [Thu, 13 Oct 2022 21:16:37 +0000 (18:16 -0300)]
vulkan/wsi/wayland: add per-surface dma-buf feedback support
Follow up of "vulkan/wsi/wayland: add default dma-buf feedback support".
The surface feedback is dynamic, differently from the default feedback.
When we receive per-surface feedback, that means that we could be using
a better DRM format/modifier pair for the chain's buffers. So the next
time that the client calls vkAcquireNextImageKHR(), we return
VK_SUBOPTIMAL_KHR instead of VK_SUCCESS. Some clients will re-create the
swapchain when receiving SUBOPTIMAL, and for those we'll re-create the
chain. An optimal DRM format/modifier pair from the per-surface feedback
will be used to create the images of this swapchain.
Note that for now we won't be able to change the DRM format, only the
modifier. That's good enough for many cases in which direct scanout
would not be possible because of the modifier. In order to be able to
switch the format, we'll need a mechanism to negotiate preferred formats
with clients. Currently we can only expose a set of supported formats
all with the same preference.
Reviewed-by: Simon Ser <contact@emersion.fr>
Signed-off-by: Leandro Ribeiro <leandro.ribeiro@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12226>
Leandro Ribeiro [Thu, 13 Oct 2022 21:11:21 +0000 (18:11 -0300)]
vulkan/wsi/wayland: add default dma-buf feedback support
This bumps the supported dma-buf version up to 4 and adds default
dma-buf feedback support. It follows the changes in the dma-buf protocol
extension to include dma-buf feedback.
From version 4 onwards, the dma-buf modifier events are not sent by the
compositor anymore, so we use the default feedback to pick the set of
formats/modifiers supported by the compositor.
In the next commit we add support for per-surface feedback.
Reviewed-by: Simon Ser <contact@emersion.fr>
Signed-off-by: Leandro Ribeiro <leandro.ribeiro@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12226>
Leandro Ribeiro [Wed, 5 Oct 2022 00:26:09 +0000 (21:26 -0300)]
vulkan/wsi/wayland: remove refcount from struct wsi_wl_display
After "vulkan/wsi/wayland: move wl_surface and wl_display from chain to
struct wsi_wl_surface", refcount is being unused. So remove it and its
associated functions.
Reviewed-by: Simon Ser <contact@emersion.fr>
Signed-off-by: Leandro Ribeiro <leandro.ribeiro@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12226>