spupyrev [Tue, 30 Mar 2021 17:38:58 +0000 (10:38 -0700)]
[SamplePGO] Keeping prof metadata for IndirectBrInst
Currently prof metadata with branch counts is added only for BranchInst and SwitchInst, but not for IndirectBrInst. As a result, BPI/BFI make incorrect inferences for indirect branches, which can be very hot.
This diff adds metadata for IndirectBrInst, in addition to BranchInst and SwitchInst.
Reviewed By: wmi, wenlei
Differential Revision: https://reviews.llvm.org/D99550
Hongtao Yu [Mon, 29 Mar 2021 17:21:31 +0000 (10:21 -0700)]
[CSSPGO] Top-down processing order based on full profile.
Use profiled call edges to augment the top-down order. There are cases that the top-down order computed based on the static call graph doesn't reflect real execution order. For example:
1. Incomplete static call graph due to unknown indirect call targets. Adjusting the order by considering indirect call edges from the profile can enable the inlining of indirect call targets by allowing the caller processed before them.
2. Mutual call edges in an SCC. The static processing order computed for an SCC may not reflect the call contexts in the context-sensitive profile, thus may cause potential inlining to be overlooked. The function order in one SCC is being adjusted to a top-down order based on the profile to favor more inlining.
3. Transitive indirect call edges due to inlining. When a callee function is inlined into into a caller function in LTO prelink, every call edge originated from the callee will be transferred to the caller. If any of the transferred edges is indirect, the original profiled indirect edge, even if considered, would not enforce a top-down order from the caller to the potential indirect call target in LTO postlink since the inlined callee is gone from the static call graph.
4. #3 can happen even for direct call targets, due to functions defined in header files. Header functions, when included into source files, are defined multiple times but only one definition survives due to ODR. Therefore, the LTO prelink inlining done on those dropped definitions can be useless based on a local file scope. More importantly, the inlinee, once fully inlined to a to-be-dropped inliner, will have no profile to consume when its outlined version is compiled. This can lead to a profile-less prelink compilation for the outlined version of the inlinee function which may be called from external modules. while this isn't easy to fix, we rely on the postlink AutoFDO pipeline to optimize the inlinee. Since the survived copy of the inliner (defined in headers) can be inlined in its local scope in prelink, it may not exist in the merged IR in postlink, and we'll need the profiled call edges to enforce a top-down order for the rest of the functions.
Considering those cases, a profiled call graph completely independent of the static call graph is constructed based on profile data, where function objects are not even needed to handle case #3 and case 4.
I'm seeing an average 0.4% perf win out of SPEC2017. For certain benchmark such as Xalanbmk and GCC, the win is bigger, above 2%.
The change is an enhancement to https://reviews.llvm.org/D95988.
Reviewed By: wmi, wenlei
Differential Revision: https://reviews.llvm.org/D99351
John Brawn [Tue, 30 Mar 2021 17:33:10 +0000 (18:33 +0100)]
[clang][cli] Fix round-trip of OPT_plugin_arg
The test Frontend/plugin-delayed-template.cpp is failing when asserts
are enabled because it hits an assertion in denormalizeStringImpl when
trying to round-trip OPT_plugin_arg. Fix this by adjusting how the
option is handled, as the first part is joined to -plugin-arg and the
second is separate.
Differential Revision: https://reviews.llvm.org/D99606
Jessica Paquette [Tue, 23 Mar 2021 22:33:10 +0000 (15:33 -0700)]
[GlobalISel][AArch64] Combine G_SEXT_INREG + right shift -> G_SBFX
Basically a port of isBitfieldExtractOpFromSExtInReg in AArch64ISelDAGToDAG.
This is only done post-legalization for now. Once the legalizer knows how to
decompose these back into shifts, this requirement can probably be removed.
Differential Revision: https://reviews.llvm.org/D99230
Jonas Devlieghere [Tue, 30 Mar 2021 17:09:55 +0000 (10:09 -0700)]
[lldb] Remove reproducer from previous test run
Mehdi Amini [Tue, 30 Mar 2021 04:35:36 +0000 (04:35 +0000)]
Add a "register_runtime" method to the mlir.execution_engine and show calling back from MLIR into Python
This exposes the ability to register Python functions with the JIT and
exposes them to the MLIR jitted code. The provided test case illustrates
the mechanism.
Differential Revision: https://reviews.llvm.org/D99562
Nick Lewycky [Thu, 25 Mar 2021 21:40:17 +0000 (14:40 -0700)]
Add -disable-verify flag to llvm-link.
This flag allows the developer to see the result of linking even if it fails the verifier, as a step in debugging cases where the linked module fails the verifier.
Differential Revision: https://reviews.llvm.org/D99382
Michał Górny [Tue, 30 Mar 2021 16:48:49 +0000 (18:48 +0200)]
[lldb] [test] Mark more lldb-server tests xfail on Windows
Craig Topper [Tue, 30 Mar 2021 16:34:56 +0000 (09:34 -0700)]
[RISCV] Pass 'half' in the lower 16 bits of an f32 value when F extension is enabled, but Zfh is not.
Without Zfh the half type isn't legal, but it could still be
used as an argument/return in IR. Clang will not generate this today.
Previously we promoted the half value to float for arguments and
returns if the F extension is enabled but Zfh isn't. Then depending on
which ABI is enabled we would pass it in either an FPR or a GPR in
float format.
If the F extension isn't enabled, it would get passed in the lower
16 bits of a GPR in half format.
With this patch the value will always in half format and will be
in the lower bits of a GPR or FPR. This should be consistent
with where the bits are located when Zfh is enabled.
I've based this implementation off of how this is done on ARM.
I've manually nan-boxed the value to 32 bits using integer ops.
It looks like flw, fsw, fmv.s, fmv.w.x, fmf.x.w won't
canonicalize nans so should leave the value alone. I think those
are the instructions that could get used on this value.
Reviewed By: kito-cheng
Differential Revision: https://reviews.llvm.org/D98670
Amara Emerson [Fri, 26 Mar 2021 22:27:15 +0000 (15:27 -0700)]
[GlobalISel] Implement lowering for G_ROTR and G_ROTL.
This is a straightforward port.
Differential Revision: https://reviews.llvm.org/D99449
Tomas Matheson [Mon, 15 Mar 2021 13:01:34 +0000 (13:01 +0000)]
[NFC][CodeGen] Tidy up TargetRegisterInfo stack realignment functions
Currently needsStackRealignment returns false if canRealignStack returns false.
This means that the behavior of needsStackRealignment does not correspond to
it's name and description; a function might need stack realignment, but if it
is not possible then this function returns false. Furthermore,
needsStackRealignment is not virtual and therefore some backends have made use
of canRealignStack to indicate whether a function needs stack realignment.
This patch attempts to clarify the situation by separating them and introducing
new names:
- shouldRealignStack - true if there is any reason the stack should be
realigned
- canRealignStack - true if we are still able to realign the stack (e.g. we
can still reserve/have reserved a frame pointer)
- hasStackRealignment = shouldRealignStack && canRealignStack (not target
customisable)
Targets can now override shouldRealignStack to indicate that stack realignment
is required.
This change will make it easier in a future change to handle the case where we
need to realign the stack but can't do so (for example when the register
allocator creates an aligned spill after the frame pointer has been
eliminated).
Differential Revision: https://reviews.llvm.org/D98716
Change-Id: Ib9a4d21728bf9d08a545b4365418d3ffe1af4d87
Nick Lewycky [Tue, 30 Mar 2021 16:30:40 +0000 (09:30 -0700)]
Remove dead CHECK-ERR line.
Craig Topper [Tue, 30 Mar 2021 16:23:34 +0000 (09:23 -0700)]
[RISCV] Don't set the SplatOperand flag on intrinsics that take a shift amount.
The shift amount should always be a vector or an XLen scalar.
The SplatOperand flag is used to indicate we need to legalize
non-XLen scalars including special handling for i64 on RV32.
This will prevent us from silently adjusting these operands if
the intrinsics are misused.
I'll probably adjust the name of the SplatOperand flag slightly
in a follow up patch.
Reviewed By: khchen, frasercrmck
Differential Revision: https://reviews.llvm.org/D99545
Craig Topper [Tue, 30 Mar 2021 16:11:54 +0000 (09:11 -0700)]
[RISCV] Remove floating point condition code legalization from lowerFixedLengthVectorSetccToRVV.
After D98939, this is done by LegalizeVectorOps making this code dead.
Reviewed By: frasercrmck
Differential Revision: https://reviews.llvm.org/D99519
Pavel Labath [Tue, 30 Mar 2021 16:05:31 +0000 (18:05 +0200)]
[lldb] More missing includes in TestGdbRemote_vContThreads
Pavel Labath [Tue, 30 Mar 2021 15:36:43 +0000 (17:36 +0200)]
[lldb] Add missing include in TestGdbRemote_vContThreads test
should fix the arm builtbots.
Pavel Labath [Tue, 30 Mar 2021 15:34:53 +0000 (17:34 +0200)]
[lldb] Fix TestStopOnSharedlibraryEvents.py on linux
and hopefully other ELF OSes. The problem was a missing "extra_images"
startup argument (which ensures LD_LIBRARY_PATH is set properly).
Guillaume Chatelet [Tue, 30 Mar 2021 15:27:46 +0000 (15:27 +0000)]
[libc] Fix msan/asan memcpy reentrancy
This is needed to prevent asan/msan instrumentation to redirect CopyBlock to `__asan_memcpy` (resp. `__msan_memcpy`).
These functions would then differ operation to `memcpy` which leads to reentrancy issues.
With this patch, `memcpy` is fully instrumented and covered by asan/msan.
If this turns out to be too expensive, instrumentation can be selectively or fully disabled through the use of the `__attribute__((no_sanitize(address, memory)))` annotation.
Differential Revision: https://reviews.llvm.org/D99598
Thomas Preud'homme [Sun, 28 Mar 2021 00:03:37 +0000 (00:03 +0000)]
[test, ARM] Fix use of var defined in CHECK-NOT
tries to check for the
absence of a sequence of instructions with several CHECK-NOT with
one of
those directives using a variable defined in another.
LLVM test CodeGenPrepare/ARM/sink-add-mul-shufflevector.ll tries to
check for the absence of a sequence of instructions with several
CHECK-NOT with one of those directives using a variable defined in
another. However, CHECK-NOT are checked independently so that is using
a variable defined in a pattern that should not occur in the input. The
bug was then copied over in
Transforms/CodeGenPrepare/ARM/sink-add-mul-shufflevector-inseltpoison.ll
This commit removes the definition and uses of variable to check each
line independently, making the check stronger than the current one.
Reviewed By: dmgreen
Differential Revision: https://reviews.llvm.org/D99597
oToToT [Tue, 30 Mar 2021 03:51:46 +0000 (11:51 +0800)]
[Docs] Update googletest docs link.
The documentation link of Google Test on GitHub have been moved to the
top-level docs directory.
Thus, the original link is invalid now.
Reviewed By: Pavel Labath
Differential Revision: https://reviews.llvm.org/D99559
Nico Rieck [Tue, 30 Mar 2021 15:11:07 +0000 (17:11 +0200)]
[clang-format] Fix east const pointer alignment of operators
This patch fixes left pointer alignment after pointer qualifiers of
operators. Currently "operator void const*()" is formatted with a space between
const and pointer despite setting PointerAlignment to Left.
AFAICS this has been broken since clang-format 10.
Reviewed By: MyDeveloperDay, curdeius
Differential Revision: https://reviews.llvm.org/D99458
Kevin Petit [Fri, 26 Mar 2021 17:19:07 +0000 (17:19 +0000)]
[OpenCL] Fix parsing of opencl-c.h in CL 3.0
Ensure that the cl_khr_3d_image_writes pragma is enabled by making
cl_khr_3d_image_writes an optional core feature in CL 3.0 in addition
to being an available extension in 1.0 onwards and a core feature in
CL 2.0.
https://reviews.llvm.org/D99425
Signed-off-by: Kevin Petit <kevin.petit@arm.com>
Pavel Labath [Tue, 30 Mar 2021 14:50:04 +0000 (16:50 +0200)]
[lldb/test] Deflake TestGdbRemote_vContThreads even more
This patch fixes an issue, where if the thread has a signal blocked when
we try to inject it into the process (via vCont), then instead of
executing straight away, the injected signal will trigger another stop
when the thread unblocks the signal.
As (linux) threads start their life with SIGUSR1 (among others)
disabled, and only enable it during initialization, injecting the signal
during this window did not behave as expected. The fix is to change the
test to ensure the signal gets injected with the signal unblocked.
The simplest way to do this was to write a dedicated inferior for this
test. I also created a new header to factor out the function retrieving
the (os-specific) thread id.
Alexey Bataev [Tue, 30 Mar 2021 14:45:12 +0000 (07:45 -0700)]
[OPENMP]Fix test checks for 32bit targets, NFC.
Thomas Preud'homme [Sun, 28 Mar 2021 00:03:37 +0000 (00:03 +0000)]
[test, LoopVectorize] Fix use of var defined in CHECK-NOT
LLVM test Transforms/LoopVectorize/X86/x86-pr39099.ll tries to check for
the absence of a sequence of instructions with several CHECK-NOT with
one of those directives using a variable defined in another. However
CHECK-NOT are checked independently so that is using a variable defined
in a pattern that should not occur in the input.
This commit only checks for the absence of a widened load which rules
out the presence of the whole sequence and does not involve an undefined
variable.
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D99583
Inho Seo [Tue, 30 Mar 2021 14:07:12 +0000 (07:07 -0700)]
Added static verification for Linalg Ops.
This verification is to check if the indices for static shaped operands
on linalgOps access out of bound memory or not. For dynamic shaped
operands, we would be able to check it on runtime stage.
Found several invalid Linalg ops testcases, and fixed them.
Reviewed By: hanchung
Differential Revision: https://reviews.llvm.org/D98390
Thomas Preud'homme [Sun, 28 Mar 2021 00:03:37 +0000 (00:03 +0000)]
[test, HardwareLoops] Fix use of var defined in CHECK-NOT
LLVM test Transforms/HardwareLoops/ARM/structure.ll tries to check for
the absence of a sequence of instructions with several CHECK-NOT with
one of those directives using a variable defined in another. However
CHECK-NOT are checked independently so that is using a variable defined
in a pattern that should not occur in the input.
This commit only checks for the absence of llvm.loop.decrement.i32 which
rules out the presence of the whole sequence and does not involve an
undefined variable.
Reviewed By: dmgreen
Differential Revision: https://reviews.llvm.org/D99591
Pavel Labath [Mon, 29 Mar 2021 12:33:58 +0000 (14:33 +0200)]
[lldb] Remove linux/mips debugging support
As discussed on lldb-dev
<https://lists.llvm.org/pipermail/lldb-dev/2021-March/016777.html> the
mips code is unmaintained and untested. It also carries a lot of
technical debt which is not limited to mips-specific code.
Generic mips support remains (and is going to be used by the upcoming
freebsd code). Resurrecting mips support should be a matter of re-adding
the relevant register context files (while avoiding reintroducing the
debt).
Sebastian Neubauer [Tue, 30 Mar 2021 07:50:13 +0000 (09:50 +0200)]
[AMDGPU] Remove outdated TODOs. NFC
spillSGPRToVGPR is already respected in these places since D95768.
Differential Revision: https://reviews.llvm.org/D99570
Michał Górny [Tue, 30 Mar 2021 11:25:06 +0000 (13:25 +0200)]
[lldb] [server] Support for multiprocess extension
Add a minimal support for the multiprocess extension in lldb-server.
The server indicates support for it via qSupported, and accepts
thread-ids containing a PID. However, it still does not support
debugging more than one inferior, so any other PID value results
in an error.
Differential Revision: https://reviews.llvm.org/D98482
Valeriy Savchenko [Wed, 24 Mar 2021 15:58:22 +0000 (18:58 +0300)]
[analyzer] Fix crash when reasoning about C11 atomics (PR49422)
rdar://
75020762
Differential Revision: https://reviews.llvm.org/D99274
Louis Dionne [Tue, 16 Mar 2021 18:57:42 +0000 (11:57 -0700)]
[libc++] Add a CI job to test the Runtimes build
Differential Revision: https://reviews.llvm.org/D97888
Valeriy Savchenko [Mon, 29 Mar 2021 12:38:22 +0000 (15:38 +0300)]
[analyzer] Support allocClassWithName in OSObjectCStyleCast checker
`allocClassWithName` allocates an object with the given type.
The type is actually provided as a string argument (type's name).
This creates a possibility for not particularly useful warnings
from the analyzer.
In order to combat with those, this patch checks for casts of the
`allocClassWithName` results to types mentioned directly as its
argument. All other uses of this method should be reasoned about
as before.
rdar://
72165694
Differential Revision: https://reviews.llvm.org/D99500
Gabor Marton [Thu, 25 Mar 2021 14:40:26 +0000 (15:40 +0100)]
[Analyzer] Track RValue expressions
It makes sense to track rvalue expressions in the case of special
concrete integer values. The most notable special value is zero (later
we may find other values). By tracking the origin of 0, we can provide a
better explanation for users e.g. in case of division by 0 warnings.
When the divisor is a product of a multiplication then now we can show
which operand (or both) was (were) zero and why.
Differential Revision: https://reviews.llvm.org/D99344
Alexey Bataev [Mon, 29 Mar 2021 20:45:05 +0000 (13:45 -0700)]
[OPENMP]Fix PR48740: OpenMP declare reduction in C does not require an initializer
If no initializer-clause is specified, the private variables will be
initialized following the rules for initialization of objects with static
storage duration.
Need to adjust the implementation to the current version of the
standard.
Differential Revision: https://reviews.llvm.org/D99539
Martin Probst [Mon, 29 Mar 2021 11:12:01 +0000 (13:12 +0200)]
clang-format: [JS] do not collapse - - to --.
In JavaScript, `- -1;` is legal syntax, the language allows unary minus.
However the two tokens must not collapse together: `--1` is prefix
decrement, i.e. different syntax.
Before:
- -1; ==> --1;
After:
- -1; ==> - -1;
This change makes no attempt to format this "nicely", given by all
likelihood this represents a programming mistake by the user, or odd
generated code.
The check is not guarded by language: this appears to be a problem in
Java as well, and will also be beneficial when formatting syntactically
incorrect C++ (e.g. during editing).
Differential Revision: https://reviews.llvm.org/D99495
LLVM GN Syncbot [Tue, 30 Mar 2021 12:15:19 +0000 (12:15 +0000)]
[gn build] Port
c51e91e04681
Krasimir Georgiev [Tue, 30 Mar 2021 12:13:37 +0000 (14:13 +0200)]
Revert "[Passes] Add relative lookup table converter pass"
This reverts commit
5178ffc7cf92527557ae16e86d0fa90d538c2a19.
Compiling `llvm-profdata` with a compiler build from this produces a
crashing binary.
Oliver Stannard [Tue, 30 Mar 2021 11:57:04 +0000 (12:57 +0100)]
Move test to X86 directory
This test uses the X86 backend, so shouldn't be run if that isn't built.
Michał Górny [Tue, 30 Mar 2021 11:30:12 +0000 (13:30 +0200)]
[lldb] [Process/gdb-remote] Fix TID reading to use U64
Fix multiple instances of reading thread-id to use U64 type instead
of U32. This is consistent with lldb::tid_t being a 64-bit type.
Marek Kurdej [Tue, 30 Mar 2021 11:50:07 +0000 (13:50 +0200)]
[clang] [PR49736] [C++2b] Correctly reject lambdas with requires clause and no parameter list
This fixes http://llvm.org/PR49736 caused by implementing http://wg21.link/P1102 (https://reviews.llvm.org/rG0620e6f4b76a9725dbd82454d58c5a68a7e47074), by correctly allowing requires-clause only:
1) directly after template-parameter-list
2) after lambda-specifiers iff parameter-declaration-clause is present (2nd kind of lambda-declarator)
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D99489
Sanjay Patel [Tue, 30 Mar 2021 11:09:33 +0000 (07:09 -0400)]
[x86] enhance matching of pmaddwd
This was crashing with the example from:
https://llvm.org/PR49716
...and that was avoided with
a283d7258360 ,
but as we can see from the SSE vs. AVX test code diff,
we can try harder to match the pattern.
This matcher code was adapted from another pmadd pattern
match in D49636, but it needs different ops to deal with
size mismatches.
Differential Revision: https://reviews.llvm.org/D99531
Douglas Yung [Tue, 30 Mar 2021 11:17:29 +0000 (04:17 -0700)]
Fix path in test added in
e0577b3130a646b0ee090c04a40400483031c7a9 to work with both Linux/Windows paths.
Patch by Ying Yi!
Juneyoung Lee [Tue, 30 Mar 2021 11:03:50 +0000 (20:03 +0900)]
[LoopUnswitch] Simplify branch condition if it is select with constant operands
This fixes the miscompilation reported in https://reviews.llvm.org/rG5bb38e84d3d0#986154 .
`select _, true, false` matches both m_LogicalAnd and m_LogicalOr, making later
transformations confused.
Simplify the branch condition to not have the form.
Sander de Smalen [Thu, 25 Feb 2021 13:00:46 +0000 (13:00 +0000)]
NFC: Migrate PartialInlining to work on InstructionCost
This patch migrates cost values and arithmetic to work on InstructionCost.
When the interfaces to TargetTransformInfo are changed, any InstructionCost
state will propagate naturally.
See this patch for the introduction of the type: https://reviews.llvm.org/D91174
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2020-November/146408.html
Reviewed By: paulwalker-arm
Differential Revision: https://reviews.llvm.org/D97382
Nico Weber [Tue, 30 Mar 2021 10:59:37 +0000 (06:59 -0400)]
[gn build] (semi-manually) port
51fa9e0fd984
Muhammad Omair Javaid [Tue, 30 Mar 2021 09:33:25 +0000 (14:33 +0500)]
Fix cleanup error in TestVSCode_disconnect.test_launch
TestVSCode_disconnect.test_launch fails with clean up error because
disconnect gets called twice once from the test case and once from
the tear down hook.
This patch disables disconnect after its been called from test_launch
Reviewed By: clayborg
Differential Revision: https://reviews.llvm.org/D99491
Stefan Gränitz [Tue, 30 Mar 2021 10:26:52 +0000 (12:26 +0200)]
[lli] Leaving two EH frame tests with MCJIT only after PowerPC failure
Will investigate these in isolation once the rest of D98931 successfully landed.
David Green [Tue, 30 Mar 2021 10:19:16 +0000 (11:19 +0100)]
[ARM] Handle Splats in MVE lane interleaving
As another addition to MVE lane interleaving, this handles Splat shuffle
vectors, as the shuffle of a splat is a splat.
Differential Revision: https://reviews.llvm.org/D97291
Serguei Katkov [Tue, 30 Mar 2021 06:21:03 +0000 (13:21 +0700)]
[RegAlloc] Add a test with use in statepoint expected to be on stack.
The test shows that RA computes the spill weight independent on the
fact that statepoint instruction for var operands is ok to accept
this operand on stack. As a result the corresponding virtual register
evicts the other register which requires register for use.
It causes redundant fill operation.
David Sherwood [Wed, 10 Mar 2021 17:06:47 +0000 (17:06 +0000)]
[LoopVectorize] Add support for scalable vectorization of induction variables
This patch adds support for the vectorization of induction variables when
using scalable vectors, which required the following changes:
1. Removed assert from InnerLoopVectorizer::getStepVector.
2. Modified InnerLoopVectorizer::createVectorIntOrFpInductionPHI to use
a runtime determined value for VF and removed an assert.
3. Modified InnerLoopVectorizer::buildScalarSteps to work for scalable
vectors. I did this by calculating the full vector value for each Part
of the unroll factor (UF) and caching this in the VP state. This means
that we are always able to extract an arbitrary element from the vector
if necessary. In addition to this, I also permitted the caching of the
individual lane values themselves for the known minimum number of elements
in the same way we do for fixed width vectors. This is a further
optimisation that improves the code quality since it avoids unnecessary
extractelement operations when extracting the first lane.
4. Added an assert to InnerLoopVectorizer::widenPHIInstruction, since while
testing some code paths I noticed this is currently broken for scalable
vectors.
Various tests to support different cases have been added here:
Transforms/LoopVectorize/AArch64/sve-inductions.ll
Differential Revision: https://reviews.llvm.org/D98715
Stefan Gränitz [Tue, 30 Mar 2021 09:57:38 +0000 (11:57 +0200)]
Re-apply "[lli] Make -jit-kind=orc the default JIT engine"
MCJIT served well as the default JIT engine in lli for a long time, but the code is getting old and maintenance efforts don't seem to be in sight. In the meantime Orc became mature enough to fill that gap. The newly added greddy mode is very similar to the execution model of MCJIT. It should work as a drop-in replacement for common JIT tasks.
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D98931
Gabor Marton [Fri, 26 Mar 2021 16:26:10 +0000 (17:26 +0100)]
[ASTImporter] Import member specialization/instantiation of enum decls
We do the import of the member enum specialization similarly to as we do
with member CXXRecordDecl specialization.
Differential Revision: https://reviews.llvm.org/D99421
Krasimir Georgiev [Tue, 30 Mar 2021 09:44:05 +0000 (11:44 +0200)]
Revert "[loop-idiom] Hoist loop memcpys to loop preheader"
This reverts commit
92ddd3c1b6cd8f01f39dfd716cf3e976de126e66.
Causes multistage clang crashes, e.g.:
https://lab.llvm.org/buildbot/#/builders/36/builds/6678
Pavel Labath [Tue, 30 Mar 2021 09:42:19 +0000 (11:42 +0200)]
[lldb] Change CreateHostNativeRegisterContextLinux argument type
to NativeThreadLinux. This avoid casts down the line.
Joe Ellis [Mon, 29 Mar 2021 10:11:42 +0000 (10:11 +0000)]
[AArch64][SVE] Lower fixed length INSERT_VECTOR_ELT
Differential Revision: https://reviews.llvm.org/D98496
Joe Ellis [Tue, 23 Mar 2021 14:53:19 +0000 (14:53 +0000)]
[AArch64][SVE] Lower fixed length EXTRACT_VECTOR_ELT
Differential Revision: https://reviews.llvm.org/D98625
Kadir Cetinkaya [Fri, 12 Mar 2021 18:49:40 +0000 (19:49 +0100)]
[clangd] Perform merging for stale symbols in MergeIndex
Clangd drops symbols from static index whenever the dynamic index is
authoritative for the file. This results in regressions when static and
dynamic index contains different set of information, e.g.
IncludeHeaders.
After this patch, we'll choose to merge symbols from static index with
dynamic one rather than just dropping. This implies correctness problems
when the definition/documentation of the symbol is deleted. But seems
like it is worth having in more cases.
We still drop symbols if dynamic index owns the file and didn't report
the symbol, which means symbol is deleted.
Differential Revision: https://reviews.llvm.org/D98538
Raphael Isemann [Tue, 30 Mar 2021 09:08:08 +0000 (11:08 +0200)]
[lldb] Add a test for Obj-C properties with conflicting names
This is apparently allowed in Objective-C so we should test this in LLDB.
Reviewed By: teemperor
Differential Revision: https://reviews.llvm.org/D99513
Raphael Isemann [Tue, 30 Mar 2021 09:07:04 +0000 (11:07 +0200)]
[ObjC][CodeGen] Fix missing debug info in situations where an instance and class property have the same identifier
Since the introduction of class properties in Objective-C it is possible to declare a class and an instance
property with the same identifier in an interface/protocol.
Right now Clang just generates debug information for whatever property comes first in the source file.
The second property is ignored as it's filtered out by the set of already emitted properties (which is just
using the identifier of the property to check for equivalence). I don't think generating debug info in this case
was never supported as the identifier filter is in place since
7123bca7fb6e1dde51be8329cfb523d2bb9ffadf
(which precedes the introduction of class properties).
This patch expands the filter to take in account identifier + whether the property is class/instance. This
ensures that both properties are emitted in this special situation.
Reviewed By: aprantl
Differential Revision: https://reviews.llvm.org/D99512
Nuno Lopes [Tue, 30 Mar 2021 09:00:31 +0000 (10:00 +0100)]
[docs] remove references to checking out svn repos
Bing1 Yu [Tue, 30 Mar 2021 08:33:07 +0000 (16:33 +0800)]
Revert "[X86] Pass to transform tdpbsud&tdpbusd&tdpbuud intrinsics to scalar operation"
This reverts commit
275df61f043ccf86a9c17957379bff9434da1489.
Sander de Smalen [Tue, 30 Mar 2021 07:54:59 +0000 (08:54 +0100)]
[InstructionCost] Don't conflate Invalid costs with Unknown costs.
We previously made a change to getUserCost to return a Invalid cost
when one of the TTI costs returned '-1' (meaning 'unknown' or
'infinitely expensive'). It makes no sense to say that:
shufflevector <2 x i8> %x, <2 x i8> %y, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
has an invalid cost. Perhaps the cost is not known, but the IR is valid
and can be code-generated. Invalid should only be used for IR that
cannot possibly be code-generated and where a cost is nonsensical.
With more passes now asserting that the cost must be valid, it is possible
that those assertions will fail for perfectly valid IR. An incomplete
cost-model probably shouldn't be a reason for the compiler to break.
It's better to consider these costs as 'very expensive' and ignore them
for other reasons. At some point, we should consider replacing -1 with
some other mechanism.
Reviewed By: paulwalker-arm, dmgreen
Differential Revision: https://reviews.llvm.org/D99502
Bing1 Yu [Wed, 24 Mar 2021 08:53:12 +0000 (16:53 +0800)]
[X86] Pass to transform tdpbsud&tdpbusd&tdpbuud intrinsics to scalar operation
Reviewed By: pengfei
Differential Revision: https://reviews.llvm.org/D99244
Pavel Labath [Tue, 30 Mar 2021 07:57:32 +0000 (09:57 +0200)]
Revert "[lldb/DWARF] Simplify DIE extraction code slightly"
This reverts commit
1b96e133cf5215cb9ebfe7f14630f479c1611f22 due to
failures on windows.
Tim Renouf [Tue, 30 Mar 2021 07:33:07 +0000 (08:33 +0100)]
[AMDGPU] Update AMDGPU PAL usage documentation
Change-Id: I65f3edcfe5063551cad5aab0da1374c3a6ccd3a2
Stefan Gränitz [Tue, 30 Mar 2021 07:24:46 +0000 (09:24 +0200)]
[lli] Add option -lljit-platform=Inactive to disable platform support explicitly
This option tells LLJIT to disable platform support explicitly: JITDylibs aren't scanned for special init/deinit symbols and no runtime API interposes are injected.
It's useful in two cases: for platforms that don't have such requirements and platforms for which we have no explicit support yet and that don't work well with the generic IR platform.
Reviewed By: lhames
Differential Revision: https://reviews.llvm.org/D99416
Vitaly Buka [Tue, 30 Mar 2021 07:21:20 +0000 (00:21 -0700)]
[NFC][scudo] Produce debug info
Markus Böck [Tue, 30 Mar 2021 06:52:28 +0000 (08:52 +0200)]
[llvm-profdata] Make sure to consume Error on the error path of setIsIRLevelProfile
Encountered a crash while running a debug build, where this code path would be taken due to a mismatch in profile coverage data versions. Without consuming the error, an assert would be triggered inside the destructor of Error.
Differential Revision: https://reviews.llvm.org/D99457
Pavel Labath [Sat, 27 Mar 2021 20:21:30 +0000 (21:21 +0100)]
[lldb] Remove ScriptInterpreterLuaTest.Plugin unittest
This test is not useful as the functions it's testing are just returning
a constant. It also fails in unoptimized builds as it's comparing
character strings by address.
Pavel Labath [Tue, 30 Mar 2021 06:46:36 +0000 (08:46 +0200)]
[lldb] Add a dwarf unit test for null unit dies
This is the test I mentioned in the previous commit (
1b96e133), but
forgot to add.
Pavel Labath [Sat, 27 Mar 2021 20:00:59 +0000 (21:00 +0100)]
[lldb/DWARF] Simplify DIE extraction code slightly
Remove the "depth" variable, as the same information can be obtained
through die_index_stack.size().
Also add a test case for a one tricky case I noticed -- a unit
containing only a null unit die.
Han Zhu [Tue, 9 Feb 2021 01:24:25 +0000 (17:24 -0800)]
[loop-idiom] Hoist loop memcpys to loop preheader
For a simple loop like:
```
struct S {
int x;
int y;
char b;
};
unsigned foo(S* __restrict__ a, S* b, int n) {
for (int i = 0; i < n; i++)
a[i] = b[i];
return sizeof(a[0]);
}
```
We could eliminate the loop and convert it to a large memcpy of 12*n bytes. Currently this is not handled. Output of `opt -loop-idiom -S < memcpy_before.ll`
```
%struct.S = type { i32, i32, i8 }
define dso_local i32 @_Z3fooP1SS0_i(%struct.S* noalias nocapture %a, %struct.S* nocapture readonly %b, i32 %n) local_unnamed_addr {
entry:
%cmp7 = icmp sgt i32 %n, 0
br i1 %cmp7, label %for.body.preheader, label %for.cond.cleanup
for.body.preheader: ; preds = %entry
br label %for.body
for.cond.cleanup.loopexit: ; preds = %for.body
br label %for.cond.cleanup
for.cond.cleanup: ; preds = %for.cond.cleanup.loopexit, %entry
ret i32 12
for.body: ; preds = %for.body, %for.body.preheader
%i.08 = phi i32 [ %inc, %for.body ], [ 0, %for.body.preheader ]
%idxprom = zext i32 %i.08 to i64
%arrayidx = getelementptr inbounds %struct.S, %struct.S* %b, i64 %idxprom
%arrayidx2 = getelementptr inbounds %struct.S, %struct.S* %a, i64 %idxprom
%0 = bitcast %struct.S* %arrayidx2 to i8*
%1 = bitcast %struct.S* %arrayidx to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* nonnull align 4 dereferenceable(12) %0, i8* nonnull align 4 dereferenceable(12) %1, i64 12, i1 false)
%inc = add nuw nsw i32 %i.08, 1
%cmp = icmp slt i32 %inc, %n
br i1 %cmp, label %for.body, label %for.cond.cleanup.loopexit
}
; Function Attrs: argmemonly nofree nosync nounwind willreturn
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* noalias nocapture writeonly, i8* noalias nocapture readonly, i64, i1 immarg) #0
attributes #0 = { argmemonly nofree nosync nounwind willreturn }
```
The loop idiom pass currently only handles load and store instructions. Since struct S is too big to fit in a register, the loop body contains a memcpy intrinsic.
With this change, re-run `opt -loop-idiom -S < memcpy_before.ll`. The loop memcpy is promoted to loop preheader. For this trivial case, the loop is dead and will be removed by another pass.
```
%struct.S = type { i32, i32, i8 }
define dso_local i32 @_Z3fooP1SS0_i(%struct.S* noalias nocapture %a, %struct.S* nocapture readonly %b, i32 %n) local_unnamed_addr {
entry:
%a1 = bitcast %struct.S* %a to i8*
%b2 = bitcast %struct.S* %b to i8*
%cmp7 = icmp sgt i32 %n, 0
br i1 %cmp7, label %for.body.preheader, label %for.cond.cleanup
for.body.preheader: ; preds = %entry
%0 = zext i32 %n to i64
%1 = mul nuw nsw i64 %0, 12
call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %a1, i8* align 4 %b2, i64 %1, i1 false)
br label %for.body
for.cond.cleanup.loopexit: ; preds = %for.body
br label %for.cond.cleanup
for.cond.cleanup: ; preds = %for.cond.cleanup.loopexit, %entry
ret i32 12
for.body: ; preds = %for.body, %for.body.preheader
%i.08 = phi i32 [ %inc, %for.body ], [ 0, %for.body.preheader ]
%idxprom = zext i32 %i.08 to i64
%arrayidx = getelementptr inbounds %struct.S, %struct.S* %b, i64 %idxprom
%arrayidx2 = getelementptr inbounds %struct.S, %struct.S* %a, i64 %idxprom
%2 = bitcast %struct.S* %arrayidx2 to i8*
%3 = bitcast %struct.S* %arrayidx to i8*
%inc = add nuw nsw i32 %i.08, 1
%cmp = icmp slt i32 %inc, %n
br i1 %cmp, label %for.body, label %for.cond.cleanup.loopexit
}
; Function Attrs: argmemonly nofree nosync nounwind willreturn
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* noalias nocapture writeonly, i8* noalias nocapture readonly, i64, i1 immarg) #0
attributes #0 = { argmemonly nofree nosync nounwind willreturn }
```
Reviewed By: zino
Differential Revision: https://reviews.llvm.org/D97667
Han Zhu [Tue, 30 Mar 2021 06:35:10 +0000 (23:35 -0700)]
Revert "[loop-idiom] Hoist loop memcpys to loop preheader"
This reverts commit
deb5095833a834e0ef5f784138da53e66febff05.
Bad commit message.
Fangrui Song [Tue, 30 Mar 2021 06:31:14 +0000 (23:31 -0700)]
[DebugInfo][unittest] Fix heap-use-after-free after D76115
Han Zhu [Tue, 9 Feb 2021 01:24:25 +0000 (17:24 -0800)]
[loop-idiom] Hoist loop memcpys to loop preheader
Summary:
Test Plan:
Reviewers:
Subscribers:
Tasks:
Tags:
Blame Revision:
Differential Revision: https://phabricator.intern.facebook.com/
D26380397
Johannes Doerfert [Mon, 29 Mar 2021 01:13:38 +0000 (20:13 -0500)]
[OpenMP][NFC] Move the `noinline` to the parallel entry point
The `noinline` for non-SPMD parallel functions is probably not necessary
but as long as we use it we should put it on the outermost parallel
function, which is the wrapper, not the actual outlined function.
Resolves PR49752
Reviewed By: JonChesterfield
Differential Revision: https://reviews.llvm.org/D99506
Max Kazantsev [Tue, 30 Mar 2021 05:27:33 +0000 (12:27 +0700)]
[Test] Add a test demonstrating a missing opportunity to PRE a load
Fangrui Song [Tue, 30 Mar 2021 05:14:29 +0000 (22:14 -0700)]
[sanitizer] Improve accuracy of GetTls on x86/s390
The previous code may underestimate the static TLS surplus part, which may cause
false positives to LeakSanitizer if a dynamically loaded module uses the surplus
and there is an allocation only referenced by a thread's TLS.
Vitaly Buka [Tue, 30 Mar 2021 02:41:47 +0000 (19:41 -0700)]
[NFC][scudo] Sort sources in CMake file
Vitaly Buka [Tue, 30 Mar 2021 02:39:35 +0000 (19:39 -0700)]
[NFC][scudo] Add memtag.h into CMake file
Alok Kumar Sharma [Thu, 25 Mar 2021 11:04:57 +0000 (16:34 +0530)]
[DebugInfo] Upgrade DISubragne::count to accept DIExpression also
This is needed for Fortran assumed shape arrays whose dimensions are
defined as,
- 'count' is taken from array descriptor passed as parameter by
caller, access from descriptor is defined by type DIExpression.
- 'lowerBound' is defined by callee.
The current alternate way represents using upperBound in place of
count, where upperBound is calculated in callee in a temp variable
using lowerBound and count
Representation with count (DIExpression) is not only clearer as
compared to upperBound (DIVariable) but it has another advantage that
variable count is accessed by being parameter has better chance of
survival at higher optimization level than upperBound being local
variable.
Reviewed By: aprantl
Differential Revision: https://reviews.llvm.org/D99335
Rahman Lavaee [Fri, 26 Mar 2021 01:44:00 +0000 (18:44 -0700)]
[Propeller] Do not generate the BB address map for empty functions.
Empty functions (functions with no real code) are irrelevant for propeller optimizations and their addresses sometimes conflict with other functions which obfuscates the analysis.
This simple change skips the BB address map emission for such functions.
Reviewed By: tmsriram
Differential Revision: https://reviews.llvm.org/D99395
Stella Stamenova [Tue, 30 Mar 2021 03:06:31 +0000 (20:06 -0700)]
Revert "Add missing dependency to fix building the jit tests"
This breaks the windows bots because the dependency does not exist on Windows.
Per the cmake file:
if(CMAKE_HOST_UNIX)
add_subdirectory(LLJITWithRemoteDebugging)
endif()
This reverts commit
bd56e91fdbc65053dd08cca1f2c9e15087c062eb.
Jun Ma [Mon, 29 Mar 2021 06:24:47 +0000 (14:24 +0800)]
[NFC][SVE] Remove redundant pattern
Jun Ma [Mon, 29 Mar 2021 06:19:13 +0000 (14:19 +0800)]
[AArch64][SVE] Codegen dup_lane for dup(vector_extract)
Differential Revision: https://reviews.llvm.org/D99324
Jun Ma [Fri, 26 Mar 2021 07:55:46 +0000 (15:55 +0800)]
[AArch64][SVEIntrinsicOpts] Optimize tbl+dup into dup+extractelement
Differential Revision: https://reviews.llvm.org/D99412
Amy Huang [Tue, 30 Mar 2021 02:10:09 +0000 (19:10 -0700)]
Revert "[COFF] Only consider associated EH sections during ICF"
This change causes an asan error for ODR violation.
This reverts commit
7ce9a3e9a91bb0c71cd3560079ff4c31d5dade1b.
Louis Dionne [Thu, 25 Mar 2021 18:14:20 +0000 (14:14 -0400)]
[libc++] Re-enable macOS back-deployment testing
Download older roots from Dropbox instead of Green Dragon, which is too
unreliable. Also XFAIL tests that were broken for back-deployment
configurations by D98097.
Differential Revision: https://reviews.llvm.org/D99359
Hsiangkai Wang [Mon, 29 Mar 2021 10:27:27 +0000 (18:27 +0800)]
[RISCV] Add inline asm constraint 'vr' and 'vm' in Clang for RISC-V 'V'.
Add asm constraint 'vr' for vector registers.
Add asm constraint 'vm' for vector mask registers.
Differential Revision: https://reviews.llvm.org/D98616
Evandro Menezes [Tue, 30 Mar 2021 01:02:05 +0000 (20:02 -0500)]
[RISCV] Move scheduling resources for B into a separate file (NFC)
Differential Revision: https://reviews.llvm.org/D99557
Adrian Prantl [Mon, 29 Mar 2021 22:02:25 +0000 (15:02 -0700)]
Add debug support for set types
This commit adds debugging support for set types defined in languages
such as Pascal and Modula-2.
Patch by Peter McKinna!
Differential Revision: https://reviews.llvm.org/D76115
Dave Lee [Mon, 29 Mar 2021 22:59:05 +0000 (15:59 -0700)]
[llvm][utils] Fix handling of llvm::None
David Blaikie [Mon, 29 Mar 2021 23:11:38 +0000 (16:11 -0700)]
Add missing dependency to fix building the jit tests
Thomas Lively [Tue, 30 Mar 2021 00:23:15 +0000 (17:23 -0700)]
[WebAssembly] Fix i8x16.popcnt opcode
When I updated the SIMD opcodes in
f5764a8654e3, I accidentally missed updating
i8x16.popcnt. This patch fixes the omission.
Differential Revision: https://reviews.llvm.org/D99536
Jonas Devlieghere [Tue, 30 Mar 2021 00:14:35 +0000 (17:14 -0700)]
[dsymutil] s/dwarfdump/llvm-dwarfdump/ in test
Huihui Zhang [Mon, 29 Mar 2021 23:37:01 +0000 (16:37 -0700)]
[IPO][SampleContextTracker] Use SmallVector to track context profiles to prevent non-determinism.
Use SmallVector instead of SmallSet to track the context profiles mapped. Doing this
can help avoid non-determinism caused by iterating over unordered containers.
This bug was found with reverse iteration turning on,
--extra-llvm-cmake-variables="-DLLVM_REVERSE_ITERATION=ON".
Failing LLVM test profile-context-tracker-debug.ll .
Reviewed By: MaskRay, wenlei
Differential Revision: https://reviews.llvm.org/D99547
Jessica Paquette [Mon, 29 Mar 2021 23:29:10 +0000 (16:29 -0700)]
[AArch64][GlobalISel] NFC: Replace IR regbankselect test with MIR test
regbank-ceil.ll -> regbank-ceil.mir
The IR test was intended to only check register banks. This makes it brittle,
especially as we improve load/store combines in GlobalISel.
Rewriting this as a MIR test also makes it more consistent with the rest of
the testcases in GlobalISel.
Jonas Devlieghere [Mon, 29 Mar 2021 19:35:17 +0000 (12:35 -0700)]
[dsymutil] Relocate DW_TAG_label
dsymutil is not relocating the DW_AT_low_pc for a DW_TAG_label. This
patch fixes that and adds a test.
Differential revision: https://reviews.llvm.org/D99534
Jonas Devlieghere [Mon, 29 Mar 2021 22:29:28 +0000 (15:29 -0700)]
[lldb] Prints error using WithColor::error in lldb-platform