compiler/types: Flip wrapping of record_compare

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25129>

compiler/types: Flip wrapping of layout related functions

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25129>

compiler/types: Flip wrapping of interface related functions

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25129>

compiler/types: Flip wrapping of struct related functions

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25129>

compiler/types: Flip wrapping of size related functions

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25129>

compiler/types: Flip wrapping of CL related functions

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25129>

compiler/types: Flip wrapping of cmat related functions

Also add a missing `struct` related to cmat.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25129>

compiler/types: Flip wrapping of array related functions

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25129>

compiler/types: Flip wrapping of "type contains?" predicate functions

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25129>

ci_run_n_monitor: Always resolve --rev arguments for looking up pipelines.

Otherwise you'd loop forever never finding it with --rev <paste from
gitlab UI> or --rev <branch name>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25824>

radeonsi/vcn: Add encode support for H264 B-frames

Tested with ffmpeg and gstreamer vah264enc.

References to B-frames (b_depth/b-pyramid) not supported.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25565>

frontends/va: Fix parsing packed headers without emulation bytes

Don't try to handle emulation bytes and only parse first NAL unit
if the packed header has no emulation bytes.

This fixes parsing packed headers from gstreamer.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25565>

util/vl: Fix vl_rbsp parser with bitstreams without emulation bytes

This is used for parsing VA packed headers and those can be without
emulation prevention bytes.
Add emulation_bytes argument to vl_rbsp_init and skip all emulation
bytes handling when set.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25565>

frontends/va: Parse H264 SPS for max_num_reorder_frames

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25565>

anv: add gen9 astc workaround

gen9 does not handle denorms in void extent blocks correctly.  We need
to flush them to zero.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25800>

anv: prep for gen9 astc workaround

We will reuse astc emu for gen9 astc workaround.  This commit contains
minor cleanups and has no functional change.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25800>

radv: Support SDMA in si_cs_emit_write_event_eop.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25833>

radv: Support SDMA in radv_cp_wait_mem.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25833>

radv: Support SDMA in radv_cs_write_data_head.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25833>

nir: Add NVIDIA-specific geometry shader opcodes

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25000>

nir: Add NVIDIA-specific I/O intrinsics

NVIDIA hardware doesn't take a vertex index for per-vertex I/O.
Instead, it takes an offset into the primitive.  This has to be fetched
using a combination of SR_INVOCATION_INFO and the ISBERD instruction.
To keep things simple and allow for maximum CSE, we do the lowering in
NIR and patch the load/store_per_vertex_input/output intrinsic.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25000>

nir: Add a range to most I/O intrinsics

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25000>

nir: Add an load_barycentric_at_offset_nv intrinsic

NVIDIA hardware takes the offset as two 4.12 fixed-point values packed
into a single 32-bit value.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25000>

nir: Add NV-specific texture opcodes

These are for implementing various texture queries.

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25000>

nir: Add a load_sysval_nv intrinsic

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25000>

nir/lower_tex: Add a lower_txd_clamp option

Some of us want to lower all TXD with min_lod regardless of whether or
not it's shadow or cube or whatever.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25000>

nir: Add convert_alu_types to divergence analysis

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25000>

nir: Add a nir_ssa_def_all_uses_are_fsat() helper

Extracted from nir_lower_to_source_mods, this is useful for back-ends
which don't want to rely on NIR source and destination modifiers.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25000>

radv: enable mesh shader gs_fast_launch=2 and multi-row export

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25040>

radv: implement mesh shader multi-row export

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25040>

ac/nir: implement mesh shader multi-row export

Unlike AMDVLK, this has separate loops for attribute stores and exports,
so that the stores from different rows can overlap.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25040>

ac/nir,radv: pass workgroup size to ac_nir_lower_ngg_ms

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25040>

ac/nir: add emit_ms_outputs helper

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25040>

radv: implement mesh shader gs_fast_launch=2

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25040>

ac/nir: optimize mesh shader local_invocation_index

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25040>

ac/nir: implement mesh shader gs_fast_launch=2

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25040>

ac/nir: refactor mesh vertex/primitive export

To prepare for row export, move them into helpers with index and row
parameters.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25040>

ac/nir: remove dead code

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25040>

ac/nir: add row parameter to helpers

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25040>

aco,nir: add export_row_amd intrinsic

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25040>

nir: improve ms_cross_invocation_output_access with local_invocation_id

Since GFX11, RADV doesn't need to lower local_invocation_id.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25040>

intel/compiler: Don't emit calls to validate() in release build

While the fs_visitor::validate() implementation is empty in release
build, we still emit calls to it since it is defined in a separate
compilation unit than its callers.  To fix this, just expose an inline
empty function in the header for the release mode.

Fossil run time differences in TGL laptop (difference at 95.0% confidence):

```
Rise of The Tomb Rider (Native) [n=7]
        -0.482857 +/- 0.010932
        -1.60608% +/- 0.0363621%

Cyberpunk 2077 (DXVK) [n=7]
        -0.987143 +/- 0.0904516
        -0.82996% +/- 0.076049%

Batman Arkham City (DXVK) [n=7]
        -7.74857 +/- 0.329561
        -1.46298% +/- 0.0622231%
```

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25847>

ac/gpu_info: fix querying the maximum number of IBs per ring

The kernel uses 32-bit and Mesa was using 8-bit...

Fixes: 96345ae2ed3 ("ac/gpu_info: query the maximum number of IBs per submit from the kernel")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25867>

anv: selectively enable FCV optimization for DG2

Enabling FCV on MTL breaks a number of games and benchmarks. Let's
disable it for now till we can root cause the issue.

Closes: #9987
Fixes: 26c2c9 ('anv: enable FCV for Gen12.5')
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25863>

anv: turn off non zero fast clears for CCS_E

This helps fix a performance regression on games such as F1 22 and RDR2.
Turning on non zero fast clears causes additional partial resolves for
these games that degrades performance. Let's turn off non zero fast
clears till we can eliminate the partial resolves.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25863>

radeonsi/vcn: disable tmz ctx buffer for VCN_2_2_0

VCN_2_2_0 should not use tmz context buffer.

Fixes: ffbbf23e
A minor fix for above commit to use the original comparison logic "<"
instead of "<="

Cc: mesa-stable
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25856>

v3d/vc4/ci: add new fails/timeout

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25868>

radv: Add gang follower semaphore functions.

These functions implement the possibility to have the
gang leader wait for its follower.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25796>

radv: Slightly refactor gang semaphore functions.

This is in preparation for adding some new ones.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25796>

radv: Allow gang submit use cases other than task shaders.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25796>

radv: Simplify gang CS and semaphore initialization.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25796>

radv: fix missing predicate bit for WRITE_DATA helper

Fixes: 12a753f8d2c ("radv: Use new WRITE_DATA helper in more places.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25850>

Revert "radv: fix finding shaders by PC"

Shaders are no longer allocated contiguously in memory and the next
pointer is now the shader.

This fixes using the trap handler on GFX8.

This reverts commit 2dcd12f38be629086148dfc9ff0da90aa1fc9698.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25852>

radv: Expose VK_KHR_cooperative_matrix.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24683>

radv: Add cooperative matrix lowering.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24683>

radv: Don't transparently use wave32 with cooperative matrices.

The instruction has different regsizes for wave32 vs. wave64.

To ensure cases with cooperative matrix load/store without any
actual wmma instructions get handled correctly, also require
full subgroups if subgroup invocation/id are used. Not sure
those could be transparently changed anyway.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24683>

aco: Make RA understand WMMA instructions.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24683>

aco: Add WMMA instructions.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24683>

nir: Add AMD cooperative matrix intrinsics.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24683>

ci/ci_run_n_monitor: print job duration time

If the job is running, it prints the elapsed time so far, if it finished
already, it prints the time it took.

Signed-off-by: Helen Koike <helen.koike@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25822>

ci/marge_queue: add pretty_dutation()

Add pretty_duration() function that prints time in format 6m23s and use
it for marge_queue.

Signed-of-by: Helen Koike <helen.koike@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25822>

ac/gpu_info: query the maximum number of IBs per submit from the kernel

When the query fails (unsupported by the current kernel), we fallback
to some rough estimate.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10014
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25803>

anv: cleanup includes

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25766>

Revert "radv: pre-init surface info"

This reverts commit e15a4e6e1a773f83e621ad95689d264d04963a73.

The change wasn't thread safe.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9955
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10021
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25830>

radv: initialize video decoder for GFX11.5

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25304>

radv: set ENABLE_PING_PONG_BIN_ORDER for GFX11.5

Ported from RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25304>

radeonsi: add radeonsi to GL_RENDERER string

adding driver name to GL_RENDERER string will help to quickly
identify the driver being used.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25148>

radeonsi: In gfx6_init_gfx_preamble_state() use gfx_level only from sctx

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25148>

radeonsi: correct old comment in si_emit_framebuffer_state()

si_init_cs_preamble_state() function does not exist anymore and
PA_SC_WINDOW_SCISSOR_TL is set to 0,0. Update the comments with
this information.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25148>

docs: remove document for unused variable dfsm from AMD_DEBUG

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25148>

radeonsi: add more documentation for dpbb debug env variable

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25148>

zink: check for sampler view existence during zink_rebind_all_images()

views with mutable formats do not get created immediately, which means
access of them must be checked first

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25829>

zink: only increment image_rebind_counter on image export if binds exist

rebinding all images on all contexts is only relevant for images which
have bindings, otherwise it's just pointless churn

fixes #10016

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25829>

amd/radeonsi: add missing stuff for gfx11.5

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25836>

amd/common: add missing stuff for gfx11.5

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25836>

glsl: Retire dround lowering.

We have competent lowering in NIR already available.

Drivers exposing CAP_DOUBLES but not SHADER_CAP_DROUND:
- d3d12 (NIR lowers ~0 if the underlying impl doesn't do floats)
- svga (Now sets the NIR lowering options)
- softpipe (Doesn't do GL4 so you can't use doubles anyway)
- llvmpipe (Lowers dround_even in NIR and passees the rest through
            successfully)
- zink (NIR lowers ~0 if the underlying impl doesn't do floats,
        otherwise passes things through successfully, except needed
        dround_even lowering to avoid lavapipe regression with
        native doubles)
- r600 (sets NIR rounding lowering flags, and lowers all fsign)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25777>

nir: Add nir_lower_dsign as 64-bit fsign lowering.

Right now some drivers are doing dsign lowering in GLSL and haven't had to
have a NIR path due to there not being a corresponding vulkan driver.  We
want this in NIR now so that we can retire that batch of GLSL lowering
code.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25777>

llvmpipe: Set nir_lower_dround_even.

Avoids a regression when disabling GLSL-level lowering of the dround class
of ops, while passing through doubles to llvm for the other rounding ops.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25777>

glsl: Remove int64 div/mod lowering.

Most drivers that can expose GL4 were claiming the cap anyway (llvmpipe,
softpipe, zink, iris, nvc0, radeonsi, r600, freedreno, d3d12), and just
doing lowering in NIR if nessary.

crocus was only claiming the cap for gen8, but the backend compiler
enables NIR lowering regardless.

svga is the only other GL4 driver that didn't set it, and we can just set
the NIR lowering flag.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25777>

anv: Switch Xe KMD vm bind to sync

It was never actually async as it was doing a DRM_IOCTL_SYNCOBJ_WAIT
right after DRM_IOCTL_XE_VM_BIND but it was required to allow the
partial binds required by sparse.
But it is now fixed and we can switch back to sync vm bind.

In future we will switch back to async vm bind to improve performance
but this time it will be properly implemented.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25300>

intel: Sync xe_drm.h

Sync xe_drm.h with commit xxxxx ("drm/xe/uapi: Fix naming of XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY").

One not so straght forward change is that sync VM binds now don't
require a syncobj anymore, the uAPI will return as soon the VM bind
operations are done.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25300>

spirv: Let spirv2nir find out the shader to use

Previous behavior was to default to "main"/fs, this wasn't nice
when the SPIR-V module had a single shader that didn't match that spec.

New behavior is to look at the available shaders:

- if there's only one, use just use it
- if multiple, narrow down using --stage and --entry as criteria
- if still multiple after narrowing down, print the list and fail

Note you can use just one --stage or --entry if that already narrows
down to a single match.  Note that in SPIR-V it is valid to have a
shader module with two shaders sharing the same entry-point name but
different stages.  Because of that in rare cases both --stage and
--entry will be needed.

This patch should remove the need of using --stage and --entry for most
of the uses of spirv2nir.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25461>

spirv: List entry-points in spirv2nir when unsure what to use

When there's ambiguity about what shader to use, list the shaders.
Conveniently print in the command line argument for, so can be copied
pasted.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25461>

spirv: Change spirv2nir to use the shorter shader name abbreviations

This are the abbreviations we use elsewhere in Mesa.  For convenience we
make them case insensitive.  Old names still work for compatibility.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25461>

spirv: Expose stage enum conversion in vtn_private.h

Refactor it to not fail, just return MESA_SHADER_NONE.  Caller
takes care of handling error.  Exposed so can be used by spirv2nir
program.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25461>

radv: fix signed integer overflow

Fixes UBSan error:
src/amd/vulkan/radv_shader_info.c:78:41: runtime error: left shift of 15 by 28 places cannot be represented in type 'int'

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25432>

ac/nir: fix out-of-bounds access in ac_nir_export_position

These accesses (and similar) in ac_nir_exprot_position were out-of-bounds:
if (!outputs[VARYING_SLOT_PSIZ][0])
   outputs_written &= ~VARYING_BIT_PSIZ;

I don't think this caused any real issue, but this silences ASan:
==40091==ERROR: AddressSanitizer: stack-use-after-return on address 0x7f8ffa6b1cb8 at pc 0x7f900da99068 bp 0x7f8ffb8871d0 sp 0x7f8ffb8871c8

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25432>

radv: skip zero-sized memcpy

Fixes UBSan:
src/amd/vulkan/radv_pipeline.c:1181:4: runtime error: null pointer passed as argument 2, which is declared to never be null
src/amd/vulkan/radv_shader.c:2243:4: runtime error: null pointer passed as argument 2, which is declared to never be null

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25432>

intel/isl: Add scores for GEN12_RC_CCS and MTL_RC_CCS

Now that these CCS-enabled modifiers have non-zero scores, anv is
enabled to use them.

We found this to improve the performance of Borderlands 3 by 18.73%.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6701
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Tested-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25003>

anv: Delete implicit CCS code

Stop allocating CCS at the end of some BOs. Anv no longer uses that
memory range.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25003>

anv: Meet CCS alignment reqs with dedicated allocs

At image bind time, we require BOs to meet aux-map alignment
requirements in order to enable CCS on images. This is a heuristic
controlled by anv_bo_allows_aux_map().

To improve the chances of getting a properly aligned BO, we make use of
the dedicated allocation extension. Firstly, we report to applications a
preference for dedicated memory if an image would like to use the aux
map. Secondly, we align the VMA for dedicated allocations to meet
aux-map requirements.

To make enabling modifiers much easier on integrated gfx12, report
dedicated allocations as a requirement for modifiers which specify CCS.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v1)
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25003>

anv: Loosen anv_bo_allows_aux_map

Instead of requiring that a BO has the has_implicit_ccs flag set, simply
require that the BO is aligned according to aux-map requirements.

Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25003>

anv: Place images into the aux-map when safe to do so

At image bind time, if an image's addresses can be placed into the
aux-map without causing conflicts with a pre-existing mapping, do so.
The code aux management code in the binding function operates on a
per-plane basis. So, use the per-plane CCS memory range from the image
rather than the CCS memory region for the entire BO.

Another way to avoid aux-map conflicts is to rely solely on having a
dedicated allocation for an image. Unfortunately, not all workloads
change their behavior when drivers report a preference for dedicated
allocations. In particular, 3DMark Wild Life Extreme does not make more
dedicated allocations and such a solution was measured to perform ~16%
worse than this solution. With this solution, I did not measure a loss
of CCS on that benchmark.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6304
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v1)
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25003>

anv: Refactor CCS disabling at image bind time

Split out the discrete and integrated implicit CCS cases. We'll do more
work in the integrated case in a future commit.

Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25003>

anv: Wrap aux surface image binding queries

Add and use anv_image_get_aux_memory_range.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25003>

anv: Allocate space for aux-map CCS in image bindings

This makes images a bit larger by reserving space to store the
compression control surface when the device uses an aux-map.

This space is not used currently because anv still maps main surface
addresses to space at the end of the anv_bo.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25003>

anv: Move scope of CCS binding determination

Move the determination of the image binding for CCS to a larger scope,
so that it can be reused for other aux usages in
add_aux_surface_if_supported().

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25003>

intel: Return a bool from intel_aux_map_add_mapping

Make intel_aux_map_add_mapping return false if a mapping is attempted
that would conflict with an existing one. If this function doesn't
return false, it will either fail to return or return true.

The Vulkan driver will make use of this feature to opportunistically
enable CCS if a BO's VMA range has not been already mapped.

Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25003>

radv/rmv: Recognize LPDDR memory

Fixes: 8d0e6c02 ("radv: Add RMV tracing utilities")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25845>

radv/rra: Recognize LPDDR memory

Also move away from using unnamed constants for memory types.

Fixes: aef7ea868fe ("ac/gpu_info: handle LPDDR4 and 5 in ac_memory_ops_per_clock")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25845>