platform/upstream/nasm.git
10 years agoMerge branch 'avx512'
H. Peter Anvin [Wed, 2 Oct 2013 21:28:09 +0000 (14:28 -0700)]
Merge branch 'avx512'

AVX512 is ready enough that it will realistically be in version 2.11.
Add AVX512 to the master branch; for legacy branch maintenance use the
nasm-2.10.xx branch.

Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
10 years agostrfunc: Tabs to spaces conversion
Cyrill Gorcunov [Sat, 21 Sep 2013 09:14:15 +0000 (13:14 +0400)]
strfunc: Tabs to spaces conversion

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agocoff: Support for section names longer than 8 bytes
Marat Dukhan [Fri, 20 Sep 2013 22:54:49 +0000 (18:54 -0400)]
coff: Support for section names longer than 8 bytes

http://bugzilla.nasm.us/show_bug.cgi?id=3392233

Signed-off-by: Marat Dukhan <maratek@gmail.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoAVX-512: Fix bugs related to uninitialized variables
Jin Kyu Song [Sat, 21 Sep 2013 03:36:19 +0000 (20:36 -0700)]
AVX-512: Fix bugs related to uninitialized variables

Initialized disp8 to avoid a case that disp8 encoded
instead of the actual offset value.
Added a checking routine for basereg value before using it
as an index of array.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoAVX-512: Added AVX-512PF instructions
Jin Kyu Song [Fri, 13 Sep 2013 21:12:57 +0000 (14:12 -0700)]
AVX-512: Added AVX-512PF instructions

Added Prefetch (AVX-512PF) instructions.
These instructions are supported
if CPUID.(EAX=07H, ECX=0):EBX.AVX512PF[bit 26] = 1.
CPUID feature flag for PREFETCHWT1 is TBD
but PREFETCHWT1 is included in this commit.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoAVX-512: Add AVX-512ER instructions
Jin Kyu Song [Fri, 13 Sep 2013 21:12:56 +0000 (14:12 -0700)]
AVX-512: Add AVX-512ER instructions

Added Exponential and Reciprocal (AVX-512ER) instructions.
These instructions are supported
if CPUID.(EAX=07H, ECX=0):EBX.AVX512ER[bit 27] = 1.
IF_AVX512 is now shared by all AVX-512* instructions as a bit mask.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoAVX-512: Add AVX-512CD instructions
Jin Kyu Song [Fri, 13 Sep 2013 21:12:55 +0000 (14:12 -0700)]
AVX-512: Add AVX-512CD instructions

Added Conflict Detection (AVX-512CD) instructions.
These instructions are supported
if CPUID.(EAX=07H, ECX=0):EBX.AVX512CD[bit 28] = 1.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoAVX-512: Add Pseudo-ops for CMP instructions
Jin Kyu Song [Sat, 7 Sep 2013 04:22:18 +0000 (21:22 -0700)]
AVX-512: Add Pseudo-ops for CMP instructions

Added three-operand pseudo-ops for VCMPPD, VPCMPD and so on.
Test case is also updated to validate them.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoAVX-512: Reorder instructions in insns.dat
Jin Kyu Song [Sat, 31 Aug 2013 01:10:36 +0000 (18:10 -0700)]
AVX-512: Reorder instructions in insns.dat

Within a same instruction mnemonic, instructions are reordered
in order of opcode byte value.
Therefore when there are two possible opcode candidates, smaller
opcode is picked now.
e.g.) vmovapd zmm30, zmm29 -> now 28h is used. 29h previously

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoAVX-512: Fix rounding mode value in EVEX prefix with SAE
Jin Kyu Song [Sat, 31 Aug 2013 01:10:35 +0000 (18:10 -0700)]
AVX-512: Fix rounding mode value in EVEX prefix with SAE

If SAE is set, VL(vector length) is implied to be 512.
EVEX.L'L (=EVEX.RC) is set to 00b by default.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoAVX-512: Add test case for opmask instructions
Jin Kyu Song [Thu, 29 Aug 2013 02:15:29 +0000 (19:15 -0700)]
AVX-512: Add test case for opmask instructions

Added K* instructions test cases in test/avx512f.asm.
The previous test case from GNU AS were repeating the same instruction twice,
so the repeated half part is removed.
Changed the python script (gas2nasm.py) to include opmask instructions.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoAVX-512: Remove trailing space and align columns
Jin Kyu Song [Thu, 29 Aug 2013 02:15:28 +0000 (19:15 -0700)]
AVX-512: Remove trailing space and align columns

Cosmetic change

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoAVX-512: Add OPMASK instructions
Jin Kyu Song [Thu, 29 Aug 2013 02:15:27 +0000 (19:15 -0700)]
AVX-512: Add OPMASK instructions

Added opmask instructions (kandw and etc). Defined KREG and RM_K
aliasing RM_OPMASK and OPMASKREG respectively to make insns.dat
look neat.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoAVX-512: Add IF_SPMASK and fix IF_PFMASK
Jin Kyu Song [Thu, 29 Aug 2013 02:15:26 +0000 (19:15 -0700)]
AVX-512: Add IF_SPMASK and fix IF_PFMASK

Defined IF_SPMASK for specific processor types and
fixed IF_PFMASK to mask the exact preferred bits only.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoAVX-512: Fix bug in checking high-16 registers
Jin Kyu Song [Thu, 29 Aug 2013 02:15:25 +0000 (19:15 -0700)]
AVX-512: Fix bug in checking high-16 registers

Register value needs to be checked. Previous patch compared with reg_enum.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoAVX-512: Fix comments
Jin Kyu Song [Thu, 29 Aug 2013 02:15:24 +0000 (19:15 -0700)]
AVX-512: Fix comments

Fixed or purged some old comments and added a comment for a previous patch.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoAVX-512: Remember the position of operand with broadcast or embedded rounding
Jin Kyu Song [Thu, 29 Aug 2013 02:15:23 +0000 (19:15 -0700)]
AVX-512: Remember the position of operand with broadcast or embedded rounding

It was not so straight forward to find the postion of operand that has
a broadcasting, embedded rounding mode or SAE (Suppress All Exceptions)
decorator out from operands types or bytecode.
Remebering the postion of the operand of interest in the parser reduces
the burden that assembler looks through the operands.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoAVX-512: Add a feature to generate a raw bytecode file
Jin Kyu Song [Sat, 24 Aug 2013 01:40:49 +0000 (18:40 -0700)]
AVX-512: Add a feature to generate a raw bytecode file

From gas testsuite file, a text file containing raw bytecodes
is useful when verifying the output of NASM.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoAVX-512: Add a test case for EVEX encoded instructions
Jin Kyu Song [Wed, 21 Aug 2013 06:50:26 +0000 (23:50 -0700)]
AVX-512: Add a test case for EVEX encoded instructions

This was converted from a gas testsuite.
(gas/testsuite/gas/i386/x86-64-avx512f-intel.d)
A python script that is used for converting is also included.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoAVX-512: Fix match function to check the range of registers
Jin Kyu Song [Tue, 27 Aug 2013 03:28:43 +0000 (20:28 -0700)]
AVX-512: Fix match function to check the range of registers

High-16 registers of XMM and YMM need to be encoded with EVEX not VEX.
Even if all the operand types match with VEX instruction format,
it should use EVEX instead.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoAVX-512: Change the data type for instruction flags
Jin Kyu Song [Tue, 27 Aug 2013 03:28:42 +0000 (20:28 -0700)]
AVX-512: Change the data type for instruction flags

Increased the size of data type for instruction flags from 32bits to 64bits.
And a new type (iflags_t) is defined for better maintainability.

Bigger data type is needed because more instruction set types are coming
but there were not enough space for them. Since they are not bit masks,
only one instruction set is allowed for each instruction.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoAVX-512: Fix a bug in calculating Disp8*N value
Jin Kyu Song [Tue, 27 Aug 2013 03:28:41 +0000 (20:28 -0700)]
AVX-512: Fix a bug in calculating Disp8*N value

Fixed a bug that derived an incorrect N value for tuple types of
T2, T4, T8.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoAVX-512: Find the correct position of the last SIMD op
Jin Kyu Song [Tue, 27 Aug 2013 03:28:39 +0000 (20:28 -0700)]
AVX-512: Find the correct position of the last SIMD op

Since embedded rounding mode is following the last SIMD op,
GPR op should be skipped when finding the last SIMD op.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoAVX-512: Moved {er} decorator position next to the last SIMD op
Jin Kyu Song [Tue, 27 Aug 2013 03:28:38 +0000 (20:28 -0700)]
AVX-512: Moved {er} decorator position next to the last SIMD op

This is for following the current syntax used in gas even though
this is not SDM conforming.
According to SDM, {er} should follow the last GPR op not SIMD op.
e.g. SDM : VCVTSI2SD xmm1, xmm2, r/m64{er}
    NASM : VCVTSI2SD xmm1, xmm2{er}, r/m64

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoAVX-512: Fix parser to handle opmask decorator correctly
Jin Kyu Song [Thu, 22 Aug 2013 02:29:12 +0000 (19:29 -0700)]
AVX-512: Fix parser to handle opmask decorator correctly

When a memory reference operand is a destination, this could have
an opmask decorator as well.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoAVX-512: Add ZWORD keyword
Jin Kyu Song [Thu, 22 Aug 2013 02:29:11 +0000 (19:29 -0700)]
AVX-512: Add ZWORD keyword

ZWORD (512 bits) keyword is added

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoAVX-512: Fix instruction match function
Jin Kyu Song [Thu, 22 Aug 2013 02:29:10 +0000 (19:29 -0700)]
AVX-512: Fix instruction match function

When an instruction allows broadcasting, the memory element size is
different from the size of normal memory operation.
This information is provided in a decoflags field, so it should try to
match those properties before it fails.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoAVX-512: Reword comment about opmask decorators
Jin Kyu Song [Thu, 22 Aug 2013 02:29:09 +0000 (19:29 -0700)]
AVX-512: Reword comment about opmask decorators

Previous comment was not so clear.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoAVX-512: Handle curly braces in multi-line macro parameters
Jin Kyu Song [Thu, 22 Aug 2013 02:29:08 +0000 (19:29 -0700)]
AVX-512: Handle curly braces in multi-line macro parameters

Multi-line macro uses curly braces for enclosing a parameter
containing comma(s). Passing curly braces as a part of a parameter
which is already enclosed with braces confuses the macro expander.

Escape character '\' is prefixed in this case.
e.g.) mmacro {1,2,3}, {4,\{5,6\}}
      mmacro gets 2 parameters of '1,2,3' and '4,{5,6}'

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoAVX-512: Add EVEX encoding and new instructions
Jin Kyu Song [Fri, 16 Aug 2013 02:01:25 +0000 (19:01 -0700)]
AVX-512: Add EVEX encoding and new instructions

EVEX encoding support includes 32 vector regs (XMM/YMM/ZMM),
opmask, broadcasting, embedded rounding mode,
suppress all exceptions, compressed displacement.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoAVX-512: Add support for parsing braces
Jin Kyu Song [Tue, 6 Aug 2013 03:46:18 +0000 (20:46 -0700)]
AVX-512: Add support for parsing braces

AVX-512 introduced new syntax using braces for decorators.
Opmask, broadcat, rounding control use this new syntax.

http://software.intel.com/sites/default/files/319433-015.pdf

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoNASM 2.10.09
Cyrill Gorcunov [Tue, 23 Jul 2013 05:36:13 +0000 (09:36 +0400)]
NASM 2.10.09

10 years agodoc: changes -- Prepare for 2.10.09
Cyrill Gorcunov [Tue, 23 Jul 2013 05:36:00 +0000 (09:36 +0400)]
doc: changes -- Prepare for 2.10.09

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agobuild: Include pregenerated nasm manpages
Cyrill Gorcunov [Mon, 22 Jul 2013 06:09:35 +0000 (10:09 +0400)]
build: Include pregenerated nasm manpages

It's been reported that force people to install
asciidoc for man pages generation is not acceptible.
Just ship them pregenerated.

http://bugzilla.nasm.us/show_bug.cgi?id=3392262

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoNASM 2.10.08
Cyrill Gorcunov [Sun, 21 Jul 2013 16:58:43 +0000 (20:58 +0400)]
NASM 2.10.08

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agodoc: changes -- Add fixes for VMOVNTDQA, MOVNTDQA, MOVLPD
Cyrill Gorcunov [Sun, 21 Jul 2013 07:19:27 +0000 (11:19 +0400)]
doc: changes -- Add fixes for VMOVNTDQA, MOVNTDQA, MOVLPD

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agotest: Add br978756
Cyrill Gorcunov [Sun, 21 Jul 2013 10:45:02 +0000 (14:45 +0400)]
test: Add br978756

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agotest: Add br3392259
Cyrill Gorcunov [Sun, 21 Jul 2013 07:18:01 +0000 (11:18 +0400)]
test: Add br3392259

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoinsns: Fix MOVLPD
Cyrill Gorcunov [Sun, 21 Jul 2013 07:37:43 +0000 (11:37 +0400)]
insns: Fix MOVLPD

http://bugzilla.nasm.us/show_bug.cgi?id=978756

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoinsns: Fix MOVNTDQA instruction
Cyrill Gorcunov [Sun, 21 Jul 2013 07:14:04 +0000 (11:14 +0400)]
insns: Fix MOVNTDQA instruction

http://bugzilla.nasm.us/show_bug.cgi?id=3392259

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoinsns: Fix VMOVNTDQA instruction
Cyrill Gorcunov [Sun, 21 Jul 2013 07:13:15 +0000 (11:13 +0400)]
insns: Fix VMOVNTDQA instruction

http://bugzilla.nasm.us/show_bug.cgi?id=3392259

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agochanges.src: Prepare for 2.10.08
Cyrill Gorcunov [Sat, 20 Jul 2013 20:42:47 +0000 (00:42 +0400)]
changes.src: Prepare for 2.10.08

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoBR 3392260: Handle instructions only separated by vector SIB size
H. Peter Anvin [Sat, 20 Jul 2013 00:06:08 +0000 (17:06 -0700)]
BR 3392260: Handle instructions only separated by vector SIB size

There are two instructions (VGATHERQPS, VPGATHERQD) where the only
separation between two forms is the vector length given to the vector
SIB.  This means the *matcher* has to be able to distinguish
instructions by vector SIB length and the matcher only operates on the
operands and the instruction flags, not on the bytecode.

Export the vector index-ness into the operand flags and add to the
matcher.

This resolves BR 3392260.

Reported-by: Agner <agner@anger.org>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
10 years agoparse_line: Shrink code with memset helper
Cyrill Gorcunov [Mon, 15 Jul 2013 21:33:09 +0000 (01:33 +0400)]
parse_line: Shrink code with memset helper

We know that P_none = 0 thus instead of using
for() statement assign them all in one memset
call.

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoea_type: Fix typo in comment
Cyrill Gorcunov [Sun, 14 Jul 2013 14:45:48 +0000 (18:45 +0400)]
ea_type: Fix typo in comment

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoautoconf: Warn a user if no asciidoc/xmlto found
Cyrill Gorcunov [Thu, 4 Jul 2013 21:33:09 +0000 (01:33 +0400)]
autoconf: Warn a user if no asciidoc/xmlto found

It's been noticed on nasm forum that we don't complain
if no asciidoc/xmlto package installed on a system while
they are required for man pages generation.

So warn a user then, but still allow to build nasm.

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agomake: Fix nasm build with MSVC
Marat Dukhan [Sat, 29 Jun 2013 21:30:44 +0000 (01:30 +0400)]
make: Fix nasm build with MSVC

http://bugzilla.nasm.us/show_bug.cgi?id=3392258

Signed-off-by: Marat Dukhan <maratek@gmail.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
10 years agoinsns: Fix vspllw instruction
MITSUNARI Shigeo [Sat, 22 Jun 2013 22:01:05 +0000 (07:01 +0900)]
insns: Fix vspllw instruction

http://bugzilla.nasm.us/show_bug.cgi?id=3392257

Signed-off-by: MITSUNARI Shigeo <herumi@nifty.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoinsns: Fix vgatherqpd instruction
MITSUNARI Shigeo [Thu, 30 May 2013 06:21:55 +0000 (15:21 +0900)]
insns: Fix vgatherqpd instruction

Signed-off-by: MITSUNARI Shigeo <herumi@nifty.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoinsns: Fix VPMOVSXBQ instruction
MITSUNARI Shigeo [Fri, 24 May 2013 08:02:31 +0000 (12:02 +0400)]
insns: Fix VPMOVSXBQ instruction

http://bugzilla.nasm.us/show_bug.cgi?id=3392254

Signed-off-by: MITSUNARI Shigeo <herumi@nifty.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoMake the errors for missing man page tools comprehensible
H. Peter Anvin [Fri, 17 May 2013 19:02:49 +0000 (12:02 -0700)]
Make the errors for missing man page tools comprehensible

A lot of confusion was had due to missing asciidoc...

Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
11 years agotest: Add br3392252 test
Cyrill Gorcunov [Sun, 12 May 2013 22:21:08 +0000 (02:21 +0400)]
test: Add br3392252 test

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoinsns.dat: Add note about AMD TBM instructions
Cyrill Gorcunov [Sun, 12 May 2013 17:13:04 +0000 (21:13 +0400)]
insns.dat: Add note about AMD TBM instructions

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoinsns.dat: Add BLCMSK
Cyrill Gorcunov [Sun, 12 May 2013 17:12:35 +0000 (21:12 +0400)]
insns.dat: Add BLCMSK

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoinsns.dat: Add BLCS
Cyrill Gorcunov [Sun, 12 May 2013 17:12:01 +0000 (21:12 +0400)]
insns.dat: Add BLCS

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoinsns.dat: Add BLSFILL
Cyrill Gorcunov [Sun, 12 May 2013 17:11:00 +0000 (21:11 +0400)]
insns.dat: Add BLSFILL

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoinsns.dat: Add BLCFILL
Cyrill Gorcunov [Sun, 12 May 2013 17:10:34 +0000 (21:10 +0400)]
insns.dat: Add BLCFILL

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoinsns.dat: Add BLCIC
Cyrill Gorcunov [Sun, 12 May 2013 17:09:42 +0000 (21:09 +0400)]
insns.dat: Add BLCIC

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoinsns.dat: Add BLCI
Cyrill Gorcunov [Sun, 12 May 2013 17:09:09 +0000 (21:09 +0400)]
insns.dat: Add BLCI

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoinsns.dat: Add BLSIC
Cyrill Gorcunov [Sun, 12 May 2013 17:08:26 +0000 (21:08 +0400)]
insns.dat: Add BLSIC

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoinsns.dat: Add immediate form of BEXTR
Cyrill Gorcunov [Sun, 12 May 2013 17:07:07 +0000 (21:07 +0400)]
insns.dat: Add immediate form of BEXTR

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoinsns.dat: Add T1MSKC intstruction
Cyrill Gorcunov [Sun, 12 May 2013 17:06:26 +0000 (21:06 +0400)]
insns.dat: Add T1MSKC intstruction

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoinsns.dat: Add TZMSK instruction
Cyrill Gorcunov [Sun, 12 May 2013 17:05:25 +0000 (21:05 +0400)]
insns.dat: Add TZMSK instruction

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoinsns.dat: Move TZCNT for alphabetical order
Cyrill Gorcunov [Sun, 12 May 2013 17:04:41 +0000 (21:04 +0400)]
insns.dat: Move TZCNT for alphabetical order

Other instructions in this section already sorted.
No func changes.

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoMake .git-ignore directory to ignore by scm
Cyrill Gorcunov [Fri, 10 May 2013 09:27:02 +0000 (13:27 +0400)]
Make .git-ignore directory to ignore by scm

To stash various code which a developer not
need to be tracked.

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoAdd IF_TBM flag
Cyrill Gorcunov [Fri, 10 May 2013 09:24:15 +0000 (13:24 +0400)]
Add IF_TBM flag

For TMB instructions

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoBR3392253: Fix potential buffer overflow in number conversion
Cyrill Gorcunov [Mon, 6 May 2013 19:43:43 +0000 (23:43 +0400)]
BR3392253: Fix potential buffer overflow in number conversion

Reported-by: franck.uberto@esrf.fr
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoinsns.dat: Udate year
Cyrill Gorcunov [Fri, 3 May 2013 22:24:38 +0000 (02:24 +0400)]
insns.dat: Udate year

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agobr3392250: insns -- Allow byte size in PREFETCHTx instructions
Cyrill Gorcunov [Fri, 3 May 2013 22:24:05 +0000 (02:24 +0400)]
br3392250: insns -- Allow byte size in PREFETCHTx instructions

The PREFETCHTx instructions do allow mem8 (byte).

Reported-by: Agner <agner@agner.org>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoBR3392244: docs -- Fix "respectively" typo
Cyrill Gorcunov [Sun, 28 Apr 2013 11:07:38 +0000 (15:07 +0400)]
BR3392244: docs -- Fix "respectively" typo

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoBR3392248: Update nasm -h output
Cyrill Gorcunov [Sat, 20 Apr 2013 16:37:17 +0000 (20:37 +0400)]
BR3392248: Update nasm -h output

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoBR3392248: Update nasm manual
Cyrill Gorcunov [Sat, 20 Apr 2013 16:24:01 +0000 (20:24 +0400)]
BR3392248: Update nasm manual

Add -W description

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agondisasm: man -- Add missing -p option
Cyrill Gorcunov [Sat, 20 Apr 2013 16:18:46 +0000 (20:18 +0400)]
ndisasm: man -- Add missing -p option

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoBR3392248: Update ndisasm man
Cyrill Gorcunov [Sat, 20 Apr 2013 16:14:45 +0000 (20:14 +0400)]
BR3392248: Update ndisasm man

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoBR3392248: Update ndisasm man
Cyrill Gorcunov [Sat, 20 Apr 2013 16:13:51 +0000 (20:13 +0400)]
BR3392248: Update ndisasm man

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoBR3392248: Update nasm manual
Cyrill Gorcunov [Sat, 20 Apr 2013 16:10:15 +0000 (20:10 +0400)]
BR3392248: Update nasm manual

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoFixed two more resource leaks in rdoff/rdlib.c
Philipp Kloke [Sun, 31 Mar 2013 10:20:10 +0000 (12:20 +0200)]
Fixed two more resource leaks in rdoff/rdlib.c

Signed-off-by: Philipp Kloke <philipp.kloke@web.de>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoFixed three possible buffer overflows
Philipp Kloke [Sun, 31 Mar 2013 10:03:47 +0000 (12:03 +0200)]
Fixed three possible buffer overflows

Bug found by: CppCheck 1.59 (static source analysis tool)

Signed-off-by: Philipp Kloke <philipp.kloke@web.de>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoFixed several resource and memory leaks
Philipp Kloke [Sun, 31 Mar 2013 10:02:30 +0000 (12:02 +0200)]
Fixed several resource and memory leaks

Bug found by: CppCheck 1.59 (static source analysis tool)

Signed-off-by: Philipp Kloke <philipp.kloke@web.de>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoFixed wrong/redundant comparison according to documentation in comment above.
Philipp Kloke [Sun, 31 Mar 2013 10:01:23 +0000 (12:01 +0200)]
Fixed wrong/redundant comparison according to documentation in comment above.

Bug found by: CppCheck 1.59 (static source analysis tool)

Signed-off-by: Philipp Kloke <philipp.kloke@web.de>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoFixed wrong format specifier in format string
Philipp Kloke [Sun, 31 Mar 2013 10:00:09 +0000 (12:00 +0200)]
Fixed wrong format specifier in format string

Signed-off-by: Philipp Kloke <philipp.kloke@web.de>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoRemove unnecessary calls to memset
Philipp Kloke [Sun, 31 Mar 2013 09:59:22 +0000 (11:59 +0200)]
Remove unnecessary calls to memset

The C standard guarantees that strncpy pads
the string with zeros if source string is smaller
than destination buffer.

Signed-off-by: Philipp Kloke <philipp.kloke@web.de>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoMake F2 and F3 SSE prefixes override 66
Ben Rudiak-Gould [Sun, 10 Mar 2013 17:46:12 +0000 (21:46 +0400)]
Make F2 and F3 SSE prefixes override 66

According to XED and experimentation, the 66 is ignored.

Signed-off-by: Ben Rudiak-Gould <benrudiak@gmail.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoDrop SAME_AS flag from instruction matcher
Ben Rudiak-Gould [Wed, 27 Feb 2013 18:13:14 +0000 (10:13 -0800)]
Drop SAME_AS flag from instruction matcher

It was there to support the SSE5 DREX encoding,
which as far as I know is dead forever.

Signed-off-by: Ben Rudiak-Gould <benrudiak@gmail.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoinsns: Remove pushseg/popseg internal bytecodes
Ben Rudiak-Gould [Sun, 3 Mar 2013 14:43:07 +0000 (18:43 +0400)]
insns: Remove pushseg/popseg internal bytecodes

This patch is getting rid of the following bytecodes
'pushseg','popseg','pushseg2','popseg2' and simplifies
overall code.

[gorcunov@: a few style fixes]
Signed-off-by: Ben Rudiak-Gould <benrudiak@gmail.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoMove conditional opcodes close to enum ccode definition
Cyrill Gorcunov [Sun, 3 Mar 2013 10:34:31 +0000 (14:34 +0400)]
Move conditional opcodes close to enum ccode definition

Thus if someone need to rework this code he won't need
to jump between files trying to figure out where enum
and opcodes lay.

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoinsns.pl: Various style polyshing
Cyrill Gorcunov [Fri, 1 Mar 2013 22:57:58 +0000 (02:57 +0400)]
insns.pl: Various style polyshing

 - convert tabs to spaces
 - align octal opcodes

No func changes.

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoassemble: Make emit_rex being a function
Cyrill Gorcunov [Fri, 1 Mar 2013 22:48:23 +0000 (02:48 +0400)]
assemble: Make emit_rex being a function

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoassemble: Use case3/4 where appropriate
Cyrill Gorcunov [Sat, 1 Dec 2012 22:51:18 +0000 (02:51 +0400)]
assemble: Use case3/4 where appropriate

This allows to shrink code a bit.

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoassemble: Add case3 helper
Cyrill Gorcunov [Sat, 1 Dec 2012 22:47:16 +0000 (02:47 +0400)]
assemble: Add case3 helper

Signed-off-by: cyrill <cyrill@cyrills-MacBook-Pro.local>
11 years agoprocess_ea: Drop redundant variable
Cyrill Gorcunov [Sat, 1 Dec 2012 15:38:47 +0000 (19:38 +0400)]
process_ea: Drop redundant variable

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoRemove +s
Ben Rudiak-Gould [Fri, 1 Mar 2013 06:28:32 +0000 (10:28 +0400)]
Remove +s

It doesn't seem worth >200 lines of C and Perl to save ~50 lines in insns.dat.

In order to make this work I had to rename sbyte16/sbyte32 so that
they can take an ordinary size suffix (their size suffix was formerly
treated specially).

This fixes one disassembly bug: 48C7C000000080 disassembles to mov
rax,0x80000000, which reassembles to B800000080, which loads a
different value.

Signed-off-by: Ben Rudiak-Gould <benrudiak@gmail.com>
Acked-by: "H. Peter Anvin" <hpa@zytor.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoFix warnings generated by clang 3.0
Andrew Nayenko [Sun, 24 Feb 2013 19:08:40 +0000 (23:08 +0400)]
Fix warnings generated by clang 3.0

Fix warnings like this:

output/outelf32.c:2120:33: warning: equality comparison with extraneous
      parentheses [-Wparentheses-equality]
            if ((match->section == index)) {
                 ~~~~~~~~~~~~~~~^~~~~~~~
output/outelf32.c:2120:33: note: remove extraneous parentheses around the
      comparison to silence this warning
            if ((match->section == index)) {
                ~               ^       ~
output/outelf32.c:2120:33: note: use '=' to turn this equality comparison into
      an assignment
            if ((match->section == index)) {
                                ^~
                                =
1 warning generated.

Signed-off-by: Andrew Nayenko <resver@gmail.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoBR3392242: insns.dat -- Support AMD SVM instructions in 32bit mode
Andrew Nayenko [Wed, 20 Feb 2013 22:36:57 +0000 (02:36 +0400)]
BR3392242: insns.dat -- Support AMD SVM instructions in 32bit mode

AMD CPUs do support SVM instructions in 32-bit mode thus drop X64
restriction from instructions template where appropriate.

Signed-off-by: Andrew Nayenko <resver@gmail.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoFix jmp/call near offsets in long mode
Ben Rudiak-Gould [Wed, 20 Feb 2013 19:25:59 +0000 (23:25 +0400)]
Fix jmp/call near offsets in long mode

In long mode relative offsets are always 32 bits sign-extended to 64
bits and absolute near addresses are always 64 bits, regardless of the
operand size.

Signed-off-by: Ben Rudiak-Gould <benrudiak@gmail.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoAdd np and similar prefixes to instructions that should have them
Ben Rudiak-Gould [Wed, 20 Feb 2013 19:25:54 +0000 (23:25 +0400)]
Add np and similar prefixes to instructions that should have them

This adds "np" to a bunch of SSE-style instructions that should have
it, "norep" (which was implemented but unused) on quasi-SSE instructions
that use F2 and F3 as instruction extensions but 66 for operand size,
"nof3" (newly implemented) on a few instructions, "norexw" on some
instructions that have only 32-bit and 64-bit versions, and one NOLONG.

It also removes some incorrect "np"s, changes some "f3"s to "f3i"s,
and fixes the decoding of the XCHG/NOP/PAUSE mess: F390 is always
PAUSE even when rex.b=1 (at least according to XED).

Signed-off-by: Ben Rudiak-Gould <benrudiak@gmail.com>
Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoeval: Use is_power2 helper instead of open code
Cyrill Gorcunov [Sun, 17 Feb 2013 21:38:11 +0000 (01:38 +0400)]
eval: Use is_power2 helper instead of open code

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agomake: Don't forget to generate manpage for all target
Cyrill Gorcunov [Sun, 17 Feb 2013 21:31:59 +0000 (01:31 +0400)]
make: Don't forget to generate manpage for all target

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoman: Generate manpages from asciidoc format
Cyrill Gorcunov [Sun, 17 Feb 2013 18:50:19 +0000 (22:50 +0400)]
man: Generate manpages from asciidoc format

The asciidoc format is a way more easier to read
by a human.

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>
11 years agoUpdate .gitignore
Cyrill Gorcunov [Sun, 17 Feb 2013 18:47:28 +0000 (22:47 +0400)]
Update .gitignore

Signed-off-by: Cyrill Gorcunov <gorcunov@gmail.com>