Marek Vasut [Sun, 25 Apr 2021 20:28:00 +0000 (22:28 +0200)]
ARM: dts: renesas: Add R8A779A0 V3U Falcon DTs
Import R8A779A0 V3U Falcon DTs from Linux 5.12,
commit
9f4ad9e425a1 ("Linux 5.12") .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Marek Vasut [Sun, 25 Apr 2021 20:28:00 +0000 (22:28 +0200)]
ARM: dts: renesas: Add R8A779A0 V3U DTs and headers
Import R8A779A0 V3U DTs and headers from Linux 5.12,
commit
9f4ad9e425a1 ("Linux 5.12") .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Marek Vasut [Mon, 26 Apr 2021 23:55:54 +0000 (01:55 +0200)]
pinctrl: renesas: Import R8A779A0 V3U PFC tables
Import R8A779A0 V3U PFC tables from Linux 5.12, commit
9f4ad9e425a1
("Linux 5.12") . Add parts of PFC table integration from
pinctrl: renesas: Add R8A779A0 V3U PFC tables
by Hai Pham <hai.pham.ud@renesas.com>" .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Marek Vasut [Tue, 27 Apr 2021 19:29:50 +0000 (21:29 +0200)]
gpio: renesas: Handle R8A779A0 V3U INEN register
The R8A779A0 V3U GPIO block has additional "General Input Enable" INEN
register. Add new R8A779A0 compatible string with a new quirk and also
a handler for this quirk which toggles the INEN register in the right
place. INEN register handling is based on "gpio: renesas: Add R8A779A0
V3U support" by Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Hai Pham [Tue, 11 Aug 2020 03:46:34 +0000 (10:46 +0700)]
clk: renesas: Add R8A779A0 clock tables
Add clock tables for R8A779A0 V3U SoC from Linux 5.12,
commit
9f4ad9e425a1 ("Linux 5.12")
Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
--
Marek: - Add .reset_modemr_offset
- Sync tables from Linux 5.12
- Rebase on latest u-boot
Marek Vasut [Tue, 27 Apr 2021 17:52:53 +0000 (19:52 +0200)]
clk: renesas: Handle R8A779A0 V3U clock types in Gen3 clock code
On R8A779A0 V3U SoC, PLL1 and PLL5 use a divider value
from cpg_pll_configs table while PLL{20,21,30,31,4} use
different control offset. Introduce new types to handle
this and handle those types in the Gen3 clock code.
Based on "clk: renesas: Add support for R8A779A0 V3U PLLn"
by Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Tom Rini [Thu, 24 Jun 2021 15:11:13 +0000 (11:11 -0400)]
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-spi into next
- SPI NOT OF partitions (Marek Behún)
- Macronic SPI NAND (Jaime Liao)
- Macronix MX66UW2G345G SPI NOR (zhengxun)
Marek Behún [Wed, 26 May 2021 12:08:26 +0000 (14:08 +0200)]
cmd: mtd: expand <name> argument definition in command help
The <name> argument can now also be MTD's DM device name or OF path.
Mention this is command help.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Marek Behún [Wed, 26 May 2021 12:08:25 +0000 (14:08 +0200)]
mtd: compare also with OF path and device name in get_mtd_device_nm()
The get_mtd_device_nm() function (code imported from Linux) simply
iterates all registered MTD devices and compares the given name with
all MTDs' names.
With SPI_FLASH_MTD enabled U-Boot registers a SPI-NOR as a MTD device
with name identical to the SPI flash chip name (from SPI ID table). Thus
for a board with multiple same SPI-NORs it registers multiple MTDs, but
all with the same name (such as "s25fl164k"). We do not want to change
this behaviour, since such a change could break existing boot scripts,
which can rely on a hardcoded name.
In order to allow somehow to uniqely select a MTD device, change
get_mtd_device_nm() function as such:
- if first character of name is '/', try interpreting it as OF path
- otherwise compare the name with MTDs name and MTDs device name.
In the following example a board has two "s25fl164k" SPI-NORs. They both
have name "s25fl164k", thus cannot be uniquely selected via this name.
With this change, the user can select the second SPI-NOR either with
"spi-nor@1" or "/soc/spi@10600/spi-nor@1".
Example:
=> mtd list
List of MTD devices:
* s25fl164k
- device: spi-nor@0
- parent: spi@10600
- driver: jedec_spi_nor
- path: /soc/spi@10600/spi-nor@0
- type: NOR flash
- block size: 0x1000 bytes
- min I/O: 0x1 bytes
- 0x000000000000-0x000000800000 : "s25fl164k"
* s25fl164k
- device: spi-nor@1
- parent: spi@10600
- driver: jedec_spi_nor
- path: /soc/spi@10600/spi-nor@1
- type: NOR flash
- block size: 0x1000 bytes
- min I/O: 0x1 bytes
- 0x000000000000-0x000000800000 : "s25fl164k"
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Marek Behún [Wed, 26 May 2021 12:08:24 +0000 (14:08 +0200)]
cmd: mtd: print device OF path in listing
Print MTD's device OF path in the output of `mtd list` command.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Marek Behún [Wed, 26 May 2021 12:08:23 +0000 (14:08 +0200)]
mtd: probe SPI NOR devices in mtd_probe_devices()
In order for `mtd list` U-Boot command to list SPI NOR devices without
the need to run `sf probe` before, we have to probe SPI NOR devices in
mtd_probe_devices().
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Marek Behún [Wed, 26 May 2021 12:08:22 +0000 (14:08 +0200)]
mtd: remove mtd_probe() function
The device_probe() function does the same thing as mtd_probe() and
mtd_probe() is only used in mtd_probe_uclass_mtd_devs(), where the
probing can be made simpler by using uclass_foreach_dev_probe macro.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Marek Behún [Wed, 26 May 2021 12:08:21 +0000 (14:08 +0200)]
mtd: spi-nor: fill-in mtd->dev member
Fill in mtd->dev member with nor->dev.
This can be used by MTD OF partition parser.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Marek Behún [Wed, 26 May 2021 12:08:20 +0000 (14:08 +0200)]
mtd: spi-nor: allow registering multiple MTDs when DM is enabled
Currently when the SPI_FLASH_MTD config option is enabled, only one SPI
can be registered as MTD at any time - it is the last one probed (since
with old non-DM model only one SPI NOR could be probed at any time).
When DM is enabled, allow for registering multiple SPI NORs as MTDs by
utilizing the nor->mtd structure, which is filled in by spi_nor_scan
anyway, instead of filling a separate struct mtd_info.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Marek Behún [Wed, 26 May 2021 12:08:19 +0000 (14:08 +0200)]
mtd: add support for parsing partitions defined in OF
Add support for parsing partitions defined in device-trees via the
`partitions` node with `fixed-partitions` compatible.
The `mtdparts`/`mtdids` mechanism takes precedence. If some partitions
are defined for a MTD device via this mechanism, the code won't register
partitions for that MTD device from OF, even if they are defined.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Marek Behún [Wed, 26 May 2021 12:08:18 +0000 (14:08 +0200)]
dm: core: add ofnode_get_path()
Add function for retrieving full node path of a given ofnode.
This uses np->full_name if OF is live, otherwise a call to
fdt_get_path() is made.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Marek Behún [Wed, 26 May 2021 12:08:17 +0000 (14:08 +0200)]
dm: core: add non-translating version of ofnode_get_addr_size_index()
Add functions ofnode_get_addr_size_index_notrans(), which is a
non-translating version of ofnode_get_addr_size_index().
Some addresses are not meant to be translated, for example those of MTD
fixed-partitions.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Tested-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Jaime Liao [Mon, 7 Jun 2021 08:19:15 +0000 (16:19 +0800)]
mtd: spinand: macronix: Add support for serial NAND flash
Macronix NAND Flash devices are available in different configurations
and densities.
MX"35" means SPI NAND
MX35"UF" , UF meands 1.8V
MX35LF"2G" , 2G means 2Gbits
MX35LF2G"E4" , E4 means internal ECC and Quad I/O(x4)
MX35UF4GE4AD/MX35UF2GE4AD/MX35UF1GE4AD are 1.8V 4G/2Gbit serial
NAND flash device with 8-bit on-die ECC
https://www.mxic.com.tw/Lists/Datasheet/Attachments/7983/MX35UF4GE4AD,%201.8V,%204Gb,%20v0.00.pdf
MX35UF2GE4AC/MX35UF1GE4AC are 1.8V 2G/1Gbit serial
NAND flash device with 8-bit on-die ECC
https://www.mxic.com.tw/Lists/Datasheet/Attachments/7974/MX35UF2GE4AC,%201.8V,%202Gb,%20v1.0.pdf
Validated via normal(default) and QUAD mode by read, erase, read back,
on Xilinx Zynq PicoZed FPGA board which included Macronix
SPI Host(drivers/spi/spi-mxic.c).
Signed-off-by: Jaime Liao <jaimeliao@mxic.com.tw>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tom Rini [Wed, 23 Jun 2021 12:46:26 +0000 (08:46 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-x86
- x86: Discard .note.gnu.property sections
- nvme: Skip block device creation for inactive namespaces
- nvme: Convert NVMe doc to reST, and various minor fixes
Tom Rini [Wed, 23 Jun 2021 12:45:29 +0000 (08:45 -0400)]
Merge tag 'mmc-2021-6-22' of https://source.denx.de/u-boot/custodians/u-boot-mmc
- Revert fsl_esdhc_imx using VENDORSPEC_FRC_SDCLK_ON
- Fix data read for dw_mmc
- Increase minimum bus freq for mtk-sd
- Minor cleanup
Tom Rini [Wed, 23 Jun 2021 12:45:09 +0000 (08:45 -0400)]
Merge branch '2021-06-22-assorted-fixes'
- Assorted minor bugfixes
Andy Shevchenko [Thu, 10 Jun 2021 15:08:42 +0000 (18:08 +0300)]
test: Include /sbin to the PATH when creating file system
On some distributions the mkfs is under /sbin and /sbin is not set
for mere users. Include /sbin to the PATH when creating file system,
so that users won't get a scary traceback from Python.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Jaehoon Chung [Mon, 14 Jun 2021 22:16:36 +0000 (07:16 +0900)]
MAINTAINER, git-mailrc: Update the mmc maintainer
Update to me as co-maintainer with Peng.
Additionally, update the mmc alias in git-mailrc.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Tom Rini [Thu, 3 Jun 2021 13:39:02 +0000 (09:39 -0400)]
global_data: Ensure we have <config.h> when symbols are not in Kconfig yet
All symbols that are defined in Kconfig will always be defined (or not)
prior to preprocessing due to the -include directive while building.
However, symbols which are not yet migrated will only be defined (or
not) once the board config.h is included, via <config.h>. While the end
goal must be to migrate all symbols, today we have cases where the size
of gd will get mismatched within the build, based on include order.
Mitigate this by making sure that any <asm/global_data.h> that uses
symbols not in Kconfig does start with <config.h>. Remove this when not
needed.
Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Cc: Huan Wang <alison.wang@nxp.com>
Cc: Angelo Dureghello <angelo@sysam.it>
Cc: Rick Chen <rick@andestech.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 3 Jun 2021 13:39:01 +0000 (09:39 -0400)]
socfpga64: Do not define CONFIG_SYS_MEM_RESERVE_SECURE to 0
Based on the comment in socfpga_soc64_common.h, the intention is for
CONFIG_SYS_MEM_RESERVE_SECURE to be unused. However, in the code we do:
...
and that will evaluate to true. This leads to unwanted code being
compiled. Further, as CONFIG_SYS_MEM_RESERVE_SECURE has not been
migrated to Kconfig, this leads to a mismatch in the size of gd
depending on if we have or have not also had <configs/BOARD.h> also
included yet.
Remove the define as it's not needed.
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Chee Hong Ang <chee.hong.ang@intel.com>
Cc: Dalon Westergreen <dalon.westergreen@intel.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 3 Jun 2021 13:39:00 +0000 (09:39 -0400)]
Revert "powerpc: fix regression in arch_initr_trap()"
With the changes in commit
588efcdd72fc ("powerpc: Don't use relative
include for config.h in global_data.h") fixing the root of the problem,
we no longer need this re-inclusion.
This reverts commit
f6c0d365d3e8ee8e4fd3ebe2ed957c2bca9d3328.
Cc: Matt Merhar <mattmerhar@protonmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 3 Jun 2021 13:38:59 +0000 (09:38 -0400)]
powerpc: Don't use relative include for config.h in global_data.h
As there is an arch/powerpc/include/asm/config.h file using "" to get
config.h here can lead to using that rather than include/config.h. This
in turn can lead to a mismatch in the size of gd.
Cc: Matt Merhar <mattmerhar@protonmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tested-by: Matt Merhar <mattmerhar@protonmail.com>
Heinrich Schuchardt [Sat, 29 May 2021 11:18:00 +0000 (13:18 +0200)]
malloc: add SPDX license identifiers
The original code is in the public domain. Licenses/README states that the
general license for U-Boot is GPL 2.0+. So we can mark the malloc code as
GPL 2.0+ too.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Bin Meng [Tue, 22 Jun 2021 13:16:23 +0000 (21:16 +0800)]
MAINTAINERS: Add an entry for NVMe
This was missed when NVMe support was initially brought to U-Boot
back in 2017. Add an entry for it and list myself as the maintainer.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Bin Meng [Tue, 22 Jun 2021 13:16:22 +0000 (21:16 +0800)]
doc: develop: Convert README.nvme to reST
This converts the existing README.nvme to reST, and puts it under
the develop/driver-model/ directory.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng [Tue, 22 Jun 2021 13:16:21 +0000 (21:16 +0800)]
nvme: Don't clear nvme blk device's priv space
A udevice's priv space is cleared in alloc_priv() in the DM core.
Don't do it again in its probe() routine.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng [Tue, 22 Jun 2021 13:16:20 +0000 (21:16 +0800)]
nvme: Drop useless members of 'struct nvme_ns'
mode_select_num_blocks and mode_select_block_len in 'struct nvme_ns'
are not useful. Drop them.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng [Tue, 22 Jun 2021 13:16:19 +0000 (21:16 +0800)]
nvme: Eliminate the offset of one during block dev creation
At present there is an offset of one added during the creation of
block device. This can be very confusing as we wanted to encode the
namespace id in the block device name but namespae id cannot be zero.
This changes to use the namespace id directly in the block device
name, eliminating the offset of one effectively.
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng [Tue, 22 Jun 2021 13:16:18 +0000 (21:16 +0800)]
nvme: Skip block device creation for inactive namespaces
At present for each namespace there is a block device created for it.
There is no issue if the number of supported namespaces reported from
the NVMe device is only 1.
Since QEMU commit
7f0f1acedf15 ("hw/block/nvme: support multiple namespaces"),
the number of supported namespaces reported has been changed from 1
to 256, but not all of them are active namespaces. The actual active
one depends on the QEMU command line parameters. A common case is
that namespace 1 being active and all other 255 being inactive.
If a namespace is inactive, the namespace identify command returns a
zero filled data structure. We can use field NSZE (namespace size) to
decide whether a block device should be created for it.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng [Tue, 22 Jun 2021 13:16:17 +0000 (21:16 +0800)]
nvme: Move block dev creation from uclass post_probe() to driver probe()
At present the block device creation happens in the NVMe uclass
driver post_probe() phase. In preparation to support multiple
namespaces, we should issue namespace identify before creating
block devices but that touches the underlying hardware hence it
is not appropriate to do such in the uclass driver post_probe().
Let's move it to driver probe() phase instead.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Wesley Sheng [Tue, 22 Jun 2021 03:34:43 +0000 (11:34 +0800)]
nvme: Remove the redundant aqa value setting
AQA (Admin Queue Attributes) register is a dword size with
lower word of ASQS, and higher word of ACQS.
The code set the variable aqa twice, but it is redundant.
Signed-off-by: Wesley Sheng <wesleyshenggit@sina.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Wesley Sheng [Tue, 22 Jun 2021 03:34:21 +0000 (11:34 +0800)]
nvme: Correct the prps per page calculation method
Each prp is 8 bytes, calculate the number of prps
per page should just divide page size by 8
there is no need to minus 1
Signed-off-by: Wesley Sheng <wesleyshenggit@sina.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
David Lamparter [Thu, 6 May 2021 18:24:30 +0000 (20:24 +0200)]
nvme: fix for big endian systems
writel() and co. already include the endian swap; doing the swap twice
is, er, unhelpful.
Tested on a P4080DS, which boots perfectly fine off NVMe with this.
Signed-off-by: David Lamparter <equinox@diac24.net>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Bin Meng [Fri, 18 Jun 2021 07:09:30 +0000 (15:09 +0800)]
x86: Discard .note.gnu.property sections
When switching to kernel.org x86_64 gcc 11.1.0 toolchain, u-boot.rom
built from qemu-x86_defconfig no longer boots anymore. Investigation
shows that U-Boot fails at a very early stage during the boot process,
in fdtdec_prepare_fdt() where fdt_check_header() complains that there
is not a valid device tree found at gd->fdt_blob which points to _end.
Now _end points to an allocated section .note.gnu.property which of
course is wrong.
This issue is however not seen when using the default Ubuntu 20.04 gnu
toolchain (gcc 9.3.0 with binutils 2.34). Further investigation shows
that it is caused by a behavior change of binutils v2.36 which is part
of the kernel.org gcc 11.1.0 toolchain, via the following commit:
939b95c77bf2 ("Linux/x86: Configure gas with --enable-x86-used-note by default")
In fact, there was already a regression bug report [1] for binutils two
months ago, but the binutils folks did not think it is a bug :(
To resolve this, there are several options:
* pass -Wa,-mx86-used-note=no to gas
* pass -R .note.gnu.property to objcopy
* discard the section in the linker script
Linux kernel uses the discard way [2], so let's do the same for U-Boot.
[1] https://sourceware.org/bugzilla/show_bug.cgi?id=27753
[2] commit
4caffe6a28d3 ("x86/vdso: Discard .note.gnu.property sections in vDSO")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Michal Simek [Thu, 27 May 2021 09:40:09 +0000 (11:40 +0200)]
spl: fit: Also record architecture in /fit-images
On ARM64 secure OS can run as 64bit or 32bit that's why it is necessary to
record information about architecture that other code can read it and
properly pass it to TF-A and start in 64bit or 32bit mode.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Simek [Mon, 14 Jun 2021 13:07:07 +0000 (15:07 +0200)]
arm64: zynqmp: Add missing year in Kria dts files
DT files have been added this year but forgot to update it that's why do it
in separate patch now.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 14 Jun 2021 12:58:35 +0000 (14:58 +0200)]
arm64: zynqmp: Add psgtr description to zc1751 dc1 board
Wire psgtr for zc1751 dc1 board.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 3 Jun 2021 08:47:04 +0000 (10:47 +0200)]
arm64: zynqmp: Remove gpio from aliases list
It is not recommended to have aliases for gpio. In past it was used in
Linux for assigning numbers via sysfs which is deprecated and libgpiod
should be used instead.
In U-Boot this number is used for seq number but gpio offset are not
counted from this number. That's why having these aliases only for seq
number is not needed. As is done in Linux it is the best to use full gpio
name instead of sequence number which depends on sequence in binding.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 11 Jun 2021 06:52:25 +0000 (08:52 +0200)]
arm64: zynqmp: Enable USB3.0 for dc2/dc3
Both boards are usb3.0 capable. dc3 was also missing enabling dwc3* nodes.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 11 Jun 2021 06:51:19 +0000 (08:51 +0200)]
arm64: zynqmp: Update usb dwc3 DT description
Align USB nodes with the latest dt-bindings. It is adding resets, new
interrupt and also some quirks.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 10 Jun 2021 15:59:46 +0000 (17:59 +0200)]
arm64: zynqmp: Use overlay sugar syntax for Kria SOM
dtc supports new sugar syntax which is easier compare to previous one
that's why also covert overlays for SOM to it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 10 Jun 2021 16:52:14 +0000 (18:52 +0200)]
arm64: zynqmp: Remove revA compatibility string from kv260 revB/1
kv260-revB is different compare to revA (usbhub is wired via i2c) that's
why remove revA compatible string.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Zhengxun [Fri, 11 Jun 2021 15:10:48 +0000 (15:10 +0000)]
clk: zynq: Add clock wizard driver
The Clocking Wizard IP supports clock circuits customized
to your clocking requirements. The wizard support for
dynamically reconfiguring the clocking primitives for
Multiply, Divide, Phase Shift/Offset, or Duty Cycle.
Limited by U-Boot clk uclass without set_phase API, this
patch only provides set_rate to modify the frequency.
Signed-off-by: Zhengxun <zhengxunli.mxic@gmail.com>
Reviewed-by: Sean Anderson <sean.anderson@seco.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 7 Jun 2021 10:37:32 +0000 (12:37 +0200)]
arm64: zynqmp: Add support for 64bit addresses in its
Xilinx ZynqMP supports also addresses above 4GB (32bit) that's why also
generate u-boot.its with 64bit load/entry addresses to also support
different configurations.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 3 Jun 2021 13:18:04 +0000 (15:18 +0200)]
arm64: zynqmp: Sync psgtr location on zcu104/zcu111/zc1751-dc1
psgtr node should be below pinctrl for easier comparion among dts files.
That's why move that nodes to different location.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 3 Jun 2021 12:12:05 +0000 (14:12 +0200)]
arm64: zynqmp: Remove information about dma clock on zcu106
Clock setting is not static anymore that's why it depends on firmware setup
that's why remove this comment.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 3 Jun 2021 11:46:27 +0000 (13:46 +0200)]
arm64: zynqmp: Remove unused property from SD/USB
Linux kernel is not using these properties that's why they can be removed.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 3 Jun 2021 10:32:18 +0000 (12:32 +0200)]
arm64: zynqmp: Remove can aliases from zc1751
Networking subsystem is not using aliases that's why remove them for CAN
devices. There is also no any other Xilinx ZynqMP DT file with them.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 3 Jun 2021 09:58:08 +0000 (11:58 +0200)]
arm64: zynqmp: Remove si5328 and si5382 nodes
There are no drivers for these devices that's why remove that nodes
completely. This change is done based on Linux kernel.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/20210308115437.2232847-1-quanyang.wang@windriver.com
Michal Simek [Thu, 3 Jun 2021 09:46:50 +0000 (11:46 +0200)]
xilinx: Convert xlnx,eeprom property to nvmem alias
Convert all boards to use nvmem alias instead of xlnx,eeprom. The change is
done based on discussion in the link below.
Link: https://lore.kernel.org/r/CAL_JsqLMDqpkyg-Q7mUfw-XH67-v068Q6e9wTq2UOoN=0-_coQ@mail.gmail.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Srinivas Neeli [Mon, 8 Mar 2021 08:35:19 +0000 (14:05 +0530)]
arm64: zynqmp: rtc: Update rtc calibration value
As per the design specification
"The 16-bit Seconds Calibration Value represents the number of
Oscillator Ticks that are required to measure the largest time
period that is less than or equal to 1 second.
For an oscillator that is 32.768 KHz, this value will be 0x7FFF."
Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 1 Jun 2021 14:42:50 +0000 (16:42 +0200)]
arm64: zynqmp: Sync psgtr location on zcu100/zcu106
psgtr node should be below pinctrl for easier comparion among dts files.
That's why move that nodes to different location.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 1 Jun 2021 14:42:02 +0000 (16:42 +0200)]
arm64: zynqmp: Sync dp port location on zc1751 dc4
Historically dpdma and dpsub are placed at the end of files. Move nodes
there for easier comparison among dts files.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 1 Jun 2021 14:40:43 +0000 (16:40 +0200)]
arm64: zynqmp: Remove unused dp_aclk clock
dp_aclk is not used anywhere that's why remove it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 1 Jun 2021 14:37:32 +0000 (16:37 +0200)]
arm64: zynqmp: Remove addition newline from zc1751 dc1
Trivial patch.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 31 May 2021 15:51:58 +0000 (17:51 +0200)]
arm64: zynqmp: Add maximum-speed property for dwc3 nodes
dwc3 can be used only for higher speeds than super-speed that's why
explicitly set it up.
This is also aligned with other ZynqMP dts files.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 31 May 2021 15:44:51 +0000 (17:44 +0200)]
arm64: zynqmp: Remove additional header from zc1232 DT
Remove unused phy.h from zc1232 DTS.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 31 May 2021 12:41:23 +0000 (14:41 +0200)]
zynqmp: Remove u-boot,dm-pre-reloc for uart instances
Uarts already have u-boot,dm-pre-reloc via zynqmp.dtsi that's why there is
no need to have them in platform DT files too.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 31 May 2021 09:06:59 +0000 (11:06 +0200)]
zynqmp: Pass bl32 entry to TF-A via xilinx handoff structure
There is need to pass entry about secure OS when bl32_entry is defined.
Currently only 64bit support is added but /fit-images node have been
extended to also record if this is 32bit or 64bit secure OS. When this is
tested the code will be update to support this configuration too.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 31 May 2021 09:13:45 +0000 (11:13 +0200)]
zynqmp: Generate u-boot.its also with TEE dynamically
The first change is to trying to find out TF-A load address based on
reading elf file. Expectation is that bl31.bin is in the same folder as
bl31.elf. It brings new flexibility to place TF-A to any address (DDR
included).
And also enable TEE generation also with TEE configuration.
Expecation is the same as above that tee.bin and tee.elf are in the same
folder.
User has to just define link to BL31/BL32 binary files and the rest should
be handled by the script.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 31 May 2021 09:03:19 +0000 (11:03 +0200)]
zynqmp: Do not place u-boot to reserved memory location
TF-A and SecureOS can allocate the part of DDR for self but U-Boot is not
handling this configuration that the part of memory is reserved and
shouldn't be used by U-Boot. That's why read all reserved memory locations
and don't use it.
The code was taken from commit
4a1b975dac02 ("board: stm32mp1: reserve
memory for OP-TEE in device tree") and commit
1419e5b5167e ("stm32mp:
update MMU config before the relocation") which is used by stm32 and does
the job properly.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 31 May 2021 08:38:30 +0000 (10:38 +0200)]
zynqmp: Enable regulators
Enable command and fixed regulators. XDP platform is using them.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 31 May 2021 07:50:01 +0000 (09:50 +0200)]
arm64: zynqmp: Update Copyright years to 2021
Trivial change for all files I have touched recently.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 31 May 2021 07:42:08 +0000 (09:42 +0200)]
arm64: zynqmp: Add label for zynqmp_ipi
Add label which is used by bootloader for adding bootloader specific flag.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/3dc8416abdd3498e61edcd83830a12af295c5c6d.1611224800.git.michal.simek@xilinx.com
Michal Simek [Thu, 27 May 2021 11:44:35 +0000 (13:44 +0200)]
arm64: zynqmp: Move DP nodes to the end of file (zcu106)
Just sync it with others for easier comparison.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 27 May 2021 11:49:05 +0000 (13:49 +0200)]
arm64: zynqmp: Add reset description for sata
Sata needs to get reset before configuration that's why add property for it
there.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Stefano Stabellini [Wed, 5 May 2021 21:18:21 +0000 (14:18 -0700)]
arm64: zynqmp: Add missing SMID for pcie to zynqmp.dtsi
The SMMU is disabled in device tree so this change has no impact.
The benefit is that this way it is in sync with xen.dtsi. Xen enables
the SMMU and makes use of it.
Signed-off-by: Stefano Stabellini <stefano.stabellini@xilinx.com>
Michal Simek [Mon, 11 May 2020 08:14:34 +0000 (10:14 +0200)]
arm64: zynqmp: Disable CCI by default
There is no reason to have CCI no enabled by default. Enable it when your
system configuration requires it. In Xilinx configuration flow this is
work for Device Tree Generator which reads information from HW Design
configuration.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 31 May 2021 07:56:58 +0000 (09:56 +0200)]
arm64: zynqmp: Update psgtr clocks index for boards
Update the psgtr clock indexing for couple of zynqmp boards.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 19 May 2021 13:16:19 +0000 (15:16 +0200)]
arm64: zynqmp: Handle MMC seq number based on boot device
K26 has EMMC and SD and default 0 is not working when system is booting out
of SD which is controller 1. Add controller autodetection via
mmc_get_env_dev(). The same code is used for distro_boot selection done in
board_late_init(). bootseq variable can't be reused because this is called
so late.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 19 May 2021 11:02:20 +0000 (13:02 +0200)]
arm64: zynqmp: Add psu_init_gpl for k26 boards
Add psu_init_gpl file for getting SPL to work directly from the tree.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 26 Nov 2020 13:25:01 +0000 (14:25 +0100)]
ARM: zynq: Rename bus to be align with simple-bus yaml
Rename amba to AXI. Based on Xilinx Zynq TRM (Chapter 5) chip is "AXI
point-to-point channels for communicating addresses, data, and response
transactions between master and slave clients. This ARM AMBA 3.0..."
Issues are reported as:
.. amba: $nodename:0: 'amba' does not match
'^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
>From schema:
../github.com/devicetree-org/dt-schema/dtschema/schemas/simple-bus.yaml
Similar change has been done for Xilinx ZynqMP SoC.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/8a4bc80debfbb79c296e76fc1e4c173e62657286.1606397101.git.michal.simek@xilinx.com
Michal Simek [Tue, 11 May 2021 11:59:01 +0000 (13:59 +0200)]
arm64: zynqmp: Enable gpio driver for zcu1275/zcu1285
Enable gpio driver on these boards. GPIOs can be used on any board.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 5 Oct 2020 07:35:40 +0000 (09:35 +0200)]
arm64: zynqmp: Add support for SVD devices
SVDs are using different name which can't be handled via zynqmp_devices
structure. That's why introduce zynqmp_detect_svd_name() which checks ID
code for these devices and show proper name for them.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 13 May 2021 11:58:58 +0000 (13:58 +0200)]
arm64: zynqmp: Enable EFI secure boot
Enabling EFI secure boot which is required for EBBR specification.
Enabling this will fix
"RT.SetVariable - Create one Time Base Auth Variable, the expect return
status should be EFI_SUCCESS"
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
T Karthik Reddy [Thu, 29 Apr 2021 14:02:30 +0000 (08:02 -0600)]
arm64: xilinx: Set CONFIG_ZYNQMP_FIRMWARE config for mini emmc
CONFIG_ZYNQMP_FIRMWARE enables zynqmp firmware driver.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Ashok Reddy Soma [Thu, 15 Apr 2021 11:12:15 +0000 (05:12 -0600)]
arm64: zynqmp: Fix application loading on R5 core1
From U-Boot, loading application on RPU core 0 is fine but loading on
core 1 is not handled properly. Lock-step mode needs both the R5 cores
to be initialized and it is working fine. Whereas in SPLIT mode individual
R5 cores needs to be initialized as they need to execute differenet
applications. Handle both these lock-step and split modes by propagating
mode and RPU core number(4 for RPU0 and 5 for RPU1) for various functions
and by adding conditions in those functions.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 26 Nov 2020 13:25:03 +0000 (14:25 +0100)]
ARM: zynq: Fix OCM mapping to be aligned with binding on zc702
The Linux commit
f69629919942 ("dt-bindings: sram: Convert SRAM bindings to
json-schema") converted binding to yaml and some missing required
properties started to be reported. Align binding based on it.
The patch is fixing these warnings:
.../zynq-zc702.dt.yaml: sram@
fffc0000: '#address-cells' is a required property
.../zynq-zc702.dt.yaml: sram@
fffc0000: '#size-cells' is a required property
.../zynq-zc702.dt.yaml: sram@
fffc0000: 'ranges' is a required property
>From schema: .../Documentation/devicetree/bindings/sram/sram.yaml
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/87c02786ccd8d7827827a9d95a8737bb300caeb0.1606397101.git.michal.simek@xilinx.com
Michal Simek [Thu, 26 Nov 2020 13:25:04 +0000 (14:25 +0100)]
ARM: zynq: Convert at25 binding to new description on zc770-xm013
The Linux commit
f8f79fa6bb25 ("dt-bindings: at25: convert the binding
document to yaml") converted binding to yaml and 3 deprecated properties
pop up.
The patch is fixing these warnings:
.../zynq-zc770-xm013.dt.yaml: eeprom@2: 'pagesize' is a required property
.../zynq-zc770-xm013.dt.yaml: eeprom@2: 'size' is a required property
.../zynq-zc770-xm013.dt.yaml: eeprom@2: 'address-width' is a required property
>From schema: .../Documentation/devicetree/bindings/eeprom/at25.yaml
by converting them to new binding.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/be2c1125d98386033e182012eb08986924707a76.1606397101.git.michal.simek@xilinx.com
Jorge Ramirez-Ortiz [Sun, 13 Jun 2021 18:55:53 +0000 (20:55 +0200)]
zynqmp: spl: support DRAM ECC initialization
Use the ZDMA channel 0 to initialize the DRAM banks. This avoid
spurious ECC errors that can occur when accessing unitialized memory.
The feature is enabled by setting the option
CONFIG_SPL_ZYNQMP_DRAM_ECC_INIT and providing the following data:
SPL_ZYNQMP_DRAM_BANK1_BASE: start of memory to initialize
SPL_ZYNQMP_DRAM_BANK1_LEN : len of memory to initialize (hex)
SPL_ZYNQMP_DRAM_BANK2_BASE: start of memory to initialize
SPL_ZYNQMP_DRAM_BANK2_LEN : len of memory to initialize (hex)
Setting SPL_ZYNQMP_DRAM_BANK_LEN to 0 takes no action.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 2 Jun 2021 10:40:45 +0000 (12:40 +0200)]
gpio: pca953x: Add missing i2c dependency
pca953x also depends on i2c that's why add dependency to Kconfig.
Where GPIO is enabled but I2C compilation error pops up.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Jan Kiszka [Sun, 20 Jun 2021 20:29:13 +0000 (22:29 +0200)]
Makefile: Adjust indention of GENENV quiet output
The column width for a command name is 8.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Da Xue [Tue, 22 Jun 2021 02:39:19 +0000 (22:39 -0400)]
autoboot: fix typos of CONFIG_AUTOBOOT_USE_MENUKEY
Replace typo CONFIG_USE_AUTOBOOT_MENUKEY with
CONFIG_AUTOBOOT_USE_MENUKEY as when they were introduced initially there
was some mismatch in which name was used where.
Fixes:
8fc31e23aa83 ("autoboot: Rename CONFIG_MENUKEY to CONFIG_AUTOBOOT_MENUKEY")
Signed-off-by: Da Xue <da@libre.computer>
Christian Melki [Mon, 7 Jun 2021 09:21:15 +0000 (11:21 +0200)]
disk/part_dos.c: Fix a variable typo in write_mbr_partitions()
This function is passed *dev not *dev_desc, so pass the right name to
part_init().
Fixes:
f14c5ee5ab8b ("disk: part_dos: update partition table entries after write")
Signed-off-by: Christian Melki <christian.melki@t2data.com>
Bin Meng [Mon, 21 Jun 2021 23:33:21 +0000 (07:33 +0800)]
azure: Use msys2
20210604 installer for Windows build
MSYS2 Windows build started to fail since yesterday (Jun 21):
checking keyring...
checking package integrity...
error: gcc-libs: signature from "David Macek <david.macek.0@gmail.com>" is unknown trust
:: File /var/cache/pacman/pkg/gcc-libs-10.2.0-1-x86_64.pkg.tar.zst is corrupted (invalid or corrupted package (PGP signature)).
error: gcc: signature from "David Macek <david.macek.0@gmail.com>" is unknown trust
:: File /var/cache/pacman/pkg/gcc-10.2.0-1-x86_64.pkg.tar.zst is corrupted (invalid or corrupted package (PGP signature)).
error: failed to commit transaction (invalid or corrupted package)
Errors occurred, no packages were upgraded.
Switching to the latest installer (version
20210604) seems to fix it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Tom Rini <trini@konsulko.com>
zhengxun [Tue, 23 Mar 2021 13:16:47 +0000 (13:16 +0000)]
mtd: spi-nor-ids: Add Macronix MX66UW2G345G
The MX66UW2G345G is Macronix Flash with SINGLE and OCTAL I/O. Hence,
add SPI_NOR_OCTAL_READ flag for this flash.
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
[jagan: change order of id flags]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: zhengxun <zhengxunli.mxic@gmail.com>
Fabio Estevam [Mon, 7 Jun 2021 20:40:09 +0000 (17:40 -0300)]
Revert "mmc: fsl_esdhc_imx: use VENDORSPEC_FRC_SDCLK_ON to control card clock output"
This reverts commit
63756575b42b8b4fb3f59cbbf0cedf03331bc2d2.
Since this commit a imx6qdl-pico board boots extremely slowly
in both SPL as well as U-Boot proper.
Fix this regression by reverting the offending commit for now.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Pierre-Jean Texier <texier.pj2@gmail.com>
Jaehoon Chung [Sun, 30 May 2021 23:31:50 +0000 (08:31 +0900)]
mmc: mmc-uclass: change to static about dm function
Change to static about dm function.
They can be used with wrapper functions.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Jaehoon Chung [Sun, 30 May 2021 23:31:49 +0000 (08:31 +0900)]
mmc: fsl_esdhc_imx: use mmc_send_cmd instead of dm_mmc_send_cmd
Use mmc_send_cmd instead of dm_mmc_send_cmd.
It doesn't need to distinguish this function.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reuben Dowle [Thu, 13 May 2021 22:15:43 +0000 (10:15 +1200)]
mmc: Update environment variable with active partition
This patch allows uboot scripts make choices about where to boot from based
on the active mmc boot partition. This allows having two copies of kernel,
filesystems etc, and choosing which to boot from based off of the active
bootloader partition.
Signed-off-by: Reuben Dowle <reuben.dowle@4rf.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Ley Foon Tan [Mon, 26 Apr 2021 05:17:46 +0000 (13:17 +0800)]
mmc: dwmmc: socfpga: Get "fifo-mode" property from DT
Add FIFO mode support for SoCFPGA dwmmc, read "fifo-mode" property from DT.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Ley Foon Tan [Mon, 26 Apr 2021 03:35:05 +0000 (11:35 +0800)]
mmc: dw_mmc: Fixes data read when receiving DTO interrupt in FIFO mode
The data read is not working when using FIFO mode.
From DesignWare databook, when a Data_Transfer_Over (DTO) interrupt is
received, the software should read the remaining data from FIFO.
Add DTO interrupt checking on data read path and clear interrupts before
start reading from FIFO. So, it doesn't clear the next pending
interrupts unintentionally after read from FIFO.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Weijie Gao [Tue, 20 Apr 2021 08:37:10 +0000 (16:37 +0800)]
mmc: mtk-sd: increase the minimum bus frequency
With a 48MHz input clock, the lowest bus frequency can be as low as
48000000 / (4 * 4095) = 2930Hz. Such an extremely low frequency will cause
the mmc framework take seconds to finish the initialization.
Limiting the minimum bus frequency to a slightly higher value can solve the
issue without any side effects.
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Vignesh Raghavendra [Mon, 14 Jun 2021 08:42:39 +0000 (14:12 +0530)]
ARM: dts: k3-j7200-common-proc-board-u-boot.dtsi: Fix dtc warnings
Fix following dtc warning by explicitly setting up #size-cells
and #address-cells when overriding node in -u-boot.dtsi
arch/arm/dts/k3-j7200-common-proc-board.dtb: Warning (reg_format):
/bus@100000/bus@
28380000/mcu-navss/ringacc@
2b800000:reg: property has
invalid length (80 bytes) (#address-cells == 2, #size-cells == 1)
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Andrey Zhizhikin [Sat, 1 May 2021 20:23:04 +0000 (22:23 +0200)]
imx8mm: configs: enable distro default features
imx8mm ekv has been switched to use distro boot commands, but had no
correct options enabled to support sysboot.
According to the README.distro, sysboot is consindered to be a
recommended way of using distro boot commands, it required default distro
features to be enabled instead of only those that are relevant to the boot
script.
Replace the boot script specific options in the config to a default distro
option.
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
Cc: Peng Fan <peng.fan@nxp.com>
Fixes:
2df8930bf9 ("imx8mm: configs: add support for distro boot commands")
Reviewed-by: Fabio Estevam <festevam@gmail.com>