platform/upstream/llvm.git
2 years ago[HWASan] do not replace lifetime intrinsics with tagged address.
Florian Mayer [Thu, 10 Mar 2022 23:17:26 +0000 (15:17 -0800)]
[HWASan] do not replace lifetime intrinsics with tagged address.

Quote from the LLVM Language Reference
  If ptr is a stack-allocated object and it points to the first byte of the
  object, the object is initially marked as dead. ptr is conservatively
  considered as a non-stack-allocated object if the stack coloring algorithm
  that is used in the optimization pipeline cannot conclude that ptr is a
  stack-allocated object.

By replacing the alloca pointer with the tagged address before this change,
we confused the stack coloring algorithm.

Reviewed By: eugenis

Differential Revision: https://reviews.llvm.org/D121835

2 years ago[RISCV][NFC] Add tests to address invalid arch dependencies.
Zakk Chen [Fri, 18 Mar 2022 08:46:11 +0000 (01:46 -0700)]
[RISCV][NFC] Add tests to address invalid arch dependencies.

Improve test converage.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D121578

2 years ago[flang][Parser] Add a node for individual sections in sections construct
Shraiysh Vaishay [Fri, 18 Mar 2022 15:07:25 +0000 (20:37 +0530)]
[flang][Parser] Add a node for individual sections in sections construct

This patch adds parser nodes for each indivudual section in sections
construct. This should help with the translation to FIR. `!$omp section`
was not recognized as a construct and hence needed special handling.

`OpenMPSectionsConstruct` contains a list of `OpenMPConstruct`. Each
such `OpenMPConstruct` wraps an `OpenMPSectionConstruct`
(section, not sections). An `OpenMPSectionConstruct` is a wrapper around
a `Block`.

Reviewed By: kiranchandramohan, peixin

Differential Revision: https://reviews.llvm.org/D121680

2 years ago[ARM][AArch64] generate subtarget feature flags
Tomas Matheson [Wed, 23 Feb 2022 11:34:41 +0000 (11:34 +0000)]
[ARM][AArch64] generate subtarget feature flags

Reland of D120906 after sanitizer failures.

This patch aims to reduce a lot of the boilerplate around adding new subtarget
features. From the SubtargetFeatures tablegen definitions, a series of calls to
the macro GET_SUBTARGETINFO_MACRO are generated in
ARM/AArch64GenSubtargetInfo.inc.  ARMSubtarget/AArch64Subtarget can then use
this macro to define bool members and the corresponding getter methods.

Some naming inconsistencies have been fixed to allow this, and one unused
member removed.

This implementation only applies to boolean members; in future both BitVector
and enum members could also be generated.

Differential Revision: https://reviews.llvm.org/D120906

2 years ago[lldb] Remove lldb/lldb subdir created by wrong patch level
Jonas Devlieghere [Fri, 18 Mar 2022 16:06:11 +0000 (09:06 -0700)]
[lldb] Remove lldb/lldb subdir created by wrong patch level

Bad application of patch -p<level>.

2 years ago[OpenMP][FIX] Make test check lines less strict
Johannes Doerfert [Fri, 18 Mar 2022 15:51:33 +0000 (10:51 -0500)]
[OpenMP][FIX] Make test check lines less strict

The ppc64be bot emits the dtor metadata first for some reason. We should
investigate this or make the _cc_ update script able to use variables
instead of fixed numbers (e.g., !1). The IR update script does that
already.

2 years ago[MLIR][SCF] Create selects from if yield results which are not defined in the body
William S. Moses [Thu, 17 Mar 2022 19:31:05 +0000 (15:31 -0400)]
[MLIR][SCF] Create selects from if yield results which are not defined in the body

Previously, the canonicalizer to create ifs from selects would only work
if the if did not have a body other than yielding. This patch upgrade the functionality
to be able to create selects from any if result whose operands are not defined
within the body.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D121943

2 years ago[InstCombine] add tests for bswap with shifted operand; NFC
Sanjay Patel [Fri, 18 Mar 2022 14:33:11 +0000 (10:33 -0400)]
[InstCombine] add tests for bswap with shifted operand; NFC

2 years ago[NFC][mlir] Run clang-format on file.
Eric Schweitz [Fri, 18 Mar 2022 15:19:37 +0000 (08:19 -0700)]
[NFC][mlir] Run clang-format on file.

2 years ago[mlir] Add support for the nest attribute to the LLVM-IR dialect conversion.
Eric Schweitz [Thu, 17 Mar 2022 20:22:36 +0000 (13:22 -0700)]
[mlir] Add support for the nest attribute to the LLVM-IR dialect conversion.

Differential Revision: https://reviews.llvm.org/D121948

2 years agotsan: print signal num in errno spoiling reports
Dmitry Vyukov [Fri, 18 Mar 2022 06:24:00 +0000 (07:24 +0100)]
tsan: print signal num in errno spoiling reports

For errno spoiling reports we only print the stack
where the signal handler is invoked. And the top
frame is the signal handler function, which is supposed
to give the info for debugging.
But in same cases the top frame can be some common thunk,
which does not give much info. E.g. for Go/cgo it's always
runtime.cgoSigtramp.

Print the signal number.
This is what we can easily gather and it may give at least
some hints regarding the issue.

Reviewed By: melver, vitalybuka

Differential Revision: https://reviews.llvm.org/D121979

2 years ago[gn build] Port a36c2dd6d54c
LLVM GN Syncbot [Fri, 18 Mar 2022 14:44:37 +0000 (14:44 +0000)]
[gn build] Port a36c2dd6d54c

2 years ago[flang] Lower select case statement
Valentin Clement [Fri, 18 Mar 2022 14:39:57 +0000 (15:39 +0100)]
[flang] Lower select case statement

This patch adds lowering for the `select case`
statement.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: jeanPerier

Differential Revision: https://reviews.llvm.org/D122007

Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Co-authored-by: V Donaldson <vdonaldson@nvidia.com>
2 years ago[BasicAA] Account for wrapping when using abs(VarIndex) >= abs(Scale).
Florian Hahn [Fri, 18 Mar 2022 14:41:15 +0000 (14:41 +0000)]
[BasicAA] Account for wrapping when using abs(VarIndex) >= abs(Scale).

The patch adds an extra check to only set MinAbsVarIndex if
abs(V * Scale) won't wrap. In the absence of IsNSW, try to use the
bitwidths of the original V and Scale to rule out wrapping.

Attempt to model https://alive2.llvm.org/ce/z/HE8ZKj

The code in the else if below probably needs the same treatment, but I
need to come up with a test first.

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D121695

2 years ago[clang][dataflow] Add modeling of Chromium's CHECK functionality
Yitzhak Mandelbaum [Wed, 9 Mar 2022 20:14:43 +0000 (20:14 +0000)]
[clang][dataflow] Add modeling of Chromium's CHECK functionality

Chromium's implementation of assertions (`CHECK`, `DCHECK`, etc.) are not
annotated with "noreturn", by default. This patch adds a model of the logical
implications of successfully executing one of these assertions.

Differential Revision: https://reviews.llvm.org/D121797

2 years ago[SLP][X86] Add baseline SSE2 test run to lookahead.ll
Simon Pilgrim [Fri, 18 Mar 2022 14:26:54 +0000 (14:26 +0000)]
[SLP][X86] Add baseline SSE2 test run to lookahead.ll

2 years ago[FPEnv][InstSimplify] Teach CannotBeNegativeZero() about constrained intrinsics.
Kevin P. Neal [Fri, 18 Mar 2022 14:22:15 +0000 (10:22 -0400)]
[FPEnv][InstSimplify] Teach CannotBeNegativeZero() about constrained intrinsics.

Currently some optimizations are disabled because llvm::CannotBeNegativeZero()
does not know how to deal with the constrained intrinsics. This patch fixes
that by extending the existing implementation.

Differential Revision: https://reviews.llvm.org/D121483

2 years ago[clang-format] Refactor ShouldBreakBeforeBrace to use switch. NFC.
Marek Kurdej [Fri, 18 Mar 2022 14:07:55 +0000 (15:07 +0100)]
[clang-format] Refactor ShouldBreakBeforeBrace to use switch. NFC.

2 years ago[clang][SVE] Add support for bitwise operators on SVE types
David Truby [Mon, 7 Mar 2022 15:09:46 +0000 (15:09 +0000)]
[clang][SVE] Add support for bitwise operators on SVE types

This patch implements support for the &, |, ^, and ~ operators on sizeless SVE
types.

Differential Revision: https://reviews.llvm.org/D121119

2 years agoAdd validation for number of arguments of __builtin_memcpy_inline
Roy Jacobson [Fri, 18 Mar 2022 13:20:49 +0000 (13:20 +0000)]
Add validation for number of arguments of __builtin_memcpy_inline

__builtin_memcpy_inline doesn't use the usual builtin argument validation code,
so it crashed when receiving wrong number of argument. Add the missing validation
check.

Open issue: https://github.com/llvm/llvm-project/issues/52949

Reviewed By: gchatelet

Differential Revision: https://reviews.llvm.org/D121965

Committed by gchatelet on behalf of "Roy Jacobson <roi.jacobson1@gmail.com>"

2 years ago[clang-format] Expect instead of setting the same value in tests. NFC.
Marek Kurdej [Fri, 18 Mar 2022 14:01:18 +0000 (15:01 +0100)]
[clang-format] Expect instead of setting the same value in tests. NFC.

2 years ago[clang-format] Use range-for loop. NFC.
Marek Kurdej [Fri, 18 Mar 2022 14:01:07 +0000 (15:01 +0100)]
[clang-format] Use range-for loop. NFC.

2 years ago[clang-format] Refactor BreakableBlockComment constructor. NFC.
Marek Kurdej [Fri, 18 Mar 2022 14:00:35 +0000 (15:00 +0100)]
[clang-format] Refactor BreakableBlockComment constructor. NFC.

2 years ago[LowerConstantIntrinsics] Make TLI a required dependency
Nikita Popov [Fri, 18 Mar 2022 13:47:22 +0000 (14:47 +0100)]
[LowerConstantIntrinsics] Make TLI a required dependency

The way the pass is actually used in the optimization pipeline,
TLI will be available, but this is not the case when running just
-lower-constant-intrinsics in tests, which ends up being quite
confusing.

Require TLI unconditionally, as we usually do.

2 years ago[flang] Lower length on character storage
Valentin Clement [Fri, 18 Mar 2022 13:49:34 +0000 (14:49 +0100)]
[flang] Lower length on character storage

This patch adds lowering for SetLength used to set
different length on character storage around calls where
the dummy and actual length differ.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: PeteSteinfeld

Differential Revision: https://reviews.llvm.org/D122000

Co-authored-by: Jean Perier <jperier@nvidia.com>
2 years ago[LowerConstantIntrinsics] Add test for objectsize of malloc (NFC)
Nikita Popov [Fri, 18 Mar 2022 13:49:42 +0000 (14:49 +0100)]
[LowerConstantIntrinsics] Add test for objectsize of malloc (NFC)

This is currently not folded with a plain -lower-constant-intrinsics
invocation, because TLI is an optional dependency.

2 years ago[flang][NFC] Add lowering tests
Valentin Clement [Fri, 18 Mar 2022 13:47:42 +0000 (14:47 +0100)]
[flang][NFC] Add lowering tests

Add couple of tests for the lowering.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: PeteSteinfeld

Differential Revision: https://reviews.llvm.org/D121991

Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Co-authored-by: V Donaldson <vdonaldson@nvidia.com>
2 years ago[flang] Lower statement function
Valentin Clement [Fri, 18 Mar 2022 13:46:10 +0000 (14:46 +0100)]
[flang] Lower statement function

This patch adds lowering to suppoert statement functions

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: PeteSteinfeld

Differential Revision: https://reviews.llvm.org/D121990

Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
2 years ago[OpenMPRuntime] Specify correct pointer type
Nikita Popov [Fri, 18 Mar 2022 13:24:19 +0000 (14:24 +0100)]
[OpenMPRuntime] Specify correct pointer type

Rather than specifying a dummy type in EmitLoadOfPointer() and
then casting it to the correct one, we should instead specify the
correct type and cast beforehand. Otherwise the computed alignment
will be incorrect.

2 years ago[BOLT] LongJmp speedup refactoring
Vladislav Khmelevsky [Wed, 16 Mar 2022 16:45:38 +0000 (19:45 +0300)]
[BOLT] LongJmp speedup refactoring

Run tentativeLayoutRelocMode twice only if UseOldText option was passed.
Refactor BF loop to break on condtition met.

Differential Revision: https://reviews.llvm.org/D121825

2 years ago[gn build] Port f83d833e41d7
LLVM GN Syncbot [Fri, 18 Mar 2022 12:43:27 +0000 (12:43 +0000)]
[gn build] Port f83d833e41d7

2 years ago[gn build] (manually) port a954ade8ed4 (gen X86GenMnemonicTables.inc)
Nico Weber [Fri, 18 Mar 2022 12:42:36 +0000 (08:42 -0400)]
[gn build] (manually) port a954ade8ed4 (gen X86GenMnemonicTables.inc)

2 years ago[gn build] (semiautomatically) port fdcb256f9796
Nico Weber [Fri, 18 Mar 2022 12:39:12 +0000 (08:39 -0400)]
[gn build] (semiautomatically) port fdcb256f9796

2 years ago[lldb] Require x86 target for NativePDB test
David Spickett [Fri, 18 Mar 2022 12:29:50 +0000 (12:29 +0000)]
[lldb] Require x86 target for NativePDB test

This test would fail if you only build for example,
just the AArch64 backend, due to the x86 triple.

2 years agoRevert "[gn build] (manually) port 6316129e066e"
Nico Weber [Fri, 18 Mar 2022 12:26:46 +0000 (08:26 -0400)]
Revert "[gn build] (manually) port 6316129e066e"

This reverts commit 5f4a334ded90f80ca16ceb2bf784c62806ee23d1.
6316129e066e was reverted in 112aafcaf425.

2 years ago[Clang] Support multiple attributes in a single pragma
Egor Zhdan [Tue, 8 Mar 2022 22:45:28 +0000 (22:45 +0000)]
[Clang] Support multiple attributes in a single pragma

This adds support for multiple attributes in `#pragma clang attribute push`, for example:

```
```
or
```
```

Related attributes can now be applied with a single pragma, which makes it harder for developers to make an accidental error later when editing the code.

rdar://78269653

Differential Revision: https://reviews.llvm.org/D121283

2 years agoRevert "[ARM][AArch64] generate subtarget feature flags"
Tomas Matheson [Fri, 18 Mar 2022 11:58:02 +0000 (11:58 +0000)]
Revert "[ARM][AArch64] generate subtarget feature flags"

This reverts commit dd8b0fecb95df7689aac26c2ef9ebd1f527f9f46.

2 years ago[AArch64] Custom lower concat(v4i8 load, ...)
David Green [Fri, 18 Mar 2022 11:58:02 +0000 (11:58 +0000)]
[AArch64] Custom lower concat(v4i8 load, ...)

We already have custom lowering for v4i8 load, which loads as a f32,
converts to a vector and bitcasts and extends the result to a v4i16.
This adds some custom lowering of concat(v4i8 load, ...) to keep the
result as an f32 and create a buildvector of the resulting f32 loads.
This helps not create all the extends and bitcasts, which are often
difficult to fully clean up.

Differential Revision: https://reviews.llvm.org/D121400

2 years ago[libc++][ranges] Implement ranges::min
Nikolas Klauser [Fri, 18 Mar 2022 01:57:08 +0000 (02:57 +0100)]
[libc++][ranges] Implement ranges::min

Reviewed By: var-const, Mordante, #libc

Spies: jwakely, ldionne, libcxx-commits, mgorny

Differential Revision: https://reviews.llvm.org/D119589

2 years ago[ARM][AArch64] generate subtarget feature flags
Tomas Matheson [Wed, 23 Feb 2022 11:34:41 +0000 (11:34 +0000)]
[ARM][AArch64] generate subtarget feature flags

This patch aims to reduce a lot of the boilerplate around adding new subtarget
features. From the SubtargetFeatures tablegen definitions, a series of calls to
the macro GET_SUBTARGETINFO_MACRO are generated in
ARM/AArch64GenSubtargetInfo.inc.  ARMSubtarget/AArch64Subtarget can then use
this macro to define bool members and the corresponding getter methods.

Some naming inconsistencies have been fixed to allow this, and one unused
member removed.

This implementation only applies to boolean members; in future both BitVector
and enum members could also be generated.

Differential Revision: https://reviews.llvm.org/D120906

2 years ago[CostModel][X86] Update RUN -passes=* to double quotes to appease update scripts...
Simon Pilgrim [Fri, 18 Mar 2022 11:44:07 +0000 (11:44 +0000)]
[CostModel][X86] Update RUN -passes=* to double quotes to appease update scripts on windows

2 years ago[lldb] Increase timeout in TestProcessIOHandlerInterrupt
Pavel Labath [Fri, 18 Mar 2022 11:14:10 +0000 (12:14 +0100)]
[lldb] Increase timeout in TestProcessIOHandlerInterrupt

The small value was not meant to be checked in.

2 years ago[SCEV] Use constant ranges when determining reachable blocks (PR54434)
Nikita Popov [Fri, 18 Mar 2022 11:01:05 +0000 (12:01 +0100)]
[SCEV] Use constant ranges when determining reachable blocks (PR54434)

This avoids false positive verification failures if the condition
is not literally true/false, but SCEV still makes use of the fact
that a loop is not reachable through more complex reasoning.

Fixes https://github.com/llvm/llvm-project/issues/54434.

2 years ago[lldb] Fix TestProcessIOHandlerInterrupt.py for macos
Pavel Labath [Fri, 18 Mar 2022 10:47:47 +0000 (11:47 +0100)]
[lldb] Fix TestProcessIOHandlerInterrupt.py for macos

On darwin, we don't completely suppress the signal used to interrupt the
inferior. The underlying read syscall returns EINTR, which causes premature
termination of the input loop.

Work around that by hand-rolling an EINTR-resistant version of getline.

2 years ago[clang-format] Copy help options to the doc directory.
sstwcw [Fri, 18 Mar 2022 10:51:36 +0000 (10:51 +0000)]
[clang-format] Copy help options to the doc directory.

The options listed in ClangFormat.rst lag behind those output by the
-help command line option.  Specifically, these are missing.

--files
--qualifier-alignment

Fixes #54418

Reviewed By: MyDeveloperDay, HazardyKnusperkeks

Differential Revision: https://reviews.llvm.org/D121890

2 years ago[flang][lowering] Add support for lowering of the `ior` intrinsic
Andrzej Warzynski [Thu, 17 Mar 2022 17:22:46 +0000 (17:22 +0000)]
[flang][lowering] Add support for lowering of the `ior` intrinsic

This patch adds support for lowering of the `ior` intrinsic from
Fortran to the FIR dialect of MLIR.

This is part of the upstreaming effort from the `fir-dev` branch in [1].

[1] https://github.com/flang-compiler/f18-llvm-project

Differential Revision: https://reviews.llvm.org/D121928

Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: V Donaldson <vdonaldson@nvidia.com>
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
2 years ago[RISCV] Add more sign-extending ops to MIR sext.w pass.
Mohammed Nurul Hoque [Fri, 18 Mar 2022 09:26:10 +0000 (17:26 +0800)]
[RISCV] Add more sign-extending ops to MIR sext.w pass.

This patch adds single-bit and bit-counting ops to list of sign-extending ops.

A single-bit write propagates sign-extendedness if it's not in the sign-bits.

Bit extraction and bit counting always outputs a small number, so sign-extended.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D121152

2 years ago[AMDGPU][DOC][NFC] Added links to MI200 documentation
Dmitry Preobrazhensky [Fri, 18 Mar 2022 10:16:27 +0000 (13:16 +0300)]
[AMDGPU][DOC][NFC] Added links to MI200 documentation

Differential Revision: https://reviews.llvm.org/D121811

2 years ago[flang][lowering] Add support for lowering of the `{l|u}bound` intrinsics
Andrzej Warzynski [Thu, 17 Mar 2022 17:11:35 +0000 (17:11 +0000)]
[flang][lowering] Add support for lowering of the `{l|u}bound` intrinsics

This patch adds support for lowering of the `{l|u}bound` intrinsics from
Fortran to the FIR dialect of MLIR. Note that `ubound` is already
supported, but the test was missing (added here).

This is part of the upstreaming effort from the `fir-dev` branch in [1].

[1] https://github.com/flang-compiler/f18-llvm-project

Differential Revision: https://reviews.llvm.org/D121926

Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Co-authored-by: Peter Steinfeld <psteinfeld@nvidia.com>
2 years ago[CodeGen] Store element type in DominatingValue<RValue>
Nikita Popov [Fri, 18 Mar 2022 10:11:00 +0000 (11:11 +0100)]
[CodeGen] Store element type in DominatingValue<RValue>

For aggregate rvalues, we need to store the element type in the
dominating value, so we can recover the element type for the
address.

2 years ago[flang][lowering] Add support for lowering of the `merge` intrinsics
Andrzej Warzynski [Thu, 17 Mar 2022 16:58:40 +0000 (16:58 +0000)]
[flang][lowering] Add support for lowering of the `merge` intrinsics

This patch adds support for lowering of the `merge` intrinsics from
Fortran to the FIR dialect of MLIR.

This is part of the upstreaming effort from the `fir-dev` branch in [1].

[1] https://github.com/flang-compiler/f18-llvm-project

Differential Revision: https://reviews.llvm.org/D121924

Co-authored-by: Valentin Clement <clementval@gmail.com>
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Co-authored-by: Mark Leair <leairmark@gmail.com>
Co-authored-by: Jean Perier <jperier@nvidia.com>
2 years ago[CodeGen] Remove some uses of deprecated Address constructor
Nikita Popov [Fri, 18 Mar 2022 09:47:24 +0000 (10:47 +0100)]
[CodeGen] Remove some uses of deprecated Address constructor

2 years ago[bazel] Port a954ade8ed41
Benjamin Kramer [Fri, 18 Mar 2022 09:50:55 +0000 (10:50 +0100)]
[bazel] Port a954ade8ed41

2 years ago[bazel] Sync llvm-config.h after 112aafcaf425dca901690ca823d25607e5795263
Benjamin Kramer [Fri, 18 Mar 2022 09:45:54 +0000 (10:45 +0100)]
[bazel] Sync llvm-config.h after 112aafcaf425dca901690ca823d25607e5795263

2 years ago[InstCombine] Remove integer SPF of SPF folds (NFCI)
Nikita Popov [Thu, 24 Feb 2022 13:33:57 +0000 (14:33 +0100)]
[InstCombine] Remove integer SPF of SPF folds (NFCI)

Now that we canonicalize to intrinsics, these folds should no
longer be needed. Only one fold that also applies to floating-point
min/max is retained.

2 years ago[Flang] Lower the spacing, rrspacing intrinsics
Kiran Chandramohan [Thu, 17 Mar 2022 13:47:28 +0000 (13:47 +0000)]
[Flang] Lower the spacing, rrspacing intrinsics

These intrinsics returns the distance to the nearest real number and
their reciprocal. They are lowered to flang runtime calls.

This is part of the upstreaming effort from the fir-dev branch in [1].
[1] https://github.com/flang-compiler/f18-llvm-project

Reviewed By: clementval

Differential Revision: https://reviews.llvm.org/D121832

Co-authored-by: Mark Leair <leairmark@gmail.com>
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
Co-authored-by: Jean Perier <jperier@nvidia.com>
2 years ago[MemorySSA] Don't optimize uses during construction
Nikita Popov [Wed, 9 Mar 2022 15:34:55 +0000 (16:34 +0100)]
[MemorySSA] Don't optimize uses during construction

This changes MemorySSA to be constructed in unoptimized form.
MemorySSA::ensureOptimizedUses() can be called to optimize all
uses (once). This should be done by passes where having optimized
uses is beneficial, either because we're going to query all uses
anyway, or because we're doing def-use walks.

This should help reduce the compile-time impact of MemorySSA for
some use cases (the reason why I started looking into this is
D117926), which can avoid optimizing all uses upfront, and instead
only optimize those that are actually queried.

Actually, we have an existing use-case for this, which is EarlyCSE.
Disabling eager use optimization there gives a significant
compile-time improvement, because EarlyCSE will generally only query
clobbers for a subset of all uses (this change is not included in
this patch).

Differential Revision: https://reviews.llvm.org/D121381

2 years ago[LoopSimplifyCFG] Check predecessors of exits before marking them dead.
Florian Hahn [Fri, 18 Mar 2022 08:54:44 +0000 (08:54 +0000)]
[LoopSimplifyCFG] Check predecessors of exits before marking them dead.

LoopSimplifyCFG may process loops that are not in
loop-simplify/canonical form. For loops not in canonical form, exit
blocks may be reachable from non-loop blocks and we cannot consider them
as dead if they only are not reachable from the loop itself.

Unfortunately the smallest test I could come up with requires running
multiple passes:
    -passes='loop-mssa(loop-instsimplify,loop-simplifycfg,simple-loop-unswitch)'

The reason is that loops are canonicalized at the beginning of loop
pipelines, so a later transform has to break canonical form in a way
that breaks LoopSimplifyCFG's dead-exit analysis.

Alternatively we could try to require all loop passes to maintain
canonical form. That in turn would also require additional verification.

Fixes #54023, #49931.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D121925

2 years ago[BOLT][NFC] Use X86 mnemonic tables
Amir Ayupov [Fri, 18 Mar 2022 08:48:00 +0000 (01:48 -0700)]
[BOLT][NFC] Use X86 mnemonic tables

Remove tables from X86MCPlusBuilder, make use of llvm::X86 mnemonic tables.

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D121573

2 years ago[X86][NFC] Generate mnemonic tables
Amir Ayupov [Fri, 18 Mar 2022 08:45:23 +0000 (01:45 -0700)]
[X86][NFC] Generate mnemonic tables

Produce mnemonic tables, adding the functions to llvm::X86 namespace.

Reviewed By: MaskRay, skan

Differential Revision: https://reviews.llvm.org/D121572

2 years ago[TableGen] X86 mnemonic tables backend
Amir Ayupov [Fri, 18 Mar 2022 08:41:10 +0000 (01:41 -0700)]
[TableGen] X86 mnemonic tables backend

Add tablegen backend that generates X86 mnemonic-based opcode groupings, e.g.
`isADD`, `isTEST`, etc.

Addresses https://lists.llvm.org/pipermail/llvm-dev/2022-January/154526.html

Reviewed By: skan

Differential Revision: https://reviews.llvm.org/D121571

2 years ago[flang][NFC] Move random test in Instriscs folder
Valentin Clement [Fri, 18 Mar 2022 08:25:14 +0000 (09:25 +0100)]
[flang][NFC] Move random test in Instriscs folder

2 years agoRevert "Add a cmake flag to turn `llvm_unreachable()` into builtin_trap() when assert...
Nikita Popov [Fri, 18 Mar 2022 08:20:44 +0000 (09:20 +0100)]
Revert "Add a cmake flag to turn `llvm_unreachable()` into builtin_trap() when assertions are disabled"

This reverts commit 6316129e066e0a252430699f2b41706d4808476c.

This was implemented with inverted logic.

2 years ago[MLIR][Presburger] introduce SetCoalescer
Michel Weber [Fri, 18 Mar 2022 07:58:46 +0000 (07:58 +0000)]
[MLIR][Presburger] introduce SetCoalescer

This patch refactors the current coalesce implementation. It introduces
the `SetCoalescer`, a class in which all coalescing functionality lives.
The main advantage over the old design is the fact that the vectors of
constraints do not have to be passed around, but are implemented as
private fields of the SetCoalescer. This will become especially
important once more inequality types are introduced.

Reviewed By: arjunp

Differential Revision: https://reviews.llvm.org/D121364

2 years ago[mlir][Math] Add constant folder for sqrt.
jacquesguan [Fri, 18 Mar 2022 06:16:47 +0000 (14:16 +0800)]
[mlir][Math] Add constant folder for sqrt.

Differential Revision: https://reviews.llvm.org/D121980

2 years ago[lldb] Fix ^C handling in IOHandlerProcessSTDIO
Pavel Labath [Thu, 17 Mar 2022 14:09:12 +0000 (15:09 +0100)]
[lldb] Fix ^C handling in IOHandlerProcessSTDIO

D120762 accidentally moved the interrupt check into the block which was
reading stdio. This meant that a ^C only took effect after a regular
character has been pressed.

This patch fixes that and adds a (pexpect) test.

Differential Revision: https://reviews.llvm.org/D121912

2 years agoRevert "[lldb] Fix ^C handling in IOHandlerProcessSTDIO"
Pavel Labath [Fri, 18 Mar 2022 07:42:10 +0000 (08:42 +0100)]
Revert "[lldb] Fix ^C handling in IOHandlerProcessSTDIO"

This reverts commit f93d861349f923f6b7ca1a425d3632eec1ff2a72 -- looks
like a bad application of `patch -p<level>`

2 years agoRemove a top-level "using namespace" directive from LegalizationArtifactCombiner.h
Pavel Labath [Tue, 15 Mar 2022 13:05:15 +0000 (14:05 +0100)]
Remove a top-level "using namespace" directive from LegalizationArtifactCombiner.h

The directive pollutes the namespace of all files including that header.
Move the directive into the bodies of functions that need it instead.

2 years ago[lldb] Add more documentation on test variants
Pavel Labath [Thu, 17 Mar 2022 10:41:10 +0000 (11:41 +0100)]
[lldb] Add more documentation on test variants

This formalizes some of the discussion on D121631.

Differential Revision: https://reviews.llvm.org/D121900

2 years ago[lldb] Remove process->LoadModules call from DynamicLoaderPOSIXDYLD
Pavel Labath [Thu, 17 Mar 2022 14:55:26 +0000 (15:55 +0100)]
[lldb] Remove process->LoadModules call from DynamicLoaderPOSIXDYLD

The call is useless, as any modules loaded there will be removed in
ResolveExecutableModule. Modules will be reloaded again through the
GetLoadedModuleList call in DYLDRendezvous.cpp.

2 years ago[flang] Lower more array expression
Valentin Clement [Fri, 18 Mar 2022 07:22:17 +0000 (08:22 +0100)]
[flang] Lower more array expression

This patch adds more lowering for array expressions.

This patch is part of the upstreaming effort from fir-dev branch.

Reviewed By: PeteSteinfeld

Differential Revision: https://reviews.llvm.org/D121952

Co-authored-by: Jean Perier <jperier@nvidia.com>
Co-authored-by: Eric Schweitz <eschweitz@nvidia.com>
2 years ago[mlir][SymbolDCE] Track the number of symbols DCE'd
Nandor Licker [Thu, 17 Mar 2022 17:04:41 +0000 (19:04 +0200)]
[mlir][SymbolDCE] Track the number of symbols DCE'd

Added a statistic counting the number of erased symbols.

Differential Revision: https://reviews.llvm.org/D121930

2 years agoFix llvm-strip --only-keep-debug documentation for ELF
James Henderson [Thu, 17 Mar 2022 11:36:42 +0000 (11:36 +0000)]
Fix llvm-strip --only-keep-debug documentation for ELF

The functionality (and llvm-objcopy's corresponding documentation) was
added in
https://github.com/llvm/llvm-project/commit/5ad0103d8a04cb066dfae4fc20b0dfcd9413f4d4.
It looks like the llvm-strip docs to match were missed.

Reviewed by: gbreynoo

Differential Revision: https://reviews.llvm.org/D121902

2 years ago[X86][NFC] Rename target feature hasCMov->hasCMOV
Shengchen Kan [Fri, 18 Mar 2022 06:03:37 +0000 (14:03 +0800)]
[X86][NFC] Rename target feature hasCMov->hasCMOV

This is a follow-up patch for D121975.

2 years ago[AtomicExpand][PowerPC] Fix all-one mask value
Kai Luo [Fri, 18 Mar 2022 05:23:38 +0000 (13:23 +0800)]
[AtomicExpand][PowerPC] Fix all-one mask value

When generating a all-one mask value whose bitwidth is larger than 64, signed extension should be used rather then zero extension.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D120865

2 years ago[X86] Rename more target feature related things consistency. NFC
Craig Topper [Fri, 18 Mar 2022 05:11:51 +0000 (22:11 -0700)]
[X86] Rename more target feature related things consistency. NFC

-Rename Mode*Bit to Is*Bit to match X86Subtarget.
-Rename FeatureLAHFSAHF to FeatureLAFHSAFH64 to match X86Subtarget.
-Use consistent capitalization

Reviewed By: skan

Differential Revision: https://reviews.llvm.org/D121975

2 years ago[PowerPC][NFC] Add atomic alignments and ops tests for powerpc
Kai Luo [Fri, 18 Mar 2022 04:57:55 +0000 (12:57 +0800)]
[PowerPC][NFC] Add atomic alignments and ops tests for powerpc

PowerPC is lacking tests checking `_Atomic` alignment in cfe. Adding these tests since we're going to make change to align with gcc on Linux.

Reviewed By: hubert.reinterpretcast, jsji

Differential Revision: https://reviews.llvm.org/D121441

2 years ago[X86] Set Int_MemBarrier as a meta-instruction
Shengchen Kan [Fri, 18 Mar 2022 05:11:39 +0000 (13:11 +0800)]
[X86] Set Int_MemBarrier as a meta-instruction

Compiler only emits a comment for `Int_MemBarrier`, so it should
be marked as a meta-instruction, which can help improve accuracy
of debug location.

Reviewed By: pengfei

Differential Revision: https://reviews.llvm.org/D121879

2 years ago[Codegen][tablgen][NFC] Allow meta instruction to be target dependent
Shengchen Kan [Fri, 18 Mar 2022 05:07:13 +0000 (13:07 +0800)]
[Codegen][tablgen][NFC] Allow meta instruction to be target dependent

An instruction is a meta-instruction if it doesn't produce any output
in the form of executable instructions. So in the concept, a
meta-instruction does not have to be target independent.

Before this patch, `isMetaInstruction` is implemented by checking the
opcode of the instruction, add we have no way to add target dependent
opcode to the list, which does not make sense.

After this patch, a bit `isMeta` is added for class `Instruction` in
tablegen, which is used to indicate whether it's a meta instruction.

Reviewed By: pengfei

Differential Revision: https://reviews.llvm.org/D121600

2 years ago[InstCombine] Sink instructions with multiple users in a successor block.
Andrew Wei [Fri, 18 Mar 2022 03:49:59 +0000 (11:49 +0800)]
[InstCombine] Sink instructions with multiple users in a successor block.

This patch tries to sink instructions when they are only used in a successor block.

This is a further enhancement patch based on Anna's commit:
D109700, which allows sinking an instruction having multiple uses in a single user.

In this patch, sink instructions with multiple users in a single successor block will be supported.
It could fix a known issue from rust:
  https://github.com/rust-lang/rust/issues/51346#issuecomment-394443610

Reviewed By: nikic, reames

Differential Revision: https://reviews.llvm.org/D121585

2 years ago[libc][NFC] Add the platform independent file target only if mutex is available.
Siva Chandra Reddy [Thu, 17 Mar 2022 20:34:22 +0000 (20:34 +0000)]
[libc][NFC] Add the platform independent file target only if mutex is available.

The platform independent file implementation is not an entrypoint so it
cannot be excluded via the entrypoints.txt file. Hence, we need a
special treatment to exclude it from the build.

Reviewed By: michaelrj

Differential Revision: https://reviews.llvm.org/D121947

2 years agoReland "Load pass plugins during option processing, so that plugin options are regist...
Wael Yehia [Mon, 14 Mar 2022 02:16:21 +0000 (22:16 -0400)]
Reland "Load pass plugins during option processing, so that plugin options are registered and live."

Fix Polly failures.

Reviewed By: mehdi_amini, Meinersbur

Differential Revision: https://reviews.llvm.org/D121566

2 years ago[AMDGPU] Use COPY_TO_REGCLASS for buffer_atomic_cmpswap selection
Abinav Puthan Purayil [Thu, 17 Mar 2022 17:37:13 +0000 (23:07 +0530)]
[AMDGPU] Use COPY_TO_REGCLASS for buffer_atomic_cmpswap selection

GlobalISel was selecting the av_* regclass for some cases.

Differential Revision: https://reviews.llvm.org/D121933

2 years ago[libc++][ranges] Implement changes to reverse_iterator from One Ranges Proposal.
Konstantin Varlamov [Fri, 18 Mar 2022 02:57:39 +0000 (19:57 -0700)]
[libc++][ranges] Implement changes to reverse_iterator from One Ranges Proposal.

Changes in [P0896](https://wg21.link/p0896):
- add `disable_sized_sentinel_for`;
- add `iter_move` and `iter_swap`;
- add a `requires` clause to the `operator->`;
- add `iterator_concept`;
- check that the `Iterator` template parameter is a bidirectional
  iterator;
- add constraints to all comparison operators;
- change the definitions of `iterator_category`, `value_type`,
  `difference_type` and `reference` (changes to `iterator_category` were
  already implemented).

Also add a few forgotten things to the `reverse_iterator` synopsis
(notably the spaceship operator).

Differential Revision: https://reviews.llvm.org/D120180

2 years agoCorrect and complete dependency sets after 74b411d38c48513a125e67e049aca55452b9e855
Sterling Augustine [Fri, 18 Mar 2022 02:31:00 +0000 (19:31 -0700)]
Correct and complete dependency sets after 74b411d38c48513a125e67e049aca55452b9e855

Prior to this change the __support_cpp_array_ref target's only dependency was libc_root.
but it #includes "TypeTraits.h" and Array.h for that matter.

These dependencies matter when building in distributed build systems and the relevant
files must be know for the distributed build to ship them to the executor.

Differential Revision: https://reviews.llvm.org/D121974

2 years ago[RISCV] Fix buildbot breakage by explicitly instantiating templates
Jessica Clarke [Fri, 18 Mar 2022 02:16:52 +0000 (02:16 +0000)]
[RISCV] Fix buildbot breakage by explicitly instantiating templates

RISCVISelDAGToDAG's selectImm uses RISCVTargetLowering::getAddr
(specifically the ConstantPoolSDNode) as of 41454ab25645 ("[RISCV] Use
constant pool for large integers"), but nothing explicitly instantiates
any of the templates, the only reason they exist is because of the
various lowering methods in RISCVISelLowering.cpp that themselves use
the methods. However, with inlining, those can end up not existing as
real functions and thus not be exported, leading to link errors. Up
until now this hasn't happened, but for whatever reason D121654 has
triggered this on the sanitizer-ppc64be-linux buildbot, giving:

  ../../../../lib/libLLVMRISCVCodeGen.a(RISCVISelDAGToDAG.cpp.o): In function `selectImm(llvm::SelectionDAG*, llvm::SDLoc const&, llvm::MVT, long, llvm::RISCVSubtarget const&)':
  RISCVISelDAGToDAG.cpp:(.text._ZL9selectImmPN4llvm12SelectionDAGERKNS_5SDLocENS_3MVTElRKNS_14RISCVSubtargetE+0x3d8): undefined reference to `llvm::SDValue llvm::RISCVTargetLowering::getAddr<llvm::ConstantPoolSDNode>(llvm::ConstantPoolSDNode*, llvm::SelectionDAG&, bool) const'
  collect2: error: ld returned 1 exit status

Fix this by explicitly instantiating getAddr in its four different forms
so separate translation units can reliably use it.

Fixes: 41454ab25645 ("[RISCV] Use constant pool for large integers")

2 years agoFix invalid preprocessor directive.
Sterling Augustine [Fri, 18 Mar 2022 02:12:48 +0000 (19:12 -0700)]
Fix invalid preprocessor directive.

2 years agoUpdate llvm-config.h.cmake for LLVM_UNREACHABLE_OPTIMIZE
Sterling Augustine [Fri, 18 Mar 2022 02:04:42 +0000 (19:04 -0700)]
Update llvm-config.h.cmake for LLVM_UNREACHABLE_OPTIMIZE

2 years ago[LoongArch] Add some blank lines to make .td more tidy. NFC
Weining Lu [Fri, 18 Mar 2022 01:49:16 +0000 (09:49 +0800)]
[LoongArch] Add some blank lines to make .td more tidy. NFC

2 years agoRevert "[SLP] Fix lookahead operand reordering for splat loads." due to build failures
Vasileios Porpodas [Fri, 18 Mar 2022 01:22:04 +0000 (18:22 -0700)]
Revert "[SLP] Fix lookahead operand reordering for splat loads." due to build failures

This reverts commit 5efa78985bf5cbba1c4346ba41a16435fc516446.

2 years ago[SLP][NFC] Added a test for a followup patch that enables handling splat loads with...
Vasileios Porpodas [Wed, 16 Mar 2022 22:45:51 +0000 (15:45 -0700)]
[SLP][NFC] Added a test for a followup patch that enables handling splat loads with uses.

2 years ago[SLP] Fix lookahead operand reordering for splat loads.
Vasileios Porpodas [Thu, 10 Mar 2022 02:18:16 +0000 (18:18 -0800)]
[SLP] Fix lookahead operand reordering for splat loads.

Splat loads are inexpensive in X86. For a 2-lane vector we need just one
instruction: `movddup (%reg), xmm0`. Using the standard Splat score leads
to worse code. This patch adds a new score dedicated for splat loads.

Please note that a splat is usually three IR instructions:
- It is usually a load and 2 inserts:
 %ld = load double, double* %gep
 %ins1 = insertelement <2 x double> poison, double %ld, i32 0
 %ins2 = insertelement <2 x double> %ins1, double %ld, i32 1

- But it can also be a load, an insert and a shuffle:
 %ld = load double, double* %gep
 %ins = insertelement <2 x double> poison, double %ld, i32 0
 %shf = shufflevector <2 x double> %ins, <2 x double> poison, <2 x i32> zeroinitializer

Because of this some of the lit tests contain more IR instructions.

Differential Revision: https://reviews.llvm.org/D121354

2 years ago[SLP][NFC] This adds a test for a follow-up patch that fixes a look-ahead operand...
Vasileios Porpodas [Thu, 10 Mar 2022 01:47:23 +0000 (17:47 -0800)]
[SLP][NFC] This adds a test for a follow-up patch that fixes a look-ahead operand reordering issue

Differential Revision: https://reviews.llvm.org/D121353

2 years agoUse llvm::append_range instead of push_back loops where applicable. NFCI.
Benjamin Kramer [Fri, 18 Mar 2022 00:15:43 +0000 (01:15 +0100)]
Use llvm::append_range instead of push_back loops where applicable. NFCI.

2 years agoRevert "Revert "Revert "[misexpect] Re-implement MisExpect Diagnostics"""
Paul Kirth [Fri, 18 Mar 2022 00:21:33 +0000 (00:21 +0000)]
Revert "Revert "Revert "[misexpect] Re-implement MisExpect Diagnostics"""

This reverts commit 6cf560d69a222bff4af4e1d092437fd77f0f981c.

2 years ago[gn build] (manually) port 6316129e066e
Nico Weber [Fri, 18 Mar 2022 00:08:11 +0000 (20:08 -0400)]
[gn build] (manually) port 6316129e066e

2 years agoRevert "Revert "[misexpect] Re-implement MisExpect Diagnostics""
Paul Kirth [Fri, 18 Mar 2022 00:04:22 +0000 (00:04 +0000)]
Revert "Revert "[misexpect] Re-implement MisExpect Diagnostics""

I mistakenly reverted my commit, so I'm relanding it.

This reverts commit 10866a1df4a82cdc54187330c509a2d46235455d.

2 years agoRevert "[misexpect] Re-implement MisExpect Diagnostics"
Paul Kirth [Thu, 17 Mar 2022 23:54:26 +0000 (23:54 +0000)]
Revert "[misexpect] Re-implement MisExpect Diagnostics"

This reverts commit e7749d4713a5ec886011ceb0fc821c6723061724.

2 years ago[misexpect] Re-implement MisExpect Diagnostics
Paul Kirth [Wed, 9 Mar 2022 16:01:38 +0000 (16:01 +0000)]
[misexpect] Re-implement MisExpect Diagnostics

Reimplements MisExpect diagnostics from D66324 to reconstruct its
original checking methodology only using MD_prof branch_weights
metadata.

New checks rely on 2 invariants:

1) For frontend instrumentation, MD_prof branch_weights will always be
   populated before llvm.expect intrinsics are lowered.

2) for IR and sample profiling, llvm.expect intrinsics will always be
   lowered before branch_weights are populated from the IR profiles.

These invariants allow the checking to assume how the existing branch
weights are populated depending on the profiling method used, and emit
the correct diagnostics. If these invariants are ever invalidated, the
MisExpect related checks would need to be updated, potentially by
re-introducing MD_misexpect metadata, and ensuring it always will be
transformed the same way as branch_weights in other optimization passes.

Frontend based profiling is now enabled without using LLVM Args, by
introducing a new CodeGen option, and checking if the -Wmisexpect flag
has been passed on the command line.

Differential Revision: https://reviews.llvm.org/D115907

2 years ago[BPF] handle unsigned icmp ops in BPFAdjustOpt pass
Yonghong Song [Thu, 17 Mar 2022 05:09:59 +0000 (22:09 -0700)]
[BPF] handle unsigned icmp ops in BPFAdjustOpt pass

When investigating an issue with bcc tool inject.py, I found
a verifier failure with latest clang. The portion of code
can be illustrated as below:
  struct pid_struct {
    u64 curr_call;
    u64 conds_met;
    u64 stack[2];
  };
  struct pid_struct *bpf_map_lookup_elem();
  int foo() {
    struct pid_struct *p = bpf_map_lookup_elem();
    if (!p) return 0;
    p->curr_call--;
    if (p->conds_met < 1 || p->conds_met >= 3)
        return 0;
    if (p->stack[p->conds_met - 1] == p->curr_call)
        p->conds_met--;
    ...
  }

The verifier failure looks like:
  ...
  8: (79) r1 = *(u64 *)(r0 +0)
   R0_w=map_value(id=0,off=0,ks=4,vs=32,imm=0) R10=fp0 fp-8=mmmm????
  9: (07) r1 += -1
  10: (7b) *(u64 *)(r0 +0) = r1
   R0_w=map_value(id=0,off=0,ks=4,vs=32,imm=0) R1_w=inv(id=0) R10=fp0 fp-8=mmmm????
  11: (79) r2 = *(u64 *)(r0 +8)
   R0_w=map_value(id=0,off=0,ks=4,vs=32,imm=0) R1_w=inv(id=0) R10=fp0 fp-8=mmmm????
  12: (bf) r3 = r2
  13: (07) r3 += -3
  14: (b7) r4 = -2
  15: (2d) if r4 > r3 goto pc+13
   R0=map_value(id=0,off=0,ks=4,vs=32,imm=0) R1=inv(id=0) R2=inv(id=2)
   R3=inv(id=0,umin_value=18446744073709551614,var_off=(0xffffffff00000000; 0xffffffff))
   R4=inv-2 R10=fp0 fp-8=mmmm????
  16: (07) r2 += -1
  17: (bf) r3 = r2
  18: (67) r3 <<= 3
  19: (bf) r4 = r0
  20: (0f) r4 += r3
  math between map_value pointer and register with unbounded min value is not allowed

Here the compiler optimized "p->conds_met < 1 || p->conds_met >= 3" to
  r2 = p->conds_met
  r3 = r2
  r3 += -3
  r4 = -2
  if (r3 < r4) return 0
  r2 += -1
  r3 = r2
  ...
In the above, r3 is initially equal to r2, but is modified used by the comparison.
But later on r2 is used again. This caused verification failure.

BPF backend has a pass, AdjustOpt, to prevent such transformation, but only
focused on signed integers since typical bpf helper returns signed integers.
To fix this case, let us handle unsigned integers as well.

Differential Revision: https://reviews.llvm.org/D121937