platform/kernel/u-boot.git
2 years agopower-domain: Return 0 if ops unimplemented and remove empty functions
Marek Vasut [Tue, 12 Apr 2022 22:42:48 +0000 (00:42 +0200)]
power-domain: Return 0 if ops unimplemented and remove empty functions

In case the ops is not implemented, return 0 in the core right away.
This is better than having multiple copies of functions which just
return 0 in each power domain driver. Drop all those empty functions.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
Cc: Simon Glass <sjg@chromium.org>
2 years agoimx8ulp: clock: Fix lcd clock algo
Loic Poulain [Thu, 31 Mar 2022 10:39:37 +0000 (12:39 +0200)]
imx8ulp: clock: Fix lcd clock algo

The div loop uses reassign and reuse parent_rate, which causes
the parent rate reference to be wrong after the first loop, the
resulting clock becomes incorrect for div != 1.

Fixes: 829e06bf4175 ("imx8ulp: clock: Add MIPI DSI clock and DCNano clock")
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2 years agoconfigs: Resync with savedefconfig
Tom Rini [Wed, 20 Apr 2022 18:48:59 +0000 (14:48 -0400)]
configs: Resync with savedefconfig

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2 years agoMerge branch '2022-04-20-assorted-improvements'
Tom Rini [Wed, 20 Apr 2022 18:33:53 +0000 (14:33 -0400)]
Merge branch '2022-04-20-assorted-improvements'

- Two TI K3 updates, update SYS_MALLOC_F_LEN default to be 0x2000 and
  move TI am33xx to use that as well, fix DT relocation with multiple
  DRAM banks, and add a gpio read sub-command.

2 years agocmd: gpio: Add `gpio read` subcommand
Diego Rondini [Mon, 11 Apr 2022 10:02:09 +0000 (12:02 +0200)]
cmd: gpio: Add `gpio read` subcommand

As explained in commit 4af2a33ee5b9 ("cmd: gpio: Make `gpio input`
return pin value again") the `gpio input` is used in scripts to obtain
the value of a pin, despite the fact that CMD_RET_FAILURE is
indistinguishable from a valid pin value.
To be able to detect failures and properly use the value of a GPIO in
scripts we introduce the `gpio read` command that sets the variable
`name` to the value of the pin. Return code of the `gpio read` command
can be used to check for CMD_RET_SUCCESS or CMD_RET_FAILURE.
CONFIG_CMD_GPIO_READ is used to enable the `gpio read` command.

Signed-off-by: Diego Rondini <diego.rondini@kynetics.com>
2 years agoram: k3-ddrss: Allow use of dt provided initial frequency
Dave Gerlach [Fri, 8 Apr 2022 21:46:50 +0000 (16:46 -0500)]
ram: k3-ddrss: Allow use of dt provided initial frequency

Allow device tree to provide ti,ddr-freq0 to be used as the initial DDR
frequency that is set for lpddr4 before initialization of the
controller. Make this optional and continue to use PLL bypass frequency
as is done currently if ti,ddr-freq0 is not provided.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2 years agoimage: fdt: Fix DT relocation handling with multiple DRAM banks with gap
Marek Vasut [Fri, 8 Apr 2022 00:09:19 +0000 (02:09 +0200)]
image: fdt: Fix DT relocation handling with multiple DRAM banks with gap

The current implementation of boot_relocate_fdt() places DT at the
highest usable DRAM address, which is calculated as:
  env_get_bootm_low() + env_get_bootm_mapsize()
which by default becomes gd->ram_base + gd->ram_size.

Systems like i.MX53 can have multiple DRAM banks with gap between them,
e.g. have DRAM at 0x70000000-0x8fffffff and 0xb0000000-0xcfffffff , so
for them the calculated highest DRAM address is 0xafffffff, which is
exactly in the gap and thus not usable.

Fix this by iterating over all DRAM banks and tracking the remaining
amount of the total mapping size obtained from env_get_bootm_mapsize().
Limit the maximum LMB area size to each bank, to avoid using nonexistent
DRAM.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
2 years agoam33xx: Update SYS_MALLOC_F_LEN to use 0x2000 as the default
Tom Rini [Thu, 7 Apr 2022 16:33:24 +0000 (12:33 -0400)]
am33xx: Update SYS_MALLOC_F_LEN to use 0x2000 as the default

A number of platforms here had already been increasing the size a bit,
so lets moving all of them up.

Signed-off-by: Tom Rini <trini@konsulko.com>
2 years agoKconfig: Change SYS_MALLOC_F_LEN default to 0x2000
Tom Rini [Thu, 7 Apr 2022 16:33:23 +0000 (12:33 -0400)]
Kconfig: Change SYS_MALLOC_F_LEN default to 0x2000

The most commonly used value today is 0x2000 and not 0x400.  Rework the
Kconfig logic to use this more frequently used value as the default.

Cc: Andrew F. Davis <afd@ti.com>
Cc: Alex Nemirovsky <alex.nemirovsky@cortina-access.com>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Alison Wang <alison.wang@nxp.com>
Cc: Anastasiia Lukianenko <anastasiia_lukianenko@epam.com>
Cc: Andes <uboot@andestech.com>
Cc: Andre Przywara <andre.przywara@arm.com>
Cc: Bharat Gooty <bharat.gooty@broadcom.com>
Cc: David Lechner <david@lechnology.com>
Cc: Dzmitry Sankouski <dsankouski@gmail.com>
Cc: Enric Balletbo i Serra <eballetbo@gmail.com>
Cc: Eugeniy Paltsev <paltsev@synopsys.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Gerald Kerma <dreagle@doukki.net>
Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Jassi Brar <jaswinder.singh@linaro.org>
Cc: Kristian Amlie <kristian.amlie@northern.tech>
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Liviu Dudau <liviu.dudau@foss.arm.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Cc: Matthias Brugger <mbrugger@suse.com>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Cc: Michael Walle <michael@walle.cc>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Cc: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Paul Burton <paul.burton@mips.com>
Cc: Paul Kocialkowski <contact@paulk.fr>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Cc: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Cc: Sergey Temerkhanov <s.temerkhanov@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefan Bosch <stefan_b@posteo.net>
Cc: Stephan Gerhold <stephan@gerhold.net>
Cc: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Cc: Thomas Chou <thomas@wytron.com.tw>
Cc: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Cc: Thomas Weber <weber@corscience.de>
Cc: Tony Dinh <mibodhi@gmail.com>
Cc: Trevor Woerner <twoerner@gmail.com>
Cc: Vitaly Andrianov <vitalya@ti.com>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: liuhao <liuhao@phytium.com.cn>
Cc: lixinde <lixinde@phytium.com.cn>
Cc: shuyiqi <shuyiqi@phytium.com.cn>
Cc: weichangzheng <weichangzheng@phytium.com.cn>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Tony Dinh <mibodhi@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Kristian Amlie <kristian.amlie@northern.tech>
2 years agoram: k3-ddrss: Fix register name and explain its usage
Dominic Rath [Wed, 6 Apr 2022 09:56:47 +0000 (11:56 +0200)]
ram: k3-ddrss: Fix register name and explain its usage

The k3-ddrss driver wants to configure the DDRSS_V2A_CTL_REG to reflect
the maximum possible SDRAM of 2 GB for AM64x (instead of the register's
default that says 8 GB, which the AM64x DDR controller wouldn't support).

The offset 0x20 was correct, but the register name DDRSS_V2A_R1_MAT_REG
was that of the next register at offset 0x24.

Signed-off-by: Dominic Rath <rath@ibv-augsburg.net>
2 years agoMerge branch '2022-04-19-assorted-updates'
Tom Rini [Tue, 19 Apr 2022 21:02:21 +0000 (17:02 -0400)]
Merge branch '2022-04-19-assorted-updates'

- Migrate CONFIG_SYS_MEM_TOP_HIDE to Kconfig, IOMUX bugfix, 2 BTRFS
bugfixes, update .gitignore and .mailmap files, aspeed GPIO bugfix,
image-fit and squashfs code cleanups, enable EXT4 and ISO partitions on
DeveloperBox.
- populate u-boot,bootconf under /chosen, see
  https://github.com/devicetree-org/dt-schema/pull/71 for corresponding
  change

2 years agofs: Allow to compile FS_BTRFS when SPL is enabled
Pali Rohár [Thu, 7 Apr 2022 12:53:25 +0000 (14:53 +0200)]
fs: Allow to compile FS_BTRFS when SPL is enabled

Currently there is no btrfs support in SPL. But macro CONFIG_FS_BTRFS is
defined also when building SPL. When both FS_BTRFS and SPL are enabled
then build process throw compile error.

Fix check for btrfs code in fstypes[] to allow compiling FS_BTRFS only in
proper U-Boot.

Signed-off-by: Pali Rohár <pali@kernel.org>
2 years agobtrfs: Fix compilation on big endian systems
Pali Rohár [Thu, 7 Apr 2022 12:51:03 +0000 (14:51 +0200)]
btrfs: Fix compilation on big endian systems

Fix following two compile errors on big endian systems:

  CC      fs/btrfs/btrfs.o
In file included from include/linux/byteorder/big_endian.h:107,
                 from ./arch/powerpc/include/asm/byteorder.h:82,
                 from ./arch/powerpc/include/asm/bitops.h:8,
                 from include/linux/bitops.h:152,
                 from include/uuid.h:9,
                 from fs/btrfs/btrfs.c:10:
fs/btrfs/conv-funcs.h: In function ‘btrfs_key_to_disk’:
include/linux/byteorder/generic.h:90:21: error: ‘__cpu_to_le16’ undeclared (first use in this function); did you mean ‘__cpu_to_le16p’?
 #define cpu_to_le16 __cpu_to_le16
                     ^~~~~~~~~~~~~
fs/btrfs/conv-funcs.h:79:10: note: in expansion of macro ‘cpu_to_le16’
   __u16: cpu_to_le16,     \
          ^~~~~~~~~~~

  CC      fs/btrfs/compression.o
In file included from ./arch/powerpc/include/asm/unaligned.h:9,
                 from fs/btrfs/compression.c:16:
include/linux/unaligned/access_ok.h:6:19: error: redefinition of ‘get_unaligned_le16’
 static inline u16 get_unaligned_le16(const void *p)
                   ^~~~~~~~~~~~~~~~~~
In file included from fs/btrfs/ctree.h:16,
                 from fs/btrfs/btrfs.h:12,
                 from fs/btrfs/compression.c:8:
include/linux/unaligned/le_byteshift.h:40:19: note: previous definition of ‘get_unaligned_le16’ was here
 static inline u16 get_unaligned_le16(const void *p)
                   ^~~~~~~~~~~~~~~~~~

Include file asm/unaligned.h contains arch specific macros and functions
for unaligned access as opposite to linux/unaligned le_byteshift.h which
contains macros and functions specific to little endian systems only.

Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Qu Wenruo <wqu@suse.com>
2 years agoIOMUX: Fix access past end of console_devices
Sean Anderson [Wed, 6 Apr 2022 18:36:35 +0000 (14:36 -0400)]
IOMUX: Fix access past end of console_devices

We should only access console_devices[file][i] once we have checked that i
< cd_count[file]. Otherwise, we will access uninitialized memory at the end
of the loop. console_devices[file][i] should not be NULL, but putting the
assignment in the loop condition allows us to ensure that i is checked
beforehand. This isn't a bug, but it does make valgrind stop complaining.

Fixes: 400797cad3 ("IOMUX: Split out for_each_console_dev() helper macro")
Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Andrew Scull <ascull@google.com>
Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2 years agoConvert CONFIG_SYS_MEM_TOP_HIDE to Kconfig
Tom Rini [Wed, 6 Apr 2022 14:33:32 +0000 (10:33 -0400)]
Convert CONFIG_SYS_MEM_TOP_HIDE to Kconfig

This converts the following to Kconfig:
   CONFIG_SYS_MEM_TOP_HIDE

Signed-off-by: Tom Rini <trini@konsulko.com>
2 years agotools: add boot/ to .gitignore
Du Huanpeng [Thu, 7 Apr 2022 09:37:49 +0000 (17:37 +0800)]
tools: add boot/ to .gitignore

/tools/boot/ is a build product. Add it to .gitignore

Signed-off-by: Du Huanpeng <dhu@hodcarrier.org>
2 years agofs/squashfs: simplify sqfs_read()
Heinrich Schuchardt [Mon, 11 Apr 2022 20:54:44 +0000 (22:54 +0200)]
fs/squashfs: simplify sqfs_read()

* Don't check argument of free(). Free does this itself.
* Reduce scope of data_buffer. Remove duplicate free().
* Avoid superfluous NULL assignment.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
2 years agoimage-fit: don't check free() argument
Heinrich Schuchardt [Mon, 11 Apr 2022 18:08:03 +0000 (20:08 +0200)]
image-fit: don't check free() argument

* free() checks if its argument is NULL. Remove duplicate checks.
* Remove duplicate free(ovcopy).

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2 years agogpio: aspeed: Fix incorrect offset of read back register.
Billy Tsai [Wed, 13 Apr 2022 05:34:51 +0000 (13:34 +0800)]
gpio: aspeed: Fix incorrect offset of read back register.

The offset of the current read back register is the value of the gpio pin,
not the value written for the gpio output.
This patch fix it to avoid the other gpio output value controlled by the
same register being set incorrectly.

Fixes: 7ad889b0f37a ("gpio: Add Aspeed GPIO driver")
Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
2 years agoconfigs: Enable EXT4 and ISO partitions for the DeveloperBox
Ilias Apalodimas [Tue, 12 Apr 2022 21:16:44 +0000 (00:16 +0300)]
configs: Enable EXT4 and ISO partitions for the DeveloperBox

Since this box is SystemReady compliant enable ISO_PARTITION which is
needed to start some installers (e.g Fedora).  While at it enable EXT4
as well which is a common filesystem for targets

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Acked-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2 years ago.mailmap: Start to use new amd.com email address
Michal Simek [Thu, 14 Apr 2022 13:50:46 +0000 (15:50 +0200)]
.mailmap: Start to use new amd.com email address

Xilinx has been acquired by AMD that's why emails should be also updated.
The patch is updating .mailmap file and also MAINTAINERS files as was done
by commit 5cd1ecb99490 ("ppc: qemu: Update MAINTAINERS for correct email
address").
The rest of my emails are not going to change.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
2 years agoimage-fdt: save name of FIT configuration in '/chosen' node
Daniel Golle [Tue, 12 Apr 2022 20:00:43 +0000 (21:00 +0100)]
image-fdt: save name of FIT configuration in '/chosen' node

It can be useful for the OS (Linux) to know which configuration has
been chosen by U-Boot when launching a FIT image.
Store the name of the FIT configuration node used in a new string
property called 'u-boot,bootconf' in the '/chosen' node in device tree.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2 years agoMerge tag 'u-boot-rockchip-20220418' of https://source.denx.de/u-boot/custodians...
Tom Rini [Tue, 19 Apr 2022 12:50:23 +0000 (08:50 -0400)]
Merge tag 'u-boot-rockchip-20220418' of https://source.denx.de/u-boot/custodians/u-boot-rockchip

- Add rk3066 SoC support;
- Add rk3066 MK808 board support;
- dts sync from kernel for rk322x, rk3288;
- some other board level config update;

2 years agoMerge branch '2022-04-18-dm-reducing-spl-memory-usage'
Tom Rini [Tue, 19 Apr 2022 12:14:15 +0000 (08:14 -0400)]
Merge branch '2022-04-18-dm-reducing-spl-memory-usage'

- Assorted DM cleanups from Simon.  This results in some noticeable
  binary size savings in SPL.

2 years agodm: core: Deal with a wrinkle with linker lists
Simon Glass [Sun, 27 Mar 2022 20:26:20 +0000 (14:26 -0600)]
dm: core: Deal with a wrinkle with linker lists

When every member of a linker list is aligned by the compiler, we can no
longer rely on the sizeof of the struct to determine the number of
entries.

For example, if the struct size is 0x90 but every entry is aligned to 0xa0
by the compiler, the linker list entries takes more space in memory and
the calculation of the number of entries is incorrect. For example, we may
see 0x12 entries when there are only 0x11.

This is a real problem. There may be a general solution, although I cannot
currently think of one. So far it only bites with OF_PLATDATA_RT which
creates a pointer to each entry of the 'struct udevice' linker_list. This
does not happen without that option, so it only affects SPL.

Work around it by manually calculating the aligned size of struct udevice,
then using that for the n_ent calculation.

Note: the alignment fix to linker list was here:

   0b2fa98aa5e linker_lists: Fix alignment issue

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agodm: core: Allow devres to be disabled in SPL
Simon Glass [Sun, 27 Mar 2022 20:26:19 +0000 (14:26 -0600)]
dm: core: Allow devres to be disabled in SPL

At present if devres is enabled in U-Boot proper it is enabled in SPL.
We don't normally want it there, so disable it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Angus Ainslie <angus@akkea.ca>
2 years agosandbox: Align linker lists to a 32-byte boundary
Simon Glass [Sun, 27 Mar 2022 20:26:18 +0000 (14:26 -0600)]
sandbox: Align linker lists to a 32-byte boundary

Use this larger boundary to ensure that linker lists at least start on the
maximum possible alignment boundary. See also the CONFIG_LINKER_LIST_ALIGN
setting, but that is host-arch-specific, so it seems better to use the
largest value for every host architecture.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agosandbox: Allow link flags to be given
Simon Glass [Sun, 27 Mar 2022 20:26:17 +0000 (14:26 -0600)]
sandbox: Allow link flags to be given

At present the link flags are not used for sandbox. Update the command
line to use them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agoMakefile: Avoid resetting link flags in config.mk
Simon Glass [Sun, 27 Mar 2022 20:26:16 +0000 (14:26 -0600)]
Makefile: Avoid resetting link flags in config.mk

This makes it impossible to change them elsewhere. The default value is
'empty' anyway, so just drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agoMakefile: Drop a stale comment about linking
Simon Glass [Sun, 27 Mar 2022 20:26:15 +0000 (14:26 -0600)]
Makefile: Drop a stale comment about linking

The bug mentioned here is fixed, so drop the comment.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agosandbox: Correct loss of early output in SPL
Simon Glass [Sun, 27 Mar 2022 20:26:14 +0000 (14:26 -0600)]
sandbox: Correct loss of early output in SPL

At present fputc() is used before the console is available, then write()
is used. These are not compatible. Since fputc() buffers internally it is
better to use the write(), so that a partial line is immediately
displayed.

This has a slight effect on performance, but we are already using write()
for the vast majority of the output with no obvious impacts.

Signed-off-by: Simon Glass <sjg@chromium.org>
2 years agorockchip: video: mipi: add more compatible strings for rk3288/rk3399
Johan Jonker [Sat, 16 Apr 2022 08:25:16 +0000 (10:25 +0200)]
rockchip: video: mipi: add more compatible strings for rk3288/rk3399

The rk3288/RK3399 DT synced from Linux contains some different
compatible strings in the mipi node then origanal used in U-boot.
Allow both options to be backwards compatible and to be able
to handle recent rk3288.dtsi and rk3399.dtsi files.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: video: rk_edp: add more rk3288 edp node options
Johan Jonker [Sat, 16 Apr 2022 07:45:56 +0000 (09:45 +0200)]
rockchip: video: rk_edp: add more rk3288 edp node options

The rk3288 DT synced from Linux contains some different
properties in the edp node then origanal used in U-boot.
Allow both options to be backwards compatible and to be able
to handle recent rk3288.dtsi files.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agoboard: rk3288: add more DT files to MAINTAINERS
Johan Jonker [Fri, 15 Apr 2022 21:21:45 +0000 (23:21 +0200)]
board: rk3288: add more DT files to MAINTAINERS

A number of rk3229/rk3288 DT files are synced from Linux.
Add a maintainer to look after them and to help with
review and testing.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agoboard: google: veyron: add more DT files to MAINTAINERS
Johan Jonker [Fri, 15 Apr 2022 21:21:44 +0000 (23:21 +0200)]
board: google: veyron: add more DT files to MAINTAINERS

The Google Veyron rk3288 DT files are synced from Linux.
Add a maintainer to look after them and to help with
review and testing.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: fix boot_devices constants
Johan Jonker [Fri, 15 Apr 2022 21:21:43 +0000 (23:21 +0200)]
rockchip: fix boot_devices constants

The DT node name pattern in mmc-controller.yaml for mmc
is "^mmc(@.*)?$". The Rockchip mmc nodes have been synced
with Linux, so update the boot_devices constants as well.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agoarm: dts: rockchip: move all rk3288 u-boot specific properties in separate dtsi files
Johan Jonker [Fri, 15 Apr 2022 21:21:39 +0000 (23:21 +0200)]
arm: dts: rockchip: move all rk3288 u-boot specific properties in separate dtsi files

In order to sync rk3288.dtsi from Linux it needed to
move all u-boot specific properties in separate dtsi files.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: rk3288-cru: sync the clock dt-binding header from Linux
Johan Jonker [Fri, 15 Apr 2022 21:21:38 +0000 (23:21 +0200)]
rockchip: rk3288-cru: sync the clock dt-binding header from Linux

In order to update the DT for rk3288
sync the clock dt-binding header.
This is the state as of v5.17 in Linux.
Keep SCLK_MAC_PLL in use for rk3288 clock driver.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: rk3288-power: sync power domain dt-binding header from Linux
Johan Jonker [Fri, 15 Apr 2022 21:21:37 +0000 (23:21 +0200)]
rockchip: rk3288-power: sync power domain dt-binding header from Linux

In order to update the DT for rk3288
sync the power domain dt-binding header.
This is the state as of v5.17 in Linux.
Change location to be more in line with other SoCs.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agoarm: dts: rockchip: sync rk3229-evb.dts from Linux
Johan Jonker [Fri, 15 Apr 2022 21:21:36 +0000 (23:21 +0200)]
arm: dts: rockchip: sync rk3229-evb.dts from Linux

Sync rk3229-evb.dts from Linux version 5.17.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agoarm: dts: rockchip: sync rk322x.dtsi from Linux
Johan Jonker [Fri, 15 Apr 2022 21:21:35 +0000 (23:21 +0200)]
arm: dts: rockchip: sync rk322x.dtsi from Linux

Sync rk322x.dtsi from Linux version 5.17.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agoarm: dts: rockchip: move all rk322x u-boot specific properties in separate dtsi files
Johan Jonker [Fri, 15 Apr 2022 21:21:34 +0000 (23:21 +0200)]
arm: dts: rockchip: move all rk322x u-boot specific properties in separate dtsi files

In order to sync rk322x.dtsi from Linux, move all
U-boot specific properties in separate dtsi files.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: rk3228-cru: sync the clock dt-binding header from Linux
Johan Jonker [Fri, 15 Apr 2022 21:21:33 +0000 (23:21 +0200)]
rockchip: rk3228-cru: sync the clock dt-binding header from Linux

In order to update the DT for rk3228
sync the clock dt-binding header.
This is the state as of v5.17 in Linux.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: rk3228-power: sync power domain dt-binding header from Linux
Johan Jonker [Fri, 15 Apr 2022 21:21:32 +0000 (23:21 +0200)]
rockchip: rk3228-power: sync power domain dt-binding header from Linux

In order to update the DT for rk3228
sync the power domain dt-binding header.
This is the state as of v5.17 in Linux.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agodoc: rockchip: add rk3066 Rikomagic MK808
Johan Jonker [Sat, 16 Apr 2022 15:09:52 +0000 (17:09 +0200)]
doc: rockchip: add rk3066 Rikomagic MK808

Add rk3066 Rikomagic MK808 to the list of
mainline supported Rockchip boards.
Include instructions for creating and programming
images to NAND and SD card.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agodoc: rockchip: add px30/rk3326 boards and examples
Johan Jonker [Sat, 16 Apr 2022 15:09:51 +0000 (17:09 +0200)]
doc: rockchip: add px30/rk3326 boards and examples

There are several PX30/RK3326 boards in use without
mentioning in rockchip.rst. Add boards and examples.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agodoc: rockchip: restyle rockchip.rst
Johan Jonker [Sat, 16 Apr 2022 15:09:50 +0000 (17:09 +0200)]
doc: rockchip: restyle rockchip.rst

With more text coming to the rockchip.rst document,
give it a restyle first.

Changed:
  sort build examples alphabetically
  add git clone example
  fix bash examples
  fix phrases (grammer)
  fix typos

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: rk3066: add mk808_defconfig
Johan Jonker [Sat, 16 Apr 2022 15:09:49 +0000 (17:09 +0200)]
rockchip: rk3066: add mk808_defconfig

This commit adds the default configuration file and
relevant description for a MK808 board.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: rk3066: add Rikomagic MK808 board
Johan Jonker [Sat, 16 Apr 2022 15:09:48 +0000 (17:09 +0200)]
rockchip: rk3066: add Rikomagic MK808 board

MK808 is a RK3066-based board with 1 USB host and 1 USB OTG port,
HDMI and a micro-SD card slot. It also includes on-board NAND
and 1GB of SDRAM.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: rk3066: add core support
Johan Jonker [Sat, 16 Apr 2022 15:09:47 +0000 (17:09 +0200)]
rockchip: rk3066: add core support

Add the core architecture code for the rk3066.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: tools: add rk3066 support to rkcommon.c
Johan Jonker [Sat, 16 Apr 2022 15:09:46 +0000 (17:09 +0200)]
rockchip: tools: add rk3066 support to rkcommon.c

Add rk3066 support to rkcommon.c

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agoarm: dts: rockchip: add rk3066a-mk808.dts
Johan Jonker [Sat, 16 Apr 2022 15:09:45 +0000 (17:09 +0200)]
arm: dts: rockchip: add rk3066a-mk808.dts

MK808 is a RK3066-based board with 1 USB host and 1 USB OTG port,
HDMI and a micro-SD card slot. It also includes on-board NAND
and 1GB of SDRAM. Add rk3066a-mk808.dts. Move U-boot specific
things in a rk3066a-mk808-u-boot.dtsi file.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agoarm: dts: rockchip: add rk3066a.dtsi
Johan Jonker [Sat, 16 Apr 2022 15:09:44 +0000 (17:09 +0200)]
arm: dts: rockchip: add rk3066a.dtsi

In the Linux DT the file rk3xxx.dtsi is shared between
rk3066 and rk3188. Add rk3066a.dtsi. Move U-boot specific
things in a rk3066a-u-boot.dtsi file.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agoarm: dts: rockchip: fix include rk3xxx-u-boot.dtsi
Johan Jonker [Sat, 16 Apr 2022 15:09:43 +0000 (17:09 +0200)]
arm: dts: rockchip: fix include rk3xxx-u-boot.dtsi

Move the include for rk3xxx-u-boot.dtsi to rk3188-u-boot.dtsi
to stay in line with U-boot dtsi files.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agoarm: dts: rockchip: fix rk3xxx-u-boot.dtsi
Johan Jonker [Sat, 16 Apr 2022 15:09:42 +0000 (17:09 +0200)]
arm: dts: rockchip: fix rk3xxx-u-boot.dtsi

The file rk3xxx-u-boot.dtsi was original only for rk3188 and SPL.
With rk3066 added some nodes are also needed in TPL,
so change them to u-boot,dm-pre-reloc

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: rk3066: add sdram driver
Paweł Jarosz [Sat, 16 Apr 2022 15:09:41 +0000 (17:09 +0200)]
rockchip: rk3066: add sdram driver

Add rockchip rk3066 sdram driver

Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: rk3066: add rk3066 pinctrl driver
Paweł Jarosz [Sat, 16 Apr 2022 15:09:40 +0000 (17:09 +0200)]
rockchip: rk3066: add rk3066 pinctrl driver

Add driver supporting pin multiplexing on rk3066 platform.

Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: rk3066: add clock driver for rk3066 soc
Paweł Jarosz [Sat, 16 Apr 2022 15:09:39 +0000 (17:09 +0200)]
rockchip: rk3066: add clock driver for rk3066 soc

Add the clock driver for the rk3066 platform.

Derived from the rk3288 and rk3188 driver it
supports only a bare minimum to bring up the system
to reduce the TPL size for:
  SDRAM clock configuration.
  The boot devices NAND, EMMC, SDMMC, SPI.
  A UART for the debug messages (fixed) at 115200n8.
  A SARADC for the recovery button.
  A TIMER for the delays (fixed).

There's support for two possible frequencies,
the safe 600MHz which will work with default pmic settings and
will be set to get away from the 24MHz default and
the maximum of 1.416Ghz, which boards can set if they
were able to get pmic support for it.

After the clock tree is set during the TPL probe
there's no parent update support.

In OF_REAL mode the drivers ns16550.c and dw-apb-timer.c
obtain the (fixed) clk_get_rate from the clock driver
instead of platdata.

The rk3066 cru node has a number of assigned-clocks properties
that call the .set_rate() function. Add them to the list so that
they return a 0 instead of -ENOENT.

Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: rk3066: add grf header file
Paweł Jarosz [Sat, 16 Apr 2022 15:09:38 +0000 (17:09 +0200)]
rockchip: rk3066: add grf header file

grf is needed by various drivers for rk3066 soc.

Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: rk3066-power: sync power domain dt-binding header from Linux
Johan Jonker [Sat, 16 Apr 2022 15:09:37 +0000 (17:09 +0200)]
rockchip: rk3066-power: sync power domain dt-binding header from Linux

In order to update the DT for rk3066
sync the power domain dt-binding header.
This is the state as of v5.12 in Linux.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: serial: Kconfig: allow ROCKCHIP_SERIAL enabled in TPL
Johan Jonker [Sat, 9 Apr 2022 16:55:14 +0000 (18:55 +0200)]
rockchip: serial: Kconfig: allow ROCKCHIP_SERIAL enabled in TPL

The serial_rockchip.c driver converts platdata to the data structure
used in the ns16550.c file and then calls the function
ns16550_serial_probe().
When compiled with OF_REAL the serial_rockchip.c driver returns
now -ENODEV when probed and does no harm.
The config ROCKCHIP_SERIAL is currently depends on SPL_OF_PLATDATA.
Allow serial port use for both SPL and TPL by removing this
dependency and SPL_BUILD restriction.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: serial: Kconfig: add select SYS_NS16550 to config ROCKCHIP_SERIAL
Johan Jonker [Sat, 9 Apr 2022 16:55:13 +0000 (18:55 +0200)]
rockchip: serial: Kconfig: add select SYS_NS16550 to config ROCKCHIP_SERIAL

The Rockchip serial driver depends on an enabled NS16550 driver,
so add select SYS_NS16550 to config ROCKCHIP_SERIAL.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: serial: rename U_BOOT_DRIVER name to rockchip_uart
Johan Jonker [Sat, 9 Apr 2022 16:55:12 +0000 (18:55 +0200)]
rockchip: serial: rename U_BOOT_DRIVER name to rockchip_uart

When a defconfig for rk3288 is compiled it gives the warning:

rockchip_rk3288_uart: Missing .compatible in
                      ./drivers/serial/serial_rockchip.c
                    : WARNING: the driver rockchip_rk3288_uart
                      was not found in the driver list

Fix by renaming U_BOOT_DRIVER name of serial_rockchip.c
to rockchip_uart. Add rk3288 serial support with
a DM_DRIVER_ALIAS define.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: serial: move driver alias to serial_rockchip.c
Johan Jonker [Sat, 9 Apr 2022 16:55:11 +0000 (18:55 +0200)]
rockchip: serial: move driver alias to serial_rockchip.c

The Rockchip uart DT nodes have "snps,dw-apb-uart" as
fall back string. The driver ns16550.c has CONFIG_IS_ENABLED(OF_REAL)
as condition to of_match and does not copy dtplat data.
For TPL/SPL the driver serial_rockchip.c
is used. Move driver alias to correct driver.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: serial: restyle the serial_rockchip.c driver
Johan Jonker [Sat, 9 Apr 2022 16:55:10 +0000 (18:55 +0200)]
rockchip: serial: restyle the serial_rockchip.c driver

The ns16550.c driver has the following conditions for .of_match:

CONFIG_IS_ENABLED(OF_REAL)

For Rockchip SoCs with TPL/SPL and platform data that need serial
support the serial_rockchip.c driver was made. It copies this data
and then calls ns16550_serial_probe(). With the addition of yet an other
SoC type this driver is in need for a little restyle.
Simplify struct rockchip_uart_plat and add extra SoCs with
DM_DRIVER_ALIAS(). Return -ENODEV when the ns16550.c driver
probe function is available.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: mmc: rockchip_dw_mmc: add rk3066/rk3188 support
Johan Jonker [Sat, 9 Apr 2022 16:55:09 +0000 (18:55 +0200)]
rockchip: mmc: rockchip_dw_mmc: add rk3066/rk3188 support

The Rockchip SoCs rk3066/rk3188 have MMC DT nodes
with as compatible string "rockchip,rk2928-dw-mshc".
Add OF_PLATDATA support to the existing driver with
help of a DM_DRIVER_ALIAS.

This type needs a permanent enabled fifo.
The other Rockchip SoCs always have the property
"u-boot,spl-fifo-mode" in the MMC DT nodes,
because MMC to SRAM can't do DMA.
Make this property a requirement for MMC OF_PLATDATA
structures. The property "fifo-mode" must be added
for all other compile modes.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: mmc: rockchip_dw_mmc: fix ciu clock index
Johan Jonker [Sat, 9 Apr 2022 16:55:08 +0000 (18:55 +0200)]
rockchip: mmc: rockchip_dw_mmc: fix ciu clock index

The document rockchip-dw-mshc.yaml decribes a maximum of 4 clocks.
In the rockchip_dw_mmc driver the clock name in use was "fixed"
to "ciu" with index 1, but later reverted back to index 0.
The clock drivers can handle both, but the calling driver
should submit correct data as a standard practice.
Fix the "ciu" clock index by setting it back to 1.

  clock-names:
    minItems: 2
    items:
      - const: biu
      - const: ciu
      - const: ciu-drive
      - const: ciu-sample

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: timer: dw-apb-timer: fix whitespace in U_BOOT_DRIVER structure
Johan Jonker [Sat, 9 Apr 2022 16:55:07 +0000 (18:55 +0200)]
rockchip: timer: dw-apb-timer: fix whitespace in U_BOOT_DRIVER structure

The line with .of_to_plat in the U_BOOT_DRIVER structure
of dw-apb-timer.c is not aligned with the rest.
Add an extra TAB to fix the whitespace.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: timer: add OF_PLATDATA support for dw-apb-timer
Johan Jonker [Sat, 9 Apr 2022 16:55:06 +0000 (18:55 +0200)]
rockchip: timer: add OF_PLATDATA support for dw-apb-timer

The Rockchip rk3066 SoC has 3 dw-apb-timer nodes.
U-boot is compiled with OF_PLATDATA TPL/SPL options,
so add OF_PLATDATA support for the dw-apb-timer.
Also change driver name to be able to compile with
U-boot scripts. No reset OF_PLATDATA support was added,
because the rk3066 nodes don't need/have them.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: tpl: use IS_ENABLED for timer_init() call condition
Johan Jonker [Sat, 9 Apr 2022 16:55:05 +0000 (18:55 +0200)]
rockchip: tpl: use IS_ENABLED for timer_init() call condition

Not all Rockchip SoC models use the ARM arch timer.
Call the function timer_init() only when
CONFIG_SYS_ARCH_TIMER is available.
Use the call condition IS_ENABLED to increase
build coverage and make the code easier to read.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: tpl: change call condition rockchip_stimer_init()
Johan Jonker [Sat, 9 Apr 2022 16:55:04 +0000 (18:55 +0200)]
rockchip: tpl: change call condition rockchip_stimer_init()

The Rockchip SoCs rk3066/rk3188 have no CONFIG_ROCKCHIP_STIMER_BASE
defined. Currently there's no exception in TPL. Make this more
generic and compile the code inside the function rockchip_stimer_init()
only when CONFIG_ROCKCHIP_STIMER_BASE is available.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: spl: change call condition rockchip_stimer_init()
Johan Jonker [Sat, 9 Apr 2022 16:55:03 +0000 (18:55 +0200)]
rockchip: spl: change call condition rockchip_stimer_init()

The Rockchip SoCs rk3066/rk3188 have no CONFIG_ROCKCHIP_STIMER_BASE
defined. Currently only rk3188 has an exception in SPL. Make this more
generic and compile code inside the function rockchip_stimer_init()
only when CONFIG_ROCKCHIP_STIMER_BASE is available.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: move ROCKCHIP_STIMER_BASE to Kconfig
Johan Jonker [Sat, 9 Apr 2022 16:55:02 +0000 (18:55 +0200)]
rockchip: move ROCKCHIP_STIMER_BASE to Kconfig

Move ROCKCHIP_STIMER_BASE to Kconfig.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: Enable AHCI/SCSI/SATA on rockpro64-rk3399.
Vagrant Cascadian [Wed, 6 Apr 2022 20:42:04 +0000 (13:42 -0700)]
rockchip: Enable AHCI/SCSI/SATA on rockpro64-rk3399.

Add options to enable AHCI, SCSI and SATA.

Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: Enable SCSI in distro bootcmd for rk3399.
Vagrant Cascadian [Wed, 6 Apr 2022 20:42:03 +0000 (13:42 -0700)]
rockchip: Enable SCSI in distro bootcmd for rk3399.

Include SCSI in the list of boot targets if CONFIG_CMD_SCSI is
enabled.

Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agorockchip: clk: add clocks to px30_clk_enable
Chris Morgan [Fri, 25 Mar 2022 17:09:22 +0000 (12:09 -0500)]
rockchip: clk: add clocks to px30_clk_enable

Add the HCLK_OTG, HCLK_SFC, and SCLK_SFC clocks to px30_clk_enable.
Without this change U-Boot reports an error of "Enable
clock-controller@ff2b0000 failed" on boot when using the SFC or USB in
U-Boot.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agospi: rockchip_sfc: Add missing include for dm/device_compat.h
Chris Morgan [Fri, 25 Mar 2022 15:40:35 +0000 (10:40 -0500)]
spi: rockchip_sfc: Add missing include for dm/device_compat.h

Add missing include for dm/device_compat.h. Without this include the
SFC driver fails to compile because dev_err and dev_dbg are not
defined.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agoadc: rockchip-saradc: add support for getting reference voltage value
Peter Cai [Fri, 4 Feb 2022 20:16:06 +0000 (15:16 -0500)]
adc: rockchip-saradc: add support for getting reference voltage value

Mirroring commit 97ab802aa36f ("adc: meson-saradc: add support for
getting reference voltage value") for meson-saradc, this adds support
for getting the "vref-supply" regulator and register it as the ADC's
reference voltage regulator, so clients can translate sampled ADC values
to voltage.

Signed-off-by: Peter Cai <peter@typeblog.net>
Reviewed-by: John Keeping <john@metanate.com>
Tested-by: John Keeping <john@metanate.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Philipp Tomsich <philipp.tomsich@vrull.eu>
Cc: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2 years agommc: rockchip_sdhci: Correct error checking
Haolin Li [Tue, 22 Mar 2022 12:58:02 +0000 (05:58 -0700)]
mmc: rockchip_sdhci: Correct error checking

A pointer can not be negative. Use macro IS_ERR_OR_NULL() for checking.

Signed-off-by: Haolin Li <li.haolin@qq.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2 years agoMerge tag 'efi-2022-07-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Fri, 15 Apr 2022 18:29:52 +0000 (14:29 -0400)]
Merge tag 'efi-2022-07-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2022-07-rc1-2

Documentation:

* Describe env command

UEFI

* simplify Unicode string functions
* clean up the usage of GUIDs for capsule updates

2 years agoMerge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-net
Tom Rini [Fri, 15 Apr 2022 12:09:52 +0000 (08:09 -0400)]
Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-net

- DM9000 DM support
- tftp server bug fix
- mdio ofnode support functions
- Various phy fixes and improvements.

[trini: Fixup merge conflicts in drivers/net/phy/ethernet_id.c
drivers/net/phy/phy.c include/phy.h]

2 years agoCI: Print out unmigrated symbols when failing
Tom Rini [Mon, 11 Apr 2022 17:20:00 +0000 (13:20 -0400)]
CI: Print out unmigrated symbols when failing

To make addressing the problem of migrated symbols being present in
board config header files, update the CI test to them print what symbols
are causing it to fail.  Also report all failures in the tree, rather
than stopping at the first failing file.

Signed-off-by: Tom Rini <trini@konsulko.com>
2 years agoMerge branch '2022-04-14-assorted-updates'
Tom Rini [Fri, 15 Apr 2022 12:04:16 +0000 (08:04 -0400)]
Merge branch '2022-04-14-assorted-updates'

- Apple M1 Ultra support, TI power domain fix, atsha204a big endian
  support, LED cleanups and support for default-state, increase malloc
  pool on sandbox, ubifs bugfix, further serial cleanup / semihost
  support, fix a few cases around enabling/disabling FS support in SPL,
  clean up duplication of table_compute_checksum()

2 years agoefi_loader: simplify efi_serialize_load_option()
Heinrich Schuchardt [Sat, 2 Apr 2022 09:47:01 +0000 (11:47 +0200)]
efi_loader: simplify efi_serialize_load_option()

Use u16_strsize().

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2 years agoefi_loader: EFI_HII_STRING_PROTOCOL.GetString()
Heinrich Schuchardt [Sat, 2 Apr 2022 09:47:00 +0000 (11:47 +0200)]
efi_loader: EFI_HII_STRING_PROTOCOL.GetString()

Use u16_strsize().

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2 years agolib: simplify u16_strdup()
Heinrich Schuchardt [Sat, 2 Apr 2022 09:46:59 +0000 (11:46 +0200)]
lib: simplify u16_strdup()

Use u16_strsize() instead of duplicating it.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2 years agolib: convert u16_strlen() into a macro
Heinrich Schuchardt [Sat, 2 Apr 2022 09:46:58 +0000 (11:46 +0200)]
lib: convert u16_strlen() into a macro

The function u16_strlen() can be implemented as call to u16_strnlen().

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2 years agodoc: man-page for the env command
Patrick Delaunay [Thu, 14 Apr 2022 17:07:05 +0000 (19:07 +0200)]
doc: man-page for the env command

Describe the env command.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2 years agodoc: uefi: Update the capsule update related documentation
Sughosh Ganu [Fri, 15 Apr 2022 05:59:41 +0000 (11:29 +0530)]
doc: uefi: Update the capsule update related documentation

Update the capsule update functionality related documentation to
refect the additional definitions that need to be made per platform
for supporting the capsule update feature.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2 years agomkeficapsule: Remove raw and FIT GUID types
Sughosh Ganu [Fri, 15 Apr 2022 05:59:40 +0000 (11:29 +0530)]
mkeficapsule: Remove raw and FIT GUID types

While building a capsule, the GUID value of that specific image is to
be passed through the --guid command option to the mkeficapsule
tool instead of using one of --raw or --fit options, where the GUID
value passed through the command line option is the image GUID.

This renders the EFI_FIRMWARE_IMAGE_TYPE_UBOOT_FIT_GUID and
EFI_FIRMWARE_IMAGE_TYPE_UBOOT_RAW_GUID values superfluous. Remove the
--raw and --fit command line options as well. Also modify the
mkeficapsule man page to reflect this change.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2 years agoFMP: Remove GUIDs for FIT and raw images
Sughosh Ganu [Fri, 15 Apr 2022 05:59:39 +0000 (11:29 +0530)]
FMP: Remove GUIDs for FIT and raw images

The capsule update code has been modified for getting the image GUID
values from the platform code. With this, each image now has a unique
GUID value. With this change, there is no longer a need for defining
GUIDs for FIT and raw images. Remove these GUID values.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2 years agotest: capsule: Modify the capsule tests to use GUID values for sandbox
Sughosh Ganu [Fri, 15 Apr 2022 05:59:38 +0000 (11:29 +0530)]
test: capsule: Modify the capsule tests to use GUID values for sandbox

The current UEFI capsule updation code uses two GUID values, one for
FIT images, and one for raw images across platforms. This logic is
being changed to have GUID values per image, per platform. Change the
tests for the capsule update code to reflect this change. The GUID
values now used are the ones specific to the sandbox platform -- one
for the u-boot image, and another for the u-boot environment image.

Install the FMP instance for raw images on the sandbox variant for
testing the capsule update code. Install the FMP instance for the FIT
images on the sandbox64 and sandbox_flattree variant for testing
capsule update for FIT images. This is being done by splitting the
capsule update script for FIT and raw images.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2 years agoefi: Define set_dfu_alt_info() for boards with UEFI capsule update enabled
Sughosh Ganu [Fri, 15 Apr 2022 05:59:37 +0000 (11:29 +0530)]
efi: Define set_dfu_alt_info() for boards with UEFI capsule update enabled

Currently, there are a bunch of boards which enable the UEFI capsule
update feature. The actual update of the firmware images is done
through the dfu framework which uses the dfu_alt_info environment
variable for getting information on the update, like device, partition
number/address etc. The dfu framework allows the variable to be set
through the set_dfu_alt_info function defined by the platform, or if
the function is not defined, it gets the variable from the
environment. Using the value set in the environment is not very
robust, since the variable can be modified from the u-boot command
line and this can cause an incorrect update.

To prevent this from happening, define the set_dfu_alt_info function
when the capsule update feature is enabled. A weak function is defined
which sets the dfu_alt_info environment variable by getting the string
for the variable from the platform.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2 years agocapsule: Put a check for image index before the update
Sughosh Ganu [Fri, 15 Apr 2022 05:59:36 +0000 (11:29 +0530)]
capsule: Put a check for image index before the update

The current capsule update code compares the image GUID value in the
capsule header with the image GUID value obtained from the
GetImageInfo function of the Firmware Management Protocol(FMP). This
comparison is done to ascertain if the FMP's SetImage function can be
called for the update. Make this checking more robust by comparing the
image_index value passed through the capsule with that returned by the
FMP's GetImageInfo function. This protects against the scenario of the
firmware being updated in a wrong partition/location on the storage
device if an incorrect value has been passed through the capsule,
since the image_index is used to determine the location of the update
on the storage device.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2 years agocapsule: FMP: Populate the image descriptor array from platform data
Sughosh Ganu [Fri, 15 Apr 2022 05:59:35 +0000 (11:29 +0530)]
capsule: FMP: Populate the image descriptor array from platform data

Currently, the image descriptor array that has been passed to the
GetImageInfo function of the Firmware Management Protocol(FMP) gets
populated through the data stored with the dfu framework. The
dfu data is not restricted to contain information only of the images
updatable through the capsule update mechanism, but it also contains
information on other images. The image descriptor array is also parsed
by the ESRT generation code, and thus the ESRT table contains entries
for other images that are not being handled by the FMP for the capsule
updates. Fix this by populating the image descriptor array from the
structure initialised in the board file.

The other issue fixed is assignment of a separate GUID for all images
in the image descriptor array. The UEFI specification mandates that
all entries in the ESRT table should have a unique GUID value as part
of the FwClass member of the EFI_SYSTEM_RESOURCE_ENTRY. Currently, all
images are assigned a single GUID value, either an FIT GUID or a raw
image GUID. This is fixed by obtaining the GUID values from the
efi_fw_images array defined per platform.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Reviewed-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2 years agocapsule: board: Add information needed for capsule updates
Sughosh Ganu [Fri, 15 Apr 2022 05:59:34 +0000 (11:29 +0530)]
capsule: board: Add information needed for capsule updates

Add a structure which defines the information that is needed for
executing capsule updates on a platform. Some information in the
structure like the dfu string is used for making the update process
more robust while some information like the per platform image GUIDs
is used for fixing issues. Initialise this structure in the board
file, and use the information for the capsule updates.

Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org>
2 years agofs: Allow to compile CMD_UBIFS when SPL is enabled
Pali Rohár [Tue, 5 Apr 2022 13:49:24 +0000 (15:49 +0200)]
fs: Allow to compile CMD_UBIFS when SPL is enabled

Currently there is no UBIFS support in SPL. But macro CONFIG_CMD_UBIFS is
defined also when building SPL. when both CMD_UBIFS and SPL are enabled
then build process throw compile error.

Fix check for ubifs code in fstypes[] to allow compiling CMD_UBIFS only in
proper U-Boot.

Signed-off-by: Pali Rohár <pali@kernel.org>
2 years agofs: Allow to compile FS_FAT only for proper U-Boot
Pali Rohár [Tue, 5 Apr 2022 13:48:32 +0000 (15:48 +0200)]
fs: Allow to compile FS_FAT only for proper U-Boot

CONFIG_SPL_FS_FAT cannot be disabled when CONFIG_FS_FAT is enabled. Fix it.

Signed-off-by: Pali Rohár <pali@kernel.org>
2 years agoRemove duplication of table_compute_checksum function
Tom Rini [Mon, 4 Apr 2022 18:43:51 +0000 (14:43 -0400)]
Remove duplication of table_compute_checksum function

It seems like there was some merge error when first cleaning up and
sharing this function.  We have both an inline version of the function
in include/tables_csum.h and a non-inline version in lib/tables_csum.c.
Rework things so that we only have the non-inline version (due to number
of calls, we should not inline this).

Fixes: 1befb38b8682 ("x86: Move table csum into separate file")
Fixes: 2b445e4d3194 ("x86: Move table csum into separate header")
Cc: Alexander Graf <agraf@csgraf.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2 years agoserial: smh: Implement puts for DM
Sean Anderson [Mon, 4 Apr 2022 18:18:00 +0000 (14:18 -0400)]
serial: smh: Implement puts for DM

This adds an implementation of puts for DM. The implementation is not as
clean as for the non-DM puts because we have to handle non-nul-terminated
string. We also handle short writes (though these are probably very
unusual).

Signed-off-by: Sean Anderson <sean.anderson@seco.com>