platform/kernel/u-boot.git
6 years agoARM: meson: Add Khadas VIM2 board DT
Loic Devulder [Wed, 3 Oct 2018 10:02:06 +0000 (12:02 +0200)]
ARM: meson: Add Khadas VIM2 board DT

This adds Device Tree for the Khadas VIM2 board.

The meson-gxm-khadas-vim2.dts is synchronized from Linux 4.18.10.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Loic Devulder <ldevulder@suse.de>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
6 years agoARM: dts: stm32mp1: Add usbotg_hs regulator for stm32mp157c-ev1
Patrice Chotard [Wed, 3 Oct 2018 07:38:38 +0000 (09:38 +0200)]
ARM: dts: stm32mp1: Add usbotg_hs regulator for stm32mp157c-ev1

Add usbotg_hs regulator to allow to use the USB mass-storage
feature on OTG usb port.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
6 years agocmd: pxe: add support for FIT config selection
Patrick Delaunay [Tue, 2 Oct 2018 08:54:48 +0000 (10:54 +0200)]
cmd: pxe: add support for FIT config selection

Add a way in configuration files (exlinux.conf for sysboot command)
to select a specific FIT configuration. The configuration is selected
with a string added after the FIT filename in the label "KERNEL" or
"LINUX", using the same format than bootm command:

KERNEL [Filename]#<conf>[#<extra-conf[#...]]

This configuration string, beginning by '#', is directly appended
to bootm argument 1 after <kernel_addr_r>.

bootm [<kernel_addr_r>]#<conf>[#<extra-conf[#...]]

see doc/uImage.FIT/command_syntax_extensions.txt for details

Example :
 KERNEL /fit.itb#cfg1
 KERNEL /fit.itb#cfg2

Configuration can be use also for overlay management :
 KERNEL /fit.itb#cfg1#dtbo1#dtbo3

see doc/uImage.FIT/overlay-fdt-boot.txt for details

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
6 years agoARM: meson: Extend mem_map to support 3GiB of RAM
Loic Devulder [Tue, 25 Sep 2018 14:30:35 +0000 (16:30 +0200)]
ARM: meson: Extend mem_map to support 3GiB of RAM

The current mem_map definition for Meson SoCs has support for up
to 2GiB of RAM. According to S905, S905X, S912 and S805X datasheets
the DDR region is set from 0x00000000 to 0xBFFFFFFF, so mem_map's
definition should be changed accordingly.

It is also needed to be able to boot Khadas VIM2 board with S912
SoC.

Signed-off-by: Loic Devulder <ldevulder@suse.de>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
6 years agofs: btrfs: Fix tree traversal with btrfs_next_slot()
Yevgeny Popovych [Fri, 7 Sep 2018 09:59:30 +0000 (12:59 +0300)]
fs: btrfs: Fix tree traversal with btrfs_next_slot()

When traversing slots in a btree (via btrfs_path) with btrfs_next_slot(),
we didn't correctly identify that the last slot in the leaf was reached
and we should jump to the next leaf.

This could lead to any kind of runtime errors or corruptions, like:
* file data not being read at all, or is read partially
* file is read but is corrupted
* (any) metadata being corrupted or not read at all, etc

The easiest way to reproduce this is to read a large enough file that
its EXTENT_DATA items don't fit into a single leaf.

Signed-off-by: Yevgeny Popovych <yevgenyp@pointgrab.com>
Cc: Marek Behun <marek.behun@nic.cz>
Tested-by: Marek BehĂșn <marek.behun@nic.cz>
6 years agortc: Add read8 and write8 support to isl1208 driver
Trent Piepho [Thu, 31 May 2018 18:14:44 +0000 (11:14 -0700)]
rtc: Add read8 and write8 support to isl1208 driver

This can be used for device register access from board code.

This allows access to capabilities in the RTC chip not abstracted in
U-Boot's RTC class.  E.g., device NVRAM or a tamper detection circuit.

Cc: Klaus Goger <klaus.goger@theobroma-systems.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
6 years agoKconfig: sandbox: enable cmd_avb and dependencies
Jens Wiklander [Tue, 25 Sep 2018 14:40:23 +0000 (16:40 +0200)]
Kconfig: sandbox: enable cmd_avb and dependencies

Enables cmd_avb and its dependencies need to run the AVB tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: Disable for sandbox_noblk]
Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoavb_verify: support sandbox configuration
Jens Wiklander [Tue, 25 Sep 2018 14:40:22 +0000 (16:40 +0200)]
avb_verify: support sandbox configuration

Change get_sector_buf() to use map_sysmem() to get a pointer to the
CONFIG_FASTBOOT_BUF_ADDR in memory.

Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agotest_avb: Update pymark.buildconfigspec information for the AVB tests
Jens Wiklander [Tue, 25 Sep 2018 14:40:21 +0000 (16:40 +0200)]
test_avb: Update pymark.buildconfigspec information for the AVB tests

Update the pymark.buildconfigspec to depend on 'cmd_mmc' in addition to
'cmd_avb' for those tests that needs more a more complete MMC
implementation or the "mmc" command.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
6 years agoavb_verify: support using OP-TEE TA AVB
Jens Wiklander [Tue, 25 Sep 2018 14:40:20 +0000 (16:40 +0200)]
avb_verify: support using OP-TEE TA AVB

With CONFIG_OPTEE_TA_AVB use the trusted application AVB provided by
OP-TEE to manage rollback indexes and device-lock status.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
6 years agotest: tee: test TEE uclass
Jens Wiklander [Tue, 25 Sep 2018 14:40:19 +0000 (16:40 +0200)]
test: tee: test TEE uclass

Tests the TEE uclass with a sandbox tee driver.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
[trini: initialize session to 0 in dm_test_tee]
Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agotee: add sandbox driver
Jens Wiklander [Tue, 25 Sep 2018 14:40:18 +0000 (16:40 +0200)]
tee: add sandbox driver

Adds a sandbox tee driver which emulates a generic TEE with the OP-TEE
AVB TA.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Fix printf warnings in ta_avb_invoke_func, slots is uint]
Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agosandbox: imply CONFIG_TEE (TEE uclass)
Jens Wiklander [Tue, 25 Sep 2018 14:40:17 +0000 (16:40 +0200)]
sandbox: imply CONFIG_TEE (TEE uclass)

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
6 years agosandbox: dt: add sandbox_tee node
Jens Wiklander [Tue, 25 Sep 2018 14:40:16 +0000 (16:40 +0200)]
sandbox: dt: add sandbox_tee node

Adds a sandbox_tee node to enable the sandbox tee driver in all the
sandbox dts files.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
6 years agotee: optee: support AVB trusted application
Jens Wiklander [Tue, 25 Sep 2018 14:40:15 +0000 (16:40 +0200)]
tee: optee: support AVB trusted application

Adds configuration option OPTEE_TA_AVB and a header file describing the
interface to the Android Verified Boot 2.0 (AVB) trusted application
provided by OP-TEE.

Tested-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agooptee: support routing of rpmb data frames to mmc
Jens Wiklander [Tue, 25 Sep 2018 14:40:14 +0000 (16:40 +0200)]
optee: support routing of rpmb data frames to mmc

Adds support in optee supplicant to route signed (MACed) RPMB frames
from OP-TEE Secure OS to MMC and vice versa to manipulate the RPMB
partition.

Tested-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agoarm: dt: hikey: Add optee node
Jens Wiklander [Tue, 25 Sep 2018 14:40:13 +0000 (16:40 +0200)]
arm: dt: hikey: Add optee node

Sync with 14e21cb8f811 ("arm64: dt: hikey: Add optee node"
from Linux kernel.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
6 years agoDocumentation: tee uclass and op-tee driver
Jens Wiklander [Tue, 25 Sep 2018 14:40:12 +0000 (16:40 +0200)]
Documentation: tee uclass and op-tee driver

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
6 years agotee: add OP-TEE driver
Jens Wiklander [Tue, 25 Sep 2018 14:40:11 +0000 (16:40 +0200)]
tee: add OP-TEE driver

Adds a OP-TEE driver.

* Targets ARM and ARM64
* Supports using any U-Boot memory as shared memory
* Probes OP-TEE version using SMCs
* Uses OPTEE message protocol version 2 to communicate with secure world

Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
6 years agodt/bindings: add bindings for optee
Jens Wiklander [Tue, 25 Sep 2018 14:40:10 +0000 (16:40 +0200)]
dt/bindings: add bindings for optee

Sync with c8bfafb15944 ("dt/bindings: add bindings for optee")
from Linux kernel.

Introduces linaro prefix and adds bindings for ARM TrustZone based OP-TEE
implementation.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
6 years agoAdd UCLASS_TEE for Trusted Execution Environment
Jens Wiklander [Tue, 25 Sep 2018 14:40:09 +0000 (16:40 +0200)]
Add UCLASS_TEE for Trusted Execution Environment

Adds a uclass to interface with a TEE (Trusted Execution Environment).

A TEE driver is a driver that interfaces with a trusted OS running in
some secure environment, for example, TrustZone on ARM cpus, or a
separate secure co-processor etc.

The TEE subsystem can serve a TEE driver for a Global Platform compliant
TEE, but it's not limited to only Global Platform TEEs.

The over all design is based on the TEE subsystem in the Linux kernel,
tailored for U-Boot.

Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
6 years agommc: rpmb: add mmc_rpmb_route_frames()
Jens Wiklander [Tue, 25 Sep 2018 14:40:08 +0000 (16:40 +0200)]
mmc: rpmb: add mmc_rpmb_route_frames()

Adds mmc_rpmb_route_frames() to route RPMB data frames from/to an
external entity.

Tested-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agocmd: avb: print error message if command fails
Jens Wiklander [Tue, 25 Sep 2018 14:40:07 +0000 (16:40 +0200)]
cmd: avb: print error message if command fails

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
6 years agocmd: avb read_rb: print rb_idx in hexadecimal
Jens Wiklander [Tue, 25 Sep 2018 14:40:06 +0000 (16:40 +0200)]
cmd: avb read_rb: print rb_idx in hexadecimal

Prior to this patch was do_avb_write_rb() reading supplied rb_idx as a
hexadecimal number while do_avb_read_rb() printed the read out rb_idx as
decimal number. For consistency change do_avb_read_rb() to print rb_idx
as a hexadecimal number too.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Igor Opaniuk <igor.opaniuk@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
6 years agodm: fdt: scan for devices under /firmware too
Jens Wiklander [Tue, 25 Sep 2018 14:40:05 +0000 (16:40 +0200)]
dm: fdt: scan for devices under /firmware too

Just as /chosen may contain devices /firmware may contain devices, scan
for devices under /firmware too.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
6 years agospl: spi: Do not hardcode fixed size for header
Michal Simek [Thu, 4 Oct 2018 07:30:20 +0000 (09:30 +0200)]
spl: spi: Do not hardcode fixed size for header

Find out size directly from header structure.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agospl: ram: Fix u_boot_pos calculation
Michal Simek [Thu, 4 Oct 2018 07:29:20 +0000 (09:29 +0200)]
spl: ram: Fix u_boot_pos calculation

The patch:
"spl: Weed out CONFIG_SYS_TEXT_BASE usage"
(sha1: 04ce5427bd3914cab8be78513275a20ab878520a)
introduced bug where assigning to u_boot_pos variable wasn't done
which end up in situation where SPL wasn't able to find out
image on the selected address.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years agomach-stm32: Set MPU SDRAM size to 512MB for STM32F7/H7
Patrice Chotard [Tue, 2 Oct 2018 07:03:10 +0000 (09:03 +0200)]
mach-stm32: Set MPU SDRAM size to 512MB for STM32F7/H7

This allows to boot all STM32F7 and STM32H7 boards independently
of the amount of embedded SDRAM.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
6 years agofs: fat: fix set_cluster()
Heinrich Schuchardt [Tue, 2 Oct 2018 07:30:45 +0000 (09:30 +0200)]
fs: fat: fix set_cluster()

Avoid CoverityScan warning SIGN_EXTENSION by changing the type of
parameter size of set_cluster().

Avoid leaking stack content when writing an incomplete last sector.

Reported-by: Coverity (CID: 184096)
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
6 years agofs: fat: memory leak in fat_unlink()
Heinrich Schuchardt [Tue, 2 Oct 2018 04:58:00 +0000 (06:58 +0200)]
fs: fat: memory leak in fat_unlink()

Do not leak filename_copy in case of error.
Catch out of memory when calling strdup.

Reported-by: Coverity (CID: 184086)
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
6 years agoARM: LogicPD: omap3logic: Remove Torpedo/SOM-LV autodection
Adam Ford [Sat, 29 Sep 2018 19:10:19 +0000 (14:10 -0500)]
ARM: LogicPD: omap3logic: Remove Torpedo/SOM-LV autodection

With there now being four device tree files, and 4 separate
defconfig files, the code necessary to determine which board is
being used is no longer necessary as the corresponding pin-muxing
and board names are determined by the device tree.

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoARM: DTS: Add Logic PD OMAP35/DM37 SOM-LV and OMAP35 Torpedo
Adam Ford [Sat, 29 Sep 2018 19:10:18 +0000 (14:10 -0500)]
ARM: DTS: Add Logic PD OMAP35/DM37 SOM-LV and OMAP35 Torpedo

With the device trees doing most of the work of pin-muxing and
DM doing much of the peripheral initialization, this creates
new defconfig files for each of the Logic PD variants with
proper register settings/pin-muxing.

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Update MAINTAINERS entry]
Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoARM: DTS: Add support for Logic PD OMAP35 Torpedo & SOM-LV
Adam Ford [Sat, 29 Sep 2018 19:10:17 +0000 (14:10 -0500)]
ARM: DTS: Add support for Logic PD OMAP35 Torpedo & SOM-LV

The baseboards and SOM's are virtually identical to their DM37
counterparts, but OMAP36/37 and OMAP3 have some minor register
differences.  With the boards being mostly driven by device trees
now, this synchronizes their respective device trees with linux-omap
for-next branch destined for 4.20 (or whatever the version after 4.19
will be called)

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoARM: DTS: Remove unnecessary u-boot.dtsi options from omap3/36xx
Adam Ford [Sat, 29 Sep 2018 19:10:16 +0000 (14:10 -0500)]
ARM: DTS: Remove unnecessary u-boot.dtsi options from omap3/36xx

With the introduction of the omap serial driver, the need for some
of these U-Boot specific modifications is gone.  This cleans up
this unnneeded stuff.

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agoARM: DTS: LogicPD-SOM-LV & Torpedo: Resync DTS with Kernel
Adam Ford [Sat, 29 Sep 2018 19:10:15 +0000 (14:10 -0500)]
ARM: DTS: LogicPD-SOM-LV & Torpedo: Resync DTS with Kernel

The device tree entries are from linux-omap's for-next branch
destined to me put into 4.20 (or whatever the version is after 4.19)

Signed-off-by: Adam Ford <aford173@gmail.com>
6 years agomisc: Add support for the Arm Versatile Express config bus
Liviu Dudau [Fri, 28 Sep 2018 12:43:31 +0000 (13:43 +0100)]
misc: Add support for the Arm Versatile Express config bus

Add support for the Arm Versatile Express config bus that is
being used for exposing various subsystems via a generic
configuration bus. This driver adds support for generating
transactions on this configuration bus and can be used by
other drivers to abstract the communication with the actual
function providers.

Signed-off-by: Liviu Dudau <liviu.dudau@foss.arm.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
6 years agoconfigs: drop CONFIG_SYS_EXTRA_ENV_RELOC
Simon Goldschmidt [Thu, 27 Sep 2018 10:38:34 +0000 (12:38 +0200)]
configs: drop CONFIG_SYS_EXTRA_ENV_RELOC

Instead of manually specifying CONFIG_SYS_EXTRA_ENV_RELOC
for every board that needs it, it shouldn't hurt to let
initr_reloc_global_data() always relocate gd->env_addr
unless we know this pointer is outside the initial binary.

To achieve this, the relocation is omitted if
CONFIG_ENV_ADDR is defined (and ENV_IS_EMBEDDED is not).

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
6 years agotest/py: test_fs: add docstring comments to helper functions
Akashi Takahiro [Thu, 27 Sep 2018 07:07:23 +0000 (16:07 +0900)]
test/py: test_fs: add docstring comments to helper functions

After Siomon's comment, add a descriptive comment (docstring) to each of
helper functions in conftest.py. No functionality changed.

Signed-off-by: Akashi Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agotest/py: test_fs: remove fs_type argument from umount_fs()
Akashi Takahiro [Thu, 27 Sep 2018 07:07:22 +0000 (16:07 +0900)]
test/py: test_fs: remove fs_type argument from umount_fs()

Since there is no use of fs_type in umount_fs(), just remove it.

Signed-off-by: Akashi Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
6 years agotest/py: ignore console read exceptions after test failure
Stephen Warren [Thu, 20 Sep 2018 22:55:03 +0000 (16:55 -0600)]
test/py: ignore console read exceptions after test failure

After a test has failed, test/py drains the U-Boot console log to ensure
that any relevant output is captured. At this point, we don't care about
detecting any additional errors, since the test is already known to have
failed, and U-Boot will be restarted. To ensure that the test cleanup code
is not interrupted, and can correctly terminate the log sections for the
failed test, ignore any exception that occurs while reading the U-Boot
console output during this limited period of time.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-sh
Tom Rini [Sat, 6 Oct 2018 01:17:35 +0000 (21:17 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-sh

6 years agoMerge branch 'master' of git://git.denx.de/u-boot-socfpga
Tom Rini [Sat, 6 Oct 2018 01:17:21 +0000 (21:17 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-socfpga

6 years agoMerge tag 'rockchip-for-v2018.11-rc2' of git://git.denx.de/u-boot-rockchip
Tom Rini [Fri, 5 Oct 2018 14:16:46 +0000 (10:16 -0400)]
Merge tag 'rockchip-for-v2018.11-rc2' of git://git.denx.de/u-boot-rockchip

Rockchip-focused changes for v2018.11-rc2:
 - fixes to rkimage for SPL boot via USB
 - fixes to make_fit_atf.py, incl. entry-point calculation and python3
   compatibility
 - OP-TEE support for ARMv7-based SoCs
 - fixes to RGMII/GMII selection on the RK3328

Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agoMerge tag 'arc-updates-for-2018.11-rc2' of git://git.denx.de/u-boot-arc
Tom Rini [Fri, 5 Oct 2018 14:16:31 +0000 (10:16 -0400)]
Merge tag 'arc-updates-for-2018.11-rc2' of git://git.denx.de/u-boot-arc

Here we do a couple of impovements for all ARC boards
as well as introduce yet another developemnt board.

1. Now for ARC boards we print CPU and board info
   which is useful for users and helps with
   analysis of logs "post-mortem".

2. Synopsys IoT development kit support is added
   This one might bw a bit too late as we're past RC1
   but:
    1) This doesn't affect any other arches etc
       as we change purely ARC code.
    2) I've got a chance to talk about U-Boot on
       IoT platforms during ELCE (my proposal was on
       a wait list and only this week I've got
       an update and invitation to talk) so it would
       be good to have this board as a primer in upstream
       code-base by the time of ELCE 2018.
    3) For complete support of IoT devkit I'm yet to
       significantly rework regmap subsystem in U-Boot
       but that's a different topic and hopefully it will
       be done sometime soon... though not this release
       cycle for sure.

6 years agoarc: Add support for IoT development kit
Alexey Brodkin [Wed, 24 Jan 2018 18:37:14 +0000 (21:37 +0300)]
arc: Add support for IoT development kit

The DesignWare ARC IoT Development Kit is a versatile platform
that includes the necessary hardware and software to accelerate
software development and debugging of sensor fusion,
voice recognition and face detection designs.

More information is avaialble here [1] and here [2].

The board is based on real silicon with
ARC EM9D-based Data Fusion IP Subsystem.

It sports a rich set of I/O including
 * DW USB OTG
 * DW MobileStorage (used for micro SD-card)
 * GPIO
 * multiple serial interface including DW APB UART
 * ADC, PWM and eFlash, SRAM and SPI Flash memory
 * Real-Time Clock (RTC)
 * Bluetooth module with worldwide regulatory compliance
   (FCC, IC, CE, ETSI, TELEC)
 * On-board 9-axis sensor (gyro, accelerometer and compass)

Extensible with Arduino, Pmod, mikroBUS connectors and a 2x18
extension header.

One of the most interesting features for developers is built-in
Digilent USB JTAG probe so only micro-USB cable is needed!

[1] https://www.synopsys.com/dw/ipdir.php?ds=arc_iot_development_kit
[2] https://www.synopsys.com/dw/doc.php/ds/cc/iot_dev_kit.pdf

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoARC: Enable DISPLAY_CPUINFO & DISPLAY_BOARDINFO
Alexey Brodkin [Tue, 2 Oct 2018 08:43:28 +0000 (11:43 +0300)]
ARC: Enable DISPLAY_CPUINFO & DISPLAY_BOARDINFO

With implemented print_cpuinfo() and model property in .dts
we're ready to print nice info about ARC cores and boards on boot.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoARC: Implement print_cpuinfo()
Alexey Brodkin [Tue, 2 Oct 2018 08:42:23 +0000 (11:42 +0300)]
ARC: Implement print_cpuinfo()

Once we enable DISPLAY_CPUINFO for ARC we'll see
ARC core family and version printed on boot.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoARC: Add model property to boards .dts
Alexey Brodkin [Tue, 2 Oct 2018 08:37:25 +0000 (11:37 +0300)]
ARC: Add model property to boards .dts

1. This way we sync with Linux kernel where we have model
   set for all ARC boards for quite some time, see [1]

2. Once we enable DISPLAY_BOARDINFO for ARC this info will
   be printed on boot givin some extra data-point about the board

[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=618a9cd06dd471ac232f5b27325b24d26eba5571

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agoARC: Don't pre-define CROSS_COMPILE
Alexey Brodkin [Mon, 1 Oct 2018 08:48:47 +0000 (11:48 +0300)]
ARC: Don't pre-define CROSS_COMPILE

Even though arc-linux- prefix is used in ARC prebuilt tools and
in Buildroot there're other options like Linux distro cross-tools
etc where prefix is different so let's not rely on this default.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
6 years agorockchip: Fix rkimage format for SPL boot over USB
Daniel Gröber [Thu, 4 Oct 2018 13:32:42 +0000 (15:32 +0200)]
rockchip: Fix rkimage format for SPL boot over USB

The 'rkimage' format used for booting rockchip boards over USB seems to
have been broken since commit 7bf274b9caab ("rockchip: mkimage: use
imagename to select spl hdr & spl size"). That commit adds an offset of
RK_SPL_HDR_START(=2048) to the location the 'RKxx' header is written
at. However the bootrom expects this header to be the first four bytes of
the image, not at offset 2048. This appears to have been a copy paste
error since the 'rksd' and 'rkspi' image types do require this offset.

Furthermore commit 111bcc4fb6cb ("rockchip: mkimage: pad the header to
8-bytes (using a 'nop') for RK3399"), commit 3d54eabcafec9 ("rockchip:
spl: RK3399: use boot0 hook to create space for SPL magic") and
commit 308277569229 ("rockchip: mkimage: update rkimage to support
pre-padded payloads") changed the way the space for the 'RKxx' header is
allocated and written to the image without adjusting 'rkimage'.

This commit fixes those mistakes and makes it possible to load u-boot SPL
over USB once more.

(Tested on RK3399)

Signed-off-by: Daniel Gröber <daniel@dps.uibk.ac.at>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
6 years agorockchip: make_fit_atf.py depends on u-boot
Andreas FĂ€rber [Sun, 3 Jun 2018 05:23:58 +0000 (07:23 +0200)]
rockchip: make_fit_atf.py depends on u-boot

u-boot.itb depends on u-boot-nodtb.bin, which in turn depends on u-boot.
u-boot.its from Rockchip make_fit_atf.py (used by {evb,firefly}-rk3399)
wants to read u-boot but is lacking this dependency, so that u-boot.itb
cannot be built in one go. Detect its use and add the missing dependency.

Reported-by: Yousaf Kaukab <yousaf.kaukab@suse.com>
Signed-off-by: Andreas FĂ€rber <afaerber@suse.de>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
6 years agonet: gmac_rockchip: Add handling for RGMII_ID/RXID/TXID
Janine Hagemann [Tue, 28 Aug 2018 06:25:05 +0000 (08:25 +0200)]
net: gmac_rockchip: Add handling for RGMII_ID/RXID/TXID

Using PHY internal delays in combination with the phy-mode
rgmii-id/rxid/txid was not possible. Only rgmii was supported.

Now we can disable rockchip's gmac delay lines and also use
rgmii-id/rxid/txid.

Based on commit eaf70ad14cbb ("net: stmmac: dwmac-rk: Add
handling for RGMII_ID/RXID/TXID") for mainline linux kernel.

Signed-off-by: Janine Hagemann <j.hagemann@phytec.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
6 years agonet: gmac_rockchip: Fix a register write in rk3328_gmac_set_to_rgmii
Janine Hagemann [Tue, 28 Aug 2018 06:25:04 +0000 (08:25 +0200)]
net: gmac_rockchip: Fix a register write in rk3328_gmac_set_to_rgmii

We have to use RK3328_RXCLK_DLY_ENA_GMAC_ENABLE instead of
RK3328_RXCLK_DLY_ENA_GMAC_MASK in rk3328_gmac_set_to_rgmii()
to enable the RX delay.
The MASK was used in a wrong way.

Signed-off-by: Janine Hagemann <j.hagemann@phytec.de>
Reviewed-by: Philipp Tomisch <philipp.tomisch@theobroma-systems.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
6 years agorockchip: make_fit_atf: make python3 compatible
Mian Yousaf Kaukab [Fri, 8 Jun 2018 08:47:10 +0000 (10:47 +0200)]
rockchip: make_fit_atf: make python3 compatible

Make script python3 compatible. No functional changes intended.

Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab@suse.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
6 years agorockchip: make_fit_atf: use elf entry point
Mian Yousaf Kaukab [Fri, 8 Jun 2018 08:47:09 +0000 (10:47 +0200)]
rockchip: make_fit_atf: use elf entry point

make_fit_atf.py uses physical address of first segment as the
entry point to bl31. It is incorrect and causes following abort
when bl31_entry() is called:

U-Boot SPL board initTrying to boot from MMC1
"Synchronous Abort" handler, esr 0x02000000
elr: 0000000000000000 lr : 00000000ff8c7e8c
x 0: 00000000ff8e0000 x 1: 0000000000000000
x 2: 0000000000000000 x 3: 00000000ff8e0180
x 4: 0000000000000000 x 5: 0000000000000000
x 6: 0000000000000030 x 7: 00000000ff8e0188
x 8: 00000000000001e0 x 9: 0000000000000000
x10: 000000000007fcdc x11: 00000000002881b8
x12: 00000000000001a2 x13: 0000000000000198
x14: 000000000007fdcc x15: 00000000002881b8
x16: 00000000003c0724 x17: 00000000003c0718
x18: 000000000007fe80 x19: 00000000ff8e0000
x20: 0000000000200000 x21: 00000000ff8e0000
x22: 0000000000000000 x23: 000000000007fe30
x24: 00000000ff8d1c3c x25: 00000000ff8d5000
x26: 00000000deadbeef x27: 00000000000004a0
x28: 000000000000009c x29: 000000000007fd90

Fix it by using the entry point from the elf header.

Signed-off-by: Mian Yousaf Kaukab <yousaf.kaukab@suse.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
6 years agorockchip: add fit source file for pack itb with op-tee
Kever Yang [Thu, 23 Aug 2018 09:18:00 +0000 (17:18 +0800)]
rockchip: add fit source file for pack itb with op-tee

We package U-Boot and OP-TEE into one itb file for SPL,
so that we can support OP-TEE in SPL.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
6 years agospl: add support to booting with OP-TEE
Kever Yang [Thu, 23 Aug 2018 09:17:59 +0000 (17:17 +0800)]
spl: add support to booting with OP-TEE

OP-TEE is an open source trusted OS, in armv7, its loading and
running are like this:
loading:
- SPL load both OP-TEE and U-Boot
running:
- SPL run into OP-TEE in secure mode;
- OP-TEE run into U-Boot in non-secure mode;

To make code simple, it would be fine to use IH_OS_TEE for the
os tyle in TPL(just like IH_OS_LINUX is using both in SPL and U-Boot).

Here is the diagram for SPL loading OP-TEE,
IH_OS_TEE:(make u-boot.itb for SPL)
    Non-Secure       Secure

                     BootROM
                       |
                       v
                      SPL
                       |
                       v
          ---------  OP-TEE
         |
         v
       U-Boot
         |
         V
       Linux
For other two king of OP-TEE loading/booting, see commit message:
45b55712d4 image: Add IH_OS_TEE for TEE chain-load boot

More detail:
https://github.com/OP-TEE/optee_os
and search for 'boot arguments' for detail entry parameter in:
core/arch/arm/kernel/generic_entry_a32.S

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Cc: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
6 years agorockchip: make_fit_atf: fix warning unit_address_vs_reg
Kever Yang [Thu, 23 Aug 2018 03:01:08 +0000 (11:01 +0800)]
rockchip: make_fit_atf: fix warning unit_address_vs_reg

Patch fix warning:
/builddir/BUILD/u-boot-2018.05-rc2/"arch/arm/mach-rockchip/make_fit_atf.py" \
arch/arm/dts/rk3399-firefly.dtb > u-boot.its
  ./tools/mkimage  -f u-boot.its -E u-boot.itb >/dev/null  && cat
/dev/null
u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/uboot@1
has a unit name, but no reg property
u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/atf@1 has
a unit name, but no reg property
u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/atf@2 has
a unit name, but no reg property
u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/atf@3 has
a unit name, but no reg property
u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/fdt@1 has
a unit name, but no reg property
u-boot.itb.tmp: Warning (unit_address_vs_reg): Node
/configurations/config@1 has a unit name, but no reg property
make[1]: Leaving directory
'/builddir/BUILD/u-boot-2018.05-rc2/builds/firefly-rk3399'

Reported-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-spi
Tom Rini [Thu, 4 Oct 2018 13:18:30 +0000 (09:18 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-spi

6 years agospi: Add SPI driver for MT76xx SoCs
Stefan Roese [Thu, 16 Aug 2018 08:48:48 +0000 (10:48 +0200)]
spi: Add SPI driver for MT76xx SoCs

This patch adds the SPI driver for the MediaTek MT7688 SoC (and
derivates). Its been tested on the LinkIt Smart 7688 and the Gardena
Smart Gateway with and SPI NOR on CS0 and on the Gardena Smart
Gateway additionally with an SPI NAND on CS1.

Note that the SPI controller only supports a max transfer size of 32
bytes. This driver implementes a workaround to enable bigger xfer
sizes to speed up the transfer especially for the SPI NAND support.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Jagan Teki <jagan@openedev.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Piotr Dymacz <pepe2k@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
6 years agomtd: nand: spi: Add Gigadevice SPI NAND support
Stefan Roese [Thu, 16 Aug 2018 16:05:08 +0000 (18:05 +0200)]
mtd: nand: spi: Add Gigadevice SPI NAND support

This patch adds support for Gigadevices SPI NAND device to the new SPI
NAND infrastructure in U-Boot. Currently only the 128MiB GD5F1GQ4UC
device is supported.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Boris Brezillon <boris.brezillon@bootlin.com>
Cc: Jagan Teki <jagan@openedev.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
6 years agosf: Add XMC xm25qh64a and xm25qh128a entries
Stefan Roese [Mon, 6 Aug 2018 14:33:19 +0000 (16:33 +0200)]
sf: Add XMC xm25qh64a and xm25qh128a entries

This patch adds support for 2 new XMC (Wuhan Xinxin Semiconductor
Manufacturing Corp) SPI NOR chips.

This support can be enabled by selecting the SPI_FLASH_XMC Kconfig
option.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agoMerge tag 'rockchip-for-v2018.11' of git://git.denx.de/u-boot-rockchip
Tom Rini [Wed, 3 Oct 2018 16:09:19 +0000 (12:09 -0400)]
Merge tag 'rockchip-for-v2018.11' of git://git.denx.de/u-boot-rockchip

Rockchip changes for 2018.11

6 years agoMerge git://git.denx.de/u-boot-riscv
Tom Rini [Wed, 3 Oct 2018 12:09:53 +0000 (08:09 -0400)]
Merge git://git.denx.de/u-boot-riscv

- QEMU support

6 years agoMerge branch 'master' of git://git.denx.de/u-boot-i2c
Tom Rini [Wed, 3 Oct 2018 12:09:22 +0000 (08:09 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-i2c

Add support for the Arm's Versatile Express I2C controller.

6 years agoarm: socfpga: stratix10: add sgmii in phymode setup
Ooi, Joyce [Tue, 25 Sep 2018 06:31:45 +0000 (23:31 -0700)]
arm: socfpga: stratix10: add sgmii in phymode setup

Additional sgmii phymode is added in socfpga_phymode_setup() along with
a minor fix for maximum number of GMACs.

Signed-off-by: Ooi, Joyce <joyce.ooi@intel.com>
6 years agoarm: socfpga: Remove unused function socfpga_emac_manage_reset()
Ley Foon Tan [Thu, 20 Sep 2018 16:22:14 +0000 (00:22 +0800)]
arm: socfpga: Remove unused function socfpga_emac_manage_reset()

Remove code from the reset manager that is never called.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agotools: socfpga: fix sfp_verify_header
Atsushi Nemoto [Fri, 21 Sep 2018 00:19:13 +0000 (09:19 +0900)]
tools: socfpga: fix sfp_verify_header

Fix sfp_verify_header to return correct version number.
This fixes "Not a sane SOCFPGA preloader" error message with v1 header.

Signed-off-by: Atsushi Nemoto <atsushi.nemoto@sord.co.jp>
6 years agogpio: dwapb_gpio: Change to use devm_kcalloc()
Ley Foon Tan [Wed, 19 Sep 2018 08:26:33 +0000 (16:26 +0800)]
gpio: dwapb_gpio: Change to use devm_kcalloc()

Change to use managed resource function devm_kcalloc(),
so it will auto free memory when driver is removed.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
6 years agoARM: rmobile: Enable PHY framework on Gen3
Marek Vasut [Tue, 2 Oct 2018 20:48:26 +0000 (22:48 +0200)]
ARM: rmobile: Enable PHY framework on Gen3

Enable PHY framework on Gen3, this is required for USB EHCI PHY support.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agophy: rcar: Add R-Car Gen3 PHY driver
Marek Vasut [Tue, 2 Oct 2018 20:31:47 +0000 (22:31 +0200)]
phy: rcar: Add R-Car Gen3 PHY driver

Add a PHY driver for the R-Car Gen3 which allows configuring
USB OTG PHY on Gen3 into host mode and toggles VBUS in case a
dedicated regulator is present.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoARM: rmobile: Mark 4-64GiB as DRAM on Gen3
Marek Vasut [Tue, 2 Oct 2018 19:42:49 +0000 (21:42 +0200)]
ARM: rmobile: Mark 4-64GiB as DRAM on Gen3

Mark area 0x1_0000_0000 - 0x10_0000_0000 as DRAM on Gen3 as the
chip is capable of addressing that and U-Boot can make use of it.
This patch prevents exception when accessing those areas.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoARM: rmobile: Repair TMU clock on Gen2
Marek Vasut [Wed, 19 Sep 2018 14:33:09 +0000 (16:33 +0200)]
ARM: rmobile: Repair TMU clock on Gen2

The CPfi/4 is derived from XTAL clock and is not fixed. Undo
the previous commit 7984ac8d1635aebd11175c96b07f937a39f0384d.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
6 years agoARM: dts: rmobile: Reinstate missing i2c6 on Porter
Marek Vasut [Wed, 19 Sep 2018 11:56:27 +0000 (13:56 +0200)]
ARM: dts: rmobile: Reinstate missing i2c6 on Porter

The I2C6 is used to communicate with the PMIC and it was removed
during DT sync with Linux 4.17. Reinstate it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
6 years agoriscv: allow native compilation
Heinrich Schuchardt [Mon, 6 Aug 2018 17:15:38 +0000 (19:15 +0200)]
riscv: allow native compilation

If environment variable CROSS_COMPILE is not set, this indicates native
compilation. In this case we should not set an arbitrary value which is
not applicable for 64bit anyway.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
6 years agoriscv: cosmetic: Reword do_reset() printf message.
Rick Chen [Wed, 3 Oct 2018 05:59:03 +0000 (13:59 +0800)]
riscv: cosmetic: Reword do_reset() printf message.

The Sentence "reset unsupported yet" is not
grammatically correct and should say
"reset not supported yet" instead.

Suggested-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Signed-off-by: Rick Chen <rick@andestech.com>
6 years agoriscv: Move do_reset() to a common place
Bin Meng [Wed, 26 Sep 2018 13:55:22 +0000 (06:55 -0700)]
riscv: Move do_reset() to a common place

We don't have a reset method on any RISC-V board yet. Instead of
adding the same 'unsupported' message for each CPU variant it might
make more sense to add a generic do_reset function for all CPU
variants to lib/, similar to the one for ARM (arch/arm/lib/reset.c).

Suggested-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
6 years agoriscv: Add QEMU virt board support
Bin Meng [Wed, 26 Sep 2018 13:55:21 +0000 (06:55 -0700)]
riscv: Add QEMU virt board support

This adds QEMU RISC-V 'virt' board target support, with the hope of
helping people easily test U-Boot on RISC-V.

The QEMU virt machine models a generic RISC-V virtual machine with
support for the VirtIO standard networking and block storage devices.
It has CLINT, PLIC, 16550A UART devices in addition to VirtIO and
it also uses device-tree to pass configuration information to guest
software. It implements RISC-V privileged architecture spec v1.10.

Both 32-bit and 64-bit builds are supported. Support is pretty much
preliminary, only booting to U-Boot shell with the UART driver on
a single core. Booting Linux is not supported yet.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
6 years agoriscv: kconfig: Imply DM support for some common drivers
Bin Meng [Wed, 26 Sep 2018 13:55:20 +0000 (06:55 -0700)]
riscv: kconfig: Imply DM support for some common drivers

This implies DM support for some common drivers that are used on
RISC-V.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
6 years agoriscv: kconfig: Select DM and OF_CONTROL
Bin Meng [Wed, 26 Sep 2018 13:55:19 +0000 (06:55 -0700)]
riscv: kconfig: Select DM and OF_CONTROL

RISC-V is a pretty new architecture and should support DM and
OF_CONTROL by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
6 years agoriscv: ae350: Clean up mixed tabs and spaces in the dts
Bin Meng [Wed, 26 Sep 2018 13:55:18 +0000 (06:55 -0700)]
riscv: ae350: Clean up mixed tabs and spaces in the dts

There are quite a lot of mixed tabs and spaces in the ae350.dts.
Clean them up.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
6 years agoriscv: Make start.S available for all targets
Bin Meng [Wed, 26 Sep 2018 13:55:17 +0000 (06:55 -0700)]
riscv: Make start.S available for all targets

Currently start.S is inside arch/riscv/cpu/ax25/, but it can be
common for all RISC-V targets.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
6 years agoriscv: bootm: Pass mhartid CSR value to kernel
Bin Meng [Wed, 26 Sep 2018 13:55:16 +0000 (06:55 -0700)]
riscv: bootm: Pass mhartid CSR value to kernel

So far this is hardcoded to zero, and we should read the value from
mhartid CSR and pass it to Linux kernel.

Suggested-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>
6 years agoriscv: Remove CSR read/write defines in encoding.h
Bin Meng [Wed, 26 Sep 2018 13:55:15 +0000 (06:55 -0700)]
riscv: Remove CSR read/write defines in encoding.h

There is no reason to keep two versions of CSR read/write defines
in encoding.h. We already have one set of defines in csr.h, which
is from Linux kernel, and let's drop the one in encoding.h.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>
6 years agoriscv: Add a helper routine to print CPU information
Bin Meng [Wed, 26 Sep 2018 13:55:14 +0000 (06:55 -0700)]
riscv: Add a helper routine to print CPU information

This adds a helper routine to print CPU information. Currently
it prints all the instruction set extensions that the processor
core supports.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
6 years agoriscv: Explicitly pass -march and -mabi to the compiler
Bin Meng [Wed, 26 Sep 2018 13:55:13 +0000 (06:55 -0700)]
riscv: Explicitly pass -march and -mabi to the compiler

At present the compiler flag against which architecture and abi
variant the riscv image is built for is not explicitly indicated
which means the default compiler configuration is used. But this
does not work if we want to build a different target (eg: 32-bit
riscv images using a toolchain configured for 64-bit riscv).

Fix this by explicitly passing -march and -mabi to the compiler.
Since generically we don't use floating point in U-Boot, specify
the RV[32|64]IMA ISA and software floating ABI.

This also fix some alignment coding style issues.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
6 years agoriscv: Fix coding style issues in the linker script
Bin Meng [Wed, 26 Sep 2018 13:55:12 +0000 (06:55 -0700)]
riscv: Fix coding style issues in the linker script

There are several coding style issues in the linker script. Fix them.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
6 years agoriscv: Move the linker script to the CPU root directory
Bin Meng [Wed, 26 Sep 2018 13:55:11 +0000 (06:55 -0700)]
riscv: Move the linker script to the CPU root directory

The linker script can be shared by all RISC-V targets. Move it to
a common place.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
6 years agoriscv: cmd: bdinfo: Print the relocation address
Bin Meng [Wed, 26 Sep 2018 13:55:10 +0000 (06:55 -0700)]
riscv: cmd: bdinfo: Print the relocation address

Add printing of U-Boot relocation address.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
6 years agoriscv: Remove mach type
Bin Meng [Wed, 26 Sep 2018 13:55:09 +0000 (06:55 -0700)]
riscv: Remove mach type

Since the mach_id is not used by RISC-V, remove it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
6 years agoriscv: bootm: Correct the 1st kernel argument to hart id
Bin Meng [Wed, 26 Sep 2018 13:55:08 +0000 (06:55 -0700)]
riscv: bootm: Correct the 1st kernel argument to hart id

The first argument of Linux kernel is the risc-v core hart id,
from which the kernel is booted from. It is not the mach_id,
which seems to be copied from arm.

While we are here, this also changes the Linux kernel entry
parameters' type to support both 32-bit and 64-bit.

Note the hart id is hardcoded to zero for now, and we should
change to fill in it with the value read from mhartid CSR of
the hart which this routine is currently running on.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>
6 years agoriscv: Remove setup.h
Bin Meng [Wed, 26 Sep 2018 13:55:07 +0000 (06:55 -0700)]
riscv: Remove setup.h

This was copied from ARM, and does not apply to RISC-V. While we
are here, bootm.h is eventually removed as its content is only
the inclusion of setup.h.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
6 years agoriscv: kconfig: Normalize architecture name spelling
Bin Meng [Wed, 26 Sep 2018 13:55:06 +0000 (06:55 -0700)]
riscv: kconfig: Normalize architecture name spelling

It's RISC-V that is the official name, not RISCV.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>
6 years agoi2c: Add support for the Arm's Versatile Express I2C controller.
Liviu Dudau [Fri, 28 Sep 2018 12:46:48 +0000 (13:46 +0100)]
i2c: Add support for the Arm's Versatile Express I2C controller.

The Arm Versatile Express I2C controller is a simple register-based
controller that uses a register to control the state of the SCL and
SDA lines. Add support for it.

Signed-off-by: Liviu Dudau <liviu.dudau@foss.arm.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
6 years agoMerge branch 'master' of git://git.denx.de/u-boot-spi
Tom Rini [Tue, 2 Oct 2018 17:02:22 +0000 (13:02 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-spi

This is the PR for SPI-NAND changes along with few spi changes.

[trini: Re-sync changes for ls1012afrwy_qspi*_defconfig]
Signed-off-by: Tom Rini <trini@konsulko.com>
6 years agospi: sh_qspi: Add DM support to SH QSPI driver
Marek Vasut [Sat, 25 Aug 2018 17:34:24 +0000 (19:34 +0200)]
spi: sh_qspi: Add DM support to SH QSPI driver

Add DM support to the SH QSPI driver while retaining non-DM support.
The later is required as this driver is used in SPL which has a size
limitation of 16 kiB.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
[jagan: use proper commit head]
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agodriver/spi: fsl_qspi: Remove non-DM stuff
Ashish Kumar [Fri, 7 Sep 2018 04:19:34 +0000 (09:49 +0530)]
driver/spi: fsl_qspi: Remove non-DM stuff

Convert fsl_qspi.c to complete DM mode.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Tested-by: Rajat Srivastava <rajat.srivastava@nxp.com>
Tested-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agospi: designware_spi: Add reset ctrl to driver
Ley Foon Tan [Fri, 7 Sep 2018 06:25:29 +0000 (14:25 +0800)]
spi: designware_spi: Add reset ctrl to driver

Add code to reset all reset signals as in SPI DT node. A reset property
is an optional feature, so only print out a warning and do not fail if a
reset property is not present.

If a reset property is discovered, then use it to deassert, thus
bringing the IP out of reset.

Release reset when _remove().

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
6 years agocmd: mtdparts: describe as legacy
Miquel Raynal [Sat, 29 Sep 2018 10:58:30 +0000 (12:58 +0200)]
cmd: mtdparts: describe as legacy

The 'mtdparts' command is not needed anymore. While the environment
variable is still valid (and useful, along with the 'mtdids' one), the
command has been replaced by 'mtd' which is much more close to the MTD
stack and do not add its own specific glue.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
6 years agocmd: ubi: clean the partition handling
Miquel Raynal [Sat, 29 Sep 2018 10:58:29 +0000 (12:58 +0200)]
cmd: ubi: clean the partition handling

UBI should not mess with MTD partitions, now that the partitions are
handled in a clean way, clean the ubi command and avoid using this
uneeded extra-glue to reference the devices.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>