Chia-I Wu [Fri, 10 May 2019 04:44:33 +0000 (21:44 -0700)]
virgl: better support for PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE
When the resource to be mapped is busy and the backing storage can
be discarded, reallocate the backing storage to avoid waiting.
In this new path, we allocate a new buffer, emit a state change,
write, and add the transfer to the queue . In the
PIPE_TRANSFER_DISCARD_RANGE path, we suballocate a staging buffer,
write, and emit a copy_transfer (which may allocate, memcpy, and
blit internally). The win might not always be clear. But another
win comes from that the new path clears res->valid_buffer_range and
does not clear res->clean_mask. This makes it much more preferable
in scenarios such as
access = enough_space ? GL_MAP_UNSYNCHRONIZED_BIT :
GL_MAP_INVALIDATE_BUFFER_BIT;
glMapBufferRange(..., GL_MAP_WRITE_BIT | access);
memcpy(...); // append new data
glUnmapBuffer(...);
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Chia-I Wu [Thu, 16 May 2019 22:42:01 +0000 (15:42 -0700)]
virgl: add virgl_rebind_resource
We are going support reallocating the HW resource for a
virgl_resource. When that happens, the virgl_resource needs to be
rebound to the context.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Chia-I Wu [Wed, 15 May 2019 22:34:44 +0000 (15:34 -0700)]
virgl: save virgl_hw_res in virgl_transfer
When PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE is properly supported,
virgl_transfer might refer to a different virgl_hw_res than
virgl_resource does. We need to save the virgl_hw_res and use the
saved one.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Chia-I Wu [Wed, 15 May 2019 22:28:52 +0000 (15:28 -0700)]
virgl: add resource_reference to virgl_winsys
It works similar to pipe_resource_reference but is for virgl_hw_res.
It can also replace resource_unref.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Alyssa Rosenzweig [Wed, 5 Jun 2019 22:03:02 +0000 (15:03 -0700)]
panfrost/midgard: Add rounding mode specific opcodes
This adds a set of opcodes for performing moves and type conversions
with respect to particular rounding modes, required for OpenCL.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 17 Jun 2019 16:26:34 +0000 (09:26 -0700)]
panfrost: Drop draws with complete scissor
The hardware support for scissoring requires minimally 1 pixel to be
drawn. If the scissor culls *everything*, we need to drop the draw
entirely early on.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Mon, 17 Jun 2019 16:25:52 +0000 (09:25 -0700)]
panfrost: Disable pipelining temporarily
Pipelined rendering is important for performance but is not working
right these days. Disable it for correctness until the panfrost_job
refactor is enabled and we can do it right.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Wed, 12 Jun 2019 22:23:19 +0000 (15:23 -0700)]
panfrost/mfbd: Handle rendering to linear mipmap
In anticipation of more general mipmapping support, we implemented
support for rendering to linear mipmaps (a very simple case).
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Wed, 12 Jun 2019 22:07:09 +0000 (15:07 -0700)]
panfrost: Implement sampling from non-zero initial levels
In preparation for more complex mipmap operations. glGenerateMipmap() in
particular, as implemented by u_blitter, requires reading from non-zero
initial mip levels.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 14 Jun 2019 23:31:14 +0000 (16:31 -0700)]
panfrost: Resource management for linear 2D texture arrays
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 14 Jun 2019 23:30:29 +0000 (16:30 -0700)]
panfrost/midgard: Adjust swizzles for 2D arrays
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 14 Jun 2019 23:26:49 +0000 (16:26 -0700)]
panfrost: Set array_size to permit array textures
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 14 Jun 2019 23:23:32 +0000 (16:23 -0700)]
panfrost: Decode array textures
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 14 Jun 2019 23:11:56 +0000 (16:11 -0700)]
panfrost: Implement 3D texture resource management
Passes dEQP-GLES3.functional.texture.format.unsized.*3d*
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 14 Jun 2019 23:07:15 +0000 (16:07 -0700)]
panfrost: Specify 3D in texture descriptor
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 14 Jun 2019 23:03:39 +0000 (16:03 -0700)]
panfrost/midgard: Fix 3D texture masks/swizzles
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 14 Jun 2019 23:03:01 +0000 (16:03 -0700)]
panfrost/midgard: Add swizzle_of/mask_of helpers
These make manipulating vectors in the Midgard compiler easier.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 7 Jun 2019 23:00:49 +0000 (16:00 -0700)]
panfrost: Enable helper invocations when texturing
it turns out we have explicit control over helper invocations; if a
particular bit in the fragment shader descriptor is set, helper
invocations are launched; if it clear, they are not. Helper invocations
are required whenever computing derivatives, whether explicitly
(dFdx/dFdy) *or* implicitly (any texturing). Accordingly, we set this
bit when texturing to fix edge case behaviour (literally, haha).
Thank you to Jason Ekstrand and Ilia Mirkin for pointing out the
representative dEQP test failed along triangle edges and for suggesting
helper invocations / derivatives as a list of suspect pieces (which led
to discovering the helper invocations enable bit in the first place).
Ideally we would use the new NIR analysis pass for this, but that hasn't
landed quite yet.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Tue, 11 Jun 2019 21:21:14 +0000 (14:21 -0700)]
panfrost: Handle missing texture case
In some cases, Gallium can give us bad info about the texture count,
counting some NULL textures. We pass Gallium's info to the hardware
blindly, which can confuse the hardware in edge cases. This patch
adjusts accordingly.
Alyssa Rosenzweig [Fri, 14 Jun 2019 19:48:06 +0000 (12:48 -0700)]
panfrost: Remove forced flush on clears
This worked around a bug in oooold versions of Panfrost. Nowadays, its
presence is, at best, *creating* bugs. Let's wack it.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 14 Jun 2019 19:26:19 +0000 (12:26 -0700)]
panfrost: Flush scanout too
In a poorly coded app, the framebuffer can be partially drawn, an FBO
switched, switch back to the framebuffer and keep drawing, etc.
Reordering would fix this, but for now we need to just be careful about
flushing scanout too.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 14 Jun 2019 19:25:26 +0000 (12:25 -0700)]
panfrost: Improve viewport (clipping) robustness
On more complex apps (possibly using desktop GL specific extensions?),
our viewport code was getting wacky results for unclear reasons. Let's
be a little less wacky.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 14 Jun 2019 18:23:24 +0000 (11:23 -0700)]
panfrost: Disable the tiler for clear-only jobs
To do so, we route some basic information through to the FBD creation
routines (currently just a binary toggle of "has draws?"). Eventually,
more refactoring will enable dynamic hierarchy mask selection, but right
now we do the most basic.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 14 Jun 2019 18:14:01 +0000 (11:14 -0700)]
panfrost: Identify and decode mfbd_flags
Previously known as the unk3 field.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 14 Jun 2019 15:14:04 +0000 (08:14 -0700)]
panfrost: Stub out hierarchy mask selection
Quite a bit of refactoring in the main driver will be necessary to make
use of this effectively, so the implementation is incomplete.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 14 Jun 2019 14:24:26 +0000 (07:24 -0700)]
panfrost: Rename misc_0 -> tiler_polygon_list
Just for readability.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 14 Jun 2019 14:21:05 +0000 (07:21 -0700)]
panfrost: Sanity check tiler polygon list size
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 14 Jun 2019 14:08:51 +0000 (07:08 -0700)]
panfrost: Compute and use polygon list body size
This is a bit of a hack, but it gets the point across.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Thu, 13 Jun 2019 22:15:53 +0000 (15:15 -0700)]
panfrost: Use polygon list header size computation
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Thu, 13 Jun 2019 22:11:21 +0000 (15:11 -0700)]
panfrost: Calculate polygon list header size
As per the notes at the beginning of pan_tiler.c, we implement a routine
to calculate the size of the polygon list header given the framebuffer
dimensions and the provided hierarchy mask.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Fri, 14 Jun 2019 15:14:53 +0000 (08:14 -0700)]
panfrost: Add pan_tiler.h header
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Thu, 13 Jun 2019 18:25:18 +0000 (11:25 -0700)]
panfrost: Document tile size heuristic
I'm not sure how the blob does it, but this seems to be a dead simple
test and roughly corresponds to what I've noticed from the blob, so
maybe it's good enough.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Thu, 13 Jun 2019 17:25:32 +0000 (10:25 -0700)]
panfrost: Rename tiler fields per tiler research
Following the research into Midgard's hierarchical tiling
infrastructure, we now understand (in broad stokes) the purpose of each
tiler field in the MFBD. Additionally, we understand more of the tiling
fields in the SFBD and in Bifrost's structures, although this knowledge
is still incomplete.
Update the names, decoder, and comments to reflect this new
understanding.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Thu, 13 Jun 2019 16:40:41 +0000 (09:40 -0700)]
panfrost: Add notes about the tiler allocations
This explains how the polygon list is allocated, updating the headers
appropiately to sync the terminology.
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Alyssa Rosenzweig [Wed, 12 Jun 2019 16:33:06 +0000 (09:33 -0700)]
panfrost: Integrate kernel names for tiler FBD
These names are from the replay workaround in kbase; they begin to shine
some light on the meaning of these fields. In particular, we now
understand why the "tiler_meta" field has the effect it does on
performance in certain scenes (controlling tile granularity).
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Bas Nieuwenhuizen [Sat, 15 Jun 2019 14:10:22 +0000 (16:10 +0200)]
radv: Add asserts that buffer descriptors are created with valid buffer formats.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Bas Nieuwenhuizen [Sat, 15 Jun 2019 16:05:05 +0000 (18:05 +0200)]
radv: Decompress DCC when the image format is not allowed for buffers.
Otherwise the buffer loads/stores in the bufimage meta operations fail.
If we decompress DCC then we can use the "canonical" format compatible
with the not-supported format.
CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Samuel Pitoiset [Thu, 13 Jun 2019 10:44:03 +0000 (12:44 +0200)]
radv: make sure to init the DCC decompress compute path state
This fixes a segfault when forcing DCC decompressions on compute
because internal meta objects are not created since the on-demand
stuff.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Thu, 13 Jun 2019 15:17:23 +0000 (17:17 +0200)]
ac: make ac_compute_cmask() a static function
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-By: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Thu, 13 Jun 2019 15:17:22 +0000 (17:17 +0200)]
radv: rely on ac_compute_cmask() for CMASK info
Instead of re-computing in the driver. The 3d and cube flags
are correctly set, so the same values should returned by
ac_compute_surface().
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Mon, 17 Jun 2019 07:53:26 +0000 (09:53 +0200)]
radv: silent a compiler warning in radv_CmdPushDescriptorSetKHR()
Trivial.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tomeu Vizoso [Mon, 17 Jun 2019 05:56:00 +0000 (07:56 +0200)]
panfrost: ci: Speed things up a bit by skipping a git clone
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Tomeu Vizoso [Thu, 13 Jun 2019 18:34:42 +0000 (20:34 +0200)]
panfrost: ci: Exclude all blend tests from results
As they randomly fail on T760.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Samuel Pitoiset [Fri, 14 Jun 2019 10:00:26 +0000 (12:00 +0200)]
ac: update llvm.amdgcn.icmp intrinsic name for LLVM 9+
LLVM r363339 changed llvm.amdgcn.icmp.i* to llvm.amdgcn.icmp.i64.i*.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-By: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Erico Nunes [Sat, 15 Jun 2019 13:41:05 +0000 (15:41 +0200)]
lima: lower fmod in ppir and gpir
Since commit
4f3c82c72c5 fmod is no longer being lowered in nir, and
ends up crashing lima programs with "unsupported nir_op: fmod" in both
ppir and gpir.
There seems to be no mod operation in hardware in utgard and there is an
optimization in nir to lower fmod to instructions that lima already
implements, so let's use that.
Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Rob Clark [Wed, 12 Jun 2019 20:24:33 +0000 (13:24 -0700)]
freedreno/a6xx: re-enable UBWC for depth/stencil
Now that we can blit depth/stencil in a way that plays nicely with UBWC,
re-enable it.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Rob Clark [Tue, 11 Jun 2019 17:38:19 +0000 (10:38 -0700)]
freedreno/a6xx: handle z24s8/z24x8 blits with u_blitter
Now that it can turn these blits into rendering to RB6_Z24_UNORM_S8_UINT
it can properly handle cases where only one of depth+stencil is being
blit. And this avoids lying about he format, which completely doesn't
work when UBWC is used.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Rob Clark [Thu, 13 Jun 2019 17:11:57 +0000 (10:11 -0700)]
freedreno/a6xx: handle fallback for rewritten blits ourself
For re-written z/s blits, we want to use the re-written `pipe_blit_info`
even if we have to fallback to 3d pipe (`u_blitter`). So handle that
fallback ourself.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Rob Clark [Thu, 13 Jun 2019 17:09:18 +0000 (10:09 -0700)]
freedreno/a6xx: rename variable
The name 'separate' doesn't make a while lot of sense, as only one of
the cases is the blit actually split. But split out from previous patch
in an attempt to reduce the noise.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Rob Clark [Tue, 11 Jun 2019 17:33:30 +0000 (10:33 -0700)]
freedreno/a6xx: consolidate z/s blit handling
This will get even simpler with the next patch
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Rob Clark [Wed, 12 Jun 2019 19:03:58 +0000 (12:03 -0700)]
gallium: add z24s8_as_r8g8b8a8 format
This maps to a special format that recent generations of adreno have,
for blitting z24s8. Conceptually it is similar to doing Z and/or S
blits by pretending it is r8g8b8a8 (with appropriate writemask). But
it differs when bandwidth compression is used, as z24 is a different
type from r8g8b8.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Kristian H. Kristensen <hoegsberg@gmail.com>
Kenneth Graunke [Wed, 12 Jun 2019 02:20:58 +0000 (19:20 -0700)]
st/mesa: Respect GL_TEXTURE_SRGB_DECODE_EXT in GenerateMipmaps()
Apparently, we're supposed to look at the texture object's built-in
sampler object's sRGB decode setting in order to decide whether to
decode/downsample/re-encode, or simply downsample as-is. Previously,
we had just respected the pipe_resource's format.
Fixes SKQP's Skia_Unit_Tests.SRGBMipMaps test.
(This ports commit
337a808062c756b474ee80a9ac04b5a3dbbeb67e from i965
to st/mesa for Gallium drivers.)
Reviewed-by: Eric Anholt <eric@anholt.net>
Erico Nunes [Fri, 14 Jun 2019 10:28:55 +0000 (12:28 +0200)]
lima: fix dynarray usage in lima_submit_add_bo
Commit
de8a919702a refactored dynarray usage and changed the size of the
allocation in lima_submit_add_bo.
That causes a segfault in programs running with lima.
This commit restores the allocation size back to the previous size.
Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Alyssa Rosenzweig [Fri, 14 Jun 2019 17:12:38 +0000 (10:12 -0700)]
panfrost: Fix variant selection
Fixes 1acffb ("panfrost: Unify...")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Marek Olšák [Wed, 12 Jun 2019 02:49:18 +0000 (22:49 -0400)]
ac: add radeon_info::is_amdgpu instead of checking drm_major == 3
and clean up
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Mauro Rossi [Sun, 5 May 2019 16:43:33 +0000 (18:43 +0200)]
android: amd/common: fix missing include path
Fixes the following building error in Android:
In file included from external/mesa/src/amd/common/ac_llvm_helper.cpp:34:
In file included from external/mesa/src/amd/common/ac_llvm_build.h:30:
In file included from external/mesa/src/compiler/nir/nir.h:40:
In file included from external/mesa/src/compiler/nir_types.h:36:
external/mesa/src/compiler/glsl_types.h:37:10: fatal error: 'main/config.h' file not found
^~~~~~~~~~~~~~~
1 error generated.
Fixes: bd4c661 ("ac,ac/nir: use a better sync scope for shared atomics")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Mauro Rossi [Wed, 24 Apr 2019 13:11:02 +0000 (15:11 +0200)]
android: radv: fix necessary dependecies
Fixes building errors due to libmesa_util and libexpat dependencies:
In file included from external/mesa/src/amd/vulkan/radv_device.c:52:
external/mesa/src/util/xmlpool.h:115:10: fatal error: 'xmlpool/options.h' file not found
^~~~~~~~~~~~~~~~~~~
1 error generated.
FAILED: out/target/product/x86_64/obj_x86/SHARED_LIBRARIES/vulkan.radv_intermediates/LINKED/vulkan.radv.so
...
external/mesa/src/util/xmlconfig.c:670: error: undefined reference to 'XML_ParserCreate'
...
clang.real: error: linker command failed with exit code 1 (use -v to see invocation)
Fixes: 3c2e826 ("radv: Add support for driconf.")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Alejandro Piñeiro [Thu, 13 Jun 2019 11:22:40 +0000 (13:22 +0200)]
docs: document three NIR_ envvars
Initially I was only interested on documenting NIR_PRINT, as today I
needed to check the code to find this envvar, that at the moment I
vaguely remembered that existed.
As we are here, though, let's just document all of them (assuming that
makes sense).
Reviewed-by: Eric Anholt <eric@anholt.net>
Alexandros Frantzis [Thu, 13 Jun 2019 14:31:50 +0000 (17:31 +0300)]
virgl: Return immediately when finding a compatible resource in the cache
When searching for resources in the cache, we previously released all
expired resources even after having found a compatible resource.
This commit changes this behavior to return immediately when finding a
compatible resource, so that the operation finishes more quickly. This
moves more of the burden of releasing expired resources to cache
addition, which, since it happens at resource destruction time, it's
less time critical.
Signed-off-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Alexandros Frantzis [Tue, 11 Jun 2019 14:58:08 +0000 (17:58 +0300)]
virgl: Use virgl_resource_cache in the vtest winsys
Replace the cache implementation in the vtest winsys with
virgl_resource_cache.
Signed-off-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Alexandros Frantzis [Wed, 12 Jun 2019 07:30:26 +0000 (10:30 +0300)]
virgl: Use virgl_resource_cache in the drm winsys
Replace the cache implementation in the drm winsys with
virgl_resource_cache.
Signed-off-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Alexandros Frantzis [Wed, 12 Jun 2019 07:29:32 +0000 (10:29 +0300)]
virgl: Introduce virgl_resource_cache
Introduce a resource cache implementation that can be used by any virgl
winsys backend.
Signed-off-by: Alexandros Frantzis <alexandros.frantzis@collabora.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Haihao Xiang [Wed, 12 Jun 2019 08:28:58 +0000 (16:28 +0800)]
i965: support UYVY for external import only
It is similar with YUYV
Fixes:
165e704719b85c ("i965/i915: Add UYVY as the supported format")
Signed-off-by: Haihao Xiang <haihao.xiang@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Neil Roberts [Mon, 22 Apr 2019 14:33:38 +0000 (16:33 +0200)]
glsl: Set default precision on record members
Record types have their own slot to store the precision for each
member in glsl_struct_field. Previously if the member didn’t have an
explicit precision qualifier this was being left as
GLSL_PRECISION_NONE. This patch makes it take into account the type’s
default precision qualifier like it does for regular variables in
apply_type_qualifier_to_variable.
This has the additional benefit of correctly reporting an error when a
float type is used in a struct without declaring the default type.
Reviewed-by: Eric Anholt <eric@anholt.net>
Neil Roberts [Tue, 23 Apr 2019 14:52:36 +0000 (16:52 +0200)]
glsl/linker: Make precision matching optional in intrastage_match
This function is confusingly also used to match interstage interfaces
as well as intrastage. In the interstage case it needs to avoid
comparing the precisions. This patch adds a parameter to specify
whether to take the precision into account or not so that it can be
used for both cases.
Reviewed-by: Eric Anholt <eric@anholt.net>
Neil Roberts [Tue, 23 Apr 2019 13:19:35 +0000 (15:19 +0200)]
glsl/linker: Don’t check precision for shader interface
On GLES, the interface between vertex and fragment shaders doesn’t
need to have matching precision.
Section 4.3.10 of the GLSL ES 3.00 spec:
“The type of vertex outputs and fragment inputs with the same name
must match, otherwise the link command will fail. The precision does
not need to match.”
Reviewed-by: Eric Anholt <eric@anholt.net>
Neil Roberts [Wed, 24 Apr 2019 10:28:51 +0000 (12:28 +0200)]
compiler/types: Making comparing record precision optional
On GLES, the interface between vertex and fragment shaders doesn’t
need to have matching precision. This adds an extra argument to
glsl_types::record_compare to disable the precision comparison. This
will later be used for the shader interface check.
In order to make this work this patch also adds a helper function to
recursively compare types while ignoring the precision.
v2: Call record_compare from within compare_no_precision to avoid
duplicating code (Eric Anholt).
Reviewed-by: Eric Anholt <eric@anholt.net>
Lucas Stach [Fri, 31 May 2019 16:05:12 +0000 (18:05 +0200)]
etnaviv: fix some pm query issues
The offsets to read the query results were off-by-one, which causes the
counters to report bogus increasing values.
Also the counter result is u32, so we need to initialize the query type
to reflect that.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Iago Toral Quiroga [Thu, 13 Jun 2019 09:38:45 +0000 (11:38 +0200)]
v3d: do not setup execute flags for else block in uniform control flow
Either all channels executed the 'then' block, in which case all
channels will directly jump to the 'endif' block at the end of the
'then' block, or all channels execute the 'else' block (so no
execution masking is necessary).
Shader-db results:
total instructions in shared programs: 9119238 -> 9117550 (-0.02%)
instructions in affected programs: 401252 -> 399564 (-0.42%)
helped: 855
HURT: 77
total uniforms in shared programs: 3022622 -> 3022605 (<.01%)
uniforms in affected programs: 3566 -> 3549 (-0.48%)
helped: 17
HURT: 0
total max-temps in shared programs: 1327762 -> 1327774 (<.01%)
max-temps in affected programs: 619 -> 631 (1.94%)
helped: 2
HURT: 15
Reviewed-by: Eric Anholt <eric@anholt.net>
Iago Toral Quiroga [Wed, 12 Jun 2019 11:57:03 +0000 (13:57 +0200)]
nir: detect more dynamically uniform expressions
Shader-db results for v3d:
total instructions in shared programs: 9132728 -> 9119238 (-0.15%)
instructions in affected programs: 596886 -> 583396 (-2.26%)
helped: 1118
HURT: 224
total threads in shared programs: 234298 -> 234308 (<.01%)
threads in affected programs: 10 -> 20 (100.00%)
helped: 5
HURT: 0
total uniforms in shared programs: 3022949 -> 3022622 (-0.01%)
uniforms in affected programs: 29163 -> 28836 (-1.12%)
helped: 108
HURT: 37
total max-temps in shared programs: 1328030 -> 1327762 (-0.02%)
max-temps in affected programs: 10097 -> 9829 (-2.65%)
helped: 263
HURT: 15
total spills in shared programs: 3793 -> 3777 (-0.42%)
spills in affected programs: 432 -> 416 (-3.70%)
helped: 16
HURT: 0
total fills in shared programs: 4380 -> 4266 (-2.60%)
fills in affected programs: 828 -> 714 (-13.77%)
helped: 16
HURT: 0
Reviewed-by: Eric Anholt <eric@anholt.net>
Tapani Pälli [Thu, 13 Jun 2019 09:58:04 +0000 (12:58 +0300)]
ir3: initialize progress false before ir3_nir_lower_imul
Removes a compiler warning about uninitialized variable.
Fixes:
c02ffd2700c "ir3: Use the new NIR lowering pass for integer multiplication"
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rob Clark <robclark@gmail.com>
Reviewed-by: Eduardo Lima <elima@igalia.com>
Boris Brezillon [Thu, 13 Jun 2019 12:56:02 +0000 (14:56 +0200)]
panfrost: Fix general purpose varying handling
When both the fragment and vertex shaders point to the same varying
location they expect to share the same varying slot.
Make sure vertex and fragment varyings pointing to the same loc have
->src_offset set to the same value.
[Alyssa: In addition a patch implement txs, this fixes GALLIUM_HUD on
Panfrost]
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Marek Olšák [Fri, 7 Jun 2019 20:22:29 +0000 (16:22 -0400)]
ac/registers: use better names for disambiguated definitions
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Marek Olšák [Fri, 7 Jun 2019 19:56:42 +0000 (15:56 -0400)]
ac/registers: remove deprecated/inapplicable definitions
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Caio Marcelo de Oliveira Filho [Wed, 12 Jun 2019 03:07:32 +0000 (20:07 -0700)]
iris: Enable INTEL_shader_atomic_float_minmax
Supported only for gen >= 9.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Caio Marcelo de Oliveira Filho [Wed, 12 Jun 2019 03:06:41 +0000 (20:06 -0700)]
gallium: Add PIPE_CAP_ATOMIC_FLOAT_MINMAX
Used to enable INTEL_shader_atomic_float_minmax.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Rob Clark [Tue, 11 Jun 2019 12:16:21 +0000 (05:16 -0700)]
freedreno/a6xx: fix MAX_INDICES
Signed-off-by: Rob Clark <robdclark@chromium.org>
Rob Clark [Wed, 12 Jun 2019 18:24:55 +0000 (11:24 -0700)]
freedreno/blitter: remove dead code
The src/dst format is overriden from the pipe_blit_info, so this just
logic just serves to confuse the reader.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Rob Clark [Wed, 12 Jun 2019 20:36:18 +0000 (13:36 -0700)]
freedreno: turn staging cube into 2d-array
Since we could only need a subset of the layers, and otherwise we
trigger an assert in util_max_layer()
Signed-off-by: Rob Clark <robdclark@chromium.org>
Tomeu Vizoso [Thu, 13 Jun 2019 13:00:35 +0000 (15:00 +0200)]
panfrost: ci: Exclude some tests from results
These are tests that regressed in RK3288 but still pass on RK3399.
So we still have a CI we can rely on, add them to the flip-flop list for
now.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Tomeu Vizoso [Thu, 13 Jun 2019 10:08:38 +0000 (12:08 +0200)]
panfrost: ci: Update test expectations
Some tests got fixed since the last update, but also some regressions
crept in.
To keep the CI green, add the regressions to the expected failures.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Connor Abbott [Thu, 13 Jun 2019 14:48:41 +0000 (16:48 +0200)]
nir: Don't manually index intrinsic index enum
This fixes a rebase fail in
ea51275e07b, and prevents it from happening
again. There's no reason to do this manually.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Erik Faye-Lund [Tue, 11 Jun 2019 09:28:11 +0000 (11:28 +0200)]
docs: work around broken altsoftware.com link
altsoftware.com seems to no longer be around, and is currently being
held by a domain squatter. Let's link to waybackmachine instead.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Erik Faye-Lund [Tue, 11 Jun 2019 08:11:31 +0000 (10:11 +0200)]
docs: work around broken dsbox.com link
dsbox.com now forwards to haystax.com, which is tehcnially unrealted to
this link. Let's link to waybackmachine instead.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Erik Faye-Lund [Tue, 11 Jun 2019 08:05:51 +0000 (10:05 +0200)]
docs: work around broken sgi.com links
sgi.com now forwards to hpe.com, which is technically unrelated to these
links. Let's link to waybackmachine instead.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Erik Faye-Lund [Tue, 11 Jun 2019 08:20:12 +0000 (10:20 +0200)]
docs: update link to OpenGL FAQ
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Erik Faye-Lund [Tue, 11 Jun 2019 08:18:39 +0000 (10:18 +0200)]
docs: update link to the Linux OpenGL ABI
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Erik Faye-Lund [Tue, 11 Jun 2019 08:16:32 +0000 (10:16 +0200)]
docs: update link to glw
GLW is currently living in gitlab, the cgit-page is just a mirror.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Erik Faye-Lund [Tue, 11 Jun 2019 07:32:08 +0000 (09:32 +0200)]
docs: fixup link-target
Just a couple of lines above, we have this exact same link, but this
time with a leading "www.". Let's match that.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Erik Faye-Lund [Mon, 10 Jun 2019 18:57:37 +0000 (20:57 +0200)]
docs: eliminate another stale autoconf-reference
Meson is what should tell you about these issues, not the configure
script. We no longer have that.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Erik Faye-Lund [Mon, 10 Jun 2019 18:55:16 +0000 (20:55 +0200)]
docs: replace autoconf with meson
We no longer have an autoconf build-system to maintain, but we do have a
meson build-system. So let's mention that instead.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Erik Faye-Lund [Mon, 10 Jun 2019 18:52:16 +0000 (20:52 +0200)]
docs: update required packages
Automake and libtool are no longer required to build, instead we need
meson and ninja-build.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Erik Faye-Lund [Thu, 6 Jun 2019 09:43:34 +0000 (11:43 +0200)]
docs: remove pointless haiku-comment
The only build system that doesn't support Haiku is `Android.mk`,
which also doesn't support most other platforms either, so there is
no need to single it out.
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Erik Faye-Lund [Thu, 6 Jun 2019 08:33:09 +0000 (10:33 +0200)]
docs: fixup typo
Signed-off-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Daniel Schürmann [Wed, 9 May 2018 18:43:16 +0000 (20:43 +0200)]
radv: enable AMD_shader_ballot with RADV_PERFTEST_SHADER_BALLOT ('shader_ballot')
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Daniel Schürmann [Wed, 9 May 2018 18:42:09 +0000 (20:42 +0200)]
amd/common: add support for AMD_shader_ballot functions
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Daniel Schürmann [Wed, 9 May 2018 18:41:23 +0000 (20:41 +0200)]
spirv/nir: add support for AMD_shader_ballot and Groups capability
This commit also renames existing AMD capabilities:
- gcn_shader -> amd_gcn_shader
- trinary_minmax -> amd_trinary_minmax
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Daniel Schürmann [Wed, 9 May 2018 18:37:24 +0000 (20:37 +0200)]
nir: add intrinsics for AMD_shader_ballot
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Daniel Schürmann [Thu, 8 Mar 2018 15:25:20 +0000 (16:25 +0100)]
radv: enable shader_subgroup_vote & shader_subgroup_ballot extensions
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Daniel Schürmann [Fri, 9 Mar 2018 09:55:15 +0000 (10:55 +0100)]
nir/spirv: add support for the SubgroupBallotKHR SPIR-V capability
This capability is required for the VK_EXT_shader_subgroup_ballot extension.
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>