Martin Storsjo [Wed, 25 Apr 2018 21:23:59 +0000 (21:23 +0000)]
[Driver] Fix implicit config files from prefixed symlinks
If -no-canonical-prefixes isn't used, the clang executable name used
is the one of the actual executable, not the name of the symlink that
the user invoked.
In these cases, the target prefix was overridden based on the clang
executable name. (On the other hand the implicit -target option
that such a symlink adds, is added as an actual command line parameter
in tools/driver/driver.cop, before resolving the symlink and finding
the actual clang executable.
Use the original ClangNameParts (set from argv[0] in
tools/driver/driver.cpp) if it seems to be initialized propery.
All existing tests of this feature used -no-canonical-prefixes
(possibly because it also makes the driver look in the directory
of the symlink instead of the directory of the executable); add
another one that uses --config-user-dir= to specify the directory
instead. (For actual users of such symlinks, outisde of the test
suite, the directory is probably the same for both.)
This makes this feature work more like what the documentation
describes.
Differential Revision: https://reviews.llvm.org/D45964
llvm-svn: 330871
Simon Pilgrim [Wed, 25 Apr 2018 20:59:16 +0000 (20:59 +0000)]
[CostModel][X86] Remove hard coded SDIV/UDIV vector costs
Algorithmically compute the 'x20' SDIV/UDIV vector costs - this is necessary for PR36550 when DIV costs will be driven from the scheduler models.
llvm-svn: 330870
Rafael Espindola [Wed, 25 Apr 2018 20:46:08 +0000 (20:46 +0000)]
Also demote lazy symbols.
This is not a big simplification right now, but the special cases for
lazy symbols have been a common source of bugs in the past.
llvm-svn: 330869
Hans Wennborg [Wed, 25 Apr 2018 20:32:00 +0000 (20:32 +0000)]
[COFF] Don't set the tsaware bit on DLLs
It doesn't apply to DLLs, and link.exe doesn't set it.
Differential Revision: https://reviews.llvm.org/D46077
llvm-svn: 330868
Reid Kleckner [Wed, 25 Apr 2018 20:16:24 +0000 (20:16 +0000)]
Fix PluginsTests failure on Windows buildbots by enabling it everywhere
lit is picking up a stale executable in the unittests tree, which is
failing on Windows.
To simplify the CMake and avoid problems like this in the future, now we
always compile the test, but the test exits successfully when plugins
are not enabled.
llvm-svn: 330867
Tom Stellard [Wed, 25 Apr 2018 20:02:53 +0000 (20:02 +0000)]
AMDGPU/R600: Move int_r600_store_stream_output to the public intrinsic file
Summary:
The TableGen'd GlobalISel instruction selector assumes all intrinsics are in
the public Intrinsic:: namespace.
Reviewers: jvesely, nhaehnle
Reviewed By: jvesely, nhaehnle
Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D45989
llvm-svn: 330866
Michael Kruse [Wed, 25 Apr 2018 19:54:16 +0000 (19:54 +0000)]
[CodeGen] Fix comment. NFC.
llvm-svn: 330865
Michael Kruse [Wed, 25 Apr 2018 19:43:49 +0000 (19:43 +0000)]
[CodeGen] Print executed statement instances at runtime.
Add the options -polly-codegen-trace-stmts and
-polly-codegen-trace-scalars. When enabled, adds a call to the
beginning of every generated statement that prints the executed
statement instance. With -polly-codegen-trace-scalars, it also prints
the value of all scalars that are used in the statement, and PHIs
defined in the beginning of the statement.
Differential Revision: https://reviews.llvm.org/D45743
llvm-svn: 330864
Petar Jovanovic [Wed, 25 Apr 2018 19:34:48 +0000 (19:34 +0000)]
Add s390x to XFAIL for illegal_read/write_test.cc
Follow up to r330840 and r330849.
It seems that s390 is also not distinguishing illegal WRITE and READ memory
access.
Add s390x to XFAIL for the tests.
llvm-svn: 330863
Mark Searles [Wed, 25 Apr 2018 19:21:26 +0000 (19:21 +0000)]
[AMDGPU] Waitcnt pass: add debug options
- Add "amdgpu-waitcnt-forcezero" to force all waitcnt instrs to be emitted as s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
- Add debug counters to control force emit of s_waitcnt instrs; debug counters:
si-insert-waitcnts-forceexp: force emit s_waitcnt expcnt(0) instrs
si-insert-waitcnts-forcevm: force emit s_waitcnt lgkmcnt(0) instrs
si-insert-waitcnts-forcelgkm: force emit s_waitcnt vmcnt(0) instrs
- Add some debug statements
Note that a variant of this patch was previously committed/reverted.
Differential Revision: https://reviews.llvm.org/D45888
llvm-svn: 330862
Eli Friedman [Wed, 25 Apr 2018 19:14:05 +0000 (19:14 +0000)]
[TargetInfo] Sort target features before passing them to the backend
Passing the features in random order will lead to unpredictable results
when some of the features are related (like the architecture-version
features on ARM).
It might be possible to fix this particular case in the ARM target code,
to avoid adding overlapping target features. But we should probably be
sorting in any case: the behavior shouldn't depend on StringMap's
hashing algorithm.
Differential Revision: https://reviews.llvm.org/D46030
llvm-svn: 330861
David Bolvansky [Wed, 25 Apr 2018 18:58:53 +0000 (18:58 +0000)]
[SimplifyLibcalls] Atoi, strtol replacements
Reviewers: spatel, lebedev.ri, xbolva00, efriedma
Reviewed By: xbolva00, efriedma
Subscribers: efriedma, llvm-commits
Differential Revision: https://reviews.llvm.org/D45418
llvm-svn: 330860
Francis Visoiu Mistrih [Wed, 25 Apr 2018 18:58:06 +0000 (18:58 +0000)]
[MIR] Add support for debug metadata for fixed stack objects
Debug var, expr and loc were only supported for non-fixed stack objects.
This patch adds the following fields to the "fixedStack:" entries, and
renames the ones from "stack:" to:
* debug-info-variable
* debug-info-expression
* debug-info-location
Differential Revision: https://reviews.llvm.org/D46032
llvm-svn: 330859
Michael Kruse [Wed, 25 Apr 2018 18:53:33 +0000 (18:53 +0000)]
[ScopDetect] Reject loop with multiple exit blocks.
The current statement domain derivation algorithm does not (always)
consider that different exit blocks of a loop can have different
conditions to be reached.
From the code
for (int i = n; ; i-=2) {
if (i <= 0) goto even;
if (i <= 1) goto odd;
A[i] = i;
}
even:
A[0] = 42;
return;
odd:
A[1] = 21;
return;
Polly currently derives the following domains:
Stmt_even_critedge
Domain :=
[n] -> { Stmt_even_critedge[] };
Stmt_odd
Domain :=
[n] -> { Stmt_odd[] : (1 + n) mod 2 = 0 and n > 0 };
while the domain for the odd case is correct, Stmt_even is assumed to be
executed unconditionally, which is obviously wrong. While projecting out
the loop dimension in `adjustDomainDimensions`, it does not consider
that there are other exit condition that have matched before.
I don't know a how to fix this without changing a lot of code. Therefore
This patch rejects loops with multiple exist blocks to fix the
miscompile of test-suite's uuencode.
The odd condition is transformed by LLVM to
%cmp1 = icmp eq i64 %indvars.iv, 1
such that the project_out in adjustDomainDimensions() indeed only
matches for odd n (using this condition only, we'd have an infinite loop
otherwise).
The even condition manifests as
%cmp = icmp slt i64 %indvars.iv, 3
Because buildDomainsWithBranchConstraints() does not consider other exit
conditions, it has to assume that the induction variable will eventually
be lower than 3 and taking this exit.
IMHO we need to reuse the algorithm that determines the number of
iterations (addLoopBoundsToHeaderDomain) to determine which exit
condition applies first. It has to happen in
buildDomainsWithBranchConstraints() because the result will need to
propagate to successor BBs. Currently addLoopBoundsToHeaderDomain() just
look for union of all backedge conditions (which means leaving not the
loop here). The patch in llvm.org/PR35465 changes it to look for exit
conditions instead. This is required because there might be other exit
conditions that do not alternatively go back to the loop header.
Differential Revision: https://reviews.llvm.org/D45649
llvm-svn: 330858
Kostya Kortchinsky [Wed, 25 Apr 2018 18:52:29 +0000 (18:52 +0000)]
[scudo] Adding an interface function to print allocator stats
Summary:
This adds `__scudo_print_stats` as an interface function to display the Primary
and Secondary allocator statistics for Scudo.
Reviewers: alekseyshl, flowerhack
Reviewed By: alekseyshl
Subscribers: delcypher, llvm-commits, #sanitizers
Differential Revision: https://reviews.llvm.org/D46016
llvm-svn: 330857
Nico Weber [Wed, 25 Apr 2018 18:34:00 +0000 (18:34 +0000)]
IWYU llvm-config.h for LLVM_VERSION_STRING
llvm-svn: 330856
Petr Hosek [Wed, 25 Apr 2018 18:30:55 +0000 (18:30 +0000)]
[CMake] Enable libc++ for Fuchsia toolchain on Darwin
This is necessary in order to get a working C++ compiler on Darwin
since Clang expects libc++ headers to be part of the toolchain.
Differential Revision: https://reviews.llvm.org/D46075
llvm-svn: 330855
Sam Clegg [Wed, 25 Apr 2018 18:24:08 +0000 (18:24 +0000)]
[WebAssebmly] Add Module name to WasmSymbol
Imports in a wasm module can have custom module name. This change
adds the module name to the WasmSymbol structure so that the linker
can preserve this module name.
This is needed to fix: https://bugs.llvm.org/show_bug.cgi?id=37168
Differential Revision: https://reviews.llvm.org/D45797
llvm-svn: 330854
Nico Weber [Wed, 25 Apr 2018 18:06:23 +0000 (18:06 +0000)]
Rename sancov.cc to sancov.cpp
LLVM uses cpp as its C++ file ending.
https://reviews.llvm.org/D46068
llvm-svn: 330853
Simon Pilgrim [Wed, 25 Apr 2018 18:03:31 +0000 (18:03 +0000)]
[CostModel][X86] Add div/rem tests for non-uniform constant divisors
llvm-svn: 330852
Jan Vesely [Wed, 25 Apr 2018 17:36:36 +0000 (17:36 +0000)]
relational/select: Condition types for half are short/ushort, not char/uchar
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Aaron Watry <awatry@gmail.com>
llvm-svn: 330851
Craig Topper [Wed, 25 Apr 2018 17:35:03 +0000 (17:35 +0000)]
[X86] Form MUL_IMM for multiplies with 3/5/9 to encourage LEA formation over load folding.
Previously we only formed MUL_IMM when we split a constant. This blocked load folding on those cases. We should also form MUL_IMM for 3/5/9 to favor LEA over load folding.
Differential Revision: https://reviews.llvm.org/D46040
llvm-svn: 330850
Petar Jovanovic [Wed, 25 Apr 2018 17:34:30 +0000 (17:34 +0000)]
Finetune supported arches for the tests added in r330840
r330840 introduced two tests that may not be supported on all architectures.
powerpc64 seems to be one of those.
llvm-svn: 330849
Reid Kleckner [Wed, 25 Apr 2018 17:30:00 +0000 (17:30 +0000)]
Revert r330755 "[lit] Report line number for failed RUN command"
It is causing many tests to fail on Windows buildbots:
http://lab.llvm.org:8011/builders/clang-x64-ninja-win7/builds/10211
llvm-svn: 330848
Peter Szecsi [Wed, 25 Apr 2018 17:28:03 +0000 (17:28 +0000)]
[ASTImporter] FriendDecl importing improvements
There are only a few cases of importing a frienddecl which is currently supported.
This patch aims to improve the friend import process.
Set FriendObjectKind in case of decls, insert friend into the friend chain
correctly, checks structurally equivalent in a more advanced manner.
Test cases added as well.
llvm-svn: 330847
Alex Bradbury [Wed, 25 Apr 2018 17:25:29 +0000 (17:25 +0000)]
[RISCV] Allow call pseudoinstruction to be used to call a function name that coincides with a register name
Previously `call zero`, `call f0` etc would fail. This leads to compilation
failures if building programs that define functions with those names and using
-save-temps.
llvm-svn: 330846
Nico Weber [Wed, 25 Apr 2018 17:24:41 +0000 (17:24 +0000)]
Don't list a source file twice.
llvm-svn: 330845
Taewook Oh [Wed, 25 Apr 2018 17:19:21 +0000 (17:19 +0000)]
[ICP] Do not attempt type matching for variable length arguments.
Summary:
When performing indirect call promotion, current implementation inspects "all" parameters of the callsite and attemps to match with the formal argument type of the callee function. However, it is not possible to find the type for variable length arguments, and the compiler crashes when it attemps to match the type for variable lenght argument.
It seems that the bug is introduced with D40658. Prior to that, the type matching is performed only for the parameters whose ID is less than callee->getFunctionNumParams(). The attached test case will crash without the patch.
Reviewers: mssimpso, davidxl, davide
Reviewed By: mssimpso
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D46026
llvm-svn: 330844
Nico Weber [Wed, 25 Apr 2018 17:07:46 +0000 (17:07 +0000)]
Rename Attributes.gen, Intrinsics.gen to Attributes.inc, Intrinsics.inc
Virtually all other tablegen outputs are called .inc, not .gen, so rename these two too for consistency.
No behavior change.
https://reviews.llvm.org/D46058
llvm-svn: 330843
Craig Topper [Wed, 25 Apr 2018 16:57:46 +0000 (16:57 +0000)]
[Builtins] Fix typos in a comment. NFC
llvm-svn: 330842
Sanjay Patel [Wed, 25 Apr 2018 16:34:01 +0000 (16:34 +0000)]
[InstCombine] clean up foldSelectICmpAnd(); NFC
As discussed in D45862, we want to delete parts of
this code because it can create more instructions
than it removes. But we also want to preserve some
folds that are winners, so tidy up what's here to
make splitting the good from bad a bit easier.
llvm-svn: 330841
Petar Jovanovic [Wed, 25 Apr 2018 16:21:00 +0000 (16:21 +0000)]
[mips] Implement GetWriteFlag() for mips
The read/write flag is set by manually decoding the instruction that caused
the exception. It is implemented this way because the cause register which
contains the needed flag was removed from the signal context structure which
the user handler receives from the kernel.
Patch by Milos Stojanovic.
Differential Revision: https://reviews.llvm.org/D45768
llvm-svn: 330840
Nico Weber [Wed, 25 Apr 2018 16:20:43 +0000 (16:20 +0000)]
Make add_clang_unittest formatting a bit more consistent.
llvm-svn: 330839
Marshall Clow [Wed, 25 Apr 2018 16:09:47 +0000 (16:09 +0000)]
Disable the test I just added when testing C++03.
llvm-svn: 330838
Sanjay Patel [Wed, 25 Apr 2018 15:59:23 +0000 (15:59 +0000)]
[InstCombine] add tests for select to logic folds; NFC
As discussed in D45862, we want these folds sometimes
because they're good improvements.
But as we can see here, the current logic doesn't
check uses and doesn't produce optimal code in all
cases.
llvm-svn: 330837
Haojian Wu [Wed, 25 Apr 2018 15:27:09 +0000 (15:27 +0000)]
[clangd] Add "str()" method to SymbolID.
Summary:
This is a convenient function when we try to get std::string of
SymbolID.
Reviewers: ioeric
Subscribers: klimek, ilya-biryukov, MaskRay, jkorous, cfe-commits
Differential Revision: https://reviews.llvm.org/D46065
llvm-svn: 330835
Simon Pilgrim [Wed, 25 Apr 2018 15:22:03 +0000 (15:22 +0000)]
[CostModel][X86] Recursive call for cost of imul for packed v16i16 constant shift left.
Don't just assume cost = 1.
llvm-svn: 330834
Ilya Biryukov [Wed, 25 Apr 2018 15:13:34 +0000 (15:13 +0000)]
[CodeComplete] Fix completion in the middle of ident in ctor lists.
Summary:
The example that was broken before (^ designates completion points):
class Foo {
Foo() : fie^ld^() {} // no completions were provided here.
int field;
};
To fix it we don't cut off lexing after an identifier followed by code
completion token is lexed. Instead we skip the rest of identifier and
continue lexing.
This is consistent with behavior of completion when completion token is
right before the identifier.
Reviewers: sammccall, aaron.ballman, bkramer, sepavloff, arphaman, rsmith
Reviewed By: aaron.ballman
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D44932
llvm-svn: 330833
Krasimir Georgiev [Wed, 25 Apr 2018 14:56:19 +0000 (14:56 +0000)]
[clang-format] Start formatting cpp code in raw strings in google style
Summary: This adds some delimiters to detect cpp code in raw strings.
Reviewers: klimek
Reviewed By: klimek
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D46062
llvm-svn: 330832
Amara Emerson [Wed, 25 Apr 2018 14:43:59 +0000 (14:43 +0000)]
[AArch64][GlobalISel] Implement selection for the llvm.trap intrinsic.
rdar://
38674040
llvm-svn: 330831
Paul Walker [Wed, 25 Apr 2018 14:42:44 +0000 (14:42 +0000)]
Fix typo in static_assert for size of LoadSDNodeBitfields.
Reviewers: fhahn, jlebar, delena, RKSimon
Reviewed By: fhahn, jlebar
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D45769
llvm-svn: 330830
Filipe Cabecinhas [Wed, 25 Apr 2018 14:39:16 +0000 (14:39 +0000)]
[llvm-mca] Make ViewOptions static. NFCI
llvm-svn: 330829
Marshall Clow [Wed, 25 Apr 2018 14:27:29 +0000 (14:27 +0000)]
Fix static initialization of std::atomic_flag; Fixes PR#37226. Thanks to Ricky Zhou for the report and test case.
llvm-svn: 330828
Shiva Chen [Wed, 25 Apr 2018 14:19:12 +0000 (14:19 +0000)]
[RISCV] Expand function call to "call" pseudoinstruction
To do this:
1. Change GlobalAddress SDNode to TargetGlobalAddress to avoid legalizer
split the symbol.
2. Change ExternalSymbol SDNode to TargetExternalSymbol to avoid legalizer
split the symbol.
3. Let PseudoCALL match direct call with target operand TargetGlobalAddress
and TargetExternalSymbol.
Differential Revision: https://reviews.llvm.org/D44885
llvm-svn: 330827
Shiva Chen [Wed, 25 Apr 2018 14:18:55 +0000 (14:18 +0000)]
[RISCV] Support "call" pseudoinstruction in the MC layer
To do this:
1. Add PseudoCALLIndirct to match indirect function call.
2. Add PseudoCALL to support parsing and print pseudo `call` in assembly
3. Expand PseudoCALL to the following form with R_RISCV_CALL relocation type
while encoding:
auipc ra, func
jalr ra, ra, 0
If we expand PseudoCALL before emitting assembly, we will see auipc and jalr
pair when compile with -S. It's hard for assembly parser to parsing this
pair and identify it's semantic is function call and then insert R_RISCV_CALL
relocation type. Although we could insert R_RISCV_PCREL_HI20 and
R_RISCV_PCREL_LO12_I relocation types instead of R_RISCV_CALL.
Due to RISCV relocation design, auipc and jalr pair only can relax to jal with
R_RISCV_CALL + R_RISCV_RELAX relocation types.
We expand PseudoCALL as late as encoding(RISCVMCCodeEmitter) instead of before
emitting assembly(RISCVAsmPrinter) because we want to preserve call
pseudoinstruction in assembly code. It's more readable and assembly parser
could identify call assembly and insert R_RISCV_CALL relocation type.
Differential Revision: https://reviews.llvm.org/D45859
llvm-svn: 330826
Simon Dardis [Wed, 25 Apr 2018 14:12:57 +0000 (14:12 +0000)]
[mips] Teach the delay slot filler to transform 'jal' for microMIPS
ISel is currently picking 'JAL' over 'JAL_MM' for calling a function when
targeting microMIPS. A later patch will correct this behaviour.
This patch extends the mechanism for transforming instructions into their short
delay to recognise 'JAL_MM' for transforming into 'JALS_MM'.
llvm-svn: 330825
Yaxun Liu [Wed, 25 Apr 2018 13:33:19 +0000 (13:33 +0000)]
[HIP] Add predefined macros __HIPCC__ and __HIP_DEVICE_COMPILE__
Differential Revision: https://reviews.llvm.org/D45441
llvm-svn: 330824
Benjamin Kramer [Wed, 25 Apr 2018 13:22:47 +0000 (13:22 +0000)]
Fix -Wswitch warning after r330790.
source/Symbol/ClangASTContext.cpp:391:13: error: enumeration value 'HIP' not handled in switch [-Werror,-Wswitch]
switch (IK.getLanguage()) {
llvm-svn: 330823
Simon Pilgrim [Wed, 25 Apr 2018 13:19:04 +0000 (13:19 +0000)]
[llvm-mca][X86] Updated fma3 tests after rL330820
llvm-svn: 330822
Yaxun Liu [Wed, 25 Apr 2018 13:07:58 +0000 (13:07 +0000)]
Fix failure in lit test kernel-call.cu due to name mangling
llvm-svn: 330821
Simon Pilgrim [Wed, 25 Apr 2018 13:07:58 +0000 (13:07 +0000)]
[X86] Split WriteFMA into XMM, Scalar and YMM/ZMM scheduler classes
This removes all the FMA InstRW overrides.
If we ever get PR36924, then we can remove many of these declarations from models.
llvm-svn: 330820
Roman Lebedev [Wed, 25 Apr 2018 12:48:23 +0000 (12:48 +0000)]
[X86][AArch64][NFC] Finish adding 'bad' tests for masked merge unfolding with constants.
I have initially committed basic tests in, rL330771,
but then quickly discovered that there are a few more
interesting patterns.
llvm-svn: 330819
Alexander Timofeev [Wed, 25 Apr 2018 12:32:46 +0000 (12:32 +0000)]
[AMDGPU] Revert
b0efc4fd6 (https://reviews.llvm.org/D40556)
llvm-svn: 330818
Gabor Buella [Wed, 25 Apr 2018 12:15:34 +0000 (12:15 +0000)]
Avoid a warning on pointer casting, NFC
Reviewers: philip.pfaffe
Reviewed By: philip.pfaffe
Differential Revision: https://reviews.llvm.org/D46012
llvm-svn: 330817
Andrea Di Biagio [Wed, 25 Apr 2018 11:33:14 +0000 (11:33 +0000)]
[llvm-mca] Add a new option category for views.
With this patch, options to add/tweak views are all grouped together in the
-help output.
The new "View Options" category looks like this:
```
View Options:
-dispatch-stats - Print dispatch statistics
-instruction-info - Print the instruction info view
-instruction-tables - Print instruction tables
-register-file-stats - Print register file statistics
-resource-pressure - Print the resource pressure view
-retire-stats - Print retire control unit statistics
-scheduler-stats - Print scheduler statistics
-timeline - Print the timeline view
-timeline-max-cycles=<uint> - Maximum number of cycles in the timeline view. Defaults to 80 cycles
-timeline-max-iterations=<uint> - Maximum number of iterations to print in timeline view
```
llvm-svn: 330816
Greg Bedwell [Wed, 25 Apr 2018 11:20:42 +0000 (11:20 +0000)]
[UpdateTestChecks] Change update_mca_test_checks.py file mode to match the other scripts
llvm-svn: 330815
George Rimar [Wed, 25 Apr 2018 11:16:31 +0000 (11:16 +0000)]
[ELF] - Eliminate the AssertCommand.
Currently, LLD supports ASSERT as a separate command.
We support two forms now.
Assign expression-form: . = ASSERT(0x100)
(old GNU ld required it and some scripts in the wild are still using
something like . = ASSERT((_end - _text <= (512 * 1024 * 1024)), "kernel image bigger than KERNEL_IMAGE_SIZE");
Nowadays above is not a mandatory form and command-like form is commonly used:
ASSERT(<expr>, "text);
The return value of the ASSERT is Dot. That was implemented in D30171.
It looks like (2) is just a short version of (1) then.
GNU ld does *not* list ASSERT as a SECTIONS command:
https://sourceware.org/binutils/docs/ld/SECTIONS.html#SECTIONS
Given above we probably can change ASSERT to be an assignment to Dot.
That makes the rest of the code much simpler. Patch do that.
Differential revision: https://reviews.llvm.org/D45434
llvm-svn: 330814
Simon Pilgrim [Wed, 25 Apr 2018 10:51:19 +0000 (10:51 +0000)]
[X86][SKX] Setup WriteFAdd and remove unnecessary InstRW scheduler overrides.
llvm-svn: 330813
Simon Pilgrim [Wed, 25 Apr 2018 10:50:39 +0000 (10:50 +0000)]
[X86][SNB] Remove unnecessary WriteFBlendLd InstRW scheduler overrides.
llvm-svn: 330812
Andrea Di Biagio [Wed, 25 Apr 2018 10:27:30 +0000 (10:27 +0000)]
[llvm-mca] run clang-format on a bunch of files. NFC
llvm-svn: 330811
Simon Dardis [Wed, 25 Apr 2018 10:19:22 +0000 (10:19 +0000)]
[mips] Fix the definition of sync, synci
Also, fix the disassembly of synci for microMIPS.
Reviewers: abeserminji, smaksimovic, atanasyan
Differential Revision: https://reviews.llvm.org/D45870
llvm-svn: 330810
Andrea Di Biagio [Wed, 25 Apr 2018 10:18:25 +0000 (10:18 +0000)]
[llvm-mca] Default to the native host cpu if flag -mcpu is not specified.
llvm-svn: 330809
Paul Semel [Wed, 25 Apr 2018 10:09:20 +0000 (10:09 +0000)]
add check for long double for __builtin_dump_struct
llvm-svn: 330808
Andrea Di Biagio [Wed, 25 Apr 2018 09:38:58 +0000 (09:38 +0000)]
[llvm-mca] Remove method Instruction::isZeroLatency(). NFCI
llvm-svn: 330807
Florian Hahn [Wed, 25 Apr 2018 09:35:54 +0000 (09:35 +0000)]
[LoopInterchange] Use getExitBlock()/getExitingBlock instead of manual impl.
This also means we have to check if the latch is the exiting block now,
as `transform` expects the latches to be the exiting blocks too.
https://bugs.llvm.org/show_bug.cgi?id=36586
Reviewers: efriedma, davide, karthikthecool
Reviewed By: efriedma
Differential Revision: https://reviews.llvm.org/D45279
llvm-svn: 330806
Sander de Smalen [Wed, 25 Apr 2018 09:26:47 +0000 (09:26 +0000)]
[AArch64][SVE] Asm: Add AsmOperand classes for SVE gather/scatter addressing modes.
This patch adds parsing support for 'vector + shift/extend' and
corresponding asm operand classes, needed for implementing SVE's
gather/scatter addressing modes.
The added combinations of vector (ZPR) and Shift/Extend are:
Unscaled:
ZPR64ExtLSL8: signed 64-bit offsets (z0.d)
ZPR32ExtUXTW8: unsigned 32-bit offsets (z0.s, uxtw)
ZPR32ExtSXTW8: signed 32-bit offsets (z0.s, sxtw)
Unpacked and unscaled:
ZPR64ExtUXTW8: unsigned 32-bit offsets (z0.d, uxtw)
ZPR64ExtSXTW8: signed 32-bit offsets (z0.d, sxtw)
Unpacked and scaled:
ZPR64ExtUXTW<scale>: unsigned 32-bit offsets (z0.d, uxtw #<shift>)
ZPR64ExtSXTW<scale>: signed 32-bit offsets (z0.d, sxtw #<shift>)
Scaled:
ZPR32ExtUXTW<scale>: unsigned 32-bit offsets (z0.s, uxtw #<shift>)
ZPR32ExtSXTW<scale>: signed 32-bit offsets (z0.s, sxtw #<shift>)
ZPR64ExtLSL<scale>: unsigned 64-bit offsets (z0.d, lsl #<shift>)
ZPR64ExtLSL<scale>: signed 64-bit offsets (z0.d, lsl #<shift>)
Patch [1/3] in series to add support for SVE's gather load instructions
that use scalar+vector addressing modes:
- Patch [1/3]: https://reviews.llvm.org/D45951
- Patch [2/3]: https://reviews.llvm.org/D46023
- Patch [3/3]: https://reviews.llvm.org/D45958
Reviewers: fhahn, rengolin, samparker, SjoerdMeijer, t.p.northover, echristo, evandro, javed.absar
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D45951
llvm-svn: 330805
Bjorn Pettersson [Wed, 25 Apr 2018 09:23:56 +0000 (09:23 +0000)]
[DebugInfo] Invalidate debug info in ReassociatePass::RewriteExprTree
Summary:
When Reassociate is rewriting an expression tree it may
reuse old binary expression nodes, for new expressions.
Whenever an expression node is reused, but with a non-trivial
change in the result, we need to invalidate any debug info
that is associated with the node.
If for example rewriting
x = mul a, b
y = mul c, x
into
x = mul c, b
y = mul a, x
we still get the same result for 'y', but 'x' is a new expression.
All debug info referring to 'x' must be invalidated (marked as
optimized out) since we no longer calculate the expected value.
As a side-effect this patch avoid (at least some) problems where
reassociate could end up creating IR with debug-use before def.
Earlier the dbg.value nodes where left untouched in the IR, while
the reused binary nodes where sinked to just before the root node
of the rewritten expression tree. See PR27273 for more info about
such problems.
Reviewers: dblaikie, aprantl, dexonsmith
Reviewed By: aprantl
Subscribers: JDevlieghere, llvm-commits
Tags: #debug-info
Differential Revision: https://reviews.llvm.org/D45975
llvm-svn: 330804
Eric Liu [Wed, 25 Apr 2018 09:17:05 +0000 (09:17 +0000)]
[clangd] Minor fixes for C++ standard library header mapping.
llvm-svn: 330803
Bjorn Pettersson [Wed, 25 Apr 2018 09:04:12 +0000 (09:04 +0000)]
Fix buildbot problems after rC330794
Avoiding
error: no matching function for call to 'makeArrayRef'
at
../tools/clang/lib/Parse/ParseTemplate.cpp:373:17
By using a local C array as input to makeArrayRef.
Not sure if this is the best solution, but it makes the code
compile again.
llvm-svn: 330802
Craig Topper [Wed, 25 Apr 2018 06:24:51 +0000 (06:24 +0000)]
[TableGen] Fix bad indentation in tablegen output file.
llvm-svn: 330801
Tobias Grosser [Wed, 25 Apr 2018 06:10:35 +0000 (06:10 +0000)]
Update isl to isl-0.19-114-g385262af
llvm-svn: 330800
David Bolvansky [Wed, 25 Apr 2018 04:33:36 +0000 (04:33 +0000)]
Merging r46043:
------------------------------------------------------------------------
llvm-svn: 330799
Faisal Vali [Wed, 25 Apr 2018 03:54:20 +0000 (03:54 +0000)]
[NFC] Make dependent parameter non-deducible, so that we are forced to use the default template parameter.
This might provide users with more graceful diagnostics if they should ever try and call this function with non-ConceptDecls.
llvm-svn: 330798
Craig Topper [Wed, 25 Apr 2018 03:40:45 +0000 (03:40 +0000)]
[X86] Auto-generate complete checks. NFC
llvm-svn: 330797
Faisal Vali [Wed, 25 Apr 2018 03:28:23 +0000 (03:28 +0000)]
Fix rC330794 - a parameter that should have been dependent was inadvertently not -
and compiled in MSVC - but not so for the other bots.
The fix was to make it dependent as intended.
llvm-svn: 330796
Yaxun Liu [Wed, 25 Apr 2018 03:16:07 +0000 (03:16 +0000)]
Fix lit test kernel-call.cu failure on ps4 due to dso_local
llvm-svn: 330795
Faisal Vali [Wed, 25 Apr 2018 02:42:26 +0000 (02:42 +0000)]
[c++2a] [concepts] Add rudimentary parsing support for template concept declarations
This patch is a tweak of changyu's patch: https://reviews.llvm.org/D40381. It differs in that the recognition of the 'concept' token is moved into the machinery that recognizes declaration-specifiers - this allows us to leverage the attribute handling machinery more seamlessly.
See the test file to get a sense of the basic parsing that this patch supports.
There is much more work to be done before concepts are usable...
Thanks Changyu!
llvm-svn: 330794
Yaxun Liu [Wed, 25 Apr 2018 02:34:04 +0000 (02:34 +0000)]
Fix failure in lit test kernel-call.cu
There is signext on ppc64. Just remove check for function argument.
llvm-svn: 330793
Geoff Berry [Wed, 25 Apr 2018 02:17:56 +0000 (02:17 +0000)]
[DivRemPairs] Fix non-determinism in use list order.
Summary:
Use a MapVector instead of a DenseMap for RemMap since it is iteratated
over and the order of iteration can effect the order that new
instructions are created. This can in turn effect the use list order of
div/rem input values if multiple new instructions are created that share
any input values.
Reviewers: spatel
Subscribers: mcrosier, llvm-commits
Differential Revision: https://reviews.llvm.org/D45858
llvm-svn: 330792
Billy Robert O'Neal III [Wed, 25 Apr 2018 01:58:55 +0000 (01:58 +0000)]
[libcxx] [test] Remove nonportable that errc::is_a_directory produces "Is a directory" from ios_base::failure tests
These io_error asserts that std::errc::is_a_directory has message "Is a directory". On MSVC++ it reports "is a directory" (with a lowercase I). That doesn't matter for the ios_failure component being tested, so just implement in terms of system_category().message().
Reviewed as https://reviews.llvm.org/D45715
llvm-svn: 330791
Yaxun Liu [Wed, 25 Apr 2018 01:10:37 +0000 (01:10 +0000)]
[HIP] Add hip input kind and codegen for kernel launching
HIP is a language similar to CUDA (https://github.com/ROCm-Developer-Tools/HIP/blob/master/docs/markdown/hip_kernel_language.md ).
The language syntax is very similar, which allows a hip program to be compiled as a CUDA program by Clang. The main difference
is the host API. HIP has a set of vendor neutral host API which can be implemented on different platforms. Currently there is open source
implementation of HIP runtime on amdgpu target (https://github.com/ROCm-Developer-Tools/HIP).
This patch adds support of input kind and language standard hip.
When hip file is compiled, both LangOpts.CUDA and LangOpts.HIP is turned on. This allows compilation of hip program as CUDA
in most cases and only special handling of hip program is needed LangOpts.HIP is checked.
This patch also adds support of kernel launching of HIP program using HIP host API.
When -x hip is not specified, there is no behaviour change for CUDA.
Patch by Greg Rodgers.
Revised and lit test added by Yaxun Liu.
Differential Revision: https://reviews.llvm.org/D44984
llvm-svn: 330790
Richard Trieu [Wed, 25 Apr 2018 00:31:15 +0000 (00:31 +0000)]
[ODRHash] Hash template arguments of methods.
llvm-svn: 330789
Rafael Espindola [Wed, 25 Apr 2018 00:29:13 +0000 (00:29 +0000)]
Bring r329960 back.
The fix is to copy Used when replacing the symbol.
Original message:
Do not keep shared symbols created from garbage-collected eliminated DSOs.
If all references to a DSO happen to be weak, and if the DSO is
specified with --as-needed, the DSO is not added to DT_NEEDED.
If that happens, we also need to eliminate shared symbols created
from the DSO. Otherwise, they become dangling references that point
to non-exsitent DSO.
Fixes https://bugs.llvm.org/show_bug.cgi?id=36991
Differential Revision: https://reviews.llvm.org/D45536
llvm-svn: 330788
Chandler Carruth [Wed, 25 Apr 2018 00:18:07 +0000 (00:18 +0000)]
[PM/LoopUnswitch] Begin teaching SimpleLoopUnswitch to use the new
update API for dominators rather than doing manual, hacky updates.
This is just the first step, but in some ways the most important as it
moves the non-trivial unswitching to update the domtree rather than
fully recalculating it each time.
Subsequent patches should remove the custom update logic used by the
trivial unswitch and replace it with uses of the update API.
This also fixes a number of bugs I was seeing when testing non-trivial
unswitch due to it querying the quasi-correct dominator tree. Now the
tree is 100% correct and safe to query. That said, there are still more
bugs I can see with non-trivial unswitch just running over the test
suite, so more bugfix patches are needed as well.
Thanks to both Sanjoy and Fedor for reviews and testing!
Differential Revision: https://reviews.llvm.org/D45943
llvm-svn: 330787
Bob Haarman [Tue, 24 Apr 2018 23:16:39 +0000 (23:16 +0000)]
[COFF] create MemoryBuffers without requiring NUL terminators
Summary:
In a number of places in the COFF linker, we were calling
MemoryBuffer::getFile() with default parameters. This causes LLVM to
NUL-terminate the buffers, which can prevent them from being memory
mapped. Since we operate on binary and do not use NUL as an indicator
of the end of the file content, this change causes us to not require
the NUL terminator anymore.
Reviewers: ruiu, pcc
Reviewed By: ruiu
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D45909
llvm-svn: 330786
Rui Ueyama [Tue, 24 Apr 2018 23:09:57 +0000 (23:09 +0000)]
Style fix.
llvm-svn: 330785
Rafael Espindola [Tue, 24 Apr 2018 23:03:58 +0000 (23:03 +0000)]
Add a test. NFC.
This would have found the issue in r329960.
llvm-svn: 330784
Jessica Paquette [Tue, 24 Apr 2018 22:38:15 +0000 (22:38 +0000)]
[MachineOutliner] Check for explicit uses of LR/W30 in MI operands
Before, the outliner would grab ADRPs that used LR/W30. This patch fixes
that by checking for explicit uses of those registers before the special-casing
for ADRPs.
This also adds a test that ensures that those sorts of ADRPs won't be outlined.
llvm-svn: 330783
Craig Topper [Tue, 24 Apr 2018 22:35:27 +0000 (22:35 +0000)]
[DAGCombiner][X86] When promoting loads don't use ZEXTLOAD even its legal
We were previously prefering ZEXTLOAD over EXTLOAD if it is legal. This triggers during X86's promotion of i16->i32. Not sure about other targets.
Using ZEXTLOAD can prevent folding it to SEXTLOAD later if we were to promote a sign extended operand like we would need for SRA. However, X86 doesn't currently promote i16 SRA. I was looking into doing that which is how I found this issue.
This is also blocking our ability to fold 4 byte aligned EXTLOADs with "loadi32". This is what caused most of the test changes here.
Differential Revision: https://reviews.llvm.org/D45585#inline-402825
llvm-svn: 330781
Dan Albert [Tue, 24 Apr 2018 22:06:40 +0000 (22:06 +0000)]
Revert "[Driver] Android triples are not aliases for other triples."
Revering while I diagnose the failures.
This reverts commit
82dc3bf2157da280420f80e654292cb05e0dc5f7.
llvm-svn: 330780
Reid Kleckner [Tue, 24 Apr 2018 22:03:07 +0000 (22:03 +0000)]
Fix path separator checks on Windows
llvm-svn: 330779
Warren Ristow [Tue, 24 Apr 2018 22:01:50 +0000 (22:01 +0000)]
[X86] Account for partial stack slot spills (PR30821)
Previously, _any_ store or load instruction was considered to be
operating on a spill if it had a frameindex as an operand, and thus
was fair game for optimisations such as "StackSlotColoring". This
usually works, except on architectures where spills can be partially
restored, for example on X86 where a spilt vector can have a single
component loaded (zeroing the rest of the target register). This can be
mis-interpreted and the zero extension unsoundly eliminated, see
pr30821.
To avoid this, this commit optionally provides the caller to
isLoadFromStackSlot and isStoreToStackSlot with the number of bytes
spilt/loaded by the given instruction. Optimisations can then determine
that a full spill followed by a partial load (or vice versa), for
example, cannot necessarily be commuted.
Patch by Jeremy Morse!
Differential Revision: https://reviews.llvm.org/D44782
llvm-svn: 330778
Alexander Shaposhnikov [Tue, 24 Apr 2018 21:44:13 +0000 (21:44 +0000)]
[llvm-objcopy] Adjust the help message
Capitalize the first letter,
make the text a bit more consistent.
NFC.
Differential revision: https://reviews.llvm.org/D46025
llvm-svn: 330777
Reid Kleckner [Tue, 24 Apr 2018 21:41:50 +0000 (21:41 +0000)]
Bring back APInt self-move assignment check for MSVC only
Summary:
It was removed about a year ago in r300477. Bring it back, along with
its unittest, when the MSVC STL is in use. The MSVC STL performs
self-assignment in std::shuffle. These days, llvm::sort calls
std::shuffle when expensive checks are enabled to help find
non-determinism bugs.
Reviewers: craig.topper, chandlerc
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D46028
llvm-svn: 330776
Tom Stellard [Tue, 24 Apr 2018 21:37:57 +0000 (21:37 +0000)]
AMDGPU: Remove deprecated llvm.AMDGPU.kilp intrinsic
Summary: This is no longer used by mesa since its 18.0.0 release.
Reviewers: nhaehnle
Reviewed By: nhaehnle
Subscribers: arsenm, kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye
Differential Revision: https://reviews.llvm.org/D45988
llvm-svn: 330775
Tom Stellard [Tue, 24 Apr 2018 21:29:36 +0000 (21:29 +0000)]
AMDGPU/GlobalISel: Fall-back to SelectionDAG for non-void functions
Reviewers: arsenm, nhaehnle
Reviewed By: nhaehnle
Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D45843
llvm-svn: 330774
Mandeep Singh Grang [Tue, 24 Apr 2018 21:25:57 +0000 (21:25 +0000)]
[docs] Add a note on non-deterministic sorting order of equal elements
Reviewers: RKSimon, t.p.northover, dexonsmith
Reviewed By: RKSimon
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D45831
llvm-svn: 330773
Jonathan Coe [Tue, 24 Apr 2018 21:25:16 +0000 (21:25 +0000)]
[clang-tidy] Improve bugprone-unused-return-value check
Summary:
Add support for checking class template member functions.
Also add the following functions to be checked by default:
- std::unique_ptr::release
- std::basic_string::empty
- std::vector::empty
Reviewers: alexfh, hokein, aaron.ballman, ilya-biryukov
Reviewed By: aaron.ballman
Subscribers: jbcoe, xazax.hun, cfe-commits
Tags: #clang-tools-extra
Differential Revision: https://reviews.llvm.org/D45891
Patch by khuttun (Kalle Huttunen)
llvm-svn: 330772
Roman Lebedev [Tue, 24 Apr 2018 21:23:22 +0000 (21:23 +0000)]
[X86][AArch64][NFC] Add tests for masked merge unfolding with %y = const
The fold was added in D45733.
This appears to be a regression.
llvm-svn: 330771
Dan Albert [Tue, 24 Apr 2018 21:18:37 +0000 (21:18 +0000)]
[Driver] Android triples are not aliases for other triples.
Summary:
Android targets should never use tools/libraries for non-Android
targets or vice versa.
Reviewers: srhines, george.burgess.iv, eugenis
Reviewed By: eugenis
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D45597
llvm-svn: 330770