Richard Smith [Sat, 22 Jun 2019 21:30:43 +0000 (21:30 +0000)]
Fix TBAA representation for zero-sized fields and unnamed bit-fields.
Unnamed bit-fields should not be represented in the TBAA metadata
because they do not represent storage fields (they only affect layout).
Zero-sized fields should not be represented in the TBAA metadata
because by definition they have no associated storage (so we will never
emit a load or store through them), and they might not appear in
declaration order within the struct layout.
Fixes a verifier failure when emitting a TBAA-enabled load through a
class type containing a zero-sized field.
llvm-svn: 364140
Richard Smith [Sat, 22 Jun 2019 20:41:57 +0000 (20:41 +0000)]
Remove reliance on toCharUnitsFromBits rounding down.
llvm-svn: 364139
Mike Spertus [Sat, 22 Jun 2019 18:56:40 +0000 (18:56 +0000)]
Natural MSVC visualization of constructors
E.g., Allow MSVC to visualize a CXXConstructorDecl like
Constructor { Y(type_identity_t<T>)}
llvm-svn: 364138
Saleem Abdulrasool [Sat, 22 Jun 2019 18:55:51 +0000 (18:55 +0000)]
builtins: relax __iso_volatile_{load,store}32
This is reduced from MSVC's MSVCPRT 14.21.27702 atomic header. Because
Windows is a LLP64 environment, `long`, `long int`, and `int` are all
synonymous. Change the signature for `__iso_volatile_load32` and
`__iso_volatile_store32` to accept a `long int` instead. This allows
an implicit cast of `int` to `long int` while also permitting `long`
to be accepted.
llvm-svn: 364137
Simon Pilgrim [Sat, 22 Jun 2019 17:57:01 +0000 (17:57 +0000)]
[X86][SSE] Fold extract_subvector(vselect(x,y,z),0) -> vselect(extract_subvector(x,0),extract_subvector(y,0),extract_subvector(z,0))
llvm-svn: 364136
Philip Reames [Sat, 22 Jun 2019 17:54:25 +0000 (17:54 +0000)]
Exploit a zero LoopExit count to eliminate loop exits
This turned out to be surprisingly effective. I was originally doing this just for completeness sake, but it seems like there are a lot of cases where SCEV's exit count reasoning is stronger than it's isKnownPredicate reasoning.
Once this is in, I'm thinking about trying to build on the same infrastructure to eliminate provably untaken checks. There may be something generally interesting here.
Differential Revision: https://reviews.llvm.org/D63618
llvm-svn: 364135
Don Hinton [Sat, 22 Jun 2019 17:22:50 +0000 (17:22 +0000)]
[CommandLine] Remove OptionCategory and SubCommand caches from the Option class.
Summary:
This change processes `OptionCategory`s and `SubCommand`s as they
are seen instead of caching them in the Option class and processing
them later. Doing so simplifies the work needed to be done by the Global
parser and significantly reduces the size of the Option class to a mere 64
bytes.
Removing the `OptionCategory` cache saved 24 bytes, and removing
the `SubCommand` cache saved an additional 48 bytes, for a total of a
72 byte reduction.
Reviewers: beanz, zturner, MaskRay, serge-sans-paille
Reviewed By: serge-sans-paille
Subscribers: serge-sans-paille, tstellar, zturner, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62105
llvm-svn: 364134
Hubert Tong [Sat, 22 Jun 2019 16:03:29 +0000 (16:03 +0000)]
[NFC] Fix indentation in PPCAsmPrinter.cpp
After r248261, the indentation switches, inside a namespace definition,
between indenting and not indenting one level in for that namespace; the
abomination occurs in the middle of a class definition. Fix that.
llvm-svn: 364133
Hubert Tong [Sat, 22 Jun 2019 16:02:02 +0000 (16:02 +0000)]
[PowerPC][NFC] Move comment to the relevant function
A comment that applies to a virtual destructor was placed on a class
constructor. Move the comment to where it belongs.
llvm-svn: 364132
Nico Weber [Sat, 22 Jun 2019 11:23:01 +0000 (11:23 +0000)]
PDB docs: Delete trailing whitespace, wrap to 80 cols
llvm-svn: 364131
Nikita Popov [Sat, 22 Jun 2019 10:20:13 +0000 (10:20 +0000)]
[NewGVN] Fix copy/paste mistake in cast
llvm-svn: 364130
Nikita Popov [Sat, 22 Jun 2019 10:20:07 +0000 (10:20 +0000)]
[NewGVN] Remove dead SwitchEdges variable; NFC
llvm-svn: 364129
Nikita Popov [Sat, 22 Jun 2019 09:57:59 +0000 (09:57 +0000)]
[LFTR] Add tests for PR41998; NFC
The limit for the pointer case is incorrect.
llvm-svn: 364128
Craig Topper [Sat, 22 Jun 2019 07:21:48 +0000 (07:21 +0000)]
[X86] Don't use _MM_FROUND_CUR_DIRECTION in the intrinsics tests.
_MM_FROUND_CUR_DIRECTION is the behavior of the intrinsics that
don't take a rounding mode argument. So a better test
is using _MM_FROUND_NO_EXC with the SAE only intrinsics and
an explicit rounding mode with the intrinsics that support
embedded rounding mode.
llvm-svn: 364127
Peter Collingbourne [Sat, 22 Jun 2019 03:03:25 +0000 (03:03 +0000)]
AArch64: Add support for reading pc using llvm.read_register.
This is useful for allowing code to efficiently take an address
that can be later mapped onto debug info. Currently the hwasan
pass achieves this by taking the address of the current function:
http://llvm-cs.pcc.me.uk/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp#921
but this costs two instructions (plus a GOT entry in PIC code) per function
with stack variables. This will allow the cost to be reduced to a single
instruction.
Differential Revision: https://reviews.llvm.org/D63471
llvm-svn: 364126
Fangrui Song [Sat, 22 Jun 2019 01:50:21 +0000 (01:50 +0000)]
[CMake] Delete redundant DEPENDS/LINK_LIBS from LineEditor/XRay
The link dependencies are already specified in LLVMBuild.txt
llvm-svn: 364125
Fangrui Song [Sat, 22 Jun 2019 01:30:17 +0000 (01:30 +0000)]
Make GlobalISel depend on SelectionDAG after D63169
GlobalISel/IRTranslator.cpp now references SelectionDAG/FunctionLoweringInfo.cpp.
This fixes a link error in -DBUILD_SHARED_LIBS=on builds:
ld.lld: error: undefined symbol: llvm::FunctionLoweringInfo::clear()
>>> referenced by IRTranslator.cpp:2198 (../lib/CodeGen/GlobalISel/IRTranslator.cpp:2198)
>>> lib/CodeGen/GlobalISel/CMakeFiles/LLVMGlobalISel.dir/IRTranslator.cpp.o:(llvm::IRTranslator::finalizeFunction())
llvm-svn: 364124
Matt Arsenault [Sat, 22 Jun 2019 01:30:00 +0000 (01:30 +0000)]
AMDGPU: Fix target builtins for gfx10
This wasn't setting some of the features from older generations.
llvm-svn: 364123
Douglas Yung [Sat, 22 Jun 2019 01:14:29 +0000 (01:14 +0000)]
Fix UNSUPPORTED attribute from windows to system-windows.
llvm-svn: 364122
Yuanfang Chen [Sat, 22 Jun 2019 01:13:04 +0000 (01:13 +0000)]
[llvm-objdump] Allow --disassemble-functions to take demangled names
The --disassemble-functions switch takes demangled names when
--demangle is specified, otherwise the switch takes mangled names.
https://bugs.llvm.org/show_bug.cgi?id=41908
Reviewers: jhenderson, grimar, MaskRay, rupprecht
Differential Revision: https://reviews.llvm.org/D63524
llvm-svn: 364121
Douglas Yung [Sat, 22 Jun 2019 01:09:00 +0000 (01:09 +0000)]
[NFC] Marking test added in r363975 as unsupported on Windows.
This test references a path that does not exist on Windows causing
it to emit different output from what was expected leading to a
failure when run on Windows.
llvm-svn: 364120
Richard Trieu [Sat, 22 Jun 2019 00:32:19 +0000 (00:32 +0000)]
[ODRHash] Skip some typedef types.
In some cases, a typedef only strips aways a keyword for a type, keeping the
same name as the root record type. This causes some confusion when the type
is defined in one modules but only forward declared in another. Skipping the
typedef and going straight to the record will avoid this issue.
typedef struct S {} S;
S* s; // S is TypedefType here
struct S;
S* s; // S is RecordType here
llvm-svn: 364119
Yuanfang Chen [Sat, 22 Jun 2019 00:22:57 +0000 (00:22 +0000)]
[llvm-objdump] Move --start-address >= --stop-address check out of the
-d code.
Summary:
Move it into `main` function so the checking is effective for all actions
user may do with llvm-objdump; notably, -r and -s in addition to existing -d.
Match GNU behavior.
Reviewers: jhenderson, grimar, MaskRay, rupprecht
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63631
llvm-svn: 364118
Peter Collingbourne [Sat, 22 Jun 2019 00:06:51 +0000 (00:06 +0000)]
AArch64: Prefer FP-relative debug locations in HWASANified functions.
To help produce better diagnostics for stack use-after-return, we'd like
to be able to determine the addresses of each HWASANified function's local
variables given a small amount of information recorded on entry to the
function. Currently we require all HWASANified functions to use frame pointers
and record (PC, FP) on function entry. This works better than recording SP
because FP cannot change during the function, unlike SP which can change
e.g. due to dynamic alloca.
However, most variables currently end up using SP-relative locations in their
debug info. This prevents us from recomputing the address of most variables
because the distance between SP and FP isn't recorded in the debug info. To
address this, make the AArch64 backend prefer FP-relative debug locations
when producing debug info for HWASANified functions.
Differential Revision: https://reviews.llvm.org/D63300
llvm-svn: 364117
Peter Collingbourne [Sat, 22 Jun 2019 00:03:53 +0000 (00:03 +0000)]
gn build: Merge r364046.
llvm-svn: 364116
Tom Tan [Fri, 21 Jun 2019 23:38:05 +0000 (23:38 +0000)]
[COFF, ARM64] Fix encoding of debugtrap for Windows
On Windows ARM64, intrinsic __debugbreak is compiled into brk #0xF000 which is
mapped to llvm.debugtrap in Clang. Instruction brk #F000 is the defined break
point instruction on ARM64 which is recognized by Windows debugger and
exception handling code, so llvm.debugtrap should map to it instead of
redirecting to llvm.trap (brk #1) as the default implementation.
Differential Revision: https://reviews.llvm.org/D63635
llvm-svn: 364115
Eric Fiselier [Fri, 21 Jun 2019 23:37:52 +0000 (23:37 +0000)]
Add new style meta-programming primatives.
Using class templates instead of alias templates causes a lot of
instantiations. As part of the move away from C++03, we want to
improve the efficiency of our meta-programming.
This patch lays the groundwork by introducing new _If, _EnableIf,
_And, _Or, and _IsValidExpansion (detect member). Future patches
will replace the existing implementations after verifying there
compile time differences.
llvm-svn: 364114
Jonas Devlieghere [Fri, 21 Jun 2019 23:12:25 +0000 (23:12 +0000)]
[lit] Deduplicate logic in toolchain.py
No need to compute the path of lit-lldb-init twice.
llvm-svn: 364113
Jonas Devlieghere [Fri, 21 Jun 2019 23:12:22 +0000 (23:12 +0000)]
[lit] Make lit-lldb-init configurable by CMake
This makes the `lit-lldb-init` file configurable by CMake. This matters
to us downstream in Swift, where we want to set environment variables
with the `env` command for every test.
Differential revision: https://reviews.llvm.org/D63679
llvm-svn: 364112
Reid Kleckner [Fri, 21 Jun 2019 23:10:25 +0000 (23:10 +0000)]
Revert [SLP] Look-ahead operand reordering heuristic.
This reverts r364084 (git commit
5698921be2d567f6abf925479ac9f5a376d6d74f)
It caused crashes while compiling a file in Chrome. Reduction
forthcoming.
llvm-svn: 364111
Erich Keane [Fri, 21 Jun 2019 22:31:59 +0000 (22:31 +0000)]
Remove binary finally accidentially committed in r364109
llvm-svn: 364110
Erich Keane [Fri, 21 Jun 2019 22:29:32 +0000 (22:29 +0000)]
Ensure Target Features always_inline error happens in C++ cases.
A handful of C++ cases as reported in PR42352 didn't actually give an
error when always_inlining with a different target feature list. This
resulted in broken IR.
llvm-svn: 364109
Reid Kleckner [Fri, 21 Jun 2019 22:28:52 +0000 (22:28 +0000)]
Fix has_attribute.cpp test on Windows after r364102
llvm-svn: 364108
Shoaib Meenai [Fri, 21 Jun 2019 21:59:01 +0000 (21:59 +0000)]
[llvm-lipo] Implement -thin
Creates thin output file of specified arch_type from the fat input file.
Patch by Anusha Basana <anushabasana@fb.com>
Differential Revision: https://reviews.llvm.org/D63341
llvm-svn: 364107
Matthias Gehre [Fri, 21 Jun 2019 21:30:25 +0000 (21:30 +0000)]
[clang-tidy] misc-unused-parameters: don't comment out parameter name for C code
Summary: The fixit `int square(int /*num*/)` yields `error: parameter name omitted` for C code. Enable it only for C++ code.
Reviewers: klimek, ilya-biryukov, lebedev.ri, aaron.ballman
Subscribers: xazax.hun, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D63088
llvm-svn: 364106
Julian Lettner [Fri, 21 Jun 2019 21:01:39 +0000 (21:01 +0000)]
[ASan] Use dynamic shadow on 32-bit iOS and simulators
The VM layout on iOS is not stable between releases. On 64-bit iOS and
its derivatives we use a dynamic shadow offset that enables ASan to
search for a valid location for the shadow heap on process launch rather
than hardcode it.
This commit extends that approach for 32-bit iOS plus derivatives and
their simulators.
rdar://
50645192
rdar://
51200372
rdar://
51767702
Reviewed By: delcypher
Differential Revision: https://reviews.llvm.org/D63586
llvm-svn: 364105
George Burgess IV [Fri, 21 Jun 2019 20:49:47 +0000 (20:49 +0000)]
clang-format a block; NFC
The indentation of the return here was off, and confusing as a result.
Cleaned up a bit extra while I was in the area.
llvm-svn: 364104
Richard Smith [Fri, 21 Jun 2019 20:46:22 +0000 (20:46 +0000)]
PR42301: Abort cleanly if we encounter a huge source file rather than
crashing.
Ideally we wouldn't care about the size of a file so long as it fits in
memory, but in practice we have lots of hardocded assumptions that
unsigned can be used to index files, string literals, and so on.
llvm-svn: 364103
Richard Smith [Fri, 21 Jun 2019 20:20:21 +0000 (20:20 +0000)]
Fix __has_cpp_attribute expansion to produce trailing L and (where
necessary) leading whitespace.
Simplify unit test and extend to cover no_unique_address attribute.
llvm-svn: 364102
Craig Topper [Fri, 21 Jun 2019 20:16:26 +0000 (20:16 +0000)]
[X86] Add test cases for incorrect shrinking of volatile vector loads from 128-bits to 32 or 64 bits. NFC
This is caused by isel patterns that look for vzmovl+load and
treat it the same as vzload.
llvm-svn: 364101
Hiroshi Yamauchi [Fri, 21 Jun 2019 20:04:29 +0000 (20:04 +0000)]
Devirtualize destructor of final class.
Summary:
Take advantage of the final keyword to devirtualize destructor calls.
Fix https://bugs.llvm.org/show_bug.cgi?id=21368
Reviewers: rsmith
Reviewed By: rsmith
Subscribers: davidxl, Prazek, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D63161
llvm-svn: 364100
Matt Arsenault [Fri, 21 Jun 2019 20:04:02 +0000 (20:04 +0000)]
AMDGPU: Fix not using s33 for scratch wave offset in kernels
Fixes missing piece from r363990.
llvm-svn: 364099
Alex Langford [Fri, 21 Jun 2019 19:43:07 +0000 (19:43 +0000)]
[Target] Decouple ObjCLanguageRuntime from LanguageRuntime
Summary:
ObjCLanguageRuntime was being pulled into LanguageRuntime because of
Breakpoint Preconditions. If we move BreakpointPrecondition out of Breakpoint,
we can extend the LanguageRuntime plugin interface so that LanguageRuntimes
can give us a BreakpointPrecondition for exceptions.
Differential Revision: https://reviews.llvm.org/D63181
llvm-svn: 364098
Craig Topper [Fri, 21 Jun 2019 19:10:21 +0000 (19:10 +0000)]
[X86] Add DAG combine to turn (vzmovl (insert_subvector undef, X, 0)) into (insert_subvector allzeros, (vzmovl X), 0)
128/256 bit scalar_to_vectors are canonicalized to (insert_subvector undef, (scalar_to_vector), 0). We have isel patterns that try to match this pattern being used by a vzmovl to use a 128-bit instruction and a subreg_to_reg.
This patch detects the insert_subvector undef portion of this and pulls it through the vzmovl, creating a narrower vzmovl and an insert_subvector allzeroes. We can then match the insertsubvector into a subreg_to_reg operation by itself. Then we can fall back on existing (vzmovl (scalar_to_vector)) patterns.
Note, while the scalar_to_vector case is the motivating case I didn't restrict to just that case. I'm also wondering about shrinking any 256/512 vzmovl to an extract_subvector+vzmovl+insert_subvector(allzeros) but I fear that would have bad implications to shuffle combining.
I also think there is more canonicalization we can do with vzmovl with loads or scalar_to_vector with loads to create vzload.
Differential Revision: https://reviews.llvm.org/D63512
llvm-svn: 364095
Marshall Clow [Fri, 21 Jun 2019 18:57:06 +0000 (18:57 +0000)]
Implement P0340R3: Make 'underlying_type' SFINAE-friendly. Reviewed as https://reviews.llvm.org/D63574
llvm-svn: 364094
Craig Topper [Fri, 21 Jun 2019 18:50:00 +0000 (18:50 +0000)]
[X86] Don't mark v64i8/v32i16 ISD::SELECT as custom unless they are legal types.
We don't have any Custom handling during type legalization. Only
operation legalization.
Fixes PR42355
llvm-svn: 364093
Craig Topper [Fri, 21 Jun 2019 18:49:42 +0000 (18:49 +0000)]
[X86] Add avx512bw command lines to avx512-select.ll
Prep for fixing PR42355 and ensuring we have coverage of
ISD::SELECT for v64i8/v32i16 on KNL and SKX configs.
llvm-svn: 364092
Craig Topper [Fri, 21 Jun 2019 18:49:21 +0000 (18:49 +0000)]
[X86] Add a debug print of the node in the default case for unhandled opcodes in ReplaceNodeResults.
This should be unreachable, but bugs can make it reachable. This
adds a debug print so we can see the bad node in the output when
the llvm_unreachable triggers.
llvm-svn: 364091
Simon Pilgrim [Fri, 21 Jun 2019 18:35:04 +0000 (18:35 +0000)]
[X86][AVX] Combine INSERT_SUBVECTOR(SRC0, EXTRACT_SUBVECTOR(SRC1)) as shuffle
Subvector shuffling often ends up as insert/extract subvector.
llvm-svn: 364090
Reid Kleckner [Fri, 21 Jun 2019 18:33:20 +0000 (18:33 +0000)]
Revert [test][Driver] Fix Clang :: Driver/cl-response-file.c
This reverts r363985 (git commit
d5f16d6cfccc4b0b13b6c01d16c673886d53e695)
This test can't use printf on Windows because the path contains
backslashes which must not be interpreted as escapes by printf.
llvm-svn: 364089
Alex Lorenz [Fri, 21 Jun 2019 18:24:55 +0000 (18:24 +0000)]
[clang-scan-deps] print the dependencies to stdout
and remove the need to use -MD options in the CDB
Differential Revision: https://reviews.llvm.org/D63579
llvm-svn: 364088
Reid Kleckner [Fri, 21 Jun 2019 18:17:04 +0000 (18:17 +0000)]
Quote path to Python executable in case it has spaces
These days Python 3 is typically installed into C:/Program Files, so
cope with that.
Similar to r364077 in compiler-rt.
llvm-svn: 364087
Amara Emerson [Fri, 21 Jun 2019 18:10:41 +0000 (18:10 +0000)]
[AArch64][GlobalISel] Implement selection support for the new G_JUMP_TABLE and G_BRJT ops.
With this we can now fully code generate jump tables, which is important for code size.
Differential Revision: https://reviews.llvm.org/D63223
llvm-svn: 364086
Amara Emerson [Fri, 21 Jun 2019 18:10:38 +0000 (18:10 +0000)]
[GlobalISel][IRTranslator] Change switch table translation to generate jump tables and range checks.
This change makes use of the newly refactored SwitchLoweringUtils code from
SelectionDAG to in order to generate jump tables and range checks where appropriate.
Much of this code is ported from SDAG with some modifications. We generate
G_JUMP_TABLE and G_BRJT instructions when JT opportunities are found. This means
that targets which previously relied on the naive one MBB per case stmt
translation will now start falling back until they add support for the new opcodes.
For range checks, we don't generate any previously unused operations. This
just recognizes contiguous ranges of case values and generates a single block per
range. Single case value blocks are just a special case of ranges so we get that
support almost for free.
There are still some optimizations missing that I haven't ported over, and
bit-tests are also unimplemented. This patch series is already complex enough.
Actual arm64 support for selection of jump tables is coming in a later patch.
Differential Revision: https://reviews.llvm.org/D63169
llvm-svn: 364085
Simon Pilgrim [Fri, 21 Jun 2019 17:57:01 +0000 (17:57 +0000)]
[SLP] Look-ahead operand reordering heuristic.
This patch introduces a new heuristic for guiding operand reordering. The new "look-ahead" heuristic can look beyond the immediate predecessors. This helps break ties when the immediate predecessors have identical opcodes (see lit test for an example).
Committed on behalf of @vporpo (Vasileios Porpodas)
Differential Revision: https://reviews.llvm.org/D60897
llvm-svn: 364084
David Bolvansky [Fri, 21 Jun 2019 17:51:18 +0000 (17:51 +0000)]
[NFC] Update shl-sub tests
llvm-svn: 364083
Sanjay Patel [Fri, 21 Jun 2019 17:44:09 +0000 (17:44 +0000)]
[InstCombine] add tests for ctpop folds; NFC
llvm-svn: 364082
Richard Smith [Fri, 21 Jun 2019 17:41:20 +0000 (17:41 +0000)]
Fix ARM buildbot.
llvm-svn: 364081
Alexey Bataev [Fri, 21 Jun 2019 17:28:41 +0000 (17:28 +0000)]
[OPENMP]Fix PR42068: Vla type is not captured.
If the variably modified type is declared outside of the captured region
and then used in the cast expression along with array subscript
expression, the type is not captured and it leads to the compiler crash.
llvm-svn: 364080
Craig Topper [Fri, 21 Jun 2019 17:24:21 +0000 (17:24 +0000)]
[X86] Use vmovq for v4i64/v4f64/v8i64/v8f64 vzmovl.
We already use vmovq for v2i64/v2f64 vzmovl. But we were using a
blendpd+xorpd for v4i64/v4f64/v8i64/v8f64 under opt speed. Or
movsd+xorpd under optsize.
I think the blend with 0 or movss/d is only needed for
vXi32 where we don't have an instruction that can move 32
bits from one xmm to another while zeroing upper bits.
movq is no worse than blendpd on any known CPUs.
llvm-svn: 364079
Aaron Ballman [Fri, 21 Jun 2019 17:14:25 +0000 (17:14 +0000)]
Ensure that top-level QualType objects also have a "kind" field when dumping the AST to JSON.
llvm-svn: 364078
Reid Kleckner [Fri, 21 Jun 2019 16:54:58 +0000 (16:54 +0000)]
[asan] Quote the path to the Python exe in case it has spaces
These days, Python 3 installs itself into Program Files, so it often has
spaces. At first, I resisted this, and I reinstalled it globally into
C:/Python37, similar to the location used for Python 2.7. But then I
updated VS 2019, and it uninstalled my copy of Python and installed a
new one inside "C:/Program Files (x86)/Microsoft Visual Studio/". At
this point, I gave up and switched to using its built-in version of
Python. However, now these tests fail, and have to be made aware of the
possibility of spaces in paths. :(
llvm-svn: 364077
Simon Pilgrim [Fri, 21 Jun 2019 16:44:51 +0000 (16:44 +0000)]
[DAGCombine] narrowExtractedVectorBinOp - pull out repeated getOpcode(). NFCI.
llvm-svn: 364076
Amara Emerson [Fri, 21 Jun 2019 16:43:50 +0000 (16:43 +0000)]
[AArch64][GlobalISel] Make s8 and s16 G_CONSTANTs legal.
We sometimes get poor code size because constants of types < 32b are legalized
as 32 bit G_CONSTANTs with a truncate to fit. This works but means that the
localizer can no longer sink them (although it's possible to extend it to do so).
On AArch64 however s8 and s16 constants can be selected in the same way as s32
constants, with a mov pseudo into a W register. If we make s8 and s16 constants
legal then we can avoid unnecessary truncates, they can be CSE'd, and the
localizer can sink them as normal.
There is a caveat: if the user of a smaller constant has to widen the sources,
we end up with an anyext of the smaller typed G_CONSTANT. This can cause
regressions because of the additional extend and missed pattern matching. To
remedy this, there's a new artifact combiner to generate the wider G_CONSTANT
if it's legal for the target.
Differential Revision: https://reviews.llvm.org/D63587
llvm-svn: 364075
Stanislav Mekhanoshin [Fri, 21 Jun 2019 16:30:14 +0000 (16:30 +0000)]
[AMDGPU] hazard recognizer for fp atomic to s_denorm_mode
This requires 3 wait states unless there is a wait or VALU in
between.
Differential Revision: https://reviews.llvm.org/D63619
llvm-svn: 364074
David Bolvansky [Fri, 21 Jun 2019 16:25:32 +0000 (16:25 +0000)]
[InstCombine] (1 << (C - x)) -> ((1 << C) >> x) if C is bitwidth - 1
Summary:
```
%a = sub i32 31, %x
%r = shl i32 1, %a
=>
%d = shl i32 1, 31
%r = lshr i32 %d, %x
Done: 1
Optimization is correct!
```
https://rise4fun.com/Alive/btZm
Reviewers: spatel, lebedev.ri, nikic
Reviewed By: lebedev.ri
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63652
llvm-svn: 364073
Simon Pilgrim [Fri, 21 Jun 2019 16:23:28 +0000 (16:23 +0000)]
[X86] isBinOp - move commutative ops to isCommutativeBinOp. NFCI.
TargetLoweringBase::isBinOp checks isCommutativeBinOp as a fallback, so don't duplicate.
llvm-svn: 364072
Anastasia Stulova [Fri, 21 Jun 2019 16:19:16 +0000 (16:19 +0000)]
[OpenCL][PR41963] Add generic addr space to old atomics in C++ mode
Add overloads with generic address space pointer to old atomics.
This is currently only added for C++ compilation mode.
Differential Revision: https://reviews.llvm.org/D62335
llvm-svn: 364071
Reid Kleckner [Fri, 21 Jun 2019 16:15:09 +0000 (16:15 +0000)]
[asan] Avoid two compiler-synthesized calls to memset & memcpy
Otherwise the tests hang on Windows attempting to report nested errors.
Reviewed By: vitalybuka
Differential Revision: https://reviews.llvm.org/D63627
llvm-svn: 364070
David Bolvansky [Fri, 21 Jun 2019 16:14:13 +0000 (16:14 +0000)]
[NFC] Added more tests for D63652
llvm-svn: 364069
Simon Pilgrim [Fri, 21 Jun 2019 16:11:18 +0000 (16:11 +0000)]
Fix MSVC "result of 32-bit shift implicitly converted to 64 bits" warning. NFCI.
llvm-svn: 364068
Aaron Ballman [Fri, 21 Jun 2019 16:06:09 +0000 (16:06 +0000)]
Print more type node information when dumping the AST to JSON.
llvm-svn: 364067
Leonard Chan [Fri, 21 Jun 2019 16:03:06 +0000 (16:03 +0000)]
[clang][NewPM] Add -fno-experimental-new-pass-manager to tests
As per the discussion on D58375, we disable test that have optimizations under
the new PM. This patch adds -fno-experimental-new-pass-manager to RUNS that:
- Already run with optimizations (-O1 or higher) that were missed in D58375.
- Explicitly test new PM behavior along side some new PM RUNS, but are missing
this flag if new PM is enabled by default.
- Specify -O without the number. Based on getOptimizationLevel(), it seems the
default is 2, and the IR appears to be the same when changed to -O2, so
update the test to explicitly say -O2 and provide -fno-experimental-new-pass-manager`.
Differential Revision: https://reviews.llvm.org/D63156
llvm-svn: 364066
Eric Fiselier [Fri, 21 Jun 2019 15:35:33 +0000 (15:35 +0000)]
Use rvalue references throughout the is_constructible traits.
llvm-svn: 364065
David Bolvansky [Fri, 21 Jun 2019 15:26:22 +0000 (15:26 +0000)]
[InstCombine] cttz(abs(x)) -> cttz(x)
Summary: Signedness does not change number of trailing zeros.
Reviewers: spatel, lebedev.ri, nikic
Reviewed By: lebedev.ri
Differential Revision: https://reviews.llvm.org/D63546
llvm-svn: 364064
Eric Fiselier [Fri, 21 Jun 2019 15:20:55 +0000 (15:20 +0000)]
Make move and forward work in C++03.
These functions are key to allowing the use of rvalues and variadics
in C++03 mode. Everything works the same as in C++11, except for one
tangentially related case:
struct T {
T(T &&) = default;
};
In C++11, T has a deleted copy constructor. But in C++03 Clang gives
it both a move and a copy constructor. This seems reasonable enough
given the extensions it's using.
The other changes in this patch were the minimal set required
to keep the tests passing after the move/forward change. Most notably
the removal of the `__rv<unique_ptr>` hack that was present
in an attempt to make unique_ptr move only without language support.
llvm-svn: 364063
Sanjay Patel [Fri, 21 Jun 2019 15:17:24 +0000 (15:17 +0000)]
[GVNSink] prevent crashing on mismatched instructions (PR42346)
Patch based on suggestion by James Molloy (@jmolloy) in:
https://bugs.llvm.org/show_bug.cgi?id=42346
llvm-svn: 364062
Alexey Bataev [Fri, 21 Jun 2019 15:08:30 +0000 (15:08 +0000)]
[OPENMP]Fix PR42159: do not capture threadprivate variables.
The threadprivate variables should not be captured in the outlined
regions, otherwise it leads to the compiler crash.
llvm-svn: 364061
David Bolvansky [Fri, 21 Jun 2019 15:00:31 +0000 (15:00 +0000)]
[NFC] Added tests for (1 << (C - x)) -> ((1 << C) >> x)
llvm-svn: 364060
Simon Pilgrim [Fri, 21 Jun 2019 14:46:21 +0000 (14:46 +0000)]
[DAGCombine] narrowInsertExtractVectorBinOp - reuse "extract from insert" detection code.
Move the "extract from insert detection code" into a lambda helper function.
llvm-svn: 364059
Eric Fiselier [Fri, 21 Jun 2019 14:45:08 +0000 (14:45 +0000)]
Enable aligned_union in C++03
llvm-svn: 364058
Eric Fiselier [Fri, 21 Jun 2019 14:43:15 +0000 (14:43 +0000)]
Get is_convertible tests passing in C++03 (except the fallback).
llvm-svn: 364057
James Henderson [Fri, 21 Jun 2019 14:41:36 +0000 (14:41 +0000)]
[docs][llvm-objdump] Fix bad merge of docs
llvm-svn: 364056
Aaron Ballman [Fri, 21 Jun 2019 14:37:39 +0000 (14:37 +0000)]
Add an automated note to files produced by gen_ast_dump_json_test.py.
This also details what filters, if any, were used to generate the test output. Updates all the current JSON testing files to include the automated note.
llvm-svn: 364055
Eric Fiselier [Fri, 21 Jun 2019 14:37:28 +0000 (14:37 +0000)]
Remove dead non-variadic workarounds in <type_traits>
We can use variadics with clang
llvm-svn: 364054
Eric Fiselier [Fri, 21 Jun 2019 14:31:34 +0000 (14:31 +0000)]
Make rvalue metaprogramming traits work in C++03.
The next step is to get move and forward working in C++03.
llvm-svn: 364053
George Rimar [Fri, 21 Jun 2019 14:15:15 +0000 (14:15 +0000)]
[llvm-objcopy] - Get rid of dynrel.elf precompiled binary from inputs.
We do not have to spread using the precompiled binaries in the tests,
when we can use YAML. This patch removes the dynrel.elf binary and adds
a few comments to the test cases.
Differential revision: https://reviews.llvm.org/D63641
llvm-svn: 364052
Jay Foad [Fri, 21 Jun 2019 14:10:18 +0000 (14:10 +0000)]
[Scalarizer] Propagate IR flags
Summary:
The motivation for this was to propagate fast-math flags like nnan and
ninf on vector floating point operations to the corresponding scalar
operations to take advantage of follow-on optimizations. But I think
the same argument applies to all of our IR flags: if they apply to the
vector operation then they also apply to all the individual scalar
operations, and they might enable follow-on optimizations.
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63593
llvm-svn: 364051
Eric Fiselier [Fri, 21 Jun 2019 14:09:32 +0000 (14:09 +0000)]
Remove even more dead code.
llvm-svn: 364050
George Rimar [Fri, 21 Jun 2019 14:07:35 +0000 (14:07 +0000)]
[llvm-readobj] - Inline a few yaml inputs into test cases.
There are some test that are splitted into main part + input yaml for no visible reason.
This patch inines the yaml part for the 3 test cases I found.
Differential revision: https://reviews.llvm.org/D63644
llvm-svn: 364049
Andrea Di Biagio [Fri, 21 Jun 2019 14:05:58 +0000 (14:05 +0000)]
Set an explicit x86 triple for test bottleneck-analysis.s added by my r364045. NFC
This should unbreak the ppc64 buildbots.
llvm-svn: 364048
Eric Fiselier [Fri, 21 Jun 2019 13:56:13 +0000 (13:56 +0000)]
Assume __is_final, __is_base_of, and friends.
All the compilers we support provide these builtins. We don't
need to do a configuration dance anymore.
This patch also cleans up some dead or almost dead
C++11 feature detection macros.
llvm-svn: 364047
Sam Elliott [Fri, 21 Jun 2019 13:36:09 +0000 (13:36 +0000)]
[RISCV] Add RISCV-specific TargetTransformInfo
Summary:
LLVM Allows Targets to provide information that guides optimisations
made to LLVM IR. This is done with callbacks on a TargetTransformInfo object.
This patch adds a TargetTransformInfo class for RISC-V. This will allow us to
implement RISC-V specific callbacks as they become necessary.
This commit also adds the getIntImmCost callbacks, and tests them with a simple
constant hoisting test. Our immediate costs are on the conservative side, for
the moment, but we prevent hoisting in most circumstances anyway.
Previous review was on D63007
Reviewers: asb, luismarques
Reviewed By: asb
Subscribers: ributzka, MaskRay, llvm-commits, Jim, benna, psnobl, jocewei, PkmX, rkruppe, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, apazos, simoncook, johnrusso, rbar, hiraditya, mgorny
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D63433
llvm-svn: 364046
Andrea Di Biagio [Fri, 21 Jun 2019 13:32:54 +0000 (13:32 +0000)]
[MCA][Bottleneck Analysis] Teach how to compute a critical sequence of instructions based on the simulation.
This patch teaches the bottleneck analysis how to identify and print the most
expensive sequence of instructions according to the simulation. Fixes PR37494.
The goal is to help users identify the sequence of instruction which is most
critical for performance.
A dependency graph is internally used by the bottleneck analysis to describe
data dependencies and processor resource interferences between instructions.
There is one node in the graph for every instruction in the input assembly
sequence. The number of nodes in the graph is independent from the number of
iterations simulated by the tool. It means that a single node of the graph
represents all the possible instances of a same instruction contributed by the
simulated iterations.
Edges are dynamically "discovered" by the bottleneck analysis by observing
instruction state transitions and "backend pressure increase" events generated
by the Execute stage. Information from the events is used to identify critical
dependencies, and materialize edges in the graph. A dependency edge is uniquely
identified by a pair of node identifiers plus an instance of struct
DependencyEdge::Dependency (which provides more details about the actual
dependency kind).
The bottleneck analysis internally ranks dependency edges based on their impact
on the runtime (see field DependencyEdge::Dependency::Cost). To this end, each
edge of the graph has an associated cost. By default, the cost of an edge is a
function of its latency (in cycles). In practice, the cost of an edge is also a
function of the number of cycles where the dependency has been seen as
'contributing to backend pressure increases'. The idea is that the higher the
cost of an edge, the higher is the impact of the dependency on performance. To
put it in another way, the cost of an edge is a measure of criticality for
performance.
Note how a same edge may be found in multiple iteration of the simulated loop.
The logic that adds new edges to the graph checks if an equivalent dependency
already exists (duplicate edges are not allowed). If an equivalent dependency
edge is found, field DependencyEdge::Frequency of that edge is incremented by
one, and the new cost is cumulatively added to the existing edge cost.
At the end of simulation, costs are propagated to nodes through the edges of the
graph. The goal is to identify a critical sequence from a node of the root-set
(composed by node of the graph with no predecessors) to a 'sink node' with no
successors. Note that the graph is intentionally kept acyclic to minimize the
complexity of the critical sequence computation algorithm (complexity is
currently linear in the number of nodes in the graph).
The critical path is finally computed as a sequence of dependency edges. For
edges describing processor resource interferences, the view also prints a
so-called "interference probability" value (by dividing field
DependencyEdge::Frequency by the total number of iterations).
Examples of critical sequence computations can be found in tests added/modified
by this patch.
On output streams that support colored output, instructions from the critical
sequence are rendered with a different color.
Strictly speaking the analysis conducted by the bottleneck analysis view is not
a critical path analysis. The cost of an edge doesn't only depend on the
dependency latency. More importantly, the cost of a same edge may be computed
differently by different iterations.
The number of dependencies is discovered dynamically based on the events
generated by the simulator. However, their number is not fixed. This is
especially true for edges that model processor resource interferences; an
interference may not occur in every iteration. For that reason, it makes sense
to also print out a "probability of interference".
By construction, the accuracy of this analysis (as always) is strongly dependent
on the simulation (and therefore the quality of the information available in the
scheduling model).
That being said, the critical sequence effectively identifies a performance
criticality. Instructions from that sequence are expected to have a very big
impact on performance. So, users can take advantage of this information to focus
their attention on specific interactions between instructions.
In my experience, it works quite well in practice, and produces useful
output (in a reasonable amount time).
Differential Revision: https://reviews.llvm.org/D63543
llvm-svn: 364045
Haojian Wu [Fri, 21 Jun 2019 13:32:18 +0000 (13:32 +0000)]
[clangd] Add include-mapping for C symbols.
Summary:
This resolves the issue of introducing c++-style includes for C files.
- refactor the gen_std.py, make it reusable for parsing C symbols.
- add a language mode to the mapping method to use different mapping for
C and C++ files.
Reviewers: kadircet
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, jfb, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D63270
llvm-svn: 364044
Aaron Ballman [Fri, 21 Jun 2019 13:22:35 +0000 (13:22 +0000)]
Print information about various type nodes when dumping the AST to JSON.
llvm-svn: 364043
Michal Gorny [Fri, 21 Jun 2019 13:19:34 +0000 (13:19 +0000)]
[lldb] [Process] Introduce common helpers to split/recombine YMM data
Introduce two common helpers to take care of splitting and recombining
YMM registers to/from XSAVE-like data. Since FreeBSD, Linux and NetBSD
all use XSAVE-like data structures but with potentially different field
layouts, the function takes two pointers -- to XMM register and to YMM
high bits, and copies the data from/to YMMReg type.
While at it, remove support for big endian. To mine and Pavel Labath's
combined knowledge, there is no such thing on x86. Furthermore,
assuming that the YMM register data would be swapped for big endian
seems to be a weird assumption.
Differential Revision: https://reviews.llvm.org/D63610
llvm-svn: 364042
Simon Tatham [Fri, 21 Jun 2019 13:17:23 +0000 (13:17 +0000)]
[ARM] Add MVE 64-bit GPR <-> vector move instructions.
These instructions let you load half a vector register at once from
two general-purpose registers, or vice versa.
The assembly syntax for these instructions mentions the vector
register name twice. For the move _into_ a vector register, the MC
operand list also has to mention the register name twice (once as the
output, and once as an input to represent where the unchanged half of
the output register comes from). So we can conveniently assign one of
the two asm operands to be the output $Qd, and the other $QdSrc, which
avoids confusing the auto-generated AsmMatcher too much. For the move
_from_ a vector register, there's no way to get round the fact that
both instances of that register name have to be inputs, so we need a
custom AsmMatchConverter to avoid generating two separate output MC
operands. (And even that wouldn't have worked if it hadn't been for
D60695.)
Reviewers: dmgreen, samparker, SjoerdMeijer, t.p.northover
Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62679
llvm-svn: 364041
Simon Tatham [Fri, 21 Jun 2019 13:17:08 +0000 (13:17 +0000)]
[ARM] Add MVE vector instructions that take a scalar input.
This adds the `MVE_qDest_rSrc` superclass and all its instances, plus
a few other instructions that also take a scalar input register or two.
I've also belatedly added custom diagnostic messages to the operand
classes for odd- and even-numbered GPRs, which required matching
changes in two of the existing MVE assembly test files.
Reviewers: dmgreen, samparker, SjoerdMeijer, t.p.northover
Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62678
llvm-svn: 364040
Paul Robinson [Fri, 21 Jun 2019 13:10:19 +0000 (13:10 +0000)]
Fix a crash with assembler source and -g.
llvm-mc or clang with -g normally produces debug info describing the
assembler source itself; however, if that source already contains some
.file/.loc directives, we should instead emit the debug info described
by those directives. For certain assembler sources seen in the wild
(particularly in the Chrome build) this was causing a crash due to
incorrect assumptions about legal sequences of assembler source text.
Fixes PR38994.
Differential Revision: https://reviews.llvm.org/D63573
llvm-svn: 364039