intel/compiler: Implement Mesh Output

Use the same URB access helpers that were added for Task Output.  The
Arrayed I/O (per-primitive and per-vertex) is handled by applying the
pitch from the MUE layout into the NIR intrinsics and including the
non-arrayed offset on top of it.  After that, the index src can be
used directly for lowering.

Because we keep around the non-arrayed offset AND the pitch is
aligned, we can identify cases where the access is indirect but
guaranteed to be aligned, and dispatch a single message.  Added a TODO
to explore that later.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>

intel/compiler: Implement Task Output and Mesh Input

Implement the output written by the task *workgroup* and available to
all the mesh *workgroups* dispatched from that task.  We currently
ignore any layout annotations (since they are not really testable) and
produce a (packed) layout ourselves.

The URB messages are only SIMD8, so for larger SIMDs, the functions
will produce multiple messages.  Making this lowering here instead of
the generic lower_simd_width() since it is not just a matter of
zip/unzip, e.g. the offset must be adjusted.

Indirect writes/reads are implemented by handling one component at a
time and using the PER_SLOT variant of the messages.

Note that VK_NV_mesh_shader allows reading outputs, so add support for
that as well.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>

intel/compiler: Lower Task/Mesh local_invocation_{id,index}

The Invocation index is provided by the payload, so we can skip the
usual math done to get to it.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>

intel/compiler: Add backend compiler basics for Task/Mesh

Task/Mesh stages are CS-like stages, and include many
builtins (e.g. workgroup ID/index) and intrinsics (e.g. workgroup
memory primitives) originally present only in CS.

This commit add two new stages (task and mesh) that 'inherit' from CS
by embedding a brw_cs_prog_data in their own prog_data structure, so
that CS functionality can be easily reused.  They also currently use
the same helpers to select the SIMD variant to use -- that was
recently added for CS.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>

intel/compiler: Export brw_nir_lower_simd

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>

intel/compiler: Make MUE available when setting up FS URB access

Allows to assert its existence for per-primitive variables and will
later be useful to implement the "more than 16 attributes" case for
Mesh.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>

intel/compiler: Add structs to hold TUE/MUE

Used to specify the layout of 'Task URB Entry' and 'Mesh URB Entry'.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>

intel/compiler: Don't lower Mesh/Task I/O to temporaries

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>

intel/compiler: Don't stage Task/Mesh outputs in registers

Since the outputs are shared among the whole workgroup, these can't be
staged in registers as they will not be always visible for all the
invocations (to read/flush).  If they ever need to be staged, we
should use SLM for that.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>

intel/compiler: Handle per-primitive inputs in FS

In Fragment Shader, regular inputs are laid out in the thread payload
in a one dword per each half-GRF, that gives room for having the two
delta dwords needed for interpolation.

Per-primitive inputs are laid out before the regular inputs, and since
there's no need to have delta information, they are packed.  So
half-GRF will be fully filled with 4 dwords of input.

When num_per_primitive_inputs is zero (the default case), behavior
should be the same as before.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>

intel/compiler: Properly lower WorkgroupId for Task/Mesh

Task/Mesh currently only support a single dimension (both in NV API
and HW), so make Y and Z be zero.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>

intel: Add INTEL_DEBUG=task,mesh

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>

mesa: move common/dri into gallium

There are no other consumers, so we can just move this into gallium and
out of mesa.

Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10153>

mesa: Merge libmesa_gallium and libmesa_common

Since we don't have libmesa_classic anymore, we don't nee to split
these, and can save a target/ar invocation by not having two targets.
Plus it's just conceptually simpler

Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10153>

mesa: Delete libmesa_classic

We no longer have any classic drivers, so we no longer need
libmesa_classic

Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10153>

mesa/main/tests: remove dispatch sanity

Thsi test uses a bunch of the classic infastructure, which is about to
be deleted. Since gallium will be the sole user, it will likely be
refactored out anyway.

Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10153>

include/pci_ids: Move PCI ids supported by both i965 and iris to iris

As crocus won't support any of these (BDW+) they should go into iris.
This also allows us to remove the "prefer_iris" option, as iris is now
the only option

Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10153>

mesa/dri: remove mega driver stub

As it is now unused.

Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10153>

classic/i965: Remove driver

Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10153>

classic/i915: Remove driver

This is only going to be supported in the Amber branch

Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10153>

classic/nouveau: Remove driver

This will now only be available in the Amber branch

Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10153>

classic/r200: Delete driver

This will now only be available on the Amber branch

Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10153>

classic/r100: Delete driver

This is now only going to be available in the Amber branch

Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10153>

mesa/x11: Remove the swrast-classic-based fake libGL

If you want this you will almost certainly be happier with the gallium
version, giving you llvmpipe instead of swrast-classic.

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10153>

mesa/tests: ensure that util_cpu_detect has been called

I think that this test was passing in some cases because of loader side
effects, that stop happening after classic is removed.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10153>

gitlab-ci: detect a3xx gpu hang recovery failure

But don't bail immediately, instead print out some more lines after the
hang, hopefully catching info about the cause of the hang.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14033>

gitlab-ci: serial close can leave an active read

So instead cancel the read first, and then close. Make sure the
serial-reading properly detects this cancelled condition under all
circumstances and exits.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14033>

d3d12: Handle depth readback on drivers that require full-resource copies for depth

Reviewed-by: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14051>

nir: Print task and mesh shader I/O variable names.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14007>

freedreno/a5xx: enable OES_gpu_shader5

This extension is controlled by the ESSL feature level. Bump it up since
all parts of OES_gpu_shader5 should be supported.

This also avoids lowering all of the "advanced" functions (which should
probably not be lowered in the first place since they're part of ES
3.1...)

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14035>

radv: Use util_widen_mask.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14005>

aco: Use util_widen_mask.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14005>

util: Add util_widen_mask function.

Widens the given bit mask by a multiplier, meaning that it will
replicate each bit by that amount.
For example: 0b101 widened by 2 will become: 0b110011

This is typically used in shader I/O to transform a 64-bit
writemask to a 32-bit writemask.

Moving this function here because it is used in multiple places.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14005>

nir: Fix sorting per-primitive outputs.

Fixes: 59860d487368e18a1d85ea96988c5f4c904879b0
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14006>

CI: Don't stream wget directly into bash

If our environment has pipefail set, bash could exit early before wget
has completed, and we will die with a broken pipe. Work around this by
first downloading from wget, and then executing from bash.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Acked-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14036>

v3d: enable ARB_texture_view

v2 (Iago):
 - Add comments to failing tests

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13409>

v3d: enable ARB_texture_buffer_object and ARB_texture_buffer_range

Through their specific PIPE_CAP.

v2 (Iago)
 - Add comment in test failure

Signed-off-by: Alejandro Piñeiro <apinheiro@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13409>

st/pbo: set layer coord for array textures

Even for drivers not supporting layers, we need to include the layer
coordinate (zero in this case) when using array textures in the
download/upload FS.

Otherwise we are missing a component to get the texture, which ends up
in a malformed NIR shader.

v5 (Ilia):
 - Do not emit needless layer code.

v6 (Ilia):
 - Add comment clarifying the code logic behind.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13409>

st/pbo: add the image format in the download FS

In the V3D driver there is a NIR lowering step for `image_store`
intrinsic, where the image store format is required for doing the proper
lowering.

Thus, let's define it for the download FS instead of
keeping it as NONE.

v2 (Illia)
 - Use format only for drivers not supporting format-less writing.

v4 (Illia):
 - Use PIPE_CAP_IMAGE_STORE_FORMATTED to reduce combinations.

v5 (Ilia):
 - Use indirect array for download FS in not formatless-store support
   drivers.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13409>

gallium: add new PIPE_CAP_IMAGE_STORE_FORMATTED

This capability is enabled for drivers supporting formatless image
writing in shader.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13409>

v3d: clamp clear color

On clearing a color buffer, clamp the passed color values to the allowed
ones.

Hardware do clamping for TLB values, but not for clear values.

v2 (Iago)
 - Add comment about hardware-based clamping on clear values.

v3 (Iago):
 - Use format utils to simplify clamping
 - Move clamp color function as utility

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13409>

gallium/util: add helper to clamp colors to valid range

v3 (Iago):
 - Fix comment.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13409>

st/pbo: do not use GS for NIR preferred shaders

If PBO require to use a GS, this is created with TGSI.

For drivers preferring NIR shaders, they need to translate it from TGSI
to NIR. But unfortunately TGSI to NIR for GS is not implemented, which
makes it crash.

So let's use a GS only for drivers preferring TGSI.

v3:
 - Add comment (Iago and Alejandro)

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13409>

mesa: allow TEXTURE_BUFFER target for ARB_texture_buffer_range

While TEXTURE_BUFFER do not support texture parameters in
ARB_texture_buffer_object specification, it does in
ARB_texture_buffer_range, specifically TEXTURE_BUFFER_OFFSET and
TEXTURE_BUFFER_SIZE.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13409>

v3d: restrict formats supported for PIPE_BIND_SHADER_IMAGE

So far we were relying on the supported formats filtering when
creating images from the user API.

But for some other (internal) uses, some of the formats that pass the
filter need to be restricted when binding them as shader images, as they
are not supported for this case.

v3 (Iago):
 - Change commit message.

Signed-off-by: Alejandro Piñeiro <apinheiro@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13409>

v3d: add support for no buffer object bound

From the GL_OES_texture_buffer spec:

      "If no buffer object is bound to the buffer texture, the results
       of the texel access are undefined."

this can be interpreted as allowing any result to come back, but not
terminate the program.

The current solution is not entirely complete, as it could still try to
get a wrong address for the shader state address.

This can be checked with piglit test
arb_texture_buffer_object-render-no-bo; the test is skip because it
requires OpenGL 3.1, but if overriding the version then it will crash.

Signed-off-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13409>

v3d: support for texture buffer objects

This commit handles the support for texture buffer objects. In general
it is mostly about using the buffer info from the pipe_image_view
instead of the texture info.

v2:
 - Rework some assertions (Iago)
 - Remove needless comment (Alejandro)
 - Fix comment typos (Iago)

v3:
 - Fix typos (Iago)

Signed-off-by: Alejandro Piñeiro <apinheiro@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13409>

nir/algebraic: optimize a*#b & -4

fossil-db (Sienna Cichlid):
Totals from 611 (0.47% of 128647) affected shaders:
CodeSize: 3096680 -> 3090976 (-0.18%)
Instrs: 570494 -> 569249 (-0.22%)
Latency: 5765865 -> 5759619 (-0.11%)
InvThroughput: 969840 -> 967608 (-0.23%)
VClause: 9690 -> 9688 (-0.02%)
Copies: 42884 -> 42894 (+0.02%); split: -0.01%, +0.03%
PreVGPRs: 28290 -> 28288 (-0.01%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13752>

nir/opt_offsets: remove need to loop try_extract_const_addition

fossil-db (Sienna Cichlid):
Totals from 1 (0.00% of 134572) affected shaders:
no stat changes

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14009>

nir/opt_offsets: fix try_extract_const_addition recursion

This initially looks like a miscompilation bug, but I don't think it's
actually possible for it to create incorrect code.

fossil-db (Sienna Cichlid):
Totals from 32 (0.02% of 134572) affected shaders:
VGPRs: 1336 -> 1320 (-1.20%)
CodeSize: 90552 -> 89468 (-1.20%)
Instrs: 17007 -> 16852 (-0.91%); split: -0.92%, +0.01%
Latency: 429040 -> 428136 (-0.21%); split: -0.21%, +0.00%
InvThroughput: 84966 -> 84572 (-0.46%); split: -0.47%, +0.00%
Copies: 1458 -> 1468 (+0.69%); split: -0.07%, +0.75%
Branches: 382 -> 384 (+0.52%)
PreSGPRs: 970 -> 968 (-0.21%)
PreVGPRs: 1029 -> 1011 (-1.75%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14009>

nir: add NIR_DEBUG envvar

Move all the NIR related debug environmental variables in a single
NIR_DEBUG one.

Use NIR_DEBUG=help to print all the available options.

v2:
 - Use a macro to simplify (Marcin, Jason)
 - Remove wrong changes (Marcin)

v3 (Marcin):
 - Remove rendundant NIR mentioning in option descriptions.
 - Unwrap option descriptions.
 - Ensure the constant is unsigned.
 - Use extern array to remove switch.

v4:
 - Add missing kernel shader (Jason).
 - Add unlikely() (Marcin).

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13840>

broadcom/compiler: improve documentation for Z writes

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14037>

v3d,v3dv: don't disable EZ for passthrough Z writes

The early-Z test uses Z values produced from FEP, so when
we write Z from a shader we need to disable EZ. However, there
are some instances where want to write the FEP-Z from the shader,
in which case we would not need to disable EZ.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14037>

broadcom/compiler: track passthrough Z writes

In some cases we need to make the shaders write the Z value produced
from rasterization (FEP). Track these instances because they are relevant
to early EZ setup.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14037>

broadcom/compiler: emit passthrough Z write if shader reads Z

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14037>

anv: allow VK_IMAGE_LAYOUT_UNDEFINED as final layout

From VK_KHR_synchronization2:
   "Image memory barriers that do not perform an image layout
    transition can be specified by setting oldLayout equal to
    newLayout.

    E.g. the old and new layout can both be set to
    VK_IMAGE_LAYOUT_UNDEFINED, without discarding data in the
    image."

v2: make assert more readable (Lionel Landwerlin)

Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14008>

iris/batch: Add support for engines contexts

As described in "intel: Add intel_gem_create_context_engines", this
should make it easier to support an I915_ENGINE_CLASS_FOO engine in
the future. For example, maybe something like:

https://gitlab.freedesktop.org/drm/igt-gpu-tools/-/commit/98c3bbd5b54eb9914329155bfeddd0ad88f96ad2

Reworks:
 * Tweak engine counting logic (s-b Ken)
 * Tweak init of engine_classes in iris_init_engines_context (s-b Ken)
 * Add STATIC_ASSERT on engine_classes (Jordan)
 * Paulo: Call iris_hw_context_set_unrecoverable() for engines context
 * Rename to has_engines_context (s-b Paulo)
 * Jordan: Handle creating a new engines context when the context needs
   to be replaced.
 * Ken: Tweak context destroy code paths.
 * Call iris_lost_context_state on every batch. (s-b Ken)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12692>

iris: Make iris_kernel_context_get_priority() public

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12692>

iris: Destroy all batches with a new iris_destroy_batches() function

Suggested-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12692>

iris: Move away from "hw" for some context terminology

Kernel contexts can take two forms now. In the older case a kernel
context will have a single hardware context. With an "engines" based
context, the context can now have 1 or more hardware contexts.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12692>

iris/batch: Add exec_flags field

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12692>

iris: extract iris_hw_context_set_unrecoverable()

We're going to add a second caller.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12692>

iris/batch: Move kernel context init to iris_init_non_engine_contexts

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12692>

iris: Add iris_init_batches

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12692>

intel: Add intel_gem_create_context_engines

Engines based contexts operate somewhat different for executing
batches. Previously, we would specify a bitmask value such as
I915_EXEC_RENDER to specify to run the batch on the render ring.

With engines contexts, instead this becomes an array of "engines", and
when the context is created we specify the class and instance of the
engine.

Each index in the array has a separate hardware-context. Previously we
had to create separate kernel level contexts to create multiple
hardware contexts, but now a single kernel context can own multiple
hardware contexts.

Another forward looking advantage to using the engines based contexts
is that the kernel does not plan to add new supported I915_EXEC_FOO
masks, whereas they instead plan to add new I915_ENGINE_CLASS_FOO
engine classes. Therefore some rings may only be usable with an engine
based class.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12692>

intel: Add intel_gem_count_engines

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12692>

docs: Add calendar entries for 22.0 release candidates.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14029>

venus: fix vn_instance_wait_roundtrip when seqno wraps

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14026>

zink/ci: Add GL4.6 tessellation flake

Seen in https://gitlab.freedesktop.org/mesa/mesa/-/jobs/16318152#L636
which is extremely unrelated.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14010>

ci: Use ci-fairy minio login via token file

For every CI job, put JWT content into a file and unset CI_JOB_JWT
environment var
=======

* virgl jobs:
- Share JWT token file to crosvm instance
- Keep using `export -p` due to high complexity in the scripts
  of these jobs. At least, the CI_JOB_JWT will not be leaked,
  since it is being unset at the `before_script` phase of each
  Mesa CI job.

* iris jobs: Update lava_job_submitter to take token file as argument
- generate-env with CI_JOB_JWT_TOKEN_FILE
- create token file during baremetal init stage

* baremetal jobs: Copy token file to bare-metal NFS

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Reviewed-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14004>

ci: Uprev piglit

Bring up the piglit replay jwt-file argument feature.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Reviewed-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14004>

ci: Update ci-fairy to version with --token-file support

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Reviewed-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14004>

meson: check for lld split TLSDESC bug (fixes #5665)

Reviewed-by: Emma Anholt <emma@anholt.net>
Tested-by: Michel Dänzer <mdaenzer@redhat.com>
Signed-off-by: Alex Xu (Hello71) <alex_y_xu@yahoo.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13934>

egl/wayland: fix surface dma-buf feedback error exits

This fixes a leak that was introduced in 89d15b9a "egl/wayland: add
initial dma-buf feedback support".

Do not leak dri2_surf->wl_dmabuf_feedback when we have to bail out
because of allocation issues.

Signed-off-by: Leandro Ribeiro <leandro.ribeiro@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13985>

egl/wayland: do not try to bind to wl_drm if not advertised

This fixes a bug that was introduced in 89d15b9a "egl/wayland: add
initial dma-buf feedback support".

Sometimes we have to fallback to wl_drm. But do not try to bind to it
when it is not advertised by the compositor.

This issue was found by n3rdopolis and reported here:
https://gitlab.freedesktop.org/mesa/mesa/-/issues/5697

Signed-off-by: Leandro Ribeiro <leandro.ribeiro@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13985>

radv: upload shader binaries of a pipeline contiguously in memory

RGP expects shaders to be contiguous in memory, otherwise it explodes
because we have to generate huge captures with lot of holes.

This reduces capture sizes of Cyberpunk 2077 from ~3.5GiB to ~180MiB.

This should also help for future pipeline libraries.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13690>

radv: pass a pointer to a pipeline for the create/insert cache functions

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13690>

radv: upload shader binaries after they are all compiled

Instead of mixing compilation and upload. This will allow us to
upload all shader binaries contiguously in memory and also for future
pipeline libraries work.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13690>

radv: add a helper function to upload a shader binary

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13690>

radv: remove never reached free() when compiling shaders

binary_out is never NULL and binaries are freed from the pipeline
after they are added to the cache.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13690>

freedreno/ci/a306: split off snorm blending failures

The hardware doesn't support this.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13990>

freedreno/ci/a306: split off the f32 blend / texturing failures

The hardware doesn't support this.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13990>

freedreno/ci/a306: separate msaa fails

The driver does not implement MSAA. When that happens these can be split
up further.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13990>

windows: Use TLS context/dispatch with shared-glapi

However they have to be called via _glapi_get_dispatch/context. This
would be safe to do on any platform, but the extra indirection is only
necessary on Windows since TLS vars can't be exported from a DLL.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13634>

freedreno/a3xx: add some legacy formats

These can be used in "legacy" buffer textures.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13989>

freedreno/ci/a306: add additional skip which hangchecks

I was having trouble getting a run to complete without this. Was working
earlier, not sure what changed.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13989>

freedreno/a6xx: Set the tess BO ptrs in the program stateobj.

Saves some draw-time work for tess.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13851>

freedreno/a6xx: Skip emitting tess BO pointers past the shader's constlen.

Some shaders don't want these pointers, and going past the constlen would
potentially overwrite consts from other draws.  This is a port of a fix
from turnip.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13851>

freedreno/a6xx: Allocate a fixed-size tess factor BO.

Saves per-batch allocations, avoids reallocation for various vertex
counts, and avoids needing the indirect tess addrs constobj so that we
could emit the relocs to the tess BO after we'd emitted all the draws.

Also apparently it fixes one of our CTS fails.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13851>

radv: Don't emit framebuffer state if there is no renderpass active.

The framebuffer state could still be dirty from when the previous
renderpass was bound.

Fixes: 5632359959f ("radv: Remove the skipping of framebuffer emission if we don't have a framebuffer.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5702
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13969>

d3d12: Support compat level 330

Reviewed-by: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14001>

venus: ignore framebuffer for VkCommandBuffer executed outside of render pass

The vulkan spec states[1]:
> If the VkCommandBuffer will not be executed within a render pass instance,
> or if the render pass instance was begun with vkCmdBeginRenderingKHR,
> renderPass, subpass, and framebuffer are ignored.

but venus will still try to encode them, resulting in a guest-side
assert or host-side command stream error.

[1]: https://www.khronos.org/registry/vulkan/specs/1.2-extensions/man/html/VkCommandBufferInheritanceInfo.html#_description

Signed-off-by: Ryan Neph <ryanneph@google.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13988>

nir: Make nir_build_alu() variants per 1-4 arg count.

This saves a bunch of generated code to pack up the extra NULLs to get to
4 args, and saves executing the conditions in nir_build_alu() to then skip
those NULLs.

Saves another 27kb on disk.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13916>

nir: Uninline a bunch of nir.h functions.

I aimed for "things that look like big switch statements, or cases where
the compiler is unlikely to be able to constant-propagate an argument into
something useful."

Saves another 80kb on disk.  No perf difference on iris shader-db, n=23.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13916>

iris: Drop redundant iris_resource_disable_aux call

Drop the call to iris_resource_disable_aux in
iris_resource_configure_aux. With the previous patches, we no longer
create CCS surfaces and pick the AUX_NONE usage. As a result, if the aux
usage is NONE, all iris_resource fields already indicate that aux is
disabled.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12398>

iris: Enable CCS_E on 32-bpc float formats on TGL+

Allow CCS_E on these formats on TGL+ for a couple reasons:

1) TGL doesn't have the option to fall back to CCS_D/fast-clears like
   prior platforms do.

2) The CCS compression scheme on TGL improves to encode more than 3
   levels of compression. This should help floating point formats.

In my measurements, enabling this on TGL results in a minor performance
improvement on Paraview (+0.06%) rather than a major regression like on
prior platforms. The improvement was measured by taking the average of 3
runs of: waveletvolume.py -d 256 -f 600.

Also, the Intel performance CI reports a 3.81% ±0.12% FPS improvement in
Bioshock Infinite.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12398>

intel/isl: Unify fmt checks in isl_surf_supports_ccs

On TGL+, require that the surface format supports CCS_E in order to
support CCS. This aligns with the ISL code that pads the primary
surface for CCS on this platform.

Pre-TGL, require support for either CCS_D or CCS_E.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12398>

docs: update calendar and link releases notes for 21.3.1

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13998>

docs: add release notes for 21.3.1

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13998>

CI/d3d12: Add a quick_shader run

Refactor the YML for some DRY, and rename the existing pass from
"-windows" to "-quick_gl" to disambiguate it.

Reviewed-by: Enrico Galli <enrico.galli@intel.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13902>