Thomas H.P. Andersen [Tue, 11 Jul 2023 16:22:25 +0000 (18:22 +0200)]
tgsi: remove unused tgsi_shader_info.colors_written
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24100>
Thomas H.P. Andersen [Tue, 11 Jul 2023 16:22:25 +0000 (18:22 +0200)]
tgsi: remove unused tgsi_shader_info.colors_read
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24100>
Thomas H.P. Andersen [Tue, 11 Jul 2023 16:22:24 +0000 (18:22 +0200)]
tgsi: remove unused tgsi_shader_info.num_memory_instructions
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24100>
Thomas H.P. Andersen [Tue, 11 Jul 2023 16:22:22 +0000 (18:22 +0200)]
tgsi: remove unused tgsi_shader_info.array_max
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24100>
Thomas H.P. Andersen [Tue, 11 Jul 2023 16:22:09 +0000 (18:22 +0200)]
tgsi: remove unused tgsi_shader_info.num_tokens
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24100>
Karmjit Mahil [Mon, 17 Jul 2023 12:02:28 +0000 (13:02 +0100)]
pvr: Fix writing query availability write out
The query value was accidentally being written as the availability
value. Queries that were available but of value `0` would never
become available.
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24209>
Karmjit Mahil [Mon, 17 Jul 2023 09:47:11 +0000 (10:47 +0100)]
pvr: Fix occlusion query unaccounted for user fences
User provided fences can never have a source stage for occlusion
queries as the occlusion query job is internal to the driver. So
at vkQueueSubmit the user's VkFence could be signalled before the
queries had completed.
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24209>
Karmjit Mahil [Fri, 14 Jul 2023 12:37:25 +0000 (13:37 +0100)]
pvr: Allow query stage for barrier sub cmds
The function is accounting for the occlusion query job so changing
the assert to allow it.
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24209>
Karmjit Mahil [Fri, 14 Jul 2023 12:36:46 +0000 (13:36 +0100)]
pvr: Use the correct size for the unified store allocation
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24209>
Frank Binns [Mon, 17 Jul 2023 08:05:53 +0000 (09:05 +0100)]
pvr: cleanup SPM EOT dynarray after upload
Fixes a memory leak found with Valgrind.
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Fixes:
ad0ca7a8794 ("pvr: Compile SPM EOT shader")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24208>
M Henning [Sat, 13 May 2023 02:54:40 +0000 (22:54 -0400)]
nv50/ir: Remove SpillSlot
Since nothing ever reads this data.
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23006>
M Henning [Sat, 13 May 2023 02:43:22 +0000 (22:43 -0400)]
nv50/ir: Remove dead loop from assignSlot
This loop can never execute. On entry we have offset = offsetBase and
offsetBase >= stackSize, so the condition offset < stackSize is always
false. The git history suggests that this was always broken this way.
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23006>
M Henning [Sat, 13 May 2023 02:08:50 +0000 (22:08 -0400)]
nv50/ir: Remove Function.stackPtr
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23006>
M Henning [Sat, 13 May 2023 02:01:13 +0000 (22:01 -0400)]
nv50/ir: Remove ArgumentMovesPass
We only use OP_CALL for builtins at this point, so no need for this.
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23006>
M Henning [Sat, 13 May 2023 01:40:18 +0000 (21:40 -0400)]
nv50/ir: Drop nir_jump_return handling
This is always lowered before this point.
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23006>
Dr. David Alan Gilbert [Mon, 10 Jul 2023 14:10:31 +0000 (15:10 +0100)]
rusticl: Wire the 'start' and 'end' profilng times up
We use the timestamp pipe queries to retrieve times from the
device, hopefully close to the execution of the code.
For now we use the End value for complete as well.
Signed-off-by: Dr. David Alan Gilbert <dave@treblig.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24101>
Dr. David Alan Gilbert [Tue, 11 Jul 2023 20:34:04 +0000 (21:34 +0100)]
rusticl: Wrap pipe query reads
Take a query we previously created and read it's result.
The type of the result is usually implicitly known; for now
just handle the query we use in 64 bit.
This is safe because the trait bindings ensure that
when we create a query with PipeQueryGen we embed the type
of the result in the PipeQuery, and that produces the correct
result type.
Signed-off-by: Dr. David Alan Gilbert <dave@treblig.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24101>
Dr. David Alan Gilbert [Mon, 10 Jul 2023 14:05:53 +0000 (15:05 +0100)]
rusticl: Wrap pipe queries
Pipe queries are asynchronous state reads, you create a query
and sometime later retrieve the result.
Wrap the underlying basic calls and types and provide a type
(PipeQuery) to handle the lifetype of the query. Note the pipe context
used for the query must live at last as long as the query.
Queries are created by calls to the PipeQueryGen, a wrapper
that figures out the return type and wraps that in the intermediate
that's returned. A typical use is:
query_start = PipeQueryGen::<{pipe_query_type::PIPE_QUERY_TIMESTAMP}>::new(ctx);
Signed-off-by: Dr. David Alan Gilbert <dave@treblig.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24101>
Dr. David Alan Gilbert [Fri, 7 Jul 2023 00:23:47 +0000 (01:23 +0100)]
rusticl: Wire the 'submit' profiling time up
Set it from the timestamp when it's taken out of the queue and
submitted, and wire the APU up to read it.
Signed-off-by: Dr. David Alan Gilbert <dave@treblig.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24101>
Dr. David Alan Gilbert [Thu, 6 Jul 2023 00:56:02 +0000 (01:56 +0100)]
rusticl: Wire the 'queued' profiling time up
Set it from the timestamp when it's added to the queue, and wire
the API up to read it.
Signed-off-by: Dr. David Alan Gilbert <dave@treblig.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24101>
Dr. David Alan Gilbert [Thu, 6 Jul 2023 00:52:06 +0000 (01:52 +0100)]
rusticl/core: Add profiling time storage (queued) to event
Add the first, of a few, profiling time values to the Event,
with access methods. This is defined as
'when the command identified by event is enqueued in a command-queue
by the host'
Signed-off-by: Dr. David Alan Gilbert <dave@treblig.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24101>
Karol Herbst [Tue, 18 Jul 2023 20:22:43 +0000 (22:22 +0200)]
nvc0: initial Ada enablement
Cc: 23.2 <mesa-stable>
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24226>
Philipp Zabel [Mon, 17 Jul 2023 10:46:59 +0000 (12:46 +0200)]
etnaviv: fix segfault after compile failure
Do not try to determine the shader stage from the compiled shader
variant, which may be NULL after compile failure. Instead, get it
from the NIR shader.
Fixes a segfault when trying to evaluate etna_shader_stage(NULL)
after compile failure.
Suggested-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Fixes:
3d496190715b ("etnaviv: add support for performance warnings")
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24178>
Honglei Huang [Mon, 3 Apr 2023 10:12:26 +0000 (18:12 +0800)]
virgl: Enable vp9 hardware decode
Add vp9 fill function in fill_picture_desc to enable vp9 decoding.
Signed-off-by: Honglei Huang <honglei1.huang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com>
Reviewed-by: Feng Jiang <jiangfeng@kylinos.cn>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22108>
Boyuan Zhang [Mon, 27 Mar 2023 11:31:57 +0000 (19:31 +0800)]
virgl: Implement vp9 hardware decode
Implement vp9 hardware decode by filling vp9 picture desc.
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com>
Reviewed-by: Feng Jiang <jiangfeng@kylinos.cn>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22108>
Boyuan Zhang [Fri, 23 Sep 2022 13:52:15 +0000 (09:52 -0400)]
virgl: Add vp9 picture desc
Define vp9 picture and slice parameters.
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com>
Reviewed-by: Feng Jiang <jiangfeng@kylinos.cn>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22108>
Honglei Huang [Thu, 12 Jan 2023 08:14:01 +0000 (16:14 +0800)]
virgl/video: Add jpeg buf start code check
Add jpeg start code check to fix the issue that
double header adding in virgl video codec.
Signed-off-by: Honglei Huang <honglei1.huang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com>
Reviewed-by: Feng Jiang <jiangfeng@kylinos.cn>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22108>
Honglei Huang [Wed, 11 Jan 2023 08:48:45 +0000 (16:48 +0800)]
virgl/video: Add more pipe type in virgl formats convert table
Add Y8_400_UNORM, YUYV, Y8_U8_V8_444_UNORM,
R8G8_R8B8_UNORM into virgl_formats_conv_table to fix
the resource create fail issue.
Signed-off-by: Honglei Huang <honglei1.huang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com>
Reviewed-by: Feng Jiang <jiangfeng@kylinos.cn>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22108>
Honglei Huang [Thu, 15 Dec 2022 08:02:09 +0000 (16:02 +0800)]
virgl/video: Add support for hevc10bit decoding.
Add P010 CONV_FORMAT to support virgl hevc10bit decoding.
Signed-off-by: Honglei Huang <honglei1.huang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com>
Reviewed-by: Feng Jiang <jiangfeng@kylinos.cn>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22108>
Honglei Huang [Thu, 15 Dec 2022 07:54:47 +0000 (15:54 +0800)]
virgl/video: Add support for jpeg decoding
Implement for virgl jpeg decoding.
Signed-off-by: Honglei Huang <honghuan@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com>
Reviewed-by: Feng Jiang <jiangfeng@kylinos.cn>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22108>
Honglei Huang [Wed, 23 Nov 2022 08:56:21 +0000 (16:56 +0800)]
virgl/video: Add support for vc1 decoding
Implement for virgl vc1 decoding.
Signed-off-by: Honglei Huang <honglei1.huang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com>
Reviewed-by: Feng Jiang <jiangfeng@kylinos.cn>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22108>
Honglei Huang [Thu, 12 Jan 2023 09:46:12 +0000 (17:46 +0800)]
virgl/video: Add support for mpeg12 decoding
Implement for mpeg12 virgl video decoding.
Signed-off-by: Honglei Huang <honglei1.huang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Daniel Almeida <daniel.almeida@collabora.com>
Reviewed-by: Feng Jiang <jiangfeng@kylinos.cn>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22108>
Faith Ekstrand [Wed, 12 Jul 2023 07:37:33 +0000 (02:37 -0500)]
intel/vec4: Drop support for nir_register
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24104>
Faith Ekstrand [Wed, 12 Jul 2023 07:37:17 +0000 (02:37 -0500)]
intel/fs: Drop support for nir_register
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24104>
Faith Ekstrand [Thu, 18 May 2023 19:14:18 +0000 (14:14 -0500)]
intel: Switch to intrinsic-based registers
Results on HSW (vec4 only):
total instructions in shared programs: 2978400 -> 2974135 (-0.14%)
instructions in affected programs: 77870 -> 73605 (-5.48%)
helped: 143
HURT: 48
helped stats (abs) min: 1 max: 100 x̄: 30.22 x̃: 9
helped stats (rel) min: 0.03% max: 30.49% x̄: 8.02% x̃: 6.39%
HURT stats (abs) min: 1 max: 4 x̄: 1.19 x̃: 1
HURT stats (rel) min: 0.08% max: 16.67% x̄: 3.71% x̃: 3.23%
95% mean confidence interval for instructions value: -26.69 -17.97
95% mean confidence interval for instructions %-change: -6.24% -3.90%
Instructions are helped.
total cycles in shared programs:
45345924 ->
44742666 (-1.33%)
cycles in affected programs:
29083466 ->
28480208 (-2.07%)
helped: 4785
HURT: 3879
helped stats (abs) min: 2 max: 8072 x̄: 276.00 x̃: 24
helped stats (rel) min: 0.02% max: 54.43% x̄: 7.78% x̃: 1.95%
HURT stats (abs) min: 2 max: 14736 x̄: 184.95 x̃: 20
HURT stats (rel) min: 0.02% max: 97.00% x̄: 7.69% x̃: 1.53%
95% mean confidence interval for cycles value: -83.49 -55.77
95% mean confidence interval for cycles %-change: -1.16% -0.55%
Cycles are helped.
total spills in shared programs: 1093 -> 539 (-50.69%)
spills in affected programs: 772 -> 218 (-71.76%)
helped: 74
HURT: 0
total fills in shared programs: 760 -> 757 (-0.39%)
fills in affected programs: 66 -> 63 (-4.55%)
helped: 3
HURT: 0
Results on TGL (all stages):
total instructions in shared programs:
21486982 ->
21488266 (<.01%)
instructions in affected programs: 2245938 -> 2247222 (0.06%)
helped: 1288
HURT: 1385
helped stats (abs) min: 1 max: 93 x̄: 4.05 x̃: 2
helped stats (rel) min: 0.02% max: 3.82% x̄: 0.61% x̃: 0.46%
HURT stats (abs) min: 1 max: 134 x̄: 4.69 x̃: 2
HURT stats (rel) min: <.01% max: 5.59% x̄: 0.65% x̃: 0.44%
95% mean confidence interval for instructions value: 0.13 0.83
95% mean confidence interval for instructions %-change: <.01% 0.08%
Instructions are HURT.
total cycles in shared programs:
809326677 ->
809475669 (0.02%)
cycles in affected programs:
447781659 ->
447930651 (0.03%)
helped: 1924
HURT: 1994
helped stats (abs) min: 1 max: 74567 x̄: 1217.49 x̃: 10
helped stats (rel) min: <.01% max: 38.44% x̄: 1.09% x̃: 0.17%
HURT stats (abs) min: 1 max: 76426 x̄: 1249.47 x̃: 8
HURT stats (rel) min: <.01% max: 137.11% x̄: 1.64% x̃: 0.17%
95% mean confidence interval for cycles value: -125.61 201.67
95% mean confidence interval for cycles %-change: 0.12% 0.48%
Inconclusive result (value mean confidence interval includes 0).
LOST: 4
GAINED: 4
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24104>
Faith Ekstrand [Thu, 18 May 2023 21:24:07 +0000 (16:24 -0500)]
intel/vec4: Add support for new-style registers
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24104>
Faith Ekstrand [Thu, 18 May 2023 21:58:01 +0000 (16:58 -0500)]
intel/vec4: Assume get_nir_dest() provides a sane write-mask
It should be providing a write mask that is all the channels. Drop the
one case for load_input where we stomp this for no good reason. Also,
make ALU write-masking AND with the existing mask. This prepares us for
the next patch where we convert to new-style registers.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24104>
Faith Ekstrand [Thu, 18 May 2023 19:14:04 +0000 (14:14 -0500)]
intel/fs: Add support for new-style registers
The old ones still work for now.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24104>
Timothy Arceri [Tue, 18 Jul 2023 02:46:27 +0000 (12:46 +1000)]
glsl: fix validation of ES vertex attribs
From OpenGL ES 3.0 spec, page 56:
"Binding more than one attribute name to the same location
is referred to as aliasing, and is not permitted in OpenGL
ES Shading Language 3.00 vertex shaders. LinkProgram will
fail when this condition exists. However, aliasing is
possible in OpenGL ES Shading Language 1.00 vertex shaders.
This will only work if only one of the aliased attributes
is active in the executable program, or if no path through
the shader consumes more than one attribute of a set of
attributes aliased to the same location. A link error can
occur if the linker determines that every path through the
shader consumes multiple aliased attributes, but implemen-
tations are not required to generate an error in this case."
So here we make sure to allow the optimisations before validation
for earlier ES shader versions.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Fixes:
80c001013ce8 ("glsl: do vs attribute validation in NIR linker")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9342
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24205>
Mike Blumenkrantz [Tue, 18 Jul 2023 13:40:07 +0000 (09:40 -0400)]
ci: bump VVL to 1.3.257
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24214>
Eric Engestrom [Tue, 11 Jul 2023 19:44:40 +0000 (20:44 +0100)]
ci: move lavapipe files rules to src/gallium/drivers/lavapipe/ci/gitlab-ci.yml
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24099>
Eric Engestrom [Tue, 11 Jul 2023 19:44:25 +0000 (20:44 +0100)]
ci: move softpipe files rules to src/gallium/drivers/softpipe/ci/gitlab-ci.yml
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24099>
Eric Engestrom [Tue, 11 Jul 2023 19:43:54 +0000 (20:43 +0100)]
ci: move llvmpipe files rules to src/gallium/drivers/llvmpipe/ci/gitlab-ci.yml
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24099>
Eric Engestrom [Tue, 11 Jul 2023 19:29:56 +0000 (20:29 +0100)]
ci: move virgl files rules to src/gallium/drivers/virgl/ci/gitlab-ci.yml
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24099>
Eric Engestrom [Tue, 11 Jul 2023 19:29:20 +0000 (20:29 +0100)]
ci: move intel files rules to src/intel/ci/gitlab-ci.yml
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24099>
Eric Engestrom [Tue, 11 Jul 2023 19:28:35 +0000 (20:28 +0100)]
ci: move virtio files rules to src/virtio/ci/gitlab-ci.yml
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24099>
Eric Engestrom [Tue, 11 Jul 2023 17:55:01 +0000 (18:55 +0100)]
ci: move zink files rules to src/gallium/drivers/zink/ci/gitlab-ci.yml
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24099>
Eric Engestrom [Tue, 11 Jul 2023 17:54:04 +0000 (18:54 +0100)]
ci: move microsoft files rules to src/microsoft/ci/gitlab-ci.yml
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24099>
Eric Engestrom [Tue, 11 Jul 2023 17:42:50 +0000 (18:42 +0100)]
ci: move amd files rules to src/amd/ci/gitlab-ci.yml
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24099>
Eric Engestrom [Tue, 11 Jul 2023 16:41:49 +0000 (17:41 +0100)]
ci: move lima files rules to src/gallium/drivers/lima/ci/gitlab-ci.yml
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24099>
Eric Engestrom [Tue, 11 Jul 2023 16:40:34 +0000 (17:40 +0100)]
ci: move broadcom files rules to src/broadcom/ci/gitlab-ci.yml
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24099>
Eric Engestrom [Tue, 11 Jul 2023 16:39:44 +0000 (17:39 +0100)]
ci: move panfrost files rules to src/panfrost/ci/gitlab-ci.yml
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24099>
Eric Engestrom [Tue, 11 Jul 2023 16:37:33 +0000 (17:37 +0100)]
ci: move nouveau files rules to src/gallium/drivers/nouveau/ci/gitlab-ci.yml
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24099>
Eric Engestrom [Tue, 11 Jul 2023 16:36:20 +0000 (17:36 +0100)]
ci: move freedreno files rules to src/freedreno/ci/gitlab-ci.yml
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24099>
Eric Engestrom [Tue, 11 Jul 2023 15:39:08 +0000 (16:39 +0100)]
ci: move etnaviv files rules to src/etnaviv/ci/gitlab-ci.yml
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24099>
Eric Engestrom [Tue, 11 Jul 2023 20:25:30 +0000 (21:25 +0100)]
ci: replace virgl_file_list anchor with reference
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24099>
Eric Engestrom [Tue, 11 Jul 2023 20:25:14 +0000 (21:25 +0100)]
ci: replace radeonsi_file_list anchor with reference
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24099>
Eric Engestrom [Tue, 11 Jul 2023 20:24:48 +0000 (21:24 +0100)]
ci: replace radv_file_list anchor with reference
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24099>
Eric Engestrom [Tue, 11 Jul 2023 20:24:18 +0000 (21:24 +0100)]
ci: replace iris_file_list anchor with reference
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24099>
Eric Engestrom [Tue, 11 Jul 2023 20:23:59 +0000 (21:23 +0100)]
ci: replace lavapipe_file_list anchor with reference
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24099>
Eric Engestrom [Tue, 11 Jul 2023 20:23:31 +0000 (21:23 +0100)]
ci: replace softpipe_file_list anchor with reference
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24099>
Eric Engestrom [Tue, 11 Jul 2023 20:22:43 +0000 (21:22 +0100)]
ci: replace llvmpipe_file_list anchor with reference
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24099>
Eric Engestrom [Tue, 11 Jul 2023 22:35:31 +0000 (23:35 +0100)]
ci: add .gallium-core-rules and use it instead of gallium_core_file_list anchor
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24099>
Eric Engestrom [Tue, 11 Jul 2023 20:19:16 +0000 (21:19 +0100)]
ci: add .llvmpipe-manual-rules and use it
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24099>
Eric Engestrom [Tue, 11 Jul 2023 15:37:27 +0000 (16:37 +0100)]
ci: use !reference for scheduled_pipeline retry rule
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24099>
Rohan Garg [Thu, 29 Jun 2023 17:10:10 +0000 (19:10 +0200)]
intel/genxml: set a default value for "Pixel Position Offset Enable" in genxml
Set the default value for "Pixel Position Offset Enable" when emitting
3DSTATE_MULTISAMPLE in the genxml so that we can drop it from blorp
and genX_state.
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23936>
David Rosca [Mon, 17 Jul 2023 10:34:40 +0000 (12:34 +0200)]
radeonsi/vcn: Enable full/limited range support for H264/HEVC/AV1
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24174>
David Rosca [Mon, 17 Jul 2023 12:18:41 +0000 (14:18 +0200)]
radeonsi/vcn: Set HEVC video signal parameters in bitstream
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24174>
David Rosca [Mon, 17 Jul 2023 10:34:29 +0000 (12:34 +0200)]
radeonsi/vcn: Set H264 video signal parameters in bitstream
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24174>
David Rosca [Mon, 17 Jul 2023 10:22:41 +0000 (12:22 +0200)]
frontends/va: Add postproc support for converting to full range
Acked-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24174>
David Rosca [Mon, 17 Jul 2023 12:13:18 +0000 (14:13 +0200)]
frontends/va: Parse HEVC SPS for video signal parameters
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24174>
David Rosca [Sun, 16 Jul 2023 18:26:18 +0000 (20:26 +0200)]
frontends/va: Parse H264 SPS for video signal parameters
Since packed headers support is now advertised for H264,
it also fixes encoding into mkv with ffmpeg.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3524
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24174>
David Rosca [Sun, 16 Jul 2023 15:34:20 +0000 (17:34 +0200)]
radeonsi/vcn: Don't use chroma in AV1 encode with RGB input
Fixes:
64eab1f3ae
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Thong Thai <thong.thai@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24170>
David Rosca [Sat, 15 Jul 2023 14:30:04 +0000 (16:30 +0200)]
frontends/va: Don't use EFC with scaling or filtering enabled
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24170>
David Rosca [Sat, 15 Jul 2023 12:46:53 +0000 (14:46 +0200)]
frontends/va: Skip processing buffers already converted with EFC
Since the EFC conversion reallocates the dst buffer with new format,
any subsequent VA postproc calls on the same surface will fall back
to vl_compositor conversion.
This is the case in ffmpeg where the postproc filter output
buffers are reused instead of allocated for each frame.
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24170>
Yiwei Zhang [Tue, 18 Jul 2023 18:27:40 +0000 (18:27 +0000)]
venus: reduce to use 4K mem suballoc align on platforms known to fit
This is a workaround for low ram arm devices before fixing:
https://gitlab.freedesktop.org/mesa/mesa/-/issues/9351
Test: patch to prior higher limit 16384 and run
dEQP-VK.api.object_management.max_concurrent.query_pool
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24219>
Kenneth Graunke [Tue, 18 Jul 2023 06:26:39 +0000 (23:26 -0700)]
iris: Re-emit 3DSTATE_DS for each primitive (workaround
14019750404)
Some platforms require us to re-emit 3DSTATE_DS before every 3DPRIMITIVE
when tessellation is enabled. See workaround
14019750404.
Cc: 23.2 <mesa-stable>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24150>
Iván Briano [Thu, 6 Jul 2023 20:02:29 +0000 (13:02 -0700)]
anv: implement Wa_14019750404
Cc: 23.2 <mesa-stable>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8931
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24150>
Iván Briano [Wed, 5 Jul 2023 22:40:52 +0000 (15:40 -0700)]
anv: ensure mesh is disabled on context init
It turns out the hardware doesn't save the whole state on a context
switch, as the kernel expects when it creates the golden context.
For some HW units, only the state that was explicitly programmed will be
part of it, so we need to make sure mesh shading is disabled on context
creation, or we risk being context switched with an application that
uses mesh, and when ours gets to run again, the mesh state won't be
reset, and submitting a legacy 3D pipeline while the HW thinks mesh is
enabled causes us to hang.
Cc: 23.2 <mesa-stable>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24150>
Iván Briano [Wed, 5 Jul 2023 22:40:52 +0000 (15:40 -0700)]
iris: ensure mesh is disabled on context init
It turns out the hardware doesn't save the whole state on a context
switch, as the kernel expects when it creates the golden context.
For some HW units, only the state that was explicitly programmed will be
part of it, so we need to make sure mesh shading is disabled on context
creation, or we risk being context switched with an application that
uses mesh, and when ours gets to run again, the mesh state won't be
reset, and submitting a legacy 3D pipeline while the HW thinks mesh is
enabled causes us to hang.
Cc: 23.2 <mesa-stable>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24150>
Gert Wollny [Mon, 17 Jul 2023 15:36:32 +0000 (17:36 +0200)]
r600/sfn: Print more info if scheduling fails
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24212>
Gert Wollny [Mon, 17 Jul 2023 15:26:19 +0000 (17:26 +0200)]
r600/sfn: Add some tests for proper register access
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24212>
Gert Wollny [Mon, 17 Jul 2023 15:25:13 +0000 (17:25 +0200)]
r600/sfn: reorder the value factory class member declaration a bit
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24212>
Gert Wollny [Mon, 17 Jul 2023 15:24:28 +0000 (17:24 +0200)]
r600/sfn: Add peephole optimization to move a dest to the previous op
This is mostly tailored to the register store op where we get a sequence
ALU OP S1.x : ...
ALU MOV R1.x = S1.x
but it can help elsewhere too.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24212>
Gert Wollny [Mon, 17 Jul 2023 15:21:00 +0000 (17:21 +0200)]
r600/sfn: Increase LDS fetch schedule priority
Otherwise we may end up scheduling the value read before the
value fetch.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24212>
Gert Wollny [Mon, 17 Jul 2023 15:19:31 +0000 (17:19 +0200)]
r600/sfn: Handle indirect array load/store dependencies better
Indirect access must depend on all writes to the array
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24212>
Gert Wollny [Mon, 17 Jul 2023 15:14:00 +0000 (17:14 +0200)]
r600/sfn: Allow for larger ALU CF's
We should get as close as possible to the limit the hardware and the
assembler backend allows for.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24212>
Gert Wollny [Mon, 10 Jul 2023 17:42:11 +0000 (19:42 +0200)]
r600/sfn/tests: add simple copy-prop test with register source
Just to make sure the register intrinsic conversion doesn't need the helpers.
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24212>
Gert Wollny [Thu, 6 Jul 2023 14:23:21 +0000 (16:23 +0200)]
r600/sfn: Switch to register intrinsics
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24212>
Alyssa Rosenzweig [Fri, 26 May 2023 16:13:07 +0000 (12:13 -0400)]
r600/sfn: Remove nir_register unit tests
These tests will be obsolete soon and are just extra users of an API that will
be removed. Drop them.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24212>
Samuel Pitoiset [Mon, 17 Jul 2023 14:59:57 +0000 (16:59 +0200)]
radv: make radv_get_pa_su_sc_mode_cntl() static
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24192>
Samuel Pitoiset [Thu, 29 Jun 2023 14:59:46 +0000 (16:59 +0200)]
radv: remove support for VK_INDIRECT_COMMANDS_TOKEN_TYPE_STATE_FLAGS_NV
This isn't used by vkd3d-proton which is the only user of DGC, no need
to overcomplicate this.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24192>
Marek Olšák [Sun, 16 Jul 2023 07:44:53 +0000 (03:44 -0400)]
util/u_queue: always enable UTIL_QUEUE_INIT_SCALE_THREADS, remove the flag
It means that threads are created on demand except for the first one.
It reduces process startup time.
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24173>
Marek Olšák [Sun, 16 Jul 2023 07:24:21 +0000 (03:24 -0400)]
util/u_queue: fix util_queue_finish deadlock by merging lock and finish_lock
and by disabling the on-demand thread creation, which breaks the finish logic.
Fixes:
3713dc6b2a7 - util/u_queue: add UTIL_QUEUE_INIT_SCALE_THREADS flag
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8363
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24173>
Alyssa Rosenzweig [Mon, 17 Jul 2023 20:54:58 +0000 (16:54 -0400)]
panfrost: Fix transform feedback on v9
We were using a stale FAU buffer which meant we wrote to garbage addresses. I'm
guessing this was fallout from the big sysval rework but not 100% sure.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24199>
Iván Briano [Tue, 18 Jul 2023 04:37:10 +0000 (21:37 -0700)]
anv: ensure CFE_STATE is emitted for ray tracing pipelines
Fixes sporadic failures in dEQP-VK.robustness.robustness2.*.rgen
Fixes:
ecb709c8535 ("anv: only emit CFE_STATE when scratch space increases")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9382
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24206>
David Heidelberg [Tue, 18 Jul 2023 00:09:10 +0000 (02:09 +0200)]
ci/freedreno: add a530 flakes, remove one fail which recently started passing
dEQP-GLES31.functional.texture.texture_buffer.render.as_vertex_array_as_index_array_as_fragment_texture.offset_1_alignments
seems to got fixed by accident?
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24203>
David Heidelberg [Mon, 17 Jul 2023 23:08:19 +0000 (01:08 +0200)]
ci/microsoft: when re-enabling Windows Farm, always run the container
Otherwise, Marge queue has to wait for someone manually trigger it.
Fixes:
d3b66356 ("ci/microsoft: partly revert rename from container-rules to manual-rules")
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24048>
Robert Foss [Fri, 23 Jun 2023 15:50:12 +0000 (17:50 +0200)]
egl: Rename _eglAddDevice() to _eglFindDevice()
_eglAddDevice() is now only used to look up eglDevices,
which means that the function name is a bit misleading.
Since this function is only used for finding the
eglDevice, it should also no longer support adding
a device to the egl devices list.
Signed-off-by: Robert Foss <rfoss@kernel.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23742>
Robert Foss [Fri, 23 Jun 2023 15:50:12 +0000 (17:50 +0200)]
egl: Rename _eglAddDevice() to _eglFindDevice()
_eglAddDevice() is now only used to look up eglDevices,
which means that the function name is a bit misleading.
Since this function is only used for finding the
eglDevice, it should also no longer support adding
a device to the egl devices list.
Signed-off-by: Robert Foss <rfoss@kernel.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23742>