Johan Jonker [Thu, 16 Jan 2020 15:22:29 +0000 (16:22 +0100)]
dt-bindings: mmc: convert rockchip dw-mshc bindings to yaml
Current dts files with 'dwmmc' nodes are manually verified.
In order to automate this process rockchip-dw-mshc.txt
has to be converted to yaml. In the new setup
rockchip-dw-mshc.yaml will inherit properties from
mmc-controller.yaml and synopsys-dw-mshc-common.yaml.
'dwmmc' will no longer be a valid name for a node and
should be changed to 'mmc'.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200116152230.29831-2-jbx6244@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Johan Jonker [Thu, 16 Jan 2020 15:22:28 +0000 (16:22 +0100)]
dt-bindings: mmc: convert synopsys dw-mshc bindings to yaml
Current dts files with 'dwmmc' nodes are manually verified.
In order to automate this process synopsys-dw-mshc.txt
has to be converted to yaml. In the new setup
synopsys-dw-mshc.yaml will inherit properties from
mmc-controller.yaml and synopsys-dw-mshc-common.yaml.
'dwmmc' will no longer be a valid name for a node and
should be changed to 'mmc'.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200116152230.29831-1-jbx6244@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Ritesh Harjani [Thu, 16 Jan 2020 17:03:11 +0000 (22:33 +0530)]
mmc: sdhci-msm: Add CQHCI support for sdhci-msm
This adds CQHCI support for sdhci-msm platforms.
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/1579194192-7942-3-git-send-email-vbadigan@codeaurora.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Veerabhadrarao Badiganti [Mon, 20 Jan 2020 14:38:38 +0000 (20:08 +0530)]
mmc: sdhci: Let a vendor driver supply and update ADMA descriptor size
Let a vendor driver supply the maximum descriptor size that it
can operate on. ADMA descriptor table would be allocated using this
supplied size.
If any SD Host controller is of version prior to v4.10 spec
but supports 16byte descriptor, this change allows them to supply
correct descriptor size for ADMA table allocation.
Also let a vendor driver update the descriptor size by overriding
sdhc_host->desc_size if it has to operates on a different descriptor
sizes in different conditions.
Suggested-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/1579531122-28341-1-git-send-email-vbadigan@codeaurora.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Yangbo Lu [Mon, 20 Jan 2020 09:48:35 +0000 (17:48 +0800)]
mmc: sdhci-of-esdhc: fix serious issue clock is always disabled
This patch is to fix a serious issue that clock is always disabled
in esdhc_of_set_clock().
Fixes: 1b21a701aed9 ("mmc: sdhci-of-esdhc: fix clock setting for different controller versions")
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Link: https://lore.kernel.org/r/20200120094835.28050-1-yangbo.lu@nxp.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Yangbo Lu [Fri, 17 Jan 2020 06:38:58 +0000 (14:38 +0800)]
mmc: sdhci-of-esdhc: fix transfer mode register reading
The standard SD controller uses two 16-bit registers for
command sending.
0xC: Transfer Mode Register
0xE: Command Register
But the eSDHC controller uses one 32-bit register instead.
0xC: XFERTYPE
For Transfer Mode Register and Command Register writing,
the eSDHC driver will store Transfer Mode Register value in
a variable first. When Command Register writing happens,
driver will directly write a 32-bit value into XFERTYPE
register.
But for Transfer Mode Register reading, driver just returns
a actual value. This may cause issue for some read-modify-write
operations. We should make both reading and write on that variable
for Transfer Mode Register.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Link: https://lore.kernel.org/r/20200117063858.37296-1-yangbo.lu@nxp.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Al Cooper [Mon, 13 Jan 2020 21:07:06 +0000 (16:07 -0500)]
mmc: sdhci-brcmstb: Fix incorrect switch to HS mode
When switching from any MMC speed mode that requires 1.8v
(HS200, HS400 and HS400ES) to High Speed (HS) mode, the system
ends up configured for SDR12 with a 50MHz clock which is an illegal
mode.
This happens because the SDHCI_CTRL_VDD_180 bit in the
SDHCI_HOST_CONTROL2 register is left set and when this bit is
set, the speed mode is controlled by the SDHCI_CTRL_UHS field
in the SDHCI_HOST_CONTROL2 register. The SDHCI_CTRL_UHS field
will end up being set to 0 (SDR12) by sdhci_set_uhs_signaling()
because there is no UHS mode being set.
The fix is to change sdhci_set_uhs_signaling() to set the
SDHCI_CTRL_UHS field to SDR25 (which is the same as HS) for
any switch to HS mode.
This was found on a new eMMC controller that does strict checking
of the speed mode and the corresponding clock rate. It caused the
switch to HS400 mode to fail because part of the sequence to switch
to HS400 requires a switch from HS200 to HS before going to HS400.
This issue was previously fixed by commit
c894e33ddc191 ("mmc: sdhci:
Fix incorrect switch to HS mode") and later removed by commit
07bcc411567c ("Revert \"mmc: sdhci: Fix incorrect switch to HS mode\"")
because it caused failures with some SD cards on AM65X systems. The
fix will now be done in a platform specific callback instead of
common sdhci code.
Signed-off-by: Al Cooper <alcooperx@gmail.com>
Suggested-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20200113210706.11972-7-alcooperx@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Al Cooper [Mon, 13 Jan 2020 21:07:05 +0000 (16:07 -0500)]
mmc: sdhci-brcmstb: Add support for Command Queuing (CQE)
The latest Arasan controller first used in the 7216 now supports
CQE so enable this feature.
Signed-off-by: Al Cooper <alcooperx@gmail.com>
Link: https://lore.kernel.org/r/20200113210706.11972-6-alcooperx@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Al Cooper [Mon, 13 Jan 2020 21:07:04 +0000 (16:07 -0500)]
mmc: sdhci-brcmstb: Add shutdown callback
Shutdown controller and disable it's clocks to insure max power
savings in S5 on systems that leave power on.
Signed-off-by: Al Cooper <alcooperx@gmail.com>
Link: https://lore.kernel.org/r/20200113210706.11972-5-alcooperx@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Al Cooper [Mon, 13 Jan 2020 21:07:03 +0000 (16:07 -0500)]
mmc: sdhci-brcmstb: Fix driver to defer on clk_get defer
The new SCMI clock protocol driver does not get probed that early in
boot. Brcmstb drivers typically have the following code when getting
a clock:
priv->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(priv->clk)) {
dev_err(&pdev->dev, "Clock not found in Device Tree\n");
priv->clk = NULL;
}
This commit changes the driver to do what is below.
priv->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(priv->clk)) {
if (PTR_ERR(priv->clk) == -EPROBE_DEFER)
return -EPROBE_DEFER;
dev_err(&pdev->dev, "Clock not found in Device Tree\n");
priv->clk = NULL;
}
Signed-off-by: Al Cooper <alcooperx@gmail.com>
Link: https://lore.kernel.org/r/20200113210706.11972-4-alcooperx@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Al Cooper [Mon, 13 Jan 2020 21:07:02 +0000 (16:07 -0500)]
mmc: sdhci-brcmstb: Add ability to use HS400ES transfer mode
The latest eMMC JEDEC specification version 5.1 added a new
transfer mode, HS400 with enhanced strobe (HS400ES). This mode
will be selected if both the host controller and eMMC device
support it. The latest Arasan 5.1 controller in the 7216a0
supports this mode. The "Host Controller Specification" has
not been updated so the controller register bit used to enable
this mode is not specified and varies the with controller vendor.
The Linux SDHCI driver supplies a callback for enabling HS400ES
mode and that callback will be used to supply a routine that
will set the proper bit in the Arasan Vendor register.
Signed-off-by: Al Cooper <alcooperx@gmail.com>
Link: https://lore.kernel.org/r/20200113210706.11972-3-alcooperx@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Al Cooper [Mon, 13 Jan 2020 21:07:01 +0000 (16:07 -0500)]
dt-bindings: mmc: brcm,sdhci-brcmstb: Add support for 7216b0
Add 7216b0 with supports CQE, HS400, HS400-ES and SDR104.
Signed-off-by: Al Cooper <alcooperx@gmail.com>
Link: https://lore.kernel.org/r/20200113210706.11972-2-alcooperx@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Michał Mirosław [Thu, 2 Jan 2020 10:54:58 +0000 (11:54 +0100)]
mmc: core: limit probe clock frequency to configured f_max
Currently MMC core disregards host->f_max during card initialization
phase. Obey upper boundary for the clock frequency and skip faster
speeds when they are above the limit.
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Link: https://lore.kernel.org/r/f471bceaf237d582d746bd289c4c4f3639cb7b45.1577962382.git.mirq-linux@rere.qmqm.pl
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
YueHaibing [Thu, 16 Jan 2020 14:43:22 +0000 (22:43 +0800)]
mmc: sdhci-milbeaut: Remove redundant platform_get_irq error message
platform_get_irq() will call dev_err() itself on failure,
so there is no need for the driver to also do this.
This is detected by coccinelle.
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20200116144322.57308-1-yuehaibing@huawei.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Chunyan Zhang [Mon, 20 Jan 2020 03:32:23 +0000 (11:32 +0800)]
mmc: sdhci: fix an issue of mixing different types
Fix an issue reported by sparse, since mixed types of parameters are
used on calling dmaengine_prep_slave_sg().
Fixes: 36e1da441fec (mmc: sdhci: add support for using external DMA devices)
Reported-by: kbuild test robot <lkp@intel.com>
Signed-off-by: Chunyan Zhang <zhang.chunyan@linaro.org>
Reviewed-by: Nathan Chancellor <natechancellor@gmail.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20200120033223.897-1-zhang.chunyan@linaro.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Ulf Hansson [Mon, 20 Jan 2020 09:40:37 +0000 (10:40 +0100)]
Merge branch 'fixes' into next
Michał Mirosław [Wed, 15 Jan 2020 09:54:35 +0000 (10:54 +0100)]
mmc: sdhci: fix minimum clock rate for v3 controller
For SDHCIv3+ with programmable clock mode, minimal clock frequency is
still base clock / max(divider). Minimal programmable clock frequency is
always greater than minimal divided clock frequency. Without this patch,
SDHCI uses out-of-spec initial frequency when multiplier is big enough:
mmc1: mmc_rescan_try_freq: trying to init card at 468750 Hz
[for 480 MHz source clock divided by 1024]
The code in sdhci_calc_clk() already chooses a correct SDCLK clock mode.
Fixes: c3ed3877625f ("mmc: sdhci: add support for programmable clock mode")
Cc: <stable@vger.kernel.org> # 4f6aa3264af4: mmc: tegra: Only advertise UHS modes if IO regulator is present
Cc: <stable@vger.kernel.org>
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/ffb489519a446caffe7a0a05c4b9372bd52397bb.1579082031.git.mirq-linux@rere.qmqm.pl
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Faiz Abbas [Thu, 16 Jan 2020 10:51:54 +0000 (16:21 +0530)]
mmc: sdhci-omap: Add special reset capability
Some omap controllers need software to monitor a 0->1->0 for software
reset. Add a SDHCI_OMAP_SPECIAL_RESET flag to indicate this.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20200116105154.7685-11-faiz_abbas@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Faiz Abbas [Thu, 16 Jan 2020 10:51:53 +0000 (16:21 +0530)]
mmc: sdhci-omap: Add am335x and am437x specific compatibles
Add support for new compatible for TI's am335x and am437x devices.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20200116105154.7685-10-faiz_abbas@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Faiz Abbas [Thu, 16 Jan 2020 10:51:52 +0000 (16:21 +0530)]
dt-bindings: sdhci-omap: Add am335x and am437x specific bindings
Add binding for the TI's sdhci-omap controller present in am335x and
am437x devices.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200116105154.7685-9-faiz_abbas@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Faiz Abbas [Thu, 16 Jan 2020 10:51:51 +0000 (16:21 +0530)]
mmc: sdhci-omap: Disable data timeout interrupt during erase
Disable data timeout interrupt during an erase operation.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20200116105154.7685-8-faiz_abbas@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Faiz Abbas [Thu, 16 Jan 2020 10:51:50 +0000 (16:21 +0530)]
mmc: sdhci: Refactor sdhci_set_timeout()
Refactor sdhci_set_timeout() such that platform drivers can do some
functionality in a set_timeout() callback and then call
__sdhci_set_timeout() to complete the operation.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20200116105154.7685-7-faiz_abbas@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Faiz Abbas [Thu, 16 Jan 2020 10:51:49 +0000 (16:21 +0530)]
mmc: sdhci: Convert sdhci_set_timeout_irq() to non-static
Export sdhci_set_timeout_irq() so that it is accessible from platform drivers.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20200116105154.7685-6-faiz_abbas@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Chunyan Zhang [Thu, 16 Jan 2020 10:51:48 +0000 (16:21 +0530)]
mmc: sdhci-omap: Add using external dma
sdhci-omap can support both external dma controller via dmaengine framework
as well as ADMA which standard SD host controller provides.
Fixes by Faiz Abbas <fazi_abbas@ti.com>:
1. Switch to DMA slave mode when using external DMA
2. Add offset to mapbase
Signed-off-by: Chunyan Zhang <zhang.chunyan@linaro.org>
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20200116105154.7685-5-faiz_abbas@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Chunyan Zhang [Thu, 16 Jan 2020 10:51:47 +0000 (16:21 +0530)]
mmc: sdhci: add support for using external DMA devices
Some standard SD host controllers can support both external dma
controllers as well as ADMA/SDMA in which the SD host controller
acts as DMA master. TI's omap controller is the case as an example.
Currently the generic SDHCI code supports ADMA/SDMA integrated in
the host controller but does not have any support for external DMA
controllers implemented using dmaengine, meaning that custom code is
needed for any systems that use an external DMA controller with SDHCI.
Fixes by Faiz Abbas <faiz_abbas@ti.com>:
1. Map scatterlists before dmaengine_prep_slave_sg()
2. Use dma_async() functions inside of the send_command() path and call
terminate_sync() in non-atomic context in case of an error.
Signed-off-by: Chunyan Zhang <zhang.chunyan@linaro.org>
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20200116105154.7685-4-faiz_abbas@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Faiz Abbas [Thu, 16 Jan 2020 10:51:46 +0000 (16:21 +0530)]
mmc: sdhci: Factor out some operations set to their own functions
In preparation for adding external dma support, factor out data initialization,
block info and mrq_done to their own functions.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Tested-by: Baolin Wang <baolin.wang7@gmail.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20200116105154.7685-3-faiz_abbas@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Chunyan Zhang [Thu, 16 Jan 2020 10:51:45 +0000 (16:21 +0530)]
dt-bindings: sdhci-omap: Add properties for using external dma
sdhci-omap can support both external dma controller via dmaengine
framework as well as ADMA which standard SD host controller
provides. Add binding documentation for these external dma properties.
Signed-off-by: Chunyan Zhang <zhang.chunyan@linaro.org>
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200116105154.7685-2-faiz_abbas@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Anson Huang [Mon, 13 Jan 2020 05:33:17 +0000 (13:33 +0800)]
dt-bindings: mmc: fsl-imx-esdhc: add i.MX8MP compatible string
Add compatible string for imx8mp
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1578893602-14395-2-git-send-email-Anson.Huang@nxp.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Michał Mirosław [Tue, 7 Jan 2020 09:47:34 +0000 (10:47 +0100)]
mmc: tegra: fix SDR50 tuning override
Commit
7ad2ed1dfcbe inadvertently mixed up a quirk flag's name and
broke SDR50 tuning override. Use correct NVQUIRK_ name.
Fixes: 7ad2ed1dfcbe ("mmc: tegra: enable UHS-I modes")
Cc: <stable@vger.kernel.org>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Link: https://lore.kernel.org/r/9aff1d859935e59edd81e4939e40d6c55e0b55f6.1578390388.git.mirq-linux@rere.qmqm.pl
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Michał Mirosław [Thu, 2 Jan 2020 10:42:16 +0000 (11:42 +0100)]
mmc: sdhci-of-at91: fix memleak on clk_get failure
sdhci_alloc_host() does its work not using managed infrastructure, so
needs explicit free on error path. Add it where needed.
Cc: <stable@vger.kernel.org>
Fixes: bb5f8ea4d514 ("mmc: sdhci-of-at91: introduce driver for the Atmel SDMMC")
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/b2a44d5be2e06ff075f32477e466598bb0f07b36.1577961679.git.mirq-linux@rere.qmqm.pl
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Ulf Hansson [Thu, 16 Jan 2020 11:37:26 +0000 (12:37 +0100)]
Merge branch 'fixes' into next
Faiz Abbas [Wed, 8 Jan 2020 14:33:01 +0000 (20:03 +0530)]
mmc: sdhci_am654: Fix Command Queuing in AM65x
Command Queuing was enabled completely for J721e controllers which lead
to partial enablement even for Am65x. Complete CQ implementation for
AM65x by adding the irq callback.
Fixes: f545702b74f9 ("mmc: sdhci_am654: Add Support for Command Queuing Engine to J721E")
Cc: stable@vger.kernel.org
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20200108143301.1929-4-faiz_abbas@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Faiz Abbas [Wed, 8 Jan 2020 14:33:00 +0000 (20:03 +0530)]
mmc: sdhci_am654: Reset Command and Data line after tuning
The tuning data is leftover in the buffer after tuning. This can cause
issues in future data commands, especially with CQHCI. Reset the command
and data lines after tuning to continue from a clean state.
Fixes: 41fd4caeb00b ("mmc: sdhci_am654: Add Initial Support for AM654 SDHCI driver")
Cc: stable@vger.kernel.org
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20200108143301.1929-3-faiz_abbas@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Faiz Abbas [Wed, 8 Jan 2020 14:32:59 +0000 (20:02 +0530)]
mmc: sdhci_am654: Remove Inverted Write Protect flag
The MMC/SD controllers on am65x and j721e don't in fact detect the write
protect line as inverted. No issues were detected because of this
because the sdwp line is not connected on any of the evms. Fix this by
removing the flag.
Fixes: 1accbced1c32 ("mmc: sdhci_am654: Add Support for 4 bit IP on J721E")
Cc: stable@vger.kernel.org
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20200108143301.1929-2-faiz_abbas@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Yangbo Lu [Wed, 8 Jan 2020 04:07:13 +0000 (12:07 +0800)]
mmc: sdhci-of-esdhc: fix clock setting for different controller versions
This patch is to fix clock setting code for different controller
versions. Two of HW changes after vendor version 2.2 are removing
PEREN/HCKEN/IPGEN bits in system control register, and adding SD
clock stable bit in present state register. This patch cleans up
related code too.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Link: https://lore.kernel.org/r/20200108040713.38888-2-yangbo.lu@nxp.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Yangbo Lu [Wed, 8 Jan 2020 04:07:12 +0000 (12:07 +0800)]
mmc: sdhci-of-esdhc: fix esdhc_reset() for different controller versions
This patch is to fix operating in esdhc_reset() for different
controller versions, and to add bus-width restoring after data
reset for eSDHC (verdor version <= 2.2).
Also add annotation for understanding.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20200108040713.38888-1-yangbo.lu@nxp.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Yangbo Lu [Thu, 12 Dec 2019 07:52:19 +0000 (15:52 +0800)]
mmc: sdhci-of-esdhc: update tuning erratum A-008171
There is an official update for eSDHC tuning erratum A-008171.
This patch is to implement the changes,
- Affect all revisions of SoC.
- Changes for tuning window checking.
- Hardware hits a new condition that tuning succeeds although
the eSDHC might not have tuned properly for type2 SoCs
(soc_tuning_erratum_type2[] array in driver). So check
tuning window after tuning succeeds.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20191212075219.48625-2-yangbo.lu@nxp.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Yangbo Lu [Thu, 12 Dec 2019 07:52:18 +0000 (15:52 +0800)]
mmc: sdhci-of-esdhc: convert to use esdhc_tuning_window_ptr()
Convert to use a new function esdhc_tuning_window_ptr() to
get tuning window start point and end point.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20191212075219.48625-1-yangbo.lu@nxp.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Peter Ujfalusi [Tue, 17 Dec 2019 12:22:54 +0000 (14:22 +0200)]
mmc: bcm2835: Use dma_request_chan() instead dma_request_slave_channel()
dma_request_slave_channel() is a wrapper on top of dma_request_chan()
eating up the error code.
By using dma_request_chan() directly the driver can support deferred
probing against DMA.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Reviewed-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Link: https://lore.kernel.org/r/20191217122254.7103-1-peter.ujfalusi@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Peter Ujfalusi [Tue, 17 Dec 2019 11:31:14 +0000 (13:31 +0200)]
mmc: usdhi6rol0: Use dma_request_chan() instead dma_request_slave_channel()
dma_request_slave_channel() is a wrapper on top of dma_request_chan()
eating up the error code.
By using dma_request_chan() directly the driver can support deferred
probing against DMA if needed.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Link: https://lore.kernel.org/r/20191217113114.32085-1-peter.ujfalusi@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Peter Ujfalusi [Tue, 17 Dec 2019 11:30:31 +0000 (13:30 +0200)]
mmc: sh_mmcif: Use dma_request_chan() instead dma_request_slave_channel()
dma_request_slave_channel() is a wrapper on top of dma_request_chan()
eating up the error code.
By using dma_request_chan() directly the driver can support deferred
probing against DMA if needed.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Link: https://lore.kernel.org/r/20191217113031.31847-1-peter.ujfalusi@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Peter Ujfalusi [Tue, 17 Dec 2019 11:30:04 +0000 (13:30 +0200)]
mmc: pxamci: Use dma_request_chan() instead dma_request_slave_channel()
dma_request_slave_channel() is a wrapper on top of dma_request_chan()
eating up the error code.
By using dma_request_chan() directly the driver can support deferred
probing against DMA.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Link: https://lore.kernel.org/r/20191217113004.31688-1-peter.ujfalusi@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Peter Ujfalusi [Tue, 17 Dec 2019 11:29:34 +0000 (13:29 +0200)]
mmc: owl-mmc: Use dma_request_chan() instead dma_request_slave_channel()
dma_request_slave_channel() is a wrapper on top of dma_request_chan()
eating up the error code.
By using dma_request_chan() directly the driver can support deferred
probing against DMA.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Link: https://lore.kernel.org/r/20191217112934.31535-1-peter.ujfalusi@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Peter Ujfalusi [Tue, 17 Dec 2019 11:28:47 +0000 (13:28 +0200)]
mmc: mxs: Use dma_request_chan() instead dma_request_slave_channel()
dma_request_slave_channel() is a wrapper on top of dma_request_chan()
eating up the error code.
By using dma_request_chan() directly the driver can support deferred
probing against DMA.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Link: https://lore.kernel.org/r/20191217112847.31351-1-peter.ujfalusi@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Peter Ujfalusi [Tue, 17 Dec 2019 11:28:03 +0000 (13:28 +0200)]
mmc: mxcmmc: Use dma_request_chan() instead dma_request_slave_channel()
dma_request_slave_channel() is a wrapper on top of dma_request_chan()
eating up the error code.
By using dma_request_chan() directly the driver can support deferred
probing against DMA.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Link: https://lore.kernel.org/r/20191217112803.31161-1-peter.ujfalusi@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Peter Ujfalusi [Tue, 17 Dec 2019 11:27:37 +0000 (13:27 +0200)]
mmc: mmci: Use dma_request_chan() instead dma_request_slave_channel()
dma_request_slave_channel() is a wrapper on top of dma_request_chan()
eating up the error code.
By using dma_request_chan() directly the driver can support deferred
probing against DMA.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Link: https://lore.kernel.org/r/20191217112737.31024-1-peter.ujfalusi@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Peter Ujfalusi [Tue, 17 Dec 2019 11:26:56 +0000 (13:26 +0200)]
mmc: dw_mmc: Use dma_request_chan() instead dma_request_slave_channel()
dma_request_slave_channel() is a wrapper on top of dma_request_chan()
eating up the error code.
By using dma_request_chan() directly the driver can support deferred
probing against DMA.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Link: https://lore.kernel.org/r/20191217112656.30860-1-peter.ujfalusi@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Ulf Hansson [Thu, 19 Dec 2019 07:15:58 +0000 (08:15 +0100)]
Merge branch 'fixes' into next
Yangbo Lu [Thu, 19 Dec 2019 03:23:35 +0000 (11:23 +0800)]
mmc: sdhci-of-esdhc: re-implement erratum A-009204 workaround
The erratum A-009204 workaround patch was reverted because of
incorrect implementation.
8b6dc6b mmc: sdhci-of-esdhc: Revert "mmc: sdhci-of-esdhc: add
erratum A-009204 support"
This patch is to re-implement the workaround (add a 5 ms delay
before setting SYSCTL[RSTD] to make sure all the DMA transfers
are finished).
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Link: https://lore.kernel.org/r/20191219032335.26528-1-yangbo.lu@nxp.com
Fixes: 5dd195522562 ("mmc: sdhci-of-esdhc: add erratum A-009204 support")
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Linus Walleij [Tue, 17 Dec 2019 14:39:52 +0000 (15:39 +0100)]
mmc: mmci: Support any block sizes for ux500v2 and qcom variant
For the ux500v2 variant of the PL18x block, any block sizes
are supported. This is necessary to support some SDIO
transfers. This also affects the QCOM MMCI variant and the
ST micro variant.
For Ux500 an additional quirk only allowing DMA on blocks
that are a power of two is needed. This might be a bug in
the DMA engine (DMA40) or the MMCI or in the interconnect,
but the most likely is the MMCI, as transfers of these
sizes work fine for other devices using the same DMA
engine. DMA works fine also with SDIO as long as the
blocksize is a power of 2.
This patch has proven necessary for enabling SDIO for WLAN on
PostmarketOS-based Ux500 platforms.
What we managed to test in practice is Broadcom WiFi over
SDIO on the Ux500 based Samsung GT-I8190 and GT-S7710.
This WiFi chip, BCM4334 works fine after the patch.
Before this patch:
brcmfmac: brcmf_fw_alloc_request: using brcm/brcmfmac4334-sdio
for chip BCM4334/3
mmci-pl18x
80118000.sdi1_per2: unsupported block size (60 bytes)
brcmfmac: brcmf_sdiod_ramrw: membytes transfer failed
brcmfmac: brcmf_sdio_download_code_file: error -22 on writing
434236 membytes at 0x00000000
brcmfmac: brcmf_sdio_download_firmware: dongle image file download
failed
After this patch:
brcmfmac: brcmf_c_preinit_dcmds: Firmware: BCM4334/3 wl0:
Nov 21 2012 00:21:28 version 6.10.58.813 (B2) FWID 01-0
Bringing up networks, discovering networks with "iw dev wlan0 scan"
and connecting works fine from this point.
This patch is inspired by Ulf Hansson's patch
http://www.spinics.net/lists/linux-mmc/msg12160.html
As the DMA engines on these platforms may now get block sizes
they were not used to before, make sure to also respect if
the DMA engine says "no" to a transfer.
Make a drive-by fix for datactrl_blocksz, misspelled.
Cc: Ludovic Barre <ludovic.barre@st.com>
Cc: Brian Masney <masneyb@onstation.org>
Cc: Stephan Gerhold <stephan@gerhold.net>
Cc: Niklas Cassel <niklas.cassel@linaro.org>
Cc: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191217143952.2885-1-linus.walleij@linaro.org
Yangtao Li [Sun, 15 Dec 2019 17:51:20 +0000 (17:51 +0000)]
mmc: au1xmmc: switch to platform_get_irq
platform_get_resource(pdev, IORESOURCE_IRQ) is not recommended for
requesting IRQ's resources, as they can be not ready yet. Using
platform_get_irq() instead is preferred for getting IRQ even if it
was not retrieved earlier.
Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
Link: https://lore.kernel.org/r/20191215175120.3290-13-tiny.windzz@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Yangtao Li [Sun, 15 Dec 2019 17:51:19 +0000 (17:51 +0000)]
mmc: mtk-sd: convert to devm_platform_ioremap_resource
Use devm_platform_ioremap_resource() to simplify code.
Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
Link: https://lore.kernel.org/r/20191215175120.3290-12-tiny.windzz@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Yangtao Li [Sun, 15 Dec 2019 17:51:18 +0000 (17:51 +0000)]
mmc: mvsdio: convert to devm_platform_ioremap_resource
Use devm_platform_ioremap_resource() to simplify code.
Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
Link: https://lore.kernel.org/r/20191215175120.3290-11-tiny.windzz@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Yangtao Li [Sun, 15 Dec 2019 17:51:17 +0000 (17:51 +0000)]
mmc: sdhci-msm: convert to devm_platform_ioremap_resource
Use devm_platform_ioremap_resource() to simplify code.
Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20191215175120.3290-10-tiny.windzz@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Yangtao Li [Sun, 15 Dec 2019 17:51:16 +0000 (17:51 +0000)]
mmc: sdhci-milbeaut: convert to devm_platform_ioremap_resource
Use devm_platform_ioremap_resource() to simplify code.
Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
Link: https://lore.kernel.org/r/20191215175120.3290-9-tiny.windzz@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Yangtao Li [Sun, 15 Dec 2019 17:51:15 +0000 (17:51 +0000)]
mmc: sdhci_am654: convert to devm_platform_ioremap_resource
Use devm_platform_ioremap_resource() to simplify code.
Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
Link: https://lore.kernel.org/r/20191215175120.3290-8-tiny.windzz@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Yangtao Li [Sun, 15 Dec 2019 17:51:14 +0000 (17:51 +0000)]
mmc: sdhci_f_sdh30: convert to devm_platform_ioremap_resource
Use devm_platform_ioremap_resource() to simplify code.
Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
Link: https://lore.kernel.org/r/20191215175120.3290-7-tiny.windzz@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Yangtao Li [Sun, 15 Dec 2019 17:51:13 +0000 (17:51 +0000)]
mmc: sh_mmcif: convert to devm_platform_ioremap_resource
Use devm_platform_ioremap_resource() to simplify code.
Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20191215175120.3290-6-tiny.windzz@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Yangtao Li [Sun, 15 Dec 2019 17:51:12 +0000 (17:51 +0000)]
mmc: sdhci-spear: convert to devm_platform_ioremap_resource
Use devm_platform_ioremap_resource() to simplify code.
Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
Link: https://lore.kernel.org/r/20191215175120.3290-5-tiny.windzz@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Yangtao Li [Sun, 15 Dec 2019 17:51:11 +0000 (17:51 +0000)]
mmc: sdhci-s3c: convert to devm_platform_ioremap_resource
Use devm_platform_ioremap_resource() to simplify code.
Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
Link: https://lore.kernel.org/r/20191215175120.3290-4-tiny.windzz@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Yangtao Li [Sun, 15 Dec 2019 17:51:10 +0000 (17:51 +0000)]
mmc: meson-mx-sdio: convert to devm_platform_ioremap_resource
Use devm_platform_ioremap_resource() to simplify code.
Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
Link: https://lore.kernel.org/r/20191215175120.3290-3-tiny.windzz@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Yangtao Li [Sun, 15 Dec 2019 17:51:09 +0000 (17:51 +0000)]
mmc: tmio: convert to devm_platform_ioremap_resource
Use devm_platform_ioremap_resource() to simplify code.
Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20191215175120.3290-2-tiny.windzz@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Yangtao Li [Sun, 15 Dec 2019 17:51:08 +0000 (17:51 +0000)]
mmc: sunxi-mmc: convert to devm_platform_ioremap_resource
Use devm_platform_ioremap_resource() to simplify code.
Signed-off-by: Yangtao Li <tiny.windzz@gmail.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Link: https://lore.kernel.org/r/20191215175120.3290-1-tiny.windzz@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Ulf Hansson [Wed, 18 Dec 2019 13:44:24 +0000 (14:44 +0100)]
Merge branch 'fixes' into next
Adrian Hunter [Tue, 17 Dec 2019 09:53:49 +0000 (11:53 +0200)]
mmc: sdhci: Add a quirk for broken command queuing
Command queuing has been reported broken on some systems based on Intel
GLK. A separate patch disables command queuing in some cases.
This patch adds a quirk for broken command queuing, which enables users
with problems to disable command queuing using sdhci module parameters for
quirks.
Fixes: 8ee82bda230f ("mmc: sdhci-pci: Add CQHCI support for Intel GLK")
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20191217095349.14592-2-adrian.hunter@intel.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Adrian Hunter [Tue, 17 Dec 2019 09:53:48 +0000 (11:53 +0200)]
mmc: sdhci: Workaround broken command queuing on Intel GLK
Command queuing has been reported broken on some Lenovo systems based on
Intel GLK. This is likely a BIOS issue, so disable command queuing for
Intel GLK if the BIOS vendor string is "LENOVO".
Fixes: 8ee82bda230f ("mmc: sdhci-pci: Add CQHCI support for Intel GLK")
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20191217095349.14592-1-adrian.hunter@intel.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Yangbo Lu [Mon, 16 Dec 2019 09:19:11 +0000 (17:19 +0800)]
mmc: sdhci-of-esdhc: use 1/2 periperhal clock for ls1088a
The eSDHC on LS1088A platform uses 1/2 peripheral clock as base
clock.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Link: https://lore.kernel.org/r/20191216091911.14840-1-yangbo.lu@nxp.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Yangbo Lu [Mon, 16 Dec 2019 03:18:42 +0000 (11:18 +0800)]
mmc: sdhci-of-esdhc: fix P2020 errata handling
Two previous patches introduced below quirks for P2020 platforms.
- SDHCI_QUIRK_RESET_AFTER_REQUEST
- SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
The patches made a mistake to add them in quirks2 of sdhci_host
structure, while they were defined for quirks.
host->quirks2 |= SDHCI_QUIRK_RESET_AFTER_REQUEST;
host->quirks2 |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL;
This patch is to fix them.
host->quirks |= SDHCI_QUIRK_RESET_AFTER_REQUEST;
host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL;
Fixes: 05cb6b2a66fa ("mmc: sdhci-of-esdhc: add erratum eSDHC-A001 and A-008358 support")
Fixes: a46e42712596 ("mmc: sdhci-of-esdhc: add erratum eSDHC5 support")
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20191216031842.40068-1-yangbo.lu@nxp.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Ludovic Barre [Wed, 11 Dec 2019 13:39:34 +0000 (14:39 +0100)]
mmc: mmci: add threaded irq to abort DPSM of non-functional state
The stm32_sdmmc variant has build-in support for datatimeout for R1B
requests. If a corresponding IRQ is raised, this triggers the DPSM to stay
busy and remains in a non-functional state. Only a reset can bring it back
to a functional state.
Because a reset must be issued from non-atomic context, let's defer this to
be managed from a threaded IRQ handler. Besides the reset, the threaded
handler also calls mmc_request_done(), to finally complete the request.
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Link: https://lore.kernel.org/r/20191211133934.16932-1-ludovic.Barre@st.com
[Ulf: A few minor updates to the changelog/comments]
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Michał Mirosław [Wed, 11 Dec 2019 02:40:56 +0000 (03:40 +0100)]
mmc: core: Remove mmc_gpiod_request_*(invert_gpio)
Now that invert_gpio arguments are unused, let's remove them.
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Link: https://lore.kernel.org/r/64d766d1f8af2e22bce32f4ffa453f7234207ad6.1576031637.git.mirq-linux@rere.qmqm.pl
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Michał Mirosław [Wed, 11 Dec 2019 02:40:56 +0000 (03:40 +0100)]
mmc: core: Rework cd-gpio handling
There are a few places around the code that invert inverted and possibly
inverted CD line. That's really confusing. Squash them all into one place
in mmc_gpiod_request_cd(). MMC_CAP2_CD_ACTIVE_HIGH is used analogously to
WP line: in GPIO mode it is used only at probe time to switch polarity, for
native mode it is left as is.
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Link: https://lore.kernel.org/r/db189b715596d63caf8c6a088bddc71dd69a879b.1576031637.git.mirq-linux@rere.qmqm.pl
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Michał Mirosław [Wed, 11 Dec 2019 02:40:55 +0000 (03:40 +0100)]
mmc: core: Rework wp-gpio handling
Use MMC_CAP2_RO_ACTIVE_HIGH flag as indicator if GPIO line is to be
inverted compared to DT/platform-specified polarity. The flag is not used
after init in GPIO mode anyway. No functional changes intended.
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Link: https://lore.kernel.org/r/a60f563f11bbff821da2fa2949ca82922b144860.1576031637.git.mirq-linux@rere.qmqm.pl
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Michał Mirosław [Wed, 11 Dec 2019 02:40:55 +0000 (03:40 +0100)]
gpio: add gpiod_toggle_active_low()
Add possibility to toggle active-low flag of a gpio descriptor. This is
useful for compatibility code, where defaults are inverted vs DT gpio
flags or the active-low flag is taken from elsewhere.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Link: https://lore.kernel.org/r/7ce0338e01ad17fa5a227176813941b41a7c35c1.1576031637.git.mirq-linux@rere.qmqm.pl
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Michał Mirosław [Mon, 9 Dec 2019 18:37:05 +0000 (19:37 +0100)]
mmc: sdhci-s3c: remove unused ext_cd_gpio field
Signed-off-by: Michał Mirosław <mirq-linux@rere.qmqm.pl>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/3f12c2deaae9e77a5e7ab8415db7751a27bc3b98.1575916477.git.mirq-linux@rere.qmqm.pl
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Chuhong Yuan [Fri, 6 Dec 2019 07:54:08 +0000 (15:54 +0800)]
mmc: cavium: Add missed pci_release_regions
The driver forgets to call pci_release_regions() in probe failure
and remove.
Add the missed calls to fix it.
Signed-off-by: Chuhong Yuan <hslester96@gmail.com>
Link: https://lore.kernel.org/r/20191206075408.18355-1-hslester96@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Ulf Hansson [Mon, 16 Dec 2019 12:02:35 +0000 (13:02 +0100)]
Merge branch 'mmc_pinctrl' into next
Merge an immutable pinctrl branch from Linus Walleij's tree, which enables
pinctrl code consolidations for mmc.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Ulf Hansson [Fri, 6 Dec 2019 17:08:21 +0000 (18:08 +0100)]
mmc: uniphier-sd: Convert to pinctrl_select_default_state()
Let's drop the boilerplate code for managing the default pinctrl state and
convert into using the new pinctrl_select_default_state().
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20191206170821.29711-10-ulf.hansson@linaro.org
Ulf Hansson [Fri, 6 Dec 2019 17:08:20 +0000 (18:08 +0100)]
mmc: jz4740: Convert to pinctrl_select_default_state()
Let's move away from using pinctrl_pm_select_default_state() as it's
scheduled for removal and use pinctrl_select_default_state() instead.
Cc: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Paul Cercueil <paul@crapouillou.net>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20191206170821.29711-9-ulf.hansson@linaro.org
Ulf Hansson [Fri, 6 Dec 2019 17:08:19 +0000 (18:08 +0100)]
mmc: atmel-mci: Convert to pinctrl_select_default_state()
Let's move away from using pinctrl_pm_select_default_state() as it's
scheduled for removal and use pinctrl_select_default_state() instead.
Cc: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20191206170821.29711-8-ulf.hansson@linaro.org
Ulf Hansson [Fri, 6 Dec 2019 17:08:18 +0000 (18:08 +0100)]
mmc: sdhci-esdhc-imx: Convert to pinctrl_select_default_state()
Let's drop the boilerplate code for managing the default pinctrl state and
convert into using the new pinctrl_select_default_state().
Cc: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20191206170821.29711-7-ulf.hansson@linaro.org
Ulf Hansson [Fri, 6 Dec 2019 17:08:17 +0000 (18:08 +0100)]
mmc: omap_hsmmc: Convert to pinctrl_select_default_state()
Let's drop the boilerplate code for managing the default pinctrl state and
convert into using the new pinctrl_select_default_state().
Additionally, move away from using pinctrl_pm_select_default_state() as
it's scheduled for removal and use pinctrl_select_default_state() instead.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20191206170821.29711-6-ulf.hansson@linaro.org
Ulf Hansson [Fri, 6 Dec 2019 17:08:16 +0000 (18:08 +0100)]
mmc: usdhi6rol0: Convert to pinctrl_select_default_state()
Let's drop the boilerplate code for managing the default pinctrl state and
convert into using the new pinctrl_select_default_state().
Cc: Jesper Nilsson <jesper.nilsson@axis.com>
Cc: Lars Persson <lars.persson@axis.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20191206170821.29711-5-ulf.hansson@linaro.org
Ulf Hansson [Fri, 6 Dec 2019 17:08:15 +0000 (18:08 +0100)]
mmc: mmci: Convert to pinctrl_select_default_state()
Let's drop the boilerplate code for managing the default pinctrl state and
convert into using the new pinctrl_select_default_state().
Additionally, move away from using pinctrl_pm_select_default_state() as
it's scheduled for removal and use pinctrl_select_default_state() instead.
Cc: Russell King <linux@armlinux.org.uk>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20191206170821.29711-4-ulf.hansson@linaro.org
Ulf Hansson [Fri, 6 Dec 2019 17:08:14 +0000 (18:08 +0100)]
mmc: meson-gx: Convert to pinctrl_select_default_state()
Let's drop the boilerplate code for managing the default pinctrl state and
convert into using the new pinctrl_select_default_state().
Cc: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20191206170821.29711-3-ulf.hansson@linaro.org
Ulf Hansson [Mon, 16 Dec 2019 11:30:17 +0000 (12:30 +0100)]
Merge branch 'fixes' into next
Faiz Abbas [Fri, 6 Dec 2019 11:43:26 +0000 (17:13 +0530)]
mmc: sdhci: Update the tuning failed messages to pr_debug level
Tuning support in DDR50 speed mode was added in SD Specifications Part1
Physical Layer Specification v3.01. Its not possible to distinguish
between v3.00 and v3.01 from the SCR and that is why since
commit
4324f6de6d2e ("mmc: core: enable CMD19 tuning for DDR50 mode")
tuning failures are ignored in DDR50 speed mode.
Cards compatible with v3.00 don't respond to CMD19 in DDR50 and this
error gets printed during enumeration and also if retune is triggered at
any time during operation. Update the printk level to pr_debug so that
these errors don't lead to false error reports.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Cc: stable@vger.kernel.org # v4.4+
Link: https://lore.kernel.org/r/20191206114326.15856-1-faiz_abbas@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Geert Uytterhoeven [Thu, 5 Dec 2019 13:43:48 +0000 (14:43 +0100)]
dt-bindings: mmc: renesas_sdhi: Document r8a77961 support
Document support for the SDHI controller in the Renesas R-Car M3-W+
(R8A77961) SoC.
Update all references to R-Car M3-W from "r8a7796" to "r8a77960", to
avoid confusion between R-Car M3-W (R8A77960) and M3-W+.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20191205134349.6410-2-geert+renesas@glider.be
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Wolfram Sang [Tue, 3 Dec 2019 20:05:13 +0000 (21:05 +0100)]
mmc: renesas_sdhi: use recent tap values for HS400
New datasheets require different and new values for HS400 with 4taps or
8taps.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20191203200513.1758-6-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Wolfram Sang [Tue, 3 Dec 2019 20:05:12 +0000 (21:05 +0100)]
mmc: renesas_sdhi: remove 4taps as a TMIO flag
Now that the quirks structure is accessible, we can remove the TMIO flag
for HS400 using only 4 taps. This is Renesas specific anyhow.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20191203200513.1758-5-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Wolfram Sang [Tue, 3 Dec 2019 20:05:11 +0000 (21:05 +0100)]
mmc: renesas_sdhi: make quirks info accessible outside probe()
We will need that for a later patch.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20191203200513.1758-4-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Wolfram Sang [Tue, 3 Dec 2019 20:05:10 +0000 (21:05 +0100)]
mmc: renesas_sdhi: make warning more precise
The warning is not solely used for SDR104 anymore, but for all which
require tuning.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20191203200513.1758-3-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Wolfram Sang [Tue, 3 Dec 2019 20:05:09 +0000 (21:05 +0100)]
mmc: renesas_sdhi: keep sorting for quirk entries
The two devices next to each other are super similar, but still, let's
keep the alphanumeric sorting for easier additions later.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20191203200513.1758-2-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Wolfram Sang [Tue, 3 Dec 2019 19:48:59 +0000 (20:48 +0100)]
mmc: renesas_sdhi: remove whitelist for internal DMAC
We know now that there won't be Gen3 SoCs with both, SYS-DMAC and
internal DMAC. We removed the blacklisting for SYS-DMAC already, so we
can remove the whitelisting for internal DMAC, too. This makes adding
new SoCs easier. We keep the quirk handling, of course.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20191203194859.917-1-wsa@the-dreams.de
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Yangbo Lu [Thu, 14 Nov 2019 11:18:14 +0000 (19:18 +0800)]
mmc: sdhci: fix up CMD12 sending
The STOP command is disabled for multiple blocks r/w commands
with auto CMD12, when start to send. However, if there is data
error, software still needs to send CMD12 according to SD spec.
This patch is to allow software CMD12 sending for this case.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20191114111814.35199-1-yangbo.lu@nxp.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Linus Walleij [Wed, 4 Dec 2019 15:27:49 +0000 (16:27 +0100)]
mmc: spi: Toggle SPI polarity, do not hardcode it
The code in mmc_spi_initsequence() tries to send a burst with
high chipselect and for this reason hardcodes the device into
SPI_CS_HIGH.
This is not good because the SPI_CS_HIGH flag indicates
logical "asserted" CS not always the physical level. In
some cases the signal is inverted in the GPIO library and
in that case SPI_CS_HIGH is already set, and enforcing
SPI_CS_HIGH again will actually drive it low.
Instead of hard-coding this, toggle the polarity so if the
default is LOW it goes high to assert chipselect but if it
is already high then toggle it low instead.
Cc: Phil Elwell <phil@raspberrypi.org>
Reported-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20191204152749.12652-1-linus.walleij@linaro.org
Cc: stable@vger.kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Ludovic Desroches [Thu, 28 Nov 2019 07:45:21 +0000 (08:45 +0100)]
mmc: sdhci-of-at91: rework clocks management to support SAM9x60 device
In the SAM9x60 SoC, there are only two clocks instead of three for the
SDHCI device. The base clk is no longer provided, it is generated
internally from the mult clk.
The values of the base clk and mul in the capabilities registers may not
reflect the reality as the mult clk is a programmable clock which can take
several rates. As we can't trust those values, take them from the clock
tree and update the capabilities according to.
As we can have the same pitfall, in some cases, with the SAMA5D2 Soc,
stop relying on capabilities too.
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20191128074522.69706-2-ludovic.desroches@microchip.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Ludovic Desroches [Thu, 28 Nov 2019 07:45:20 +0000 (08:45 +0100)]
dt-bindings: sdhci-of-at91: new compatible string and update properties
There is a new compatible string for the SAM9X60 sdhci device. It involves
an update of the properties about the clocks stuff.
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20191128074522.69706-1-ludovic.desroches@microchip.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Veerabhadrarao Badiganti [Wed, 27 Nov 2019 11:49:59 +0000 (11:49 +0000)]
dt-bindings: mmc: sdhci-msm: Add compatible string for sc7180
Add sc7180 SoC specific compatible strings for qcom-sdhci controller.
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/0101016eacb255af-3985262d-9b7e-4813-88c2-61838406e12c-000000@us-west-2.amazonses.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Faiz Abbas [Fri, 6 Dec 2019 11:43:26 +0000 (17:13 +0530)]
mmc: sdhci: Update the tuning failed messages to pr_debug level
Tuning support in DDR50 speed mode was added in SD Specifications Part1
Physical Layer Specification v3.01. Its not possible to distinguish
between v3.00 and v3.01 from the SCR and that is why since
commit
4324f6de6d2e ("mmc: core: enable CMD19 tuning for DDR50 mode")
tuning failures are ignored in DDR50 speed mode.
Cards compatible with v3.00 don't respond to CMD19 in DDR50 and this
error gets printed during enumeration and also if retune is triggered at
any time during operation. Update the printk level to pr_debug so that
these errors don't lead to false error reports.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Cc: stable@vger.kernel.org # v4.4+
Link: https://lore.kernel.org/r/20191206114326.15856-1-faiz_abbas@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Rasmus Villemoes [Wed, 4 Dec 2019 08:54:46 +0000 (09:54 +0100)]
mmc: sdhci-of-esdhc: Revert "mmc: sdhci-of-esdhc: add erratum A-009204 support"
This reverts commit
5dd195522562542bc6ebe6e7bd47890d8b7ca93c.
First, the fix seems to be plain wrong, since the erratum suggests
waiting 5ms before setting setting SYSCTL[RSTD], but this msleep()
happens after the call of sdhci_reset() which is where that bit gets
set (if SDHCI_RESET_DATA is in mask).
Second, walking the whole device tree to figure out if some node has a
"fsl,p2020-esdhc" compatible string is hugely expensive - about 70 to
100 us on our mpc8309 board. Walking the device tree is done under a
raw_spin_lock, so this is obviously really bad on an -rt system, and a
waste of time on all.
In fact, since esdhc_reset() seems to get called around 100 times per
second, that mpc8309 now spends 0.8% of its time determining that
it is not a p2020. Whether those 100 calls/s are normal or due to some
other bug or misconfiguration, regularly hitting a 100 us
non-preemptible window is unacceptable.
Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20191204085447.27491-1-linux@rasmusvillemoes.dk
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
projects / platform / kernel / linux-rpi.git / log