mxs: Reowork SPL to use 'mxs' prefix for methods

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>

mxs: prefix register structs with 'mxs' prefix

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>

mxs: prefix register acessor macros with 'mxs' prefix

As the register accessing mode is the same for all i.MXS SoCs we ought
to use 'mxs' prefix intead of 'mx28'.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>

mxs: reorganize source directory for easy sharing of code in i.MXS SoCs

Most code can be shared between i.MX23 and i.MX28 as both are from
i.MXS family; this source directory structure makes easy to share code
among them.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Stefano Babic <sbabic@denx.de>

mx28evk: Turn on caches

Turn on data and instruction caches.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

MX28: use a clear name for DDR2 initialization

The mx28 prefix has been added to the initialization data and function
so it is clear by which SoC it is used as i.MX233 will have a specific
one. While on that, we also change it to static.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Marek Vasut <marex@denx.de>

Add support for Bluegiga APX4 Development Kit

This adds support for Bluegiga APX4 Development Kit. It is built around
Freescale i.MX28. Currently supported features are: ethernet, I2C, MMC,
RTC and USB. APX4 has only one ethernet port.

Signed-off-by: Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com>
Signed-off-by: Lauri Hintsala <lauri.hintsala@bluegiga.com>
Cc: Stefano Babic <sbabic@denx.de>

MX28: extend print_cpuinfo() to use chip information

The information now is gathered from HW_DIGCTL_CHIPID register and
includes the chip modem and revision on the output.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>

MX28: SPI: Add DMA transfer support

The DMA transfers happen only if the transfered data are larger
than 512 bytes. Otherwise PIO is used. This is a small speed
optimization.

The DMA transfer doesn't work if unaligned transfer is requested
due to the limitation of the DMA controller. This has to be fixed
by introducing generic bounce buffer. Therefore the DMA feature
is now disabled by default.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>

MX28: SPI: Pull out the PIO transfer function

Pull out all the PIO transfer logic into separate function,
so DMA can be added.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>

MX28: SPI: Refactor spi_xfer a bit

This makes it easier to adapt for addition of DMA support.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>

imx: Use a clear identification of an unidentified CPU type

In case an unidentified CPU type is detected it now returns
i.MX??, in a const char.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>

at91: Add support for taskit AT91SAM9G20 boards.

This adds support for the AT91SAM9G20 boards by taskit GmbH.
Both boards, Stamp9G20 and PortuxG20, are integrated in one
file. PortuxG20 is basically a SBC built around the Stamp9G20.

Signed-off-by: Markus Hubig <mhubig@imko.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Andreas Bießmann <andreas.deve@googlemail.com>

Enable the EMAC clock in at91_macb_hw_init().

Signed-off-by: Markus Hubig <mhubig@imko.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

MAINTAINERS: fix Andreas Bießmann AVR32 entry

The grasshopper board is a avr32 based device and belongs therefore to the avr32
section.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

MAINTAINERS: fix entry of Ilko Iliev

These boards have ARM cores, move to the ARM section.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

arm : Atmel : add at91sam9x5ek board support

Add at91sam9x5ek board support, this board support the following SoCs
  AT91SAM9G15, AT91SAM9G25, AT91SAM9G35, AT91SAM9X25, AT91SAM9X35

Using at91sam9x5ek_nandflash to configure for the board
Now only supports NAND with software ECC boot up

Signed-off-by: Bo Shen <voice.shen@atmel.com>
[move MAINTAINERS entry to right place]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

doc/git-mailrc: update at91 and avr32

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

am335x_evm: enable SMSC PHY driver

Beaglebone uses SMSC PHY which works incorrectly with generic PHY
driver so enable SMSC PHY driver to fix networking problems on
Beaglebone.

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>

OMAP3: fix DRAM size for IGEP-based boards.

The total RAM size of the IGEP-based boards is 512MiB not 1GiB, the
LPDDR memory consist on two dies of 256MiB.

Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Tested-by: Javier Martinez Canillas <javier@dowhile0.org>

DaVinci DA8xx: fix set_cpu_clk_info()

For the DA8xx family of SoCs, the set_cpu_clk_info() function was not
initialising the DSP frequency, leading to 'bdinfo' command output such as:

  [...snip...]
  ARM frequency = 300 MHz
  DSP frequency = -536870913 MHz
  DDR frequency = 300 MHz

This commit provides a separate implementation of set_cpu_clk_info() for
the DA8xx SoCs that initialises the DSP frequency to zero (since
currently the DSP is not enabled by U-Boot on any DA8xx platform). The
separate implementation is justified because there is no common code
between DA8xx and the other SoC families. It is now much easier to
understand the flow of the two separate functions.

Signed-off-by: Laurence Withers <lwithers@guralp.com>
Cc: Tom Rini <trini@ti.com>
Cc: Hadli, Manjunath <manjunath.hadli@ti.com>
Cc: Heiko Schocher <hs@denx.de>

DaVinci DA8xx: replace magic number for DDR speed

Replace a magic number for the DDR2/mDDR PHY clock ID with a proper
definition. In addition, don't request this clock ID on DA830 hardware,
which does not have a DDR2/mDDR PHY (or associated PLL controller).

Signed-off-by: Laurence Withers <lwithers@guralp.com>
Cc: Tom Rini <trini@ti.com>
Cc: Prabhakar Lad <prabhakar.csengg@gmail.com>

DaVinci DA850: UART2 clock ID comes from ASYNC3

On the DA830, UART2's clock is derived from PLL controller 0 output 2.
On the DA850, it is in the ASYNC3 group, and may be switched between PLL
controller 0 or 1. Fix the definition of the ID to match.

Signed-off-by: Laurence Withers <lwithers@guralp.com>
Cc: Tom Rini <trini@ti.com>
Cc: Prabhakar Lad <prabhakar.csengg@gmail.com>

DaVinci DA8xx: tidy up clock ID definition

Tidy up the clock IDs defined for the DA8xx SOCs. With this new structure in
place, it is clear how to define new clock IDs, and how these map to the
numbers presented in the technical reference manual.

Signed-off-by: Laurence Withers <lwithers@guralp.com>
Cc: Tom Rini <trini@ti.com>
Cc: Prabhakar Lad <prabhakar.csengg@gmail.com>
Signed-off-by: Tom Rini <trini@ti.com>

doc/git-mailrc: Update 'ti' alias

Remove Sandeep, thanks for all the hard work!

Signed-off-by: Tom Rini <trini@ti.com>

dm: Move OMAP GPIO driver to drivers/gpio/

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: U-Boot DM <u-boot-dm@lists.denx.de>
Cc: Tom Rini <trini@ti.com>
Acked-by: Tom Rini <trini@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>

dm: Select CONFIG_SPL_GPIO_SUPPORT on OMAP

This fixes the breakage with SPL on most OMAP boards after the GPIO
driver was moved.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: U-Boot DM <u-boot-dm@lists.denx.de>
Cc: Tom Rini <trini@ti.com>
Acked-by: Tom Rini <trini@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>

am33xx: Rework pinmux functions

- Move definition of the EEPROM contents to <asm/arch/sys_proto.h>
  - Make some defines a little less generic now.
- Pinmux must be done by done by SPL now.
- Create 3 pinmux functions, uart0, i2c0 and board.
- Add pinmux specific to Starter Kit EVM for MMC now.

Signed-off-by: Tom Rini <trini@ti.com>

am33xx evm: Add CONFIG_CMD_EEPROM and related

am33xx boards have at least one eeprom and in the case of beaglebones
with capes, more.

Signed-off-by: Tom Rini <trini@ti.com>

am33xx: Add support for TI AM335x StarterKit EVM

- Board requires gpio0 #7 to be set to power DDR3.
- Board uses DDR3, add a way to determine which DDR type to call
  config_ddr with.
- Both of the above require filling in the header structure early, move
  it into the data section.

Signed-off-by: Tom Rini <trini@ti.com>

am33xx: Remove board/ti/am335x/evm.c

The intention has always been (and boards are to support) an i2c EEPROM
that will identify what hardware they are, allowing a single binary to
support multiple boards.  As such, remove the 'evm.c' file as there is
nothing EVM centric in it currently, only SoC peripheral configuration.

Signed-off-by: Tom Rini <trini@ti.com>

am33xx: Add DDR3 (Micron MT41J128M16JT-125) timings and support

Signed-off-by: Tom Rini <trini@ti.com>

am33xx: Rework config_ddr to make DDR3 support easier.

In order to support DDR3 as well as DDR2, we need to perform the same
init sequence, but with different values.  So change config_ddr() to
toggle setting pointers/etc for what DDR2 wants, and then calling.

Signed-off-by: Tom Rini <trini@ti.com>

am33xx: Move some variables in emif4.c, mark them static.

We need vtpreg and ddrctrl but no longer need a second ddrregs.

Signed-off-by: Tom Rini <trini@ti.com>

am33xx: Correct and clean up ddr_regs struct

The ddr_regs struct was incorrectly offset after the dt0wiratio0 entry.
Correct this by documenting a missing register that will be used at some
point in the future (when write leveling is supported).  Further, the
cmdNcs{force,delay} fields are undocumented and we have been setting
them to zero, remove.  Next, setting of the
'DATAn_REG_PHY_USE_RANK0_DELAYS field belongs with the rest of the
ddr_data entries, so program it there.  Finally, comment on how we are
configuring the DATA1 registers that correspond to the DATA0 (dt0)
registers defined in the struct.

Signed-off-by: Tom Rini <trini@ti.com>

am33xx: Do not touch 'ratio1' fields

The various ratio1 fields are not documented in any of the documentation
I can find.  Removing these and testing has yielded success, so remove
the code that sets them and move their locations into the reserved
fields.

Signed-off-by: Tom Rini <trini@ti.com>

am33xx: Rework config_io_ctrl slightly

This function sets a number of related registers to the same value (the
registers in question all have the same field descriptions and are
related in operation).  Rather than defining a struct and setting the
value repeatedly, just pass in the value.

Signed-off-by: Tom Rini <trini@ti.com>

am33xx: Use emif_regs struct for storing initialization values

Rather than defining our own structs to note what to use when
programming the EMIF and related re-use the emif_regs struct.

Signed-off-by: Tom Rini <trini@ti.com>

am33xx: Turn a number of 'int' functions to 'void'

A number of memory initalization functions were int and always returned
0.  Further it's not feasible to be doing error checking here, so simply
turn them into void functions.

Signed-off-by: Tom Rini <trini@ti.com>

am33xx: Document what we're doing with ddrctrl->ddrckectrl

- Remove the call to set ddrctrl->ddrioctrl as it's all zeros.
- Comment what we're really setting in ddrctrl->ddrckectrl which is that
  we're operating in the normal mode where EMIF/PHY clock is controlled
  by the PHY.

Signed-off-by: Tom Rini <trini@ti.com>

am335x: ddr_defs: Update EMIF parameters

EMIF parameters are calculated based on the AC timing
parameters from the SDRAM datasheet and the DDR frequency.

Current values for these paramters in AM335x U-Boot code,
though reliable, are not fully optimal. The most optimal
settings can be derived based on the guidelines published
at [1]. A pre-computed set of values with the most optimum
settings for AM335x EVM and BeagleBone can be found at [2].

[1] http://processors.wiki.ti.com/index.php/AM335x_EMIF_Configuration_tips
[2] http://processors.wiki.ti.com/index.php/OMAP_and_Sitara_CCS_support#AM335x

Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>

am33xx: Clean up unused DDR defines, prefix more with 'DDR2'

- Remove a handful of unused defines.
- Prefix more values with 'DDR2' as DDR3 will require different values.

Signed-off-by: Tom Rini <trini@ti.com>

am33xx: Move the call to ddr_pll_config, make it take the frequency

Depending on if we have DDR2 or DDR3 on the board we will need to call
ddr_pll_config with a different value.  This call can be delayed
slightly to the point where we know which type of memory we have.

Signed-off-by: Tom Rini <trini@ti.com>

am33xx: Pass to config_ddr the type of memory that is connected

We need to pass in the type of memory that is connected to the board.
The only reliable way to do this is to know what type of board we are
running on (which later will be knowable in s_init()).  For now, pass in
the value of DDR2.

Signed-off-by: Tom Rini <trini@ti.com>

am33xx: Make config_cmd_ctrl / config_ddr_data take const structs

Rework the EMIF4/DDR code slightly to setup the structs that
config_cmd_ctrl and config_ddr_data take to be setup at compile time and
mark them as const.  This lets us simplify the calling path slightly as
well as making it easier to deal with DDR3.

Signed-off-by: Tom Rini <trini@ti.com>

am33xx: Rework DDR2 EMIF initalization slightly

With the previous bugfix we now don't need to set two different REF_CTRL
values and instead set the final value.

Signed-off-by: Tom Rini <trini@ti.com>

am33xx: Bugfix to config_sdram()

When we change SDRAM_CONFIG this triggers a refresh based on all of the
parameters that we have programmed so we must do this last.

Signed-off-by: Tom Rini <trini@ti.com>

am33xx: Remove extra check in enable_ddr_clocks

We do not need to check for EMIF_GCLK and L3_GCLK being active.  This
was a hold-over from bringup and no longer required.

Signed-off-by: Tom Rini <trini@ti.com>

am33xx: Convert to using <asm/emif.h> to describe the EMIF

Signed-off-by: Tom Rini <trini@ti.com>

am33xx: Remove DMM_BASE define

The am33xx does not have a DMM, so don't define the base.

Signed-off-by: Tom Rini <trini@ti.com>

am335x_evm: Update config for common usage

- Add default commands
- Add HUSH parser
- Make environment, malloc areas larger
- Add ATAGS and OF_LIBFDT
- Add defaults to boot ramdisk and MMC, use uEnv.txt

Signed-off-by: Tom Rini <trini@ti.com>

am33xx: Enable gpio0 clock

Signed-off-by: Tom Rini <trini@ti.com>

OMAP3: igep00x0: add SPL support for IGEP-based boards

This patch adds SPL support for IGEP-based boards.
Tested on an IGEPv2 Rev.C board with Micron NAND Flash memory.

Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>

OMAP3: mem: Add Numonyx OneNAND 200MHz timing information

Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>

OMAP3: igep00x0: Add config option to choose flash storage memory

IGEP-based boards can have two different flash memories, a OneNAND or a
NAND device. Add a configuration option for to choose which memory to use.

Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>

am335x_evm: CPSW support

This patch adds board-specific initialization for CPSW on
TI AM335X based boards. Tested on BeagleBone.

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
[Ilya: split board-specific part into separate patch]
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>

am335x_evm: read the on-board EEPROM

Read the on-board EEPROM during startup to detect the version
of the board we are running on (as for now only BeagleBone vs
EVM detection is supported).

Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>

am33xx: pin mux defintions for CPSW switch

This patch adds pin mux settings for CPSW switch found on
TI AM335X based boards (MII and RGMII modes).

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
[Ilya: split pinmux into separate patch]
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>

am33xx: CPSW init and definitions

This patch adds platform-specific initialization for CPSW
switch on TI AM33XX SoCs.

Signed-off-by: Chandan Nath <chandan.nath@ti.com>
[Ilya: split init out of original patch]
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>

cpsw: add driver for cpsw ethernet device

CPSW is an on-chip ethernet switch that is found on various SoCs from Texas
Instruments.  This patch adds a simple driver (based on the Linux driver) for
this hardware module.

This patch also adds support to clean and flush dcache during packet send
and receive.

Changes by Sandhya: Added support to clean and flush dcache during packet
    send/receive and added timeouts.

Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Chandan Nath <chandan.nath@ti.com>
Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com>
[Ilya: Cleaned cache handling, some style cleanup, some small
fixes, use of internal RAM for descriptors]
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>

beagle: only call DSS code when #defined CONFIG_VIDEO_OMAP3

Signed-off-by: Peter Meerwald <p.meerwald@bct-electronic.com>

serial/ns16550: ns16550 has a different register layout on SOC_DA8XX

also fix NS16550_init() as we need 16x divider

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@gmail.com>
Acked-by: Christian Riesch <christian.riesch@omicron.at>
Tested-by: Christian Riesch <christian.riesch@omicron.at>
Acked-by: Sughosh Ganu <urwithsughosh@gmail.com>
Tested-by: Sughosh Ganu <urwithsughosh@gmail.com>

arm/davinci/da850: add uart0 pinmux

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@gmail.com>
Tested-by: Sughosh Ganu <urwithsughosh@gmail.com>

arm/davinci: fix DDR2/mDDR memory controller initialization for Omap L138

follow section 15.2.13.1 (Initializing Following Device Power Up or Reset) of
OMAP-L138 DSP+ARM Processor Technical Reference Manual

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@gmail.com>
Acked-by: Christian Riesch <christian.riesch@omicron.at>
Tested-by: Christian Riesch <christian.riesch@omicron.at>

Revert "arm: armv7: add compile option -mno-unaligned-access if available"

This reverts commit 5347560f5427bcdd48a563b62180481606ac8044,
which was applied only to get release 2012.07 functional on as
many ARM targets as possible despite mis-aligned accesses.

omap: am335x_evm: enable i2c1 channel

This patch sets up pinmux, enables fclk, and
defines CONFIG_I2C_MULTI_BUS

Signed-off-by: Steve Sakoman <steve@sakoman.com>

beagle: removed unused pr_debug #define

Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net>

beagle: fix termination of buddy env setting

Signed-off-by: Peter Meerwald <p.meerwald@bct-electronic.com>

beagle: make get_expansion_id(), get_board_revision(), beagle_display_init() static

Signed-off-by: Peter Meerwald <p.meerwald@bct-electronic.com>

igep00x0: default mmcrootfstype to EXT4

omap2plus_defconfig now has built-in compile support for EXT4 enabled
by default now. So, we can use EXT4 as the default root file system
type for MMC.

Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>

igep00x0: default to OMAP-specific serial driver

An OMAP specific serial driver was merged on the Linux kenel a long
time ago. So, it makes sense to default the console name to OMAP
ttyO instead of the generic ttyS naming.

Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>

da850/omap-l138: add support for direct NOR boot mode

This patch adds support for direct NOR boot mode on
da850/omap-l138. Added da850evm_direct_nor entry in
boards.cfg to allow to build targets.

Tested-by: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>

da850/omap-l138: Add support for NAND SPL

This patch adds configuration required for NAND SP
on DA850/OMAP-L138.

Tested-by: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>

da850/omap-l138: Fix NAND flash timings

Though Commit id a3f88293ddd13facd734769c1664d35ab4ed681f (da850evm:
setup the NAND flash timings) has configured the AEMIF timings, they
are not exactly in sync with the timings used in Linux. Linux is
configuring the timing register as 0x08222204, where as currently it
configured to 0x00100084 in U-Boot. This issue was found out when
support for NAND SPL is added in U-Boot. Without this patch U-Boot
does not come up with SPL.

Tested-by: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>

da850/omap-l138: Add support to read u-boot image from MMC/SD

DA850/OMAP-L138 does not support strict MMC/SD boot mode. SPL will
be in SPI flash and U-Boot image will be in MMC/SD card. SPL will
do the low level initialization and then loads the u-boot image
from MMC/SD card.

Define CONFIG_SPL_MMC_LOAD macro in the DA850/OMAP-L138
configuration file to enable this feature.

Tested-by: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>

da850/omap-l138: Define SPI specific configs for SPL only when SPI is used

define SPI specific configs for SPL only when CONFIG_USE_SPIFLASH
config is defined

Tested-by: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>

arm, davinci: perform check for initializing global data and serial init

initialize baudrate, flags, data and serial initialization,
only when CONFIG_SPL_LIBCOMMON_SUPPORT is defined.

Tested-by: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
Acked-by: Christian Riesch <christian.riesch@omicron.at>

da850/omap-l138: Make MMC and NOR support mutually exclusive

On Logic PD Rev.3 DA850/OMAP-L138 EVM, NOR and MMC/SD cannot
work together. This patch enables the MMC/SD support only
when NOR support is disabled. NOR Flash identification works
even without this patch, but erase and write will have issues.

Tested-by: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>

da850/omap-l138: modifications for Logic PD Rev.3 AM18xx EVM

AHCLKR/UART1_RTS/GP0[11] pin needs to be configured for
MMC and NOR to work on DA850/OMAP-L138 Rev.3 EVM. When
GP0[11] is low, the SD0 interface will not work, but NOR
flash will. When GP0[11] is high, SD0 will work but NOR
flash will not.

Tested-by: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>

da850/omap-l138: Add MMC support for DA850/OMAP-L138

This patch adds support for MMC/SD on DA850/OMAP-L138.

Tested-by: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com>
Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com>
Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>

omap: am33xx: enable gpio support

This patch uses the code in omap-common to support gpio modules 1-3
on am33xx based boards.

It adds base address and register definitions, enables clocks to the
modules, and enables building the common gpio code for CONFIG_AM33XX
as well as CONFIG_OMAP

Signed-off-by: Steve Sakoman <steve@sakoman.com>

omap: am335x_evm: remove unused definitions

UART_RESET, UART_CLK_RUNNING_MASK, and UART_SMART_IDLE_EN
are defined inn evm.c but not used. Also removes unnecessary
include of serial.h

PHYS_DRAM_1_SIZE is defined in am335x_evm.h but never used.

Signed-off-by: Steve Sakoman <steve@sakoman.com>

OMAP3: mcx: read hot-water-button after reset

Detect hot-water-button to start a differnt image.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Tom Rini <trini@ti.com>

OMAP3: mcx: updated default environment

Patch drops also not used CFI setup in the
configuration file.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Tom Rini <trini@ti.com>

OMAP3: mcx: set pinmux for uart4

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Tom Rini <trini@ti.com>

mcx: increased buffer for command line

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Tom Rini <trini@ti.com>

arm: omap3: cm-t35: minor comment and printf change

Fix the comment to reflect the actual function call time.
Change the printf message to look nicer in the context it might be printed.

Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>

hawkboard/omapl-138: Add support for generating ais image for hawkboard

Parameters used for configuring certain SoC peripherals are parsed
from the cfg file and appended as part of the ais image's header. The
u-boot-spl.ais generated is flashed separately to the nand, so do not
delete the file after generation of u-boot.ais.

Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>

omap24xx_i2c: add 2-byte address support

Various devices like EEPROMs require 2-byte address support to
be properly accessed. This patch adds this support for OMAP2/3/4
I2C controller driver.
I've tested it with EEPROM (16 bit address) and TPS65217 chip
(8 bit address) on TI Beaglebone board.

Unfortunately I don't have access to any compatible hardware
with 16bit data register so I can't test if those #ifdef
clauses really work.

CC: Tom Rini <trini@ti.com>
Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>

CREDITS: Add credits for MCF5249 initialization code

Signed-off-by: Wolfgang Denk <wd@denx.de>

Consolidate bootcount code into drivers/bootcount

This patch moves all bootcount implementations into a common
directory: drivers/bootcount. The generic bootcount driver
is now usable not only by powerpc platforms, but others as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Valentin Longchamp <valentin.longchamp@keymile.com>
Cc: Christian Riesch <christian.riesch@omicron.at>
Cc: Manfred Rudigier <manfred.rudigier@omicron.at>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Reinhard Meyer <reinhard.meyer@emk-elektronik.de>
Tested-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Tested-by: Christian Riesch <christian.riesch@omicron.at>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>

mpc52xx: remove o2dnt board

Remove old o2dnt board without OF support. New support for this board
is added by the previous patch, O2I configuration.

Signed-off-by: Anatolij Gustschin <agust@denx.de>

mpc52xx: add common o2dnt and o2dnt2 support and configurations

Add common code for o2dnt and o2dnt2 based boards and add different
board configuration files for O2D, O2I, O2DNT2, O2D300, O2MNT and
O3DNT boards.

Signed-off-by: Anatolij Gustschin <agust@denx.de>

mpc5xxx: add GPIO port configuration

Add posibility for board specifig GPIO configurations using
various CONFIG_SYS_ macros.

Signed-off-by: Anatolij Gustschin <agust@denx.de>

mpc5xxx: add pci_mpc5xxx_init prototype to common header

Add pci_mpc5xxx_init() prototype to the header file, so board .c files
do not need to add extern pci_mpc5xxx_init() declaration.

Signed-off-by: Anatolij Gustschin <agust@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot-sh

* 'master' of git://git.denx.de/u-boot-sh:
  sh: tmu: Removed arch/sh/include/asm/clk.h
  sh: tmu: Changed switch statement to shift operation
  sh: tmu: Changed TMU driver using array of structures

Signed-off-by: Wolfgang Denk <wd@denx.de>

Merge branch 'sf' of git://git.denx.de/u-boot-blackfin

* 'sf' of git://git.denx.de/u-boot-blackfin:
  sf: spansion: Add support for S25FL256S
  sf: winbond: fix page_size
  sf: stmicro: add support for N25Q128A
  sf: stmicro: add support N25Q128 parts
  sf: stmicro: support JEDEC standard two-byte signature
  sf: winbond: add W25Q32
  cmd_spi: remove superfluous semicolon

Signed-off-by: Wolfgang Denk <wd@denx.de>

sh: tmu: Removed arch/sh/include/asm/clk.h

asm/clk.h was included get_peripheral_clk_rate function. But this
is not used from anywhere.
This removed asm/clk.h, and deleted include line from arch/sh/lib/time.c

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

sh: tmu: Changed switch statement to shift operation

Calculation of the bit position using switch statement can substitute
shift operation using ffs.
And removed unsed macro and variable.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

sh: tmu: Changed TMU driver using array of structures

This changed into access using array of structure from access to the register
using the definition of the register by macro.
And removed white space.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>