Daniel Vetter [Fri, 8 Nov 2013 06:37:57 +0000 (07:37 +0100)]
Revert "tests/gem_ctx_bad_exec: Check the errno, too"
This reverts commit
4a6a59f314f61e1e4156bb13a65efabee31a76fc.
Ben Widawsky [Fri, 8 Nov 2013 05:00:55 +0000 (21:00 -0800)]
gem_storedw_batches_loop: Update for gen8
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Daniel Vetter [Thu, 7 Nov 2013 12:54:01 +0000 (13:54 +0100)]
tests/gem_overflow_reloc: Rework subtest enumeration
Subtest names must be stable across all platforms for easier tracking.
Hence move the gen8+ check into the subtests, using igt_require. This
will auto-skip the tests on platforms where a given test doesn't apply.
Also move the assignment of the relocation_type var outside of the
fixture block. Fixtures aren't run when enumerating subtests (so that
subtests can be enumerated on any platform, even without an intel gpu).
So gcc has indeed been right with it's "potentially uninitialized" var
warning after all ...
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Thu, 7 Nov 2013 12:43:43 +0000 (13:43 +0100)]
tests/gem_reloc_overflow: Polish after Rafael's patch
- use void* for generic pointer.
- Fix const usage.
- Shut up gcc about uninitizialized var.
- Be paranoid about the moved tests and make double-sure that the
batch would indeed work safe for the condition being tested.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Rafael Barbalho [Wed, 6 Nov 2013 18:12:12 +0000 (18:12 +0000)]
tests/gem_reloc_overflow: Add gen8+ specifc tests
Broadwell introduces 64-bit relocation addresses which add extra
corner cases. The test was refactored slightly with some tests that
were in the source offset tests were moved to the more generic reloc
test area. The source offset tests are now gen aware and called twice to
test both cpu & gtt relocation paths. In addition 2 new gen8+ test
were added to the test:
* Relocation straddling page a page
* Insufficient space for a relocation at the end of the buffer.
Signed-off-by: Rafael Barbalho <rafael.barbalho@intel.com>
Conflicts:
tests/gem_reloc_overflow.c
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Wed, 6 Nov 2013 17:55:20 +0000 (18:55 +0100)]
NEWS: Remove spurious -
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Ben Widawsky [Wed, 6 Nov 2013 17:49:32 +0000 (09:49 -0800)]
NEWS: Restore the 1.4 release info
I suck...
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Ben Widawsky [Wed, 6 Nov 2013 17:48:17 +0000 (09:48 -0800)]
NEWS: Broadwell will be in 1.6, not 1.5
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Ben Widawsky [Wed, 6 Nov 2013 17:36:27 +0000 (09:36 -0800)]
NEWS: Broadwell
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Damien Lespiau [Fri, 31 May 2013 14:31:33 +0000 (15:31 +0100)]
list-workarounds/bdw: Add Broadwell to the list of valid platorms
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Mengdong Lin [Mon, 26 Aug 2013 03:07:22 +0000 (23:07 -0400)]
quick_dump/bdw: support Broadwell in device auto-detection
This patch exposes is_broadwell() to python, to be used by device
auto-detection.
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Mengdong Lin [Fri, 16 Aug 2013 03:58:21 +0000 (23:58 -0400)]
quick_dump/bdw: dump audio debug registers for Haswell and Broadwell
A new file "audio_debug_haswell_plus.txt" is created to define audio
debug registers for Haswell and its successors like Broadwell.
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Reviewed-by: Xingchao Wang <xingchao.wang@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Mengdong Lin [Fri, 16 Aug 2013 03:58:05 +0000 (23:58 -0400)]
quick_dump/bdw: dump audio configuration registers for Haswell and Broadwell
A new file "audio_config_haswell_plus.txt" is created to define audio
configuration registers for Haswell and its successors like Broadwell.
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Reviewed-by: Xingchao Wang <xingchao.wang@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Ben Widawsky [Tue, 19 Feb 2013 00:00:55 +0000 (16:00 -0800)]
quick_dump/bdw: Just basic stuff for now
Just the interrupt registers for now.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Mengdong Lin [Tue, 13 Aug 2013 04:22:33 +0000 (00:22 -0400)]
intel_audio_dump/bdw: dump audio M CTS readback register
This debug register provides test feedback of the audio M values (DP)
or CTS values (HDMI)
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Reviewed-by: Xingchao Wang <xingchao.wang@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Mengdong Lin [Tue, 13 Aug 2013 04:22:24 +0000 (00:22 -0400)]
intel_audio_dump/bdw: dump audio DP and DIP FIFO debug status
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Reviewed-by: Xingchao Wang <xingchao.wang@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Mengdong Lin [Tue, 13 Aug 2013 04:22:14 +0000 (00:22 -0400)]
intel_audio_dump/bdw: dump audio chicken bit register
This patch dumps this debug register and parse the data for Broadwell.
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Reviewed-by: Xingchao Wang <xingchao.wang@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Mengdong Lin [Tue, 13 Aug 2013 04:21:57 +0000 (00:21 -0400)]
intel_audio_dump/bdw: dump debug registers for audio immediate commands
This patch dumps debug registers to check audio immediate command, response
and status.
The audio driver will fall back into immediate command mode if normal
communication between controller and codec is dead.
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Reviewed-by: Xingchao Wang <xingchao.wang@intel.com>
[Ben: Small printf changes to remove compiler warning]
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Mengdong Lin [Wed, 17 Jul 2013 17:29:17 +0000 (13:29 -0400)]
intel_audio_dump/bdw: add support for Broadwell
This patch renames Haswell audio dump function and reuses it for Broadwell.
Since Haswell, audio registers are moved from the south display engine to the
north display engine. And the audio register layout is same for Haswell and its
successors like Broadwell.
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Damien Lespiau [Wed, 27 Feb 2013 14:51:48 +0000 (14:51 +0000)]
rendercopy/bdw: Add AUB annotations for states
This will hopefully help debugging things.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Damien Lespiau [Wed, 27 Feb 2013 14:51:34 +0000 (14:51 +0000)]
rendercopy/bdw: Fix the original implementation
For posterity, I've squashed these commits against Damien's request.
rendercopy/gen8: Fix the include guards
rendercopy/gen8: Update the 3DSTATE_MULTISAMPLE opcode
The opcode has changed in BDW.
rendercopy/gen8: Add the VF_TOPOLOGY state
The primitive type has moved out of the 3DPRIMITIVE to its own state,
VF_TOPOLOGY.
rendercopy/gen8: Fixup 3STATE_PS
Update the state to the latest BSpec, in particular the thread count was
using a wrong shift and we were missing kernel2 offset.
rendercopy/gen8: Update 3DSTATE_BASE_ADDRESS
This state has seen its fields moved around a bit, follow the BSpec.
rendercopy/gen8: Allocate 64 VUEs
The simulator screams at us if we try to allocate less than that.
rendercopy/gen8: Surface states have to be 64 bytes a aligned
rendercopy/gen8: Vertical/horizontal align 2 does not exist any more
So set them to 4. This should not matter with rendercopy (which is not
using compressed textures), but it makes the simulator moan.
rendercopy/gen8: Make sure the vertex buffer is 8 bytes aligned
rendercopy/gen8: Adjust 3DSTATE_VERTEX_BUFFERS for gen8
The address of the buffer is now on 48 bits. Also the size was computed
as offset + size where the field is really the size of the buffer
itself, not the end address.
rendercopy/gen8: Update the SF/SBE states for gen8
gen8 has a few changes around those states and a new ones RASTER and
SBE_SWIZ.
rendercopy/gen8: Add the PS_EXTRA and PS_BLEND states
rendercopy/gen8: Fix building with DEBUG_RENDERCOPY defined
The forward declaration was missing the final ';'. Let's move the whole
function at the top instead.
rendercopy/gen8: Update the PS and CONSTANT_PS states
rendercopy/gen8: Fix the red channel selection
Make it output red.
rendercopy/gen8: Update the write -1 shader
With the latest assembler changes from Haihao.
rendercopy/gen8: Remove blit.g8a
There is no diff between this file and blig.g7a. Remove it.
rendercopy/gen8: Fix the surface relocation offset
The surface base address is now at dwords 8/9 so the relocation has to
mirror the change.
rendercopy/gen8: Add the VF_INSTANCING state
Should work without, but doesn't hurt to add it.
rendercopy/gen8: Set the Attribule enable field in PS_EXTRA
When the SF is set up to output some attributes, the pixel shader also
have to be told there's attributes to care about.
rendercopy/gen8: Set the force bits to read URB offset/length
If we want to override the URB offset/length in the SBE state itself, we
need to set the force bits on (new in gen8)
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Damien Lespiau [Wed, 27 Feb 2013 14:51:33 +0000 (14:51 +0000)]
rendercopy/bdw: Add gen8_render.h to the file list
So it gets distributed with make dist.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Jesse Barnes [Wed, 27 Feb 2013 14:51:32 +0000 (14:51 +0000)]
rendercopy/bdw: Initial gen8 rendercopy
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Zhao Yakui [Tue, 9 Apr 2013 01:59:16 +0000 (09:59 +0800)]
assembler/bdw: Add the DATA_PORT_CACHE1 shared function for Gen8+
This is required to send some messages to data port in GPU shader.
For example: media_block_write message.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Zhao Yakui [Tue, 9 Apr 2013 01:59:15 +0000 (09:59 +0800)]
assembler/bdw: Add the support of align1 register-indirect addressing mode on Gen8
Otherwise it can't compile the following GPU shader that uses the
register-indirect addressing mode.
>add.sat (16) r[a0.5,0]<1>:uw r[a0.5,0]<16;16,1>:uw 0x0080:uw
>add.sat (16) r[a0.5,32]<1>:uw r[a0.5,32]<16;16,1>:uw 0x0080:uw
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Xiang, Haihao [Fri, 22 Feb 2013 03:14:13 +0000 (11:14 +0800)]
assembler/bdw: SEND instruction
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Ben Widawsky [Fri, 16 Aug 2013 22:24:25 +0000 (15:24 -0700)]
assembler/bdw: Small cleanup
This was originally part of:
commit
62298329350b965e4bbfc558e5a4b1b3646742ea
Author: Xiang, Haihao <haihao.xiang@intel.com>
Date: Wed Aug 14 14:21:16 2013 -0700
assembler: error for the wrong syntax of SEND instruction on GEN6+
I merged that patch separately, but this tiny hunk was leftover. In
order to not muck in changing too much history, I am leaving this as a
discrete patch, but with the changed commit message
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Xiang, Haihao [Fri, 22 Feb 2013 03:14:11 +0000 (11:14 +0800)]
assembler/bdw: Check & Refinement Engine message
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Xiang, Haihao [Fri, 22 Feb 2013 03:14:10 +0000 (11:14 +0800)]
assembler/bdw: Video Motion Estimation(VME) message
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Xiang, Haihao [Fri, 22 Feb 2013 03:14:09 +0000 (11:14 +0800)]
assembler/bdw: Thread Spawn message
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Xiang, Haihao [Fri, 22 Feb 2013 03:14:08 +0000 (11:14 +0800)]
assembler/bdw: Data port message
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Xiang, Haihao [Fri, 22 Feb 2013 03:14:07 +0000 (11:14 +0800)]
assembler/bdw: Set thread switch for multiple branch instructions
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Xiang, Haihao [Fri, 22 Feb 2013 03:14:06 +0000 (11:14 +0800)]
assembler/bdw: Set jip/uip offsets used by flow control instructions
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Xiang, Haihao [Fri, 22 Feb 2013 03:14:05 +0000 (11:14 +0800)]
assembler/bdw: Disable mask control for advanced mode
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Xiang, Haihao [Fri, 22 Feb 2013 03:14:04 +0000 (11:14 +0800)]
assembler/bdw: Set math function
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Damien Lespiau [Tue, 5 Feb 2013 11:34:10 +0000 (11:34 +0000)]
assembler/bdw: Use gen8_set_exec_size() to set the execution size
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Damien Lespiau [Thu, 31 Jan 2013 18:25:45 +0000 (18:25 +0000)]
assembler/bdw: Preliminary gen8 send & msgtarget support
Still some work needed there, but enough for rendercopy.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Damien Lespiau [Thu, 31 Jan 2013 15:31:27 +0000 (15:31 +0000)]
assembler/bdw: Add the start of a gen8 disassembler
Directly taken from Mesa.
v2 (Ben): Updated copyright
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Damien Lespiau [Thu, 31 Jan 2013 01:55:48 +0000 (01:55 +0000)]
assembler/bdw: Make the validation functions take a brw_program_instruction
This allows to use the same functions to validate operands on gen8 for
now.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Damien Lespiau [Thu, 31 Jan 2013 02:16:08 +0000 (02:16 +0000)]
assembler/bdw: Support some basic gen8 intructions
We should now support alu2 intructions with direct register addressing.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Damien Lespiau [Wed, 30 Jan 2013 17:19:57 +0000 (17:19 +0000)]
assembler/bdw: Add gen8_instruction from mesa
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Ben Widawsky [Wed, 9 Oct 2013 22:51:34 +0000 (15:51 -0700)]
tests/bdw: Port storedw_loop_vebox to gen8
I chose not to implement this in the same way as Zhao Yakui because I
was lazy.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Zhao Yakui [Tue, 9 Apr 2013 01:29:19 +0000 (09:29 +0800)]
tests/bdw: Port storedw_loop_blt to gen8
The code is from the storedw_loop_render.
v2 (by Ben): Flush on the correct ring
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Zhao Yakui [Tue, 9 Apr 2013 01:29:18 +0000 (09:29 +0800)]
tests/bdw: Port storedw_loop_bsd to gen8
The code is from the storedw_loop_render.
v2 (by Ben): Flush on the correct Ring
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Damien Lespiau [Thu, 14 Feb 2013 15:32:33 +0000 (15:32 +0000)]
tests/bdw: Port storedw_loop_render to bdw
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Ben Widawsky [Wed, 9 Oct 2013 02:48:35 +0000 (19:48 -0700)]
tests/bdw: pwrite_pread
support gen8 style blits
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Ben Widawsky [Wed, 9 Oct 2013 15:41:52 +0000 (08:41 -0700)]
tests/bdw: gem_linear_blits
support gen8 style blits
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Ben Widawsky [Wed, 9 Oct 2013 15:41:52 +0000 (08:41 -0700)]
tests/bdw: gem_pin
support gen8 style blits
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Ben Widawsky [Wed, 9 Oct 2013 15:41:52 +0000 (08:41 -0700)]
tests/bdw: gem_exec_blt
support gen8 style blits
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Ben Widawsky [Wed, 9 Oct 2013 15:41:52 +0000 (08:41 -0700)]
tests/bdw: gem_evict_*
support gen8 style blits
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Ben Widawsky [Wed, 9 Oct 2013 01:15:21 +0000 (18:15 -0700)]
tests/bdw: gem_cpu_reloc
support gen8 style blits
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Ben Widawsky [Wed, 9 Oct 2013 00:38:43 +0000 (17:38 -0700)]
tests/bdw: gem_exec_faulting_reloc
support gen8 style blits
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Ben Widawsky [Tue, 8 Oct 2013 22:02:07 +0000 (15:02 -0700)]
bdw: Update obvious missing blit support
This provides a macro that allows us to update all the arbitrary blit
commands we have stuck throughout the code. It assumes we don't actually
use 64b relocs (which is currently true). This also allows us to easily find
all the areas we need to update later when we really use the upper dword.
This block was done mostly with a sed job, and represents the easier
in test blit implementations.
v2 by Oscar: s/OUT_BATCH/BEGIN_BATCH in BLIT_COPY_BATCH_START
CC: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Damien Lespiau [Thu, 14 Feb 2013 15:32:32 +0000 (15:32 +0000)]
bdw: Add gen8 specific instdone bits
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Damien Lespiau [Thu, 14 Feb 2013 15:32:31 +0000 (15:32 +0000)]
bdw: Add gen8 to intel_gen()
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Damien Lespiau [Thu, 14 Feb 2013 15:32:30 +0000 (15:32 +0000)]
bdw: Add gen8 to the IS_9XX() macro
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Ben Widawsky [Mon, 3 Dec 2012 19:36:46 +0000 (11:36 -0800)]
pciid/bdw: Add Broadwell PCI ids
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Ben Widawsky [Tue, 4 Dec 2012 16:38:46 +0000 (08:38 -0800)]
chipset: IS_I9XX macro
This isnt useful in IGT, but it will allow us to keep the merge process
with libdrm simpler.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Rodrigo Vivi [Wed, 6 Nov 2013 15:06:11 +0000 (13:06 -0200)]
bump version to 1.5 and add the release date
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Rodrigo Vivi [Tue, 1 Oct 2013 18:12:37 +0000 (15:12 -0300)]
tests: pm_psr
Check on debugfs if PSR is supported by panel and matching all conditions in
hardware. In this case PSR must be enabled and performance counting increasing
v2: check if performance counter is really increasing.
v3: respect new naming convention
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Daniel Vetter [Wed, 6 Nov 2013 14:06:15 +0000 (15:06 +0100)]
NEWS: drop_caches improvements
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Jesse Barnes [Tue, 5 Nov 2013 15:44:20 +0000 (07:44 -0800)]
quick_dump/vlv: add DPIO_CTL to the dump
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Oscar Mateo [Tue, 5 Nov 2013 14:15:19 +0000 (14:15 +0000)]
lib/drmtest: Retire requests via drop caches after gem_quiescent_gpu
This helps make sure that the GPU is really quiescent by getting
rid of any residual stuff.
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Tue, 5 Nov 2013 10:56:50 +0000 (11:56 +0100)]
tests/gem_ctx_bad_exec: Check the errno, too
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Oscar Mateo [Tue, 5 Nov 2013 10:57:31 +0000 (10:57 +0000)]
gem_flink_race: Assure no pending requests before object counting
Same thing that was done for prime_self_import.
v2: Move igt_drop_caches_set() call inside get_object_count() to make
it clearer why we want this.
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Oscar Mateo [Tue, 5 Nov 2013 10:56:24 +0000 (10:56 +0000)]
prime_self_import: Assure no pending requests before object counting
We don't want a previously used object to be freed in the middle of a
before/after object counting operation (or we would get a "-1 objects
leaked" message). We have seen this happening, e.g., when a context
from a previous run dies, but its backing object is alive waiting for
a retire_work to kick in.
v2: Use igt_debugfs facilities for drop cache.
v3: Move igt_drop_caches_set() call inside get_object_count() to make
it clearer why we want this.
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Cc: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Sun, 3 Nov 2013 10:28:50 +0000 (11:28 +0100)]
NEWS: Roll in updates.
Daniel Vetter [Sat, 2 Nov 2013 11:42:21 +0000 (12:42 +0100)]
tests: establish core_ prefix
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Sat, 2 Nov 2013 11:35:44 +0000 (12:35 +0100)]
tests: Use kms_ prefix a bit more
I was a bit on the fence about the basic pipe CRC test since that
doesn't really test kms, but debug infrastructure in debugfs.
Otoh running this one for a full kms testrun is always good, to make
sure that all the other (real) CRC based tests work sanely.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Sat, 2 Nov 2013 11:27:24 +0000 (12:27 +0100)]
tests: establish pm_ prefix
Imo power management, power consumption and performance are tightly
enough coupled that we can throw them all into one bin.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Sat, 2 Nov 2013 11:22:37 +0000 (12:22 +0100)]
tests: estbalish drv_ prefix
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Sat, 2 Nov 2013 11:17:49 +0000 (12:17 +0100)]
tests: Start to document naming conventions
Just a start and we need more work here. Some follow-up patches will
clear up some of the historical confusion.
While at it rename the pc8 "basic" test to "rte".
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Sat, 2 Nov 2013 11:54:35 +0000 (12:54 +0100)]
Update .gitignore a bit
- Ignore build-aux/
- Cleanup ignores for assembler/
Daniel Vetter [Mon, 4 Nov 2013 17:11:29 +0000 (18:11 +0100)]
lib: drop return value from igt_drop_caches
No one actually cares, everyone expects it to just work.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Oscar Mateo [Mon, 4 Nov 2013 16:30:47 +0000 (16:30 +0000)]
lib: Add igt_drop_caches_set()
This is basically a "drop cache" interface to the igt_debugfs
facilities. Also, update existing users.
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Cc: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Oscar Mateo [Mon, 4 Nov 2013 16:30:46 +0000 (16:30 +0000)]
tests: Fix "-thrashing" and "-thrash-inactive" distinction
A typo in the relocation tests made both sub-tests perform the
same action: drop *all* caches.
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Fri, 1 Nov 2013 21:18:20 +0000 (22:18 +0100)]
tests: igt_no_subtest
Yet another check for the library.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Fri, 1 Nov 2013 17:31:59 +0000 (18:31 +0100)]
tests: Add a Makefile comment about the expected failures in igt_ tests
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Thu, 31 Oct 2013 16:05:28 +0000 (17:05 +0100)]
tests: Add a test template
Requested by Paulo.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Thu, 31 Oct 2013 15:23:26 +0000 (16:23 +0100)]
lib: add igt_main macro
In the past new testcases with subtest often forgot to add the call to
igt_exit at the end of their main() function. That is now caught with
a bit more obnoxious asserts, but it's still a nuissance.
This little igt_main macro takes care of that (and also of calling the
subtest machinery initialization code correctly).
If no one objects I'll roll this out for all the simple cases (i.e.
those tests that don't have additional argv parsing on top of the
subtest machinery).
v2: Roll it out across the board.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Thu, 31 Oct 2013 16:16:33 +0000 (17:16 +0100)]
lib: make igt_install_exit_handler never fail
Most callers didn't bother checking, so just move the asserts into
the function itself.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Thu, 31 Oct 2013 16:02:41 +0000 (17:02 +0100)]
lib: make igt_set_vt_graphics_mode never fail
All tests agree that this is a letal failure, so no point
to pass it back to callers.
Also add some igt_require calls for the drm_fd where I've
noticed that it's missing.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Thu, 31 Oct 2013 15:09:46 +0000 (16:09 +0100)]
lib: consolidate pipe crc exit handler
No need to sprinkle this all over:
- exit handlers will only be registered once
- they're always called when exiting, so no need to explictly call
them.
This allows us to hide all the pipe crc cleanup in the library.
Cc: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Thu, 31 Oct 2013 15:06:40 +0000 (16:06 +0100)]
tests/kms_cursor_crc: rework to auto-skip connectors
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Thu, 31 Oct 2013 14:37:05 +0000 (15:37 +0100)]
tests/debugfs_pipe_crc: set mode before creating CRC helper
Otherwise the automagic skipping for DP ports on gmch platforms
won't work.
v2: We also need to just skip that connector, not the entire subtest.
kms_cursor_crc still needs to be updated.
Cc: Damien Lespiau <damien.lespiau@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Thu, 31 Oct 2013 13:02:44 +0000 (14:02 +0100)]
tests: use "auto" pipe CRC source
Makes stuff work on DP ports on gmch platforms automatically.
Cc: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Fri, 1 Nov 2013 17:29:33 +0000 (18:29 +0100)]
lib: add more self-tests around the igt_exit checks.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Fri, 1 Nov 2013 17:21:08 +0000 (18:21 +0100)]
lib: fix igt_exit assert when only listing subtests.
Ooops. Reported by Paulo. Also add a new testcase for make check to
make sure this actually works.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Damien Lespiau [Fri, 1 Nov 2013 16:25:10 +0000 (16:25 +0000)]
lib: Don't forget to close the pipe ctl fd in igt_pipe_crc_reset()
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Damien Lespiau [Fri, 1 Nov 2013 15:47:42 +0000 (15:47 +0000)]
gitignore: Ignore recently introduced tools and tests
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Paulo Zanoni [Mon, 21 Oct 2013 13:45:41 +0000 (11:45 -0200)]
module_reload: remove snd_hda_intel
The audio driver uses the power well provided by our driver, so on
Haswell we can't "rmmod i915" if we don't "rmmod snd_hda_intel" first.
The problem with removing snd_hda_intel is that we also need to kill
its users. On the specific machine I tested, the only user seem to be
alsactl, but on other machines this may change. IMHO we should leave
the "kill user space" step to whoever is running the script, but
Daniel asked me to put it here so we have a better chance of Just
Working on QA's machines.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70336
Requested-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Ville Syrjälä [Thu, 19 Sep 2013 15:14:54 +0000 (18:14 +0300)]
Add VGA register read/write tools
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Ben Widawsky [Thu, 31 Oct 2013 21:16:41 +0000 (14:16 -0700)]
debugfs_pipe_crc: skip on simulation
As with other display tests, they're not working (and in this case,
cause hangs).
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Paulo Zanoni [Tue, 29 Oct 2013 16:02:43 +0000 (14:02 -0200)]
tests/pc8: remove some printfs
They pollute the output, which makes it harder to see which tests
failed or succeeded.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Paulo Zanoni [Tue, 29 Oct 2013 13:14:50 +0000 (11:14 -0200)]
tests/pc8: clarify modeset_subtest arguments
My tiny little brain can't properly process 3 unnamed boolean
arguments.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Paulo Zanoni [Tue, 29 Oct 2013 13:00:45 +0000 (11:00 -0200)]
tests/pc8: add modeset -stress-no-wait tests
Used to trigger a racing condition between mode setting and
enabling/disabling PC8. The modeset-lpsp-stress-no-wait test should
fail on Kernels without the fix I just wrote today.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Paulo Zanoni [Mon, 28 Oct 2013 21:11:31 +0000 (19:11 -0200)]
tests/pc8: add modeset-lpsp and modeset-non-lpsp
The goal of these tests is to exercise the combination of power well
enabling/disabling and PC8 enabling/disabling. The modeset-non-lpsp
test exposes a silent bug on the current code that can just be
detected with the Runtime D3 patches. The Kernel patch that fixes the
bug will add a WARN to unmute it on the PC8-only case.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Ben Widawsky [Wed, 30 Oct 2013 03:01:43 +0000 (20:01 -0700)]
gem_suspend: Skip on simulation
Simulation has proven flaky across both reset, and s3/4
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Ben Widawsky [Wed, 30 Oct 2013 03:01:14 +0000 (20:01 -0700)]
gem_close_race: Fix linker flags
Seems the -lpthread was missed in
commit
8f771f3facae133bb72216fa05c74bc817920b6d
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date: Tue Oct 29 14:21:29 2013 +0000
gem_close_race: Also test random closing of active fd
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Chris Wilson [Tue, 29 Oct 2013 14:21:29 +0000 (14:21 +0000)]
gem_close_race: Also test random closing of active fd
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>