ci: fix missing line after adding austraincoder's farm killswitch

Accidentally dropped.

Fixes: ff928d9567a5 ("ci: Allow disabling the whole of austriancoder's farm")

Reported-by: Ana Guerrero Lopez <anagl@igalia.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Ana Guerrero Lopez <anagl@igalia.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20236>

intel/genxml: Add genX_rt_pack.h

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20225>

intel/fs: add a saturation propagation test

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20206>

brw: fix saturate propagation region overlap range

Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/commit/947c828d5cbffe9640ac63103a6223112eeff27f
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7691

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Oleksii Bozhenko <oleksii.bozhenko@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20206>

intel/fs: implement Wa_14017989577

The first instruction of any kernel should have non-zero emask. This
restriction needs to be obeyed to avoid GPU hangs.

Patch adds a function to insert dummy mov as first instruction
to make sure this requirement is fulfilled.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20194>

freedreno: fix compute shared_size underflow

It caused ~5% of perf regression for some gfxbench benchmarks.

Fixes: b8d10d9e87a ("gallium: split up req_local_mem")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20219>

radeonsi/vcn: av1 film_grain output fix

use film grain surface as the output instead of target,
which should be kept for DPB process.

fixed: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6903

CC: 22.3
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20139>

frontends/va: pass in film_grain_target as new output

In av1 film grain case, to use the film_grain_target
as the output, instead of target buffer, which is kept
as the input for DPB processing in film_grain output
scenario.

CC: 22.3
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20139>

frontneds/va: use current_display_picture from VA for film grain

use the interface defined in vaapi for av1 film grain's output
https://github.com/intel/libva/blob/master/va/va_dec_av1.h#L296-L304

CC: 22.3
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Mark Thompson <sw@jkqxz.net>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20139>

frontends/omx: initialize film_grain_target

set film_grain_target to NULL, and not using it
in omx path.

CC: 22.3
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20139>

gallium: add film_grain_target into av1 dec desc

In vaapi, film_grain output will need to direct into
other output surface instead of the current render_target.

CC: 22.3
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20139>

drm-shim: add __readlink_chk as readlink with overflow check

As per Linux Standard Base Core Specification 4.0, __readlink_chk
display value of a symbolic link, with buffer overflow checking.

if size > buflen, abort() is called.

Signed-off-by: Max Lee <endlesspring@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19045>

pvr: Check depth/stencil attachment is tile-aligned

The hardware requires depth/stencil attachments to be size-aligned to
the zls tile size (as defined by rogue_get_zls_tile_size_xy()).

In practice however, this is a tiny edge case. The restriction only
applies during some operations, and any attachment larger than the tile
size will be twiddled and over-allocated into alignment beforehand.

This commit also adds the mentioned rogue_get_zls_tile_size_xy()
function. These values differ from the regular tile_size_{x,y} feature
values in some cases. Instead of including them as features as well, we
compute them directly.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20160>

pvr: Account for other depth formats in pvr_frag_state_stream_init()

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20160>

pvr: Add stencil support in render job setup

The implementation here assumes separate depth and stencil attachments
are not possible, as they are in Vulkan without VK_KHR_dynamic_rendering
and before core 1.3.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20160>

ci: Allow disabling the whole of austriancoder's farm

Add a global-level variable that allows disabling all jobs that would
have gone to my lab, to be used in case of outages.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18997>

radv,aco: move radv_ps_epilog_key to the graphics pipeline key

To avoid redundant structs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20199>

radv: fix PS epilogs with RADV_PERFTEST=pswave32

This option is rarely or even never used but it was broken. While we
are at it, remove radv_ps_epilog_key::wave32 because the wave size
can only be changed globally for PS.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20199>

radv,aco: use 8-bit for color_is_int{8,10} everywhere

Do not need 32-bits because there is only up to 8 MRTs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20199>

radv,aco: rename color output related fields for consistency

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20199>

pvr: Extract common code from pvr_CmdDispatch{,Indirect}

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20159>

pvr: Track max_shared_regs for compute jobs

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20159>

pvr: Refactor pvr_compute_pipeline and pvr_compute_pipeline_shader

This brings the two structs more into line with their graphics
counterparts, and removes the extra member access previously required
to access almost all members of pvr_compute_pipeline.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20159>

aco: Migrate RA to use std::optional

The use of std::optional simplifies expressions and would be useful for some
upcoming RA tweaks.

C++17 has been available since the merge of rusticl and should be safe to use as
far as packaging is concerned.

A few style choices are:
- Testing for emptiness uses implicit bool conversion.
- Constructing an empty value uses {}.
- Constructing a filled value uses the implicit conversion constructor.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20125>

ci/valve-infra: use a new version of the mesa trigger

This new version of the container will re-try up to 3 times to download
the job bucket, rather than failing directly. If the issue persists,
the job will still succeed, but not all artifacts will be present...

Fixes: #7809
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20203>

intel/compiler: Set NoMask on cr0 access for float controls mode

This is trying to clear a bit in the control register.  However, it's
executing with whatever channel mask happens to be active.  Typically
this is the one at the start of the program, so at least some channels
will be active.  Typically the first channel will be active due to
packed dispatch, but that's not always guaranteed.  Without NoMask,
the float controls writes may randomly not happen.

Recent GPUs also seem to have a hang issue when the first instruction in
the shader doesn't have any active channels.  Having an instruction with
NoMask at the start of the program works around the issue.  See HSD bug
14017989577.  In our case, the float controls preamble was breaking that
restriction every time, causing us to run into this problem frequently.

Thanks to Tapani Pälli for finding this hang issue, and Francisco
Jerez and Lionel Landwerlin for helping pinpoint this issue during
review of a workaround patch in !20194.

Fixes GPU hangs in Elder Scrolls Online, Witcher 3, and likely more.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7639
Fixes: 9da56ffc522 ("i965/fs: add emit_shader_float_controls_execution_mode() and aux functions")
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20214>

virgl: lower FMA and MULADD

On the host we emit this as separate ops anyway, so avoid
wired optimizations in the guest that might introduce
difficult to optimize dependencies.

v2: update trace expectations - some minor accuracy changes
    are to be expected when fma is handled differently

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20182>

glsl: dont create temps for builtin function inputs

It's not valid to be copying input variables to temps when
inlining atomic memory, interpolateAt functions, etc. We got away
with this previously because tree grafting would clean up the
mess but we shouldn't depend on an optimisation to clean up
invalid IR. Also I hope to remove tree grafting in a follow up
merge request.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19890>

glsl: use ir_rvalue_visitor for function inlining

This allows us to drop some duplicate code that is already in the
ir_rvalue_visitor. It also allows us to better replace rvalues
and handle swizzle in the following patch without having to add
even more duplicate code.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19890>

venus: scrub ignored fields for descriptor writes for push descriptor

Fixes: 933ca11f1a4 ("venus: implement vkCmdPushDescriptorSetWithTemplateKHR")

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Dawn Han <dawnhan@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20191>

vulkan: VkPolygonMode has a bit more than two values

Fixes: 9d0ed9cbcc0 ("vulkan: Add more dynamic rasterizer state")

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20212>

hasvk: Report correct multisampling limits on gfx7

Some limits reported by hasvk were too high, which caused CTS tests to
fail.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19393>

aco: Add s_delay_alu support for GFX11+

Roughly copied from LLVM. This facilitates better ALU usage by
switching between waves when there is an ALU stall, which isn't
automatic anymore on GFX11.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19743>

aco: Add helper to get cycle info for an instruction.

For use in s_delay_alu tracking

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19743>

aco: Add isTrans helper.

For the s_delay_alu tracking.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19743>

radv: mark extendedDynamicState3SampleLocationsEnable as not required by Zink

Only dynamic blend equation support is still required.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19924>

radv: advertise extendedDynamicState3LineRasterizationMode

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19924>

radv: add support for dynamic line rasterization mode

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19924>

radv: advertise extendedDynamicState3RasterizationSamples

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19924>

radv: add support for dynamic rasterization samples

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19924>

radv: store the number of color/ds samples to the rendering state

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19924>

nir: fix digit order in print_bitset()

Also fix the leading curly for the new function definitions.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19570>

nir: print shader_info bools with the value

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19570>

nir: print shader_info inputs/outputs as bit ranges

e.g.
inputs_read: 15-17
outputs_written: 0,32

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19570>

radeonsi: add AMD_DEBUG=elements for printing vertex elements

in si_create_vertex_elements()

This information is useful in debugging shader inputs/outputs

Sample output:
AMD_DEBUG=elements ./bin/arb_vertex_attrib_64bit-overlapping-locations shader -auto
elements[0]: offset  0, buffer_index 0, dual_slot 0, format  16, divisor 0
elements[1]: offset 16, buffer_index 0, dual_slot 0, format  16, divisor 0
elements[0]: offset  0, buffer_index 0, dual_slot 0, format 104, divisor 0
elements[0]: offset  0, buffer_index 0, dual_slot 0, format 105, divisor 0
elements[0]: offset  0, buffer_index 0, dual_slot 0, format 106, divisor 0
elements[0]: offset  0, buffer_index 0, dual_slot 0, format 107, divisor 0
elements[0]: offset  0, buffer_index 0, dual_slot 0, format  16, divisor 0
elements[1]: offset 16, buffer_index 0, dual_slot 0, format  16, divisor 0
elements[0]: offset  0, buffer_index 0, dual_slot 0, format 104, divisor 0
elements[0]: offset  0, buffer_index 0, dual_slot 0, format 105, divisor 0
elements[0]: offset  0, buffer_index 0, dual_slot 0, format 106, divisor 0
elements[0]: offset  0, buffer_index 0, dual_slot 0, format 107, divisor 0
elements[0]: offset  0, buffer_index 0, dual_slot 0, format 107, divisor 0
elements[1]: offset 16, buffer_index 0, dual_slot 1, format 107, divisor 0
elements[2]: offset 32, buffer_index 0, dual_slot 1, format 105, divisor 0
elements[0]: offset  0, buffer_index 0, dual_slot 0, format 107, divisor 0
elements[1]: offset 40, buffer_index 0, dual_slot 1, format 107, divisor 0
elements[2]: offset 56, buffer_index 0, dual_slot 1, format 105, divisor 0
elements[0]: offset  0, buffer_index 0, dual_slot 0, format 107, divisor 0
elements[1]: offset 64, buffer_index 0, dual_slot 1, format 107, divisor 0
elements[2]: offset 80, buffer_index 0, dual_slot 1, format 105, divisor 0

PIGLIT: {"result": "pass" }
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19570>

util: minor refactor _mesa_sha1_print()

should not change the output; avoids an additional printf()
for the separator.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19570>

nir: print_shader_info(): brief output

Make the shader_info printing less verbose by skipping the fields that
are likely not used (being zero).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19570>

nir: print_shader_info: print stage-specific shader info

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19570>

nir: print_shader_info() print bitsets

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19570>

nir: print more in print_shader_info()

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19570>

nir: extract print_shader_info() from nir_print_shader_annotated()

This is a refactoring, it is not supposed to change the printed output.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19570>

anv/hasvk: Clamping Scissor Rect values in a valid range

On cmd_buffer_emit_scissor(), if VkViewport height or width are set to
a value lower than 1.0, y_max or x_max can be attributed negative values,
causing an overflow. That leads to ScissorRectangleYMax or
ScissorRectangleXMax to be set to values on an unsupported range.

Clamping x_max and y_max in the valid range solves the problem.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7471
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20200>

tu: allow using resolve engine for SRGB MSAA resolves

CTS accepts this behavior since a1be5ce2c893f525da82bc28c6e81b17cacc5d14

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20120>

meson: Do not enable drm for KGSL Turnip build

Android may use either DRM or some downstream solution, KGSL is a
downstream kernel driver for Adreno. Don't enable DRM when we want
Turnip to use KGSL instead of DRM.

Fixes: 09ac29cca9bf7978911f81bcfce12ce71c260a97
("meson: Enable system_has_kms_drm for android")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20168>

st/mesa: stop using redundant st_context::vp,tcp,tep,gp,fp,cp

Use ctx->XXProgram._Current instead of the st_context variables.

v2: split from a bigger commit

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19859>

st/mesa: fix the glBitmap cache wrt FS, scissor, and clamp color changes

We need to track those states in the cache and flush the cache
if the next glBitmap call uses different states.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19859>

st/mesa: don't flag ST_NEW_RASTERIZER for _NEW_PROGRAM

This should have no effect thanks to previous commits.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19859>

mesa: flag ST_NEW_RASTERIZER for !needs_texcoord_semantic if changing FS

This will be required with the next change, which will remove
the rasterizer state dependency on _NEW_PROGRAM.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19859>

mesa: remove unused composite _NEW_* flags

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19859>

mesa: don't flag _NEW_PROGRAM for "texture_unit -> sampler" mapping changes

st/mesa just reorders sampler views, so we only need to rebind those.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19859>

mesa: set fewer flags for VertexProgram.TwoSideEnabled changes

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19859>

mesa: set fewer dirty flags for PointSizeEnabled state changes

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19859>

mesa: flag ST_NEW_FS_CONSTANTS instead of _NEW_PROGRAM for ATI_fs constants

We only need to update the constant buffer.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19859>

st/mesa: update st_context::active_states in _mesa_update_state

just a code movement to a better place

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19859>

st/mesa: move check_program_state code into _mesa_update_state

_mesa_update_state() receives the _NEW_PROGRAM flag, so we can handle
any shader changes there.

There may be some overhead reduction because gfx_shaders_may_be_dirty
is removed.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19859>

st/mesa: always unbind constant buffer 0 when unbinding a shader

softpipe loads from an unbound and destroyed constant buffer for some reason

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19859>

mesa: clean up hairy code in state.c: update_program

No change in behavior.

Replace:

if (shader)
   bind(shader);
else
   bind(NULL);

With:

bind(shader);

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19859>

zink: fix rebase-mistake

This should not have re-introduced this lowering, effectively reverting
dcf3ae72abf78e8959c5b5a94ef332c0b7396ab2.

Fixes: 16971cd667b ("zink: add driver-workaround for missing gl_point_size")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20195>

intel/fs: clamp per vertex input accesses to patchControlPoints

In a tesselation control shader where an input array is accessed using
the index gl_InvocationID, we can end up accessing elements beyond the
number of input vertices specified in the shader key.

This happens because of the lowering in nir_lower_indirect_derefs().
This lowering will affect compact variables which happens in this
case :

  in gl_PerVertex {
      vec4  gl_Position;
      float gl_ClipDistance[1];
  } gl_in[gl_MaxPatchVertices];

The lowered code produced by NIR is somewhat ineffecient (implements a
binary seach) :

  if (gl_InvocationID < 16) {
     if (gl_InvocationID < 8) {
        if (gl_InvocationID < 4) {
          vec4 vals = load_at_offset(0);
          value = bcsel(vals, gl_InvocationID);
        } else {
          vec4 vals = load_at_offset(4);
          value = bcsel(vals, gl_InvocationID - 4);
        }
     } else {
        if (gl_InvocationID < 12) {
          vec4 vals = load_at_offset(8);
          value = bcsel(vals, gl_InvocationID - 8);
        } else {
          vec4 vals = load_at_offset(12);
          value = bcsel(vals, gl_InvocationID - 12);
        }
     }
  } else {
     if (gl_InvocationID < 24) {
        ...
     } else {
        ...
     }
  }

By default the gl_MaxPatchVertices must be set at 32 items and that's
what the lowering code will use to divide the access into chunks of 4.
But when running with 3 input vertices, this means we'll pull one more
item than what was delivered in the shader payload.

This triggers issues further down the register scheduling where the
g5UD (register for the 4th item) is overwritten by a previous SEND,
leading the URB read to use an invalid handle.

This pass clamps any access load_per_vertex_input intrinsic vertex
indice to (input_vertices - 1).

Fixes issues with tests like :
dEQP-VK.clipping.user_defined.clip_distance.vert_tess.*

Also fixes a hang with zink/anv on :
KHR-GL46.draw_elements_base_vertex_tests.AEP_shader_stages

v2: Don't replace source register

v3: Implement in NIR

v4: Clamp per vertex array sizes in NIR (Jason)

v5: Move the clamping on the intel compiler

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9749>

nir: Use nir_component_mask_t for nir_alu_dst::write_mask

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20193>

glx: fix xshm check to init xshm_opcode.

Found and proposed by Ray Strode (halfline)

Fixes: 68e89401140d ("glx/drisw: use xcb instead of X to query connection")
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20188>

zink: don't use defunct custom-flag

We're no longer respecting this flag, so there's no need in setting it.

Fixes: 00dc0036bb6 ("zink: flatten out buffer creation usage flags codepath")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20183>

nir: Add missing includes

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14831>

venus: check against the Vulkan type rather than type index.

Signed-off-by: Dawn Han <dawnhan@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20064>

venus: fix deqp tests failed on iub descriptor type

Fixes: abae9d4831b ("Add the iub binding count tracking")

Signed-off-by: Dawn Han <dawnhan@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20064>

radv: fix guardband if the polygon mode is points or lines

If points or lines are drawn using the polygon mode, the guardband
should be adjusted for large points/lines.

Cc: 22.3 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20185>

tu: Destroy disk_cache during tu_physical_device_finish

While running VK-CTS with valgrind, the application hit the max
thread count of 500. After further investigation, this was due to
multiple instances being created with the disk cache spinning up
worker threads which wouldn't be cleaned as disk_cache_destroy
wasn't being called.

Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20178>

mesa: Add missing dep on generated marshal header in the tests build.

We lost the race in a recent MR of mine.

Fixes: 381e0b43d617 ("mesa: Add test to prevent windows.h to be included in shared headers")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20170>

ir3: Disallow `noperspective` texture preloads

The `coord_offset` pass is responsible for upgrading any eligible
texture loads into prefetches, but a texture prefetch's capabilities
are limited and cannot handle any interpolation modes aside from
`smooth`.

An exception is carved out for `flat` interpolation modes, but this
doesn't exclude upgrading `noperspective` texture loads and results
in perspective-corrected samples being provided that can severely
break applications depending on this behaviour.

Fixes incorrect lighting projection on Super Mario Odyssey on
Skyline Emulator.

Fixes incorrect dirt texture mapping on Portal 2 trace on Turnip and
Zink on Turnip.

Fixes incorrect lighter shadowing on Half Life 2 trace on Turnip.

Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19842>

ir3: Propagate `coord_offset` result from `alu` src insts

`coord_offset` is called on the source of `alu` instructions and
it returns -1 for failures, this not explicitly checked for and
as a result the fetch can incorrectly be upgraded to a prefetch
when it isn't appropriate to do so.

Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19842>

turnip: Initialize *memory on 0-sized alloc early exit.

Otherwise, making a CS using the memory will use the uninitialized .map
value (when checking the size of the CS in in begin's tu_cs_is_empty()
check), causing valgrind noise in
dEQP-VK.binding_model.descriptorset_random.sets4.dynindexed.ubolimitlow.sbolimitlow.sampledimghigh.lowimgsingletex.iublimitlow.nouab.vert.noia.0
(thanks to vi_info->vertexBindingDescriptionCount==0).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20173>

intel/compiler/mesh: align payload size to the size of vec4

This reduces the number of instructions in task shaders when payload
size is not aligned to vec4 and payload_in_shared WA is enabled,
because nir_lower_task_shader will not need to handle the unaligned
size case.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20080>

nir/lower_task_shader: fix task payload corruption when shared memory workaround is enabled

We were not taking into account that when all invocations within workgroup
are active, we'll copy more data than needed, corrupting task payload
of other workgroups.

Fixes: 8aff8d3dd42 ("nir: Add common task shader lowering to make the backend's job easier.")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20080>

aco: apply NUW to additions for scratch access

fossil-db (navi21):
Totals from 52 (0.04% of 135636) affected shaders:
Instrs: 79036 -> 78567 (-0.59%)
CodeSize: 431188 -> 427984 (-0.74%)
Latency: 1318142 -> 1313821 (-0.33%)
InvThroughput: 293842 -> 292836 (-0.34%)
VClause: 2555 -> 2361 (-7.59%); split: -8.06%, +0.47%
Copies: 8746 -> 8767 (+0.24%); split: -0.11%, +0.35%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20117>

aco: more carefully apply constant offsets into scratch accesses

Death stranding does scratch_arr[80-idx]. This doesn't seem to work if we
try to combine the subtraction into the access.

fossil-db (navi21):
Totals from 52 (0.04% of 135636) affected shaders:
Instrs: 78560 -> 79036 (+0.61%)
CodeSize: 427940 -> 431188 (+0.76%)
Latency: 1313809 -> 1318142 (+0.33%)
InvThroughput: 292833 -> 293842 (+0.34%)
VClause: 2361 -> 2555 (+8.22%); split: -0.51%, +8.73%
Copies: 8767 -> 8746 (-0.24%); split: -0.35%, +0.11%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 0e783d687a3 ("aco: use scratch_* for scratch load/store on GFX9+")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7735
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20117>

radv/rt: set additions for scratch access as NUW

No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20117>

nir/range_analysis: unsigned upper bound analysis for b2i

fossil-db (navi21):
Totals from 93 (0.07% of 135636) affected shaders:
Instrs: 133949 -> 133899 (-0.04%); split: -0.05%, +0.01%
CodeSize: 708124 -> 707528 (-0.08%); split: -0.09%, +0.01%
Latency: 2451564 -> 2450158 (-0.06%); split: -0.06%, +0.00%
InvThroughput: 398282 -> 397345 (-0.24%)
SClause: 4441 -> 4437 (-0.09%); split: -0.18%, +0.09%
Copies: 7578 -> 7546 (-0.42%); split: -0.55%, +0.13%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20117>

ci/freedreno: temporarily disable godot-trive on zink+freedreno

Test if this trace impact surrounding traces causing rendering changes.

Ref: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7732

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20179>

ac/llvm: set invariant.load on image loads with ACCESS_CAN_REORDER

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20146>

ac/llvm: inline ac_get_load_intr_attribs

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20146>

ac/llvm: rename attribute enums

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20146>

ac/llvm: use invariant.load metadata on load intrinsics instead of readnone

readnone is illegal now and we should be using invariant.load since LLVM 15.
(suggested by Nicolai)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20146>

ac/llvm: don't set "readnone" on non-memory intrinsics

It's illegal and LLVM always knows which intrinsics don't read memory.
This started failing IR validation with LLVM 16.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20146>

ac/llvm: don't set "convergent" on intrinsics where it's automatic

LLVM adds the flag automatically.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20146>

ac/llvm: simplify how function attributes are set

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20146>

ac/llvm: simplify how call attributes are set

set them directly in ac_build_intrinsic, the only place that sets them

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20146>

ac/llvm: remove illegal function attributes READONLY and WRITEONLY

They are only legal on parameters.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20146>

gallivm: remove illegal and unused function attributes

READONLY is illegal on calls. Others were unused.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20146>

gallivm: remove unused LP_FUNC_ATTR_LEGACY

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20146>

gallivm: remove unused LP_FUNC_ATTR_INACCESSIBLE_MEM_ONLY

LLVM 16 removed it anyway.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20146>