Michal Simek [Thu, 8 Feb 2018 07:51:36 +0000 (08:51 +0100)]
arm64: zynqmp: Enable newer pmufw versions
As of now newer pmufw is keeping old interfaces. That's why permit
u-boot to run on newer version. Recommended version will be setup later.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Tue, 20 Feb 2018 06:26:19 +0000 (11:56 +0530)]
net: zynq_gem: Dont run any phy detection logic for GMII case
This patch bypasses phy detection logic for GMII interface
and just depend on phy address received from DT. This patch
is required as phy detection logic is different for some phys
like xilinx phy which can be connected over SGMII and GMII
interface.
This fixes the issue of ethernet failures when xilinx phy is
connected over GMII interface.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Nitin Jain [Fri, 16 Feb 2018 07:26:17 +0000 (12:56 +0530)]
arm64: zynqmp: Add support to load an app at EL1
This patch is adding support to switch to EL1 while loading an EL1
application with u-boot running at EL above EL1 in aarch64 mode.
Signed-off-by: Nitin Jain <nitinj@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Siva Durga Prasad Paladugu [Wed, 24 Jan 2018 11:50:32 +0000 (17:20 +0530)]
arm: zynq: Enable debug uart on Zedboard
It helps with debugging.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 31 Jan 2018 08:18:33 +0000 (09:18 +0100)]
arm64: zynqmp: Enable ethernet driver for zc1751-dc5
Enable missing driver on this board.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 26 Jan 2018 12:17:04 +0000 (13:17 +0100)]
fpga: Simplify error path in fpga_add
Check !desc earlier to simplify code.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Reviewed-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Michal Simek [Fri, 23 Mar 2018 08:34:00 +0000 (09:34 +0100)]
xilinx: Sync defconfigs with latest Kconfig updates
Make defconfigs up2date with current location.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 8 Dec 2017 13:50:42 +0000 (14:50 +0100)]
arm64: zynqmp: Convert board to use zynqmp-clk driver
Use zynqmp clock driver instead of fixed clocks.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tom Rini [Thu, 22 Mar 2018 20:35:43 +0000 (16:35 -0400)]
Merge git://git.denx.de/u-boot-net
Lokesh Vutla [Fri, 16 Mar 2018 13:22:21 +0000 (18:52 +0530)]
configs: omapl138: Enable DM and DT
Enable Driver Model and Device-tree support for omapl138 board
in U-Boot. Also enable DM_SERIAL and DM_I2C.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Fri, 16 Mar 2018 13:22:20 +0000 (18:52 +0530)]
ARM: dts: da850-lcdk: Sync from Linux 4.16
Sync dts from Linux 4.16 and also add u-boot specific
dtsi for OMAPl138 board.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Lokesh Vutla [Fri, 16 Mar 2018 08:52:12 +0000 (14:22 +0530)]
davinci: Enable DDR_INIT for DA8XX
Commit
6aa4ad8e3820 ("Convert CONFIG_SOC_DA8XX et al to Kconfig")
converted SOC_DA8XX to Kconfig but missed enabling DDR_INIT for
SOC_DA8XX, which broke OMAPL138 to boot.
Commit
2e87980580d0 ("davinci: Fix omapl138_lcdk builds") disabled
DDR_INIT for all DA850 SoCs. This failed all DA850 boards to boot
as ddr is not being initialized.
Enable SYS_DA850_DDR_INIT for DA8XX so that all DA850 and OMAPL138
will have ddr initialized
Fixes:
2e87980580d0 ("davinci: Fix omapl138_lcdk builds")
Fixes:
6aa4ad8e3820 ("Convert CONFIG_SOC_DA8XX et al to Kconfig")
Reported-by: Sekhar Nori <nsekhar@ti.com>
Tested-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: David Lechner <david@lechnology.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Faiz Abbas [Thu, 15 Mar 2018 15:41:35 +0000 (21:11 +0530)]
configs: am335x_evm: Increase SPL_SYS_MALLOC_F_LEN to accomodate gpio_devices
With gpio devices getting created in SPL, the size of the heap is
no longer sufficient. Therefore, increase SPL_SYS_MALLOC_F_LEN
to 0x1000.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Faiz Abbas [Thu, 15 Mar 2018 15:41:34 +0000 (21:11 +0530)]
gpio: omap_gpio: Add DM_FLAG_PRE_RELOC flag
With DM enabled in SPL, DM_FLAG_PRE_RELOC is required for
the omap_gpio driver to be bound to the gpio devices.
Therefore, add DM_FLAG_PRE_RELOC flag to the omap_gpio driver.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Luca Ceresoli [Thu, 15 Mar 2018 10:08:56 +0000 (11:08 +0100)]
scripts/check-config.sh: fix "command not found" error handling
scripts/check-config.sh exits successfully and silently without doing
any checks when the 'comm' command is not found.
The problem triggers from the command around line 39:
comm -23 ${suspects} ${ok} >${new_adhoc}
This statement fails when 'comm' is not in $PATH, creating an empty
${new_adhoc} file. But the script continues and the following line,
which is supposed to detect an error:
if [ -s ${new_adhoc} ]; then
will always be false since the file is empty, and the script will exit
successfully as if everything were OK.
The case where 'comm' in not in $PATH is not theoretical. It used to
happen on yocto until a recent fix [0], and still happens on the
current stable branch (rocko).
Fix by setting the errexit flag to exit with error when a statement
fails, so that at least the problem is noticed.
For additional safety also set the nounset flag to detect expansion
errors.
[0] http://git.yoctoproject.org/cgit/cgit.cgi/poky/commit/?id=
fe0b4cb5b48580d4a3f3c0eb82bfa6f1b13801e4
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Reviewed-by: Simon Glass <sjg@chromium.org>
David Lechner [Thu, 15 Mar 2018 01:36:30 +0000 (20:36 -0500)]
davinci: omapl138_lcdk: fix PLL0 frequency
commit
1601dd97edc6 ("davinci: omapl138_lcdk: increase PLL0 frequency")
changed the PLL0 frequency to 456MHz, which is needed for the LCDC IP
block. However, in doing so, it caused the PLLOUT clock to be outside
of the allowable specifications given in the OMAP-L138 data sheet. (It
says PLLOUT must be 600MHz max). It also uses a PLLM value outside of
the range given in the TRM (it says PLLM must in the range 0 to 0x1f).
So here is what we have currently:
PLLOUT = 24 / (0 + 1) * (37 + 1) = 912MHz (out of spec)
^ ^ ^
CLKIN PREDIV PLLM (out of spec)
input to PLLDIVn = 912 / (1 + 1) = 456MHz (desired result)
^ ^
PLLOUT POSTDIV
This changes the PLLM value to 18 and the POSTDIV value to 0 so that
PLLOUT is now within specification but we still get the desired
result.
PLLOUT = 24 / (0 + 1) * (18 + 1) = 456MHz (within spec)
^ ^ ^
CLKIN PREDIV PLLM
input to PLLDIVn = 456 / (0 + 1) = 456MHz (desired result)
^ ^
PLLOUT POSTDIV
Fixes:
1601dd97edc6 ("davinci: omapl138_lcdk: increase PLL0 frequency")
Signed-off-by: David Lechner <david@lechnology.com>
Reported-by: Sekhar Nori <nsekhar@ti.com>
Tested-by: Sekhar Nori <nsekhar@ti.com>
Liam Beguin [Wed, 14 Mar 2018 23:15:16 +0000 (19:15 -0400)]
test/py: add spi_flash tests
Add basic tests for the spi_flash subsystem.
Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tuomas Tynkkynen [Tue, 20 Mar 2018 00:02:28 +0000 (02:02 +0200)]
net: Drop CONFIG_ENC28J60
Last user of this driver went away in October 2014 in
commit
d58a9451e7339ed4 ("ppc/arm: zap EMK boards").
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Heinrich Schuchardt [Sun, 18 Mar 2018 10:32:53 +0000 (11:32 +0100)]
net: macb: remove superfluous logical constraint
In
if (a > =0) {...}
else (a < 0) {...}
the second logical constraint is superfluous.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Heinrich Schuchardt [Sun, 18 Mar 2018 10:24:38 +0000 (11:24 +0100)]
drivers: net: cpsw: remove superfluous assignment.
In
int ret = A;
ret = B;
the first assignment has not effect.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Alexander Graf [Thu, 15 Mar 2018 14:10:20 +0000 (15:10 +0100)]
lan7xxx: Require phylib
The lan75xx and lan78xx drivers need to drive their phy via the generic
phylib framework. Let's reflect that dependency in Kconfig, so that we
don't get build errors when phylib does not get selected.
Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Alexander Graf [Thu, 15 Mar 2018 14:07:09 +0000 (15:07 +0100)]
net: Only access network devices after init
In the efi_loader main loop we call eth_rx() occasionally. This rx function
might end up calling into devices that haven't been initialized yet,
potentially resulting in a lot of transfer timeouts.
Instead, let's make sure the ethernet device is actually initialized before
reading from or writing to it.
Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Leonid Iziumtsev [Fri, 9 Mar 2018 14:29:06 +0000 (15:29 +0100)]
net: Fix netretry condition
The "net_try_count" counter starts from "1".
And the "retrycnt" contains requested amount of retries.
With current logic, that means that the actual retry amount
will be one time less then what we set in "netretry" env.
For example setting "netretry" to "once" will make "retrycnt"
equal "1", so no retries will be triggered at all.
Fix the logic by changing the statement of "if" condition.
Signed-off-by: Leonid Iziumtsev <leonid.iziumtsev@se.atlascopco.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Priyanka Jain [Tue, 30 Jan 2018 06:41:08 +0000 (12:11 +0530)]
net/phy/cortina: Add No firmware upload option
Current Cortina phy driver assumes that firmware upload
is required during initialization and is dependent
on presence of corresponding macros like CONFIG_CORTINA_FW_ADDR
for compilation.
But Cortina phy has provision to store phy firmware in
attached dedicated EEPROM. And boards designed with such
EEPROM does not require firmware upload.
Add CORTINA_NO_FW_UPLOAD option in cortina.c to support
such boards.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Priyanka Jain [Tue, 30 Jan 2018 06:08:38 +0000 (11:38 +0530)]
net/phy/cortina.c: Update get_phy_id implementation
Update get_phy_id() implementation in cortina.c to check
for Cortina_phy by comparing device phy_id with cortina phy_id
instead of relying on presence of CORTINA macros.
This will allow get_phy_id to work with non-cortina phy devices
which might have same phy address as Cortina device but on
different bus.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Calvin Johnson [Thu, 8 Mar 2018 10:00:35 +0000 (15:30 +0530)]
configs: ls1012a: add pfe configuration for LS1012A
Add configurations for PFE.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Calvin Johnson [Thu, 8 Mar 2018 10:00:34 +0000 (15:30 +0530)]
armv8: layerscape: csu: enable ns access to PFE registers
Enable all types of non-secure access to PFE block registers.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Calvin Johnson [Thu, 8 Mar 2018 10:00:33 +0000 (15:30 +0530)]
armv8: fsl-lsch2: configure pfe's DDR and HDBUS interfaces and ECC
1. Set AWCACHE0 attribute of PFE DDR and HDBUS master interfaces
to bufferable.
2. Set RD/WR QoS for PFE DDR and HDBUS AXI master interfaces.
3. Disable ECC detection for PFE.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Calvin Johnson [Thu, 8 Mar 2018 10:00:32 +0000 (15:30 +0530)]
armv8: fsl-lsch2: add pfe macros and update ccsr_scfg structure
SoC specific PFE macros are defined and structure ccsr_scfg
is updated with members defined for PFE.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Calvin Johnson [Thu, 8 Mar 2018 10:00:31 +0000 (15:30 +0530)]
board: freescale: ls1012a2g5rdb: enable network support on ls1012a2g5rdb
This patch enables ethernet support for ls1012a2g5rdb.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Calvin Johnson [Thu, 8 Mar 2018 10:00:30 +0000 (15:30 +0530)]
board: freescale: ls1012ardb: enable network support on ls1012ardb
This patch enables ethernet support for ls1012ardb.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Calvin Johnson [Thu, 8 Mar 2018 10:00:29 +0000 (15:30 +0530)]
board: freescale: ls1012afrdm: enable network support on ls1012afrdm
This patch enables ethernet support for ls1012afrdm.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Calvin Johnson [Thu, 8 Mar 2018 10:00:28 +0000 (15:30 +0530)]
board: freescale: ls1012aqds: enable network support on ls1012aqds
This patch enables ethernet support for ls1012aqds.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Calvin Johnson [Thu, 8 Mar 2018 10:00:27 +0000 (15:30 +0530)]
drivers: net: pfe_eth: LS1012A PFE headers
Contains all the pfe header files.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Calvin Johnson [Thu, 8 Mar 2018 10:00:26 +0000 (15:30 +0530)]
drivers: net: pfe_eth: provide pfe commands
pfe_command provides command line support for several features that
support pfe, like starting or stopping the pfe, checking the health
of the processor engines and checking status of different units inside
pfe.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Calvin Johnson [Thu, 8 Mar 2018 10:00:25 +0000 (15:30 +0530)]
drivers: net: pfe_eth: LS1012A PFE driver introduction
This patch adds PFE driver to U-Boot
Following are the main driver files:-
pfe_hw.c: provides low level helper functions to initialize PFE
internal processor engines and other hardware blocks
pfe_driver.c: provides initialization functions
and packet send and receive functions
pfe_eth.c: provides high level gemac initialization functions
pfe_firmware.c: provides functions to load firmware into PFE
internal processor engines.
pfe_mdio.c: provides functions to initialize phy and mdio.
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Prabhakar Kushwaha [Thu, 8 Mar 2018 10:00:24 +0000 (15:30 +0530)]
armv8: fsl-layerscape: Add support of GPIO structure
Layerscape Gen2 SoC supports GPIO registers to control GPIO
signals. Adding support of GPIO structure to access GPIO
registers.
Signed-off-by: Pratiyush Srivastava <pratiyush.srivastava@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Calvin Johnson [Thu, 8 Mar 2018 10:00:23 +0000 (15:30 +0530)]
drivers: net: phy: Fix aquantia compilation with DM
With CONFIG_DM_ETH enabled, aquantia driver compilation fails with
below error. This patch fixes the issue by including dm.h.
drivers/net/phy/aquantia.c: In function ‘aquantia_startup’:
drivers/net/phy/aquantia.c:73:21: error: dereferencing pointer to
incomplete
type ‘struct udevice’
phydev->dev->name);
^~
Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Heinrich Schuchardt [Wed, 7 Mar 2018 02:39:04 +0000 (03:39 +0100)]
net: mvpp2x: add check after calloc
After allocating plat the pointer is checked.
Afterwards name is allocated and not checked.
Add the missing check to avoid a possible NULL dereference.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
kevans@FreeBSD.org [Wed, 14 Feb 2018 23:02:16 +0000 (17:02 -0600)]
Configs: Use the newly added PHY_RTL8211E_PINE64_GIGABIT_FIX
The Pine64+ uses a generic PHY driver, so flip it over to using the
Realtek PHY driver to actually apply the RTL8211e fix.
Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
kevans@FreeBSD.org [Wed, 14 Feb 2018 23:02:15 +0000 (17:02 -0600)]
net: phy: Add PHY_RTL8211E_PINE64_GIGABIT_FIX for realtek phys
Setting PHY_RTL8211E_PINE64_GIGABIT_FIX forces internal rx/tx delays off
on the PHY, as well as flipping some magical undocumented bits. The
magic number comes from the Pine64 engineering team, presumably as a
proxy from Realtek. This configuration fixes the throughput on some
Pine64 models. Packet loss of up to 60-70% has been observed without
this.
Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Liam Beguin [Wed, 14 Mar 2018 23:15:15 +0000 (19:15 -0400)]
test/py: add generic CRC32 function
Add a generic function which can be used to compute the CRC32 value of
a region of RAM.
Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Liam Beguin [Wed, 14 Mar 2018 23:15:14 +0000 (19:15 -0400)]
test/py: do not import pytest multiple times
Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Liam Beguin [Wed, 14 Mar 2018 23:15:13 +0000 (19:15 -0400)]
test/py: README: add HOSTNAME to PYTHONPATH
As opposed to PATH, HOSTNAME is not appended to PYTHONPATH
automatically. Lets add it to the examples to make it more
obvious to new users.
Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Liam Beguin [Wed, 14 Mar 2018 23:15:12 +0000 (19:15 -0400)]
test/py: README: fix typo
Fix a minor typo causing vim (and possibly other) to get confused with
coloring.
Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Liam Beguin [Wed, 14 Mar 2018 23:15:11 +0000 (19:15 -0400)]
cmd: sf: fix map_physmem check
Make sure 0x00 is a valid address to read to. If `addr` is 0x00 then
map_physmem() will return 0 which should be a valid address.
Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Liam Beguin [Wed, 14 Mar 2018 23:15:10 +0000 (19:15 -0400)]
spi: spi_flash: do not fail silently on bad user input
Make sure the user is notified instead of silently returning an error.
Signed-off-by: Liam Beguin <liambeguin@gmail.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tuomas Tynkkynen [Tue, 13 Mar 2018 13:23:04 +0000 (15:23 +0200)]
tools: Make kwboot build if HOST_TOOLS_ALL=y
The kwboot tool for Marvell devices isn't currently being built even if
HOST_TOOLS_ALL is set. It doesn't appear to depend on any CONFIG_
options, so it seems appropriate to enable building it here.
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Tom Rini [Wed, 21 Mar 2018 22:58:03 +0000 (18:58 -0400)]
Merge git://git.denx.de/u-boot-mips
Álvaro Fernández Rojas [Sun, 4 Feb 2018 20:11:17 +0000 (21:11 +0100)]
mips: bmips: add ar-5315 usb support
Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Sun, 4 Feb 2018 20:11:16 +0000 (21:11 +0100)]
mips: bmips: add support for bcm6318 usb
Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Sun, 4 Feb 2018 20:11:15 +0000 (21:11 +0100)]
phy: add support for bcm6318 usbh phy
Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Álvaro Fernández Rojas [Sun, 4 Feb 2018 20:10:21 +0000 (21:10 +0100)]
mips: bmips: add vr-3032u usb support
Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Sun, 4 Feb 2018 20:10:20 +0000 (21:10 +0100)]
mips: bmips: add support for bcm63268 usb
Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Sun, 4 Feb 2018 20:10:19 +0000 (21:10 +0100)]
mips: bmips: add dgnd3700v2 usb support
Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Sun, 4 Feb 2018 20:10:18 +0000 (21:10 +0100)]
mips: bmips: add support for bcm6362 usb
Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Sun, 4 Feb 2018 20:10:17 +0000 (21:10 +0100)]
mips: bmips: add ar-5387un usb support
Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Sun, 4 Feb 2018 20:10:16 +0000 (21:10 +0100)]
mips: bmips: add support for bcm6328 usb
Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Sun, 4 Feb 2018 20:10:15 +0000 (21:10 +0100)]
mips: bmips: add wap-5813n usb support
Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Sun, 4 Feb 2018 20:10:14 +0000 (21:10 +0100)]
mips: bmips: add support for bcm6368 usb
Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Sun, 4 Feb 2018 20:10:13 +0000 (21:10 +0100)]
phy: add support for bcm6368 usbh phy
Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Álvaro Fernández Rojas [Sun, 4 Feb 2018 10:19:14 +0000 (11:19 +0100)]
mips: bmips: add nb4-ser usb support
Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Sun, 4 Feb 2018 10:19:13 +0000 (11:19 +0100)]
mips: bmips: add hg556a usb support
Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Sun, 4 Feb 2018 10:19:12 +0000 (11:19 +0100)]
mips: bmips: add support for bcm6358 usb
Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Sun, 4 Feb 2018 10:19:11 +0000 (11:19 +0100)]
phy: add support for bcm6358 usbh phy
Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Álvaro Fernández Rojas [Sun, 4 Feb 2018 10:18:26 +0000 (11:18 +0100)]
mips: bmips: add ct-5361 usb support
Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Sun, 4 Feb 2018 10:18:25 +0000 (11:18 +0100)]
mips: bmips: add support for bcm6348 usb
Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Sun, 4 Feb 2018 10:18:24 +0000 (11:18 +0100)]
phy: add support for bcm6348 usbh phy
Signed-off-by: Ã\81lvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Heinrich Schuchardt [Sun, 18 Mar 2018 22:43:43 +0000 (23:43 +0100)]
mips: micronas/vct: check array bounds before access
If we check an index against array bounds, we should do so before
accessing the array and not afterwards.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Álvaro Fernández Rojas [Sat, 3 Feb 2018 12:42:40 +0000 (13:42 +0100)]
mips: bmips: select OF_EMBED for all boards
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Sat, 3 Feb 2018 09:30:28 +0000 (10:30 +0100)]
MIPS: add BMIPS Netgear DGND3700v2 board
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Sat, 3 Feb 2018 09:30:27 +0000 (10:30 +0100)]
MIPS: add support for Broadcom MIPS BCM6362 SoC family
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojas [Sat, 3 Feb 2018 09:30:26 +0000 (10:30 +0100)]
dm: cpu: bmips: add BCM6362 support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Tom Rini [Tue, 20 Mar 2018 22:39:27 +0000 (18:39 -0400)]
Merge git://git.denx.de/u-boot-fsl-qoriq
Vinitha V Pillai [Tue, 27 Feb 2018 07:27:31 +0000 (12:57 +0530)]
LS2088ARDB: Secure Boot: Fix fall back option failure
Fix NOR, SD and QSPI fallback option in case of secure boot failure.
Signed-off-by: Vinitha V Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Ashish Kumar [Mon, 19 Feb 2018 08:46:58 +0000 (14:16 +0530)]
armv8: ls1088aqds: Add IFC-NOR as boot source for LS1088
IFC-NOR and QSPI-NOR pins are multiplexed on SoC, so they cannot be
accessed simultaneously. IFC-NOR can be accessed along with SD-BOOT.
Ls1088aqds_sdcard_ifc_defconfig is default config for SD boot and
IFC-NOR to be used as flash. This allows writing to IFC-NOR flash.
QSPI and DSPI cannot be accessed in this defconfig.
IFC-NOR image is generated using ls1088aqds_defconfig.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Ashish Kumar [Mon, 19 Feb 2018 08:44:53 +0000 (14:14 +0530)]
armv8: ls1088a: Add i2c_early_init() func for LS1088AQDS
This function is required for enabling access to early i2c function
for correct usage of QIXIS_READ and QIXIS_WRITE.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Ashish Kumar [Mon, 19 Feb 2018 08:44:52 +0000 (14:14 +0530)]
armv8: ls1088a: Add clock related function in CONFIG_SPL_BUILD
get_board_ddr_clk(), get_board_sys_clk() and if_board_diff_clk() is
now available for SPL build.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Ashish Kumar [Mon, 19 Feb 2018 08:44:09 +0000 (14:14 +0530)]
armv8: ls1088qds: Remove CONFIG_ from local defines for FPGA
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Tom Rini [Tue, 20 Mar 2018 00:10:15 +0000 (20:10 -0400)]
Merge git://git.denx.de/u-boot-usb
Tom Rini [Mon, 19 Mar 2018 22:39:14 +0000 (18:39 -0400)]
Merge git://git.denx.de/u-boot-sunxi
Bryan O'Donoghue [Tue, 13 Mar 2018 16:50:36 +0000 (16:50 +0000)]
bootm: optee: Add a bootm command for type IH_OS_TEE
This patch makes it possible to verify the contents and location of an
OPTEE image in DRAM prior to handing off control to that image. If image
verification fails we won't try to boot any further.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Suggested-by: Andrew F. Davis <afd@ti.com>
Cc: Harinarayan Bhatta <harinarayan@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Peng Fan <peng.fan@nxp.com>
Bryan O'Donoghue [Tue, 13 Mar 2018 16:50:35 +0000 (16:50 +0000)]
image: Add IH_OS_TEE for TEE chain-load boot
This patch adds a new type IH_OS_TEE. This new OS type will be used for
chain-loading to Linux via a TEE.
With this patch in-place you can generate a bootable OPTEE image like this:
mkimage -A arm -T kernel -O tee -C none -d tee.bin uTee.optee
where "tee.bin" is the input binary prefixed with an OPTEE header and
uTee.optee is the output prefixed with a u-boot wrapper header.
This image type "-T kernel -O tee" is differentiated from the existing
IH_TYPE_TEE "-T tee" in that the IH_TYPE is installed by u-boot (flow
control returns to u-boot) whereas for the new IH_OS_TEE control passes to
the OPTEE firmware and the firmware chainloads onto Linux.
Andrew Davis gave the following ASCII diagram:
IH_OS_TEE: (mkimage -T kernel -O tee)
Non-Secure Secure
BootROM
|
-------------
|
v
SPL
|
v
U-Boot ------>
<----- OP-TEE
|
V
Linux
IH_TYPE_TEE: (mkimage -T tee)
Non-Secure Secure
BootROM
|
-------------
|
v
SPL ------->
<----- OP-TEE
|
v
U-Boot
|
V
Linux
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Suggested-by: Andrew F. Davis <afd@ti.com>
Cc: Harinarayan Bhatta <harinarayan@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Peng Fan <peng.fan@nxp.com>
Link: http://mrvan.github.io/optee-imx6ul
Bryan O'Donoghue [Tue, 13 Mar 2018 16:50:34 +0000 (16:50 +0000)]
optee: Add error printout
When encountering an error in OPTEE verification print out various details
of the OPTEE header to aid in further debugging of encountered errors.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Harinarayan Bhatta <harinarayan@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Peng Fan <peng.fan@nxp.com>
Tested-by: Peng Fan <peng.fan@nxp.com>
Bryan O'Donoghue [Tue, 13 Mar 2018 16:50:33 +0000 (16:50 +0000)]
optee: Add optee_verify_bootm_image()
This patch adds optee_verify_bootm_image() which will be subsequently used
to verify the parameters encoded in the OPTEE header match the memory
allocated to the OPTEE region, OPTEE header magic and version prior to
handing off control to the OPTEE image.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Harinarayan Bhatta <harinarayan@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Peng Fan <peng.fan@nxp.com>
Bryan O'Donoghue [Tue, 13 Mar 2018 16:50:32 +0000 (16:50 +0000)]
optee: Add optee_image_get_load_addr()
This patch adds optee_image_get_load_addr() a helper function used to
calculate the load-address of an OPTEE image based on the lower
entry-point address given in the OPTEE header.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Harinarayan Bhatta <harinarayan@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Peng Fan <peng.fan@nxp.com>
Tested-by: Peng Fan <peng.fan@nxp.com>
Bryan O'Donoghue [Tue, 13 Mar 2018 16:50:31 +0000 (16:50 +0000)]
optee: Add optee_image_get_entry_point()
Add a helper function for extracting the least significant 32 bits from the
OPTEE entry point address, which will be good enough to load OPTEE binaries
up to (2^32)-1 bytes.
We may need to extend this out later on but for now (2^32)-1 should be
fine.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Harinarayan Bhatta <harinarayan@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Peng Fan <peng.fan@nxp.com>
Tested-by: Peng Fan <peng.fan@nxp.com>
Bryan O'Donoghue [Tue, 13 Mar 2018 16:50:30 +0000 (16:50 +0000)]
optee: Add CONFIG_OPTEE_LOAD_ADDR
CONFIG_OPTEE_LOAD_ADDR is used to tell u-boot where to load the OPTEE
binary into memory prior to handing off control to OPTEE.
We need to pull this value out of u-boot in order to produce an IMX IVT/CSF
signed pair for the purposes of secure boot. The best way to do that is to
have CONFIG_OPTEE_LOAD_ADDR appear in u-boot.cfg.
Adding new CONFIG entires to u-boot should be kconfig driven so this patch
does just that.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
Bryan O'Donoghue [Tue, 13 Mar 2018 16:50:29 +0000 (16:50 +0000)]
optee: Add CONFIG_OPTEE_TZDRAM_BASE
OPTEE is currently linked to a specific area of memory called the TrustZone
DRAM. This patch adds a CONFIG entry for the default address of TrustZone
DRAM that a board-port can over-ride. The region that U-Boot sets aside for
the OPTEE run-time should be verified before attempting to hand off to the
OPTEE run-time. Each board-port should carefully ensure that the TZDRAM
address specified in the OPTEE build and the TZDRAM address specified in
U-Boot match-up.
Further patches will use TZDRAM address with other defines and variables to
carry out a degree of automated verification in U-Boot prior to trying to
boot an OPTEE image.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Harinarayan Bhatta <harinarayan@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Bryan O'Donoghue [Tue, 13 Mar 2018 16:50:28 +0000 (16:50 +0000)]
optee: Add CONFIG_OPTEE_TZDRAM_SIZE
OPTEE is currently linked to a specific area of memory called the TrustZone
DRAM. This patch adds a CONFIG entry for the default size of TrustZone DRAM
that a board-port can over-ride. The region that U-Boot sets aside for the
OPTEE run-time should be verified before attempting to hand off to the
OPTEE run-time. Each board-port should carefully ensure that the TZDRAM
size specified in the OPTEE build and the TZDRAM size specified in U-Boot
match-up.
Further patches will use TZDRAM size with other defines and variables to
carry out a degree of automated verification in U-Boot prior to trying to
boot an OPTEE image.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Harinarayan Bhatta <harinarayan@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Peng Fan <peng.fan@nxp.com>
Tested-by: Peng Fan <peng.fan@nxp.com>
Bryan O'Donoghue [Tue, 13 Mar 2018 16:50:27 +0000 (16:50 +0000)]
optee: Add lib entries for sharing OPTEE code across ports
This patch adds code to lib to enable sharing of useful OPTEE code between
board-ports and architectures. The code on lib/optee/optee.c comes from the
TI omap2 port. Eventually the OMAP2 code will be patched to include the
shared code. The intention here is to add more useful OPTEE specific code
as more functionality gets added.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Harinarayan Bhatta <harinarayan@ti.com>
Cc: Andrew F. Davis <afd@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Peng Fan <peng.fan@nxp.com>
Tested-by: Peng Fan <peng.fan@nxp.com>
Stefan Roese [Tue, 13 Mar 2018 07:41:10 +0000 (08:41 +0100)]
MAINTAINERS: Remove unused ppc4xx entry
ppc4xx support was removed some time ago. Lets remove the now unused
entry in MAINTAINERS as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Stefan Roese [Tue, 13 Mar 2018 07:41:09 +0000 (08:41 +0100)]
pci: Remove unused ppc4xx variable from struct pci_controller
ppc4xx support was removed some time ago. Lets remove the now unused
"pci_fb" variable from "struct pci_controller" as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Stefan Roese [Tue, 13 Mar 2018 07:41:08 +0000 (08:41 +0100)]
nand: Remove unused ppc4xx NAND driver and references
ppc4xx support was removed some time ago. Lets remove the now unused
NAND driver and all its references for this platform as well.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Scott Wood <oss@buserror.net>
Patrick Delaunay [Mon, 12 Mar 2018 09:46:18 +0000 (10:46 +0100)]
board: st: add generic board for STM32MP1 family
Add first support for STM32MP157C-ED1 board with "Basic" boot chain
1/ Boot Rom: load SPL with STM32 image header in SYSRAM
2/ SPL: power up and initialize the DDR and load U-Boot image
from SDCARD in DDR
3/ U-Boot: search and load extlinux.conf in SDCARD
(DISTRO activated)
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Mon, 12 Mar 2018 09:46:17 +0000 (10:46 +0100)]
dts: add device tree for STM32MP157C-ED1 board
Add minimal devicetree for STM32MP157C-ED1 board,
with only the devices to allow boot from SDCARD:
- RCC for clock and reset
- UART4 for console
- I2C and PMIC
- DDR
- SDMMC0 for SDCard
Waiting Kernel upstream for alignment.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Mon, 12 Mar 2018 09:46:16 +0000 (10:46 +0100)]
clk: stm32mp1: add clock tree initialization
add binding and code for clock tree initialization from device tree
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Mon, 12 Mar 2018 09:46:15 +0000 (10:46 +0100)]
clk: add driver for stm32mp1
add RCC clock driver for STMP32MP157
- base on driver model = UCLASS_CLK
- support ops to enable, disable and get rate
of all SOC clock needed by U-Boot
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Mon, 12 Mar 2018 09:46:14 +0000 (10:46 +0100)]
reset: stm32: adapt driver for stm32mp1
- move to livetree and allow to get address to parent
- add stm32mp1 compatible for probe
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Patrick Delaunay [Mon, 12 Mar 2018 09:46:13 +0000 (10:46 +0100)]
pinctrl: stm32: update pincontrol for stmp32mp157
- add the 2 new compatible used by STM32MP157
"st,stm32mp157-pinctrl"
"st,stm32mp157-z-pinctrl"
- update the mask for the port
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>