Dave Airlie [Wed, 10 Jan 2018 03:56:37 +0000 (03:56 +0000)]
r600/sb: lds ops have no dst register.
Although these are op3s they don't have a dst reg.
Acked-By: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Wed, 10 Jan 2018 03:52:50 +0000 (03:52 +0000)]
r600/sb: introduce special register values for lds support.
For LDS read/write ordering we use the LDS_RW value, reads
will wait on previous writes.
For LDS read/read from LDS queue ordering we use the LDS_OQ
values, we define two for now, though initially we'll just
support OQA.
Also add the check for the lds oq values
Acked-By: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Wed, 10 Jan 2018 03:46:50 +0000 (03:46 +0000)]
r600/sb: update last_cf if alu is the last clause
It's rare to have a final alu clause on normal shaders (exports)
but tess shaders write to LDS as their output, so we see some
alu clauses, and the CF_END get put in the wrong place.
This makes sure to update last_cf correctly.
Acked-By: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 7 Dec 2017 02:14:45 +0000 (02:14 +0000)]
r600/sb: start adding GDS support
This adds support for GDS ops to sb backend.
This seems to work for atomics and tess factor writes.
Acked-By: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 7 Dec 2017 03:31:41 +0000 (03:31 +0000)]
r600/sb: add tess/compute initial state registers.
This stops them being optimised out.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Wed, 10 Jan 2018 03:41:57 +0000 (03:41 +0000)]
r600/sb: fix a bug emitting ar load from a constant.
Some tess shaders were doing MOVA_INT _, c0.x on cayman, and then
hitting an assert in sb_bc_finalize.cpp:translate_kcache.
This makes sure the toplevel kcache tracker gets updated,
and the clause gets fixed up.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Wed, 10 Jan 2018 02:56:15 +0000 (02:56 +0000)]
r600/shader: only emit add instruction if param has a value.
Just saves a pointless a = a + 0;
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Wed, 10 Jan 2018 02:54:33 +0000 (02:54 +0000)]
r600: emit 0 gds_op for tf write.
This field is ignored for tf writes so should be 0.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Mon, 20 Nov 2017 21:29:09 +0000 (07:29 +1000)]
r600: add support for ARB_shader_clock.
Reviewed-by: Gert Wollny <gw.fossedev@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Thu, 18 Jan 2018 01:37:59 +0000 (01:37 +0000)]
radv/ws: get rid of useless return value
This also used boolean, so nice to kill that.
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Bas Nieuwenhuizen [Thu, 11 Jan 2018 12:21:50 +0000 (13:21 +0100)]
radv: Initialize DCC on transition from preinitialized.
Looks like the decompress does not handle invalid encodings well,
which happens with random memory. Of course apps should not use it
with random memory, but they are allowed to ....
Fixes:
44fcf58744 "radv: Disable DCC for GENERAL layout and compute transfer dest."
Reviewed-by: Dave Airlie <airlied@redhat.com>
Timothy Arceri [Tue, 16 Jan 2018 06:45:30 +0000 (17:45 +1100)]
ac: fix buffer overflow bug in 64bit SSBO loads
Fixes:
441ee1e65b04 "radv/ac: Implement Float64 SSBO loads"
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Timothy Arceri [Tue, 16 Jan 2018 07:02:37 +0000 (18:02 +1100)]
ac: fix nir_intrinsic_get_buffer_size for radeonsi
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Kenneth Graunke [Mon, 8 Jan 2018 06:40:13 +0000 (22:40 -0800)]
i965: Pass brw_growing_bo to grow_buffer().
Cleaner.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Kenneth Graunke [Sun, 7 Jan 2018 04:34:35 +0000 (20:34 -0800)]
i965: Make a helper for recreating growing buffers.
Now that we have two of these, we're duplicating a bunch of this logic.
The next commit will add more logic, which would make the duplication
seem worse.
This ends up setting EXEC_OBJECT_CAPTURE on the batch, which isn't
necessary (it's already captured), but it should be harmless.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Kenneth Graunke [Fri, 5 Jan 2018 19:44:50 +0000 (11:44 -0800)]
i965: Replace cpu_map pointers with a "use_shadow_copy" boolean.
Having a boolean for "we're using malloc'd shadow copies for all
buffers" is cleaner than having a cpu_map pointer for each. It was
okay when we had one buffer, but this is more obvious.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Francisco Jerez [Mon, 18 Dec 2017 23:22:04 +0000 (15:22 -0800)]
intel/fs: Optimize and simplify the copy propagation dataflow logic.
Previously the dataflow propagation algorithm would calculate the ACP
live-in and -out sets in a two-pass fixed-point algorithm. The first
pass would update the live-out sets of all basic blocks of the program
based on their live-in sets, while the second pass would update the
live-in sets based on the live-out sets. This is incredibly
inefficient in the typical case where the CFG of the program is
approximately acyclic, because it can take up to 2*n passes for an ACP
entry introduced at the top of the program to reach the bottom (where
n is the number of basic blocks in the program), until which point the
algorithm won't be able to reach a fixed point.
The same effect can be achieved in a single pass by computing the
live-in and -out sets in lock-step, because that makes sure that
processing of any basic block will pick up the updated live-out sets
of the lexically preceding blocks. This gives the dataflow
propagation algorithm effectively O(n) run-time instead of O(n^2) in
the acyclic case.
The time spent in dataflow propagation is reduced by 30x in the
GLES31.functional.ssbo.layout.random.all_shared_buffer.5 dEQP
test-case on my CHV system (the improvement is likely to be of the
same order of magnitude on other platforms). This more than reverses
an apparent run-time regression in this test-case from my previous
copy-propagation undefined-value handling patch, which was ultimately
caused by the additional work introduced in that commit to account for
undefined values being multiplied by a huge quadratic factor.
According to Chad this test was failing on CHV due to a 30s time-out
imposed by the Android CTS (this was the case regardless of my
undefined-value handling patch, even though my patch substantially
exacerbated the issue). On my CHV system this patch reduces the
overall run-time of the test by approximately 12x, getting us to
around 13s, well below the time-out.
v2: Initialize live-out set to the universal set to avoid rather
pessimistic dataflow estimation in shaders with cycles (Addresses
performance regression reported by Eero in GpuTest Piano).
Performance numbers given above still apply. No shader-db changes
with respect to master.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104271
Reported-by: Chad Versace <chadversary@chromium.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Marek Olšák [Wed, 10 Jan 2018 19:03:54 +0000 (20:03 +0100)]
gallium: remove PIPE_CAP_USER_CONSTANT_BUFFERS
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Marek Olšák [Wed, 10 Jan 2018 19:03:28 +0000 (20:03 +0100)]
st/mesa: assume that user constant buffers are always supported
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Marek Olšák [Wed, 10 Jan 2018 19:02:48 +0000 (20:02 +0100)]
nine: assume that user constant buffers are always supported
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Marek Olšák [Wed, 10 Jan 2018 12:45:33 +0000 (13:45 +0100)]
gallium: remove PIPE_CAP_TEXTURE_SHADOW_MAP
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Marek Olšák [Tue, 9 Jan 2018 14:48:52 +0000 (15:48 +0100)]
st/mesa: expose ARB_sync unconditionally
All drivers support it.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Marek Olšák [Wed, 10 Jan 2018 12:40:55 +0000 (13:40 +0100)]
gallium: remove PIPE_CAP_TWO_SIDED_STENCIL
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Brian Paul [Wed, 17 Jan 2018 04:58:58 +0000 (21:58 -0700)]
glsl: remove unneeded extern "C" {} bracketing around Mesa includes
The two headers already have the right extern "C" annotations.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Brian Paul [Wed, 17 Jan 2018 04:53:29 +0000 (21:53 -0700)]
mesa: move gl_external_samplers() to program.[ch]
The function is only called from a couple places. It doesn't make
sense to have it in mtypes.h
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Brian Paul [Wed, 17 Jan 2018 04:57:57 +0000 (21:57 -0700)]
st/mesa: include util/bitscan.h in st_glsl_to_tgsi_temprename.cpp
And use "" instead of <> for including Mesa headers, as we do elsewhere.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Brian Paul [Wed, 17 Jan 2018 04:52:22 +0000 (21:52 -0700)]
glsl: include util/bitscan.h in serialize.cpp
Instead of relying on indirect inclusion of the header.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Brian Paul [Wed, 17 Jan 2018 04:49:09 +0000 (21:49 -0700)]
util: include string.h in u_dynarray.h
To get memset() prototype.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Brian Paul [Wed, 17 Jan 2018 04:44:43 +0000 (21:44 -0700)]
mesa: remove unneeded #includes of main/compiler.h
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Brian Paul [Wed, 17 Jan 2018 04:44:17 +0000 (21:44 -0700)]
st/mesa: remove unneeded #includes of main/compiler.h
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Brian Paul [Wed, 17 Jan 2018 05:14:20 +0000 (22:14 -0700)]
st/mesa: include main/compiler.h in st_cb_queryobj.c
To get CPU_TO_LE32() macro.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Brian Paul [Wed, 17 Jan 2018 05:13:41 +0000 (22:13 -0700)]
mesa: include util/macros.h in format_fallback.c
To get definition of unreachable() macro.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Brian Paul [Wed, 17 Jan 2018 05:12:49 +0000 (22:12 -0700)]
mesa: include compiler.h in disk_cache.c
Instead of indirect inclusion to get CPU_TO_LE32() macro.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Brian Paul [Tue, 16 Jan 2018 15:40:36 +0000 (08:40 -0700)]
mesa/program: change validate_inputs() local var 'inputs' to GLbitfield64
Both state->prog->info.inputs_read and state->InputsBound are GLbitfield64
so it seems that the OR of those values should be of the same type.
I'm not sure this fixes any actual issues though.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Brian Paul [Wed, 17 Jan 2018 03:22:56 +0000 (20:22 -0700)]
vbo: reindent vbo_attrib.h to use 3 spaces
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Brian Paul [Tue, 16 Jan 2018 21:46:54 +0000 (14:46 -0700)]
vbo: whitespace, formatting fixes in vbo_exec_api.c
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Brian Paul [Tue, 16 Jan 2018 21:28:01 +0000 (14:28 -0700)]
vbo: add assertions, comments in vbo_exec_api.c
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Brian Paul [Tue, 16 Jan 2018 16:34:30 +0000 (09:34 -0700)]
vbo: whitespace, formatting fixes in vbo_exec_draw.c
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Brian Paul [Tue, 16 Jan 2018 16:31:01 +0000 (09:31 -0700)]
vbo: use inputs_read var to simplify code
v2: add some const qualifiers, per Ian.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Brian Paul [Mon, 15 Jan 2018 21:53:47 +0000 (14:53 -0700)]
vbo: whitespace, formatting fixes in vbo_split_copy.c
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Brian Paul [Mon, 15 Jan 2018 21:48:07 +0000 (14:48 -0700)]
vbo: use a new local 'array' variable in bind_vertex_list() loop
Make the code a bit more concise.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Brian Paul [Mon, 15 Jan 2018 21:44:39 +0000 (14:44 -0700)]
vbo: remove unneeded #includes in vbo_context.c
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Brian Paul [Mon, 15 Jan 2018 21:41:18 +0000 (14:41 -0700)]
vbo: whitespace, formatting fixes in vbo_context.c
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Brian Paul [Mon, 15 Jan 2018 21:37:04 +0000 (14:37 -0700)]
vbo: change vbo_context attribute map arrays to GLubyte
The values will never be larger than VBO_ATTRIB_MAX (currently 44).
v2: add STATIC_ASSERT to be sure VBO_ATTRIB_MAX can fit in ubyte,
per Emil.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Brian Paul [Mon, 15 Jan 2018 21:34:53 +0000 (14:34 -0700)]
vbo: lift common code out of switch cases
Both switch cases began with the same code.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Brian Paul [Fri, 12 Jan 2018 20:18:25 +0000 (13:18 -0700)]
vbo: optimize some display list drawing (v2)
The vbo_save_vertex_list structure records one or more glBegin/End
primitives which all have the same vertex format.
To draw these primitives, we setup the vertex array state, then
issue the drawing command. Before, the 'start' vertex was typically
zero and we used the vertex array pointer to indicate where the
vertex data starts.
This patch checks if the vertex buffer offset is an exact multiple of
the vertex size. If so, that means we can use zero-based vertex array
pointers and use the draw's start value to indicate where the vertex
data starts.
This means a series of display list drawing commands may have
identical vertex array state. This will get filtered out by the
Gallium CSO module so we can issue a tight series of drawing commands
without state changes to the device.
Note that this also works for a series of glCallList commands (not
just one list that contains multiple glBegin/End pairs).
No Piglit or conform changes.
v2: minor fixes suggested by Ian.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Fri, 12 Jan 2018 20:17:10 +0000 (13:17 -0700)]
vbo: rewrite some code in playback_copy_to_current()
I think this is a little easier to understand.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Fri, 12 Jan 2018 17:28:14 +0000 (10:28 -0700)]
vbo: add some comments in vbo_save_api.c
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Fri, 12 Jan 2018 17:21:48 +0000 (10:21 -0700)]
vbo: rename some functions in vbo_save_api.c
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Fri, 12 Jan 2018 17:16:40 +0000 (10:16 -0700)]
vbo: rename some functions in vbo_save_draw.c
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Fri, 12 Jan 2018 16:57:29 +0000 (09:57 -0700)]
vbo: add comment that vbo_save_vertex_list::buffer_offset is in bytes
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Fri, 12 Jan 2018 16:56:42 +0000 (09:56 -0700)]
vbo: minor code simplification in _save_compile_vertex_list()
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Fri, 12 Jan 2018 16:52:05 +0000 (09:52 -0700)]
vbo: rename prim to prims
Using a plural name makes it easier to see that this is an array and
not a pointer to a single object.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Fri, 12 Jan 2018 16:48:17 +0000 (09:48 -0700)]
vbo: removed unused ctx parameter for alloc_prim_store()
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Fri, 12 Jan 2018 16:30:42 +0000 (09:30 -0700)]
vbo: rename vbo_save_context::buffer to buffer_map
And move the field and improve comments.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Fri, 12 Jan 2018 16:28:37 +0000 (09:28 -0700)]
vbo: remove unused vbo_save_context::count field
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Fri, 12 Jan 2018 16:27:16 +0000 (09:27 -0700)]
vbo: s/GLuint/GLbitfield/ for vbo_save_context::replay_flags
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Fri, 12 Jan 2018 16:23:37 +0000 (09:23 -0700)]
vbo: rename vbo_save_vertex_list::count to vertex_count
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Fri, 12 Jan 2018 16:18:32 +0000 (09:18 -0700)]
vbo: rename vbo_save_vertex_store::buffer to buffer_map
To match other parts of the VBO code and make things easier to understand.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Fri, 12 Jan 2018 16:12:35 +0000 (09:12 -0700)]
vbo: rename vbo_save_primitive_store::buffer to prims
A little easier to understand.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Fri, 12 Jan 2018 16:07:05 +0000 (09:07 -0700)]
vbo: whitespace fixes in vbo_save.h
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Thu, 11 Jan 2018 23:18:38 +0000 (16:18 -0700)]
vbo: whitespace fixes in vbo_save_draw.c
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Brian Paul [Thu, 11 Jan 2018 18:17:45 +0000 (11:17 -0700)]
svga: add num-commands-per-draw HUD query
This query shows the ratio of total commands vs. drawing commands sent
to the vgpu device. This gives some idea of how many state changes
are sent per draw call. The closer the ratio is to 1.0, the better.
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Brian Paul [Thu, 11 Jan 2018 18:11:04 +0000 (11:11 -0700)]
gallium/hud: Fix support for PIPE_DRIVER_QUERY_TYPE_FLOAT
Evidently, nobody has used PIPE_DRIVER_QUERY_TYPE_FLOAT up to this
point. Adding a driver query of this type which returns the query
value in pipe_query_result::f resulted in garbage output in the HUD.
The problem is the pipe_query_result::f field was being accessed as
through the u64 field and being added to the query_info::results_cumulative
field. This patch checks for PIPE_DRIVER_QUERY_TYPE_FLOAT in a few
places and scales the float by 1000 before converting to uint64_t.
Also, add some comments to explain the query_info::result_index field.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Brian Paul [Thu, 11 Jan 2018 16:57:50 +0000 (09:57 -0700)]
gallium/hud: remove uint64_t casts in sensor query_sti_load() function
The hud_graph_add_value() function takes a double value, so just pass
the current/critical values as-is since they're doubles.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Brian Paul [Thu, 11 Jan 2018 16:56:12 +0000 (09:56 -0700)]
gallium/hud: compute cpu load, percent with doubles
The hud_graph_add_value() function takes a double precision value,
so compute it that way.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Brian Paul [Thu, 11 Jan 2018 16:50:42 +0000 (09:50 -0700)]
gallium/hud: s/unsigned/enum pipe_query_type/
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Jon Turney [Mon, 15 Jan 2018 19:39:46 +0000 (19:39 +0000)]
meson: Set with_dri from with_gallium when DRI glx is explicitly configured
Set with_dri from with_gallium when DRI GLX is explicitly configured, as
well as when DRI GLX is chosen automatically.
Signed-off-by: Jon Turney <jon.turney@dronecode.org.uk>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
George Kyriazis [Wed, 10 Jan 2018 19:54:26 +0000 (13:54 -0600)]
meson: add llvm dependency for swr build
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Leo Liu [Fri, 12 Jan 2018 15:23:35 +0000 (10:23 -0500)]
st/va: add break for MPEG4 data buffer handling case
Signed-off-by: Leo Liu <leo.liu@amd.com>
Leo Liu [Fri, 12 Jan 2018 15:20:06 +0000 (10:20 -0500)]
st/va: remove TODO line for JPEG data buffer handling
Nothing to do
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Rhys Kidd [Wed, 17 Jan 2018 05:48:07 +0000 (00:48 -0500)]
i915: No longer rely on compatability define in intel_bufmgr.h
Symbol rename from dri_* to drm_intel_* introduced a number of compatability
defines within intel_bufmgr.h.
Replace the old function with the new function, consistent with the balance
of this file.
Signed-off-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Timothy Arceri [Fri, 12 Jan 2018 01:38:13 +0000 (12:38 +1100)]
radeonsi: bump glsl version to 450 for nir backend
We still have more work to do but piglit results are looking
pretty good.
At GLSL 1.50 we have 30647/31118 piglit tests passing.
At GLSL 4.50 we have 37927/38551 piglit tests passing.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Timothy Arceri [Wed, 10 Jan 2018 02:52:29 +0000 (13:52 +1100)]
radeonsi/nir: add some missing tcs bits to the nir scan pass
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Timothy Arceri [Tue, 9 Jan 2018 02:50:08 +0000 (13:50 +1100)]
ac: rework load_tcs_{inputs,outputs}
This shares more code and calls the new shared load_tess_varyings()
abi so that the radeonsi nir path now supports tcs output loads.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Timothy Arceri [Tue, 9 Jan 2018 01:12:45 +0000 (12:12 +1100)]
ac/radeonsi: add tcs load outputs support
The code to load outputs is essentially the same as load inputs
so we make the interface more generic to maximise code sharing.
We will make use of the new support in the following patch.
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Timothy Arceri [Mon, 27 Nov 2017 06:01:01 +0000 (17:01 +1100)]
st/glsl_to_tgsi: add ARB_get_program_binary support using TGSI
This resolves a game bug in Dead Island. The game doesn't properly
handle ARB_get_program_binary with 0 supported formats, and ends up
crashing.
This will enable ARB_get_program_binary binary support for any
driver that currently enables the on-disk shader cache.
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85564
Timothy Arceri [Tue, 28 Nov 2017 11:28:31 +0000 (22:28 +1100)]
st/glsl_to_tgsi: add st_get_program_binary_driver_sha1() helper
This will be used by ARB_get_program_binary.
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Timothy Arceri [Tue, 28 Nov 2017 05:00:50 +0000 (16:00 +1100)]
st/glsl_to_tgsi: add (de)serialise program helpers
These will be shared between the on-disk shader cache and
ARB_get_program_binary.
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Timothy Arceri [Tue, 28 Nov 2017 11:02:17 +0000 (22:02 +1100)]
st/glsl_to_tgsi: stop passing pipe_shader_state to st_store_tgsi_in_disk_cache()
We can instead just get this from st_*_program.
V2: store tokens to to st_compute_program before attempting to
write to cache (fixes crash).
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Timothy Arceri [Tue, 28 Nov 2017 10:43:12 +0000 (21:43 +1100)]
st/glsl_to_tgsi: store num_tgsi_tokens in st_*_program
We will need this for ARB_get_program_binary binary support.
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Michel Dänzer [Wed, 3 Jan 2018 11:21:56 +0000 (12:21 +0100)]
loader/dri3: Try to make sure we only process our own NotifyMSC events
We were using a sequence counter value to wait for a specific NotifyMSC
event. However, we can receive events from other clients as well, which
may already be using higher sequence numbers than us. In that case, we
could stop processing after an event from another client, which could
have been received significantly earlier. This would have multiple
undesirable effects:
* The computed MSC and UST values would be lower than they should be
* We could leave a growing number of NotifyMSC events from ourselves and
other clients in XCB's special event queue
I ran into this with Firefox and Thunderbird, whose VSync threads both
seem to use the same window. The result was sluggish screen updates and
growing memory consumption in one of them.
Fix this by checking the XCB sequence number and MSC value of NotifyMSC
events, instead of using our own sequence number.
v2:
* Use the Present event ID for the sequence parameter of the
PresentNotifyMSC request, as another safeguard against processing
events from other clients
* Rebase on drawable mutex changes
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> # v1
Bas Nieuwenhuizen [Tue, 9 Jan 2018 02:35:53 +0000 (03:35 +0100)]
radv: Implement VK_EXT_debug_report.
This is not hooked up to any messages yet, but useful for e.g.
renderdoc if you add some messages during development.
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Bas Nieuwenhuizen [Tue, 9 Jan 2018 02:22:56 +0000 (03:22 +0100)]
vulkan: move anv VK_EXT_debug_report implementation to common code.
For also using it in radv. I moved the remaining stubs back to
anv_device.c as they were just trivial.
This does not move the vk_errorf/anv_perf_warn or the object
type macros, as those depend on anv types and logging.
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Timothy Arceri [Thu, 11 Jan 2018 01:47:31 +0000 (12:47 +1100)]
st/glsl_to_nir: disable io lowering to temps for tess
Lowering these to temps makes a big mess, and results in some
piglit test failures. Also the radeonsi backend (the only backend
to support tess) has support for indirects so there is no need to
lower them anyway.
Fixes the following piglit tests on radeonsi:
tests/spec/arb_tessellation_shader/execution/variable-indexing/tes-input-array-vec3-index-rd.shader_test
tests/spec/arb_tessellation_shader/execution/variable-indexing/tes-input-array-vec4-index-rd.shader_test
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Jason Ekstrand [Sat, 9 Dec 2017 06:21:09 +0000 (22:21 -0800)]
i965: Enable CCS_E sampling of sRGB textures as UNORM
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Tue, 31 Oct 2017 23:29:22 +0000 (16:29 -0700)]
i965/draw: Do resolves properly for textures used by TXF
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Jason Ekstrand [Mon, 18 Dec 2017 03:42:09 +0000 (19:42 -0800)]
i965/miptree: Refactor CCS_E and CCS_D cases in render_aux_usage
This commit unifies the CCS_E and CCS_D cases. This should fix a couple
of subtle issues. One is that when you use INTEL_DEBUG=norbc to disable
CCS_E, we don't get the sRGB blending workaround. By unifying the code,
we give CCS_D that workaround as well.
The second issue fixed by this refactor is that the blending workaround
was appears to be enabled on all gens but really only applies on gen9.
Due to a happy accident in the way code was laid out, it was only
getting enabled on gen9: gen8 and earlier don't support non-zero-one
clear colors, and gen10 supports sRGB for CCS_E so it got caught in the
format_ccs_e_compat_with_miptree case. This refactor moves it above the
format_ccs_e_compat_with_miptree case so it's an explicit early exit and
makes it explicitly only on gen9.
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "17.3" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Tue, 5 Dec 2017 22:41:48 +0000 (14:41 -0800)]
Re-enable regular fast-clears (CCS_D) on gen9+
This reverts commit
ee57b15ec764736e2d5360beaef9fb2045ed0f68, "i965:
Disable regular fast-clears (CCS_D) on gen9+". How taht we've fixed the
issue with too many different aux usages in the render cache, it should
be safe to re-enable CCS_D for sRGB.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104163
Tested-by: Eero Tamminen <eero.t.tamminen@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "17.3" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Thu, 14 Dec 2017 01:25:26 +0000 (17:25 -0800)]
i965: Track format and aux usage in the render cache
This lets us perform render cache flushes whenever a surface goes from
being used with one aux+format to a different aux+format.
This is the "proper" fix for https://bugs.freedesktop.org/102435.
ee57b15ec764736e2d5360beaef9fb2045ed0f68 which was really just a partial
revert of
3e57e9494c2279580ad6a83ab8c065d01e7e634e was just a hack to
get rid of a hang in a bunch of Valve games. This solves the actual
problem responsible for the hang and lets us enable CCS_E once again.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102435
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "17.3" <mesa-stable@lists.freedesktop.org>
Jason Ekstrand [Thu, 14 Dec 2017 01:23:41 +0000 (17:23 -0800)]
i965: Call brw_cache_flush_for_render in predraw_resolve_framebuffer
This makes sure we flush things out of other caches prior to using a
surface through the render cache. Currently, this is a no-op because GL
won't let you bind anything other than a color surface as color so it
should never end up in the depth cache. However, this does complete the
flush/add_bo pair for regular drawing which will be required for the
next commit.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Cc: "17.3" <mesa-stable@lists.freedesktop.org>
Francisco Jerez [Fri, 17 Nov 2017 22:07:21 +0000 (14:07 -0800)]
i965/gen6-7/sol: Bump primitive counter BO size.
Improves performance of SynMark2 OglGSCloth by a further 9.65%±0.59%
due to the reduction in overwraps of the primitive count buffer that
lead to a CPU stall on previous rendering. Cummulative performance
improvement from the series 81.50% ±0.96% (data gathered on VLV).
Tested-By: Eero Tamminen <eero.t.tamminen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Thu, 16 Nov 2017 22:27:41 +0000 (14:27 -0800)]
i965/gen6-7/sol: Keep independent counters for the current and previous begin/end block.
This allows us to aggregate the primitive counts of a completed
transform feedback begin/end block lazily, which in the most typical
case (where glDrawTransformFeedback is not used) will allow us to
avoid aggregating the primitive counters on the CPU altogether,
preventing a stall on previous rendering during
glBeginTransformFeedback(), which dramatically improves performance of
applications that rely heavily on transform feedback.
Improves performance of SynMark2 OglGSCloth by 65.52% ±0.25% (data
gathered on VLV).
Tested-By: Eero Tamminen <eero.t.tamminen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Francisco Jerez [Fri, 17 Nov 2017 22:06:04 +0000 (14:06 -0800)]
i965/gen6-7/sol: Restructure primitive counter into a separate type.
A primitive counter encapsulates a scalar aggregating counter for each
vertex stream along with a section within the primitive tally buffer
which hasn't been read out yet. Defining this as a separate type will
allow us to keep multiple counter objects around for the same
transform feedback object without any code duplication.
Tested-By: Eero Tamminen <eero.t.tamminen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Timothy Arceri [Fri, 12 Jan 2018 05:42:47 +0000 (16:42 +1100)]
st/mesa: enable ARB_enhanced_layouts on nir drivers
I'm guessing this may have been disable because of missing
component packing support. However recent nir linking changes
required nir based gallium drivers to support component packing
so this should now be ok to enable.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Roland Scheidegger [Tue, 16 Jan 2018 16:55:00 +0000 (17:55 +0100)]
draw: remove VSPLIT_CREATE_IDX macro
Just inline the little bit of code.
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Roland Scheidegger [Tue, 16 Jan 2018 02:01:56 +0000 (03:01 +0100)]
draw: fix vsplit code when the (post-bias) index value is -1
vsplit_add_cache uses the post-bias index for hashing, but the
vsplit_add_cache_uint/ushort/ubyte ones used the pre-bias index, therefore
the code for handling the special case (because -1 matches the initialization
value of the cache) wasn't actually working.
Commit
78a997f72841310620d18daa9015633343d04db1 actually simplified the
cache logic somewhat, but it looks like this particular problem carried over
(and duplicated to the ushort/ubyte cases, since before only uint needed it).
This could lead to the vsplit cache doing the wrong thing, in particular
later fetch_info might indicate there are 0 values to fetch. This only really
affected edge cases which were bogus to begin with, but it could lead to a
crash with the jit vertex shader, since it cannot handle this case correctly
(the count loop is always executed at least once and we would not allocate
any memory for the shader outputs), so add another assert to catch it there.
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Grazvydas Ignotas [Mon, 15 Jan 2018 21:59:20 +0000 (23:59 +0200)]
st/va: release held locks in error paths
Found with the help of following Coccinelle semantic patch:
// <smpl>
@@
expression E;
@@
\(pthread_mutex_lock\|mtx_lock\|simple_mtx_lock\)(E)
...
(
\(pthread_mutex_unlock\|mtx_unlock\|simple_mtx_unlock\)(E);
...
return ...;
|
+ maybe need_unlock(E);
return ...;
)
// </smpl>
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: mesa-stable@lists.freedesktop.org
Grazvydas Ignotas [Sun, 14 Jan 2018 21:45:05 +0000 (23:45 +0200)]
mesa: remove unneeded semicolons
Trivial. Found by Coccinelle.
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Grazvydas Ignotas [Sun, 14 Jan 2018 21:40:25 +0000 (23:40 +0200)]
radeon: remove unneeded semicolons
Trivial. Found by Coccinelle.
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>