Dylan Baker [Mon, 30 Oct 2017 18:31:45 +0000 (11:31 -0700)]
meson: set visibility flags on gbm
This is done in autotools, and is an oversight in the meson build.
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Tested-by: Eric Engestrom <eric.engestrom@imgtec.com>
Dylan Baker [Mon, 30 Oct 2017 18:30:34 +0000 (11:30 -0700)]
meson: Don't link gbm with threads
It's supposed to be linked with pthread-stubs (if the platform needs
pthread-stubs). Pthread stubs support isn't (yet) implemented in the
meson build, so add a TODO.
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Dylan Baker [Mon, 30 Oct 2017 17:27:48 +0000 (10:27 -0700)]
meson: Use true and false instead of yes and no for tristate options
This allows a user to not care whether they're setting a tristate or a
boolean option, which is a nice user facing feature, and something I've
personally run into.
Suggested-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Andrey Grodzovsky [Tue, 31 Oct 2017 15:40:12 +0000 (11:40 -0400)]
winsys/amdgpu: Add R600_DEBUG flag to reserve VMID per ctx.
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Erik Faye-Lund [Wed, 25 Oct 2017 08:02:38 +0000 (10:02 +0200)]
meson: do not search for needless deps
If we don't want to use these deps, there's no good reason to search
for them in the first place. This should shave a bit of time for the
initial build.
Signed-off-by: Erik Faye-Lund <kusmabite@gmail.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Samuel Pitoiset [Mon, 30 Oct 2017 18:37:39 +0000 (19:37 +0100)]
radv: bail out when binding the same vertex buffers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Mon, 30 Oct 2017 16:12:05 +0000 (17:12 +0100)]
radv: bail out when binding the same index buffer
DOW3 appears to hit this path.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Erik Faye-Lund [Sat, 28 Oct 2017 12:36:04 +0000 (14:36 +0200)]
meson: use dep_m in libgallium
The u_format_other.c users sqrtf, which on some systems require
a math-library. So let's make sure we link with it.
Signed-off-by: Erik Faye-Lund <kusmabite@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Timothy Arceri [Tue, 31 Oct 2017 00:31:19 +0000 (11:31 +1100)]
radv: use correct alloc function when loading from disk
Fixes regression in:
dEQP-VK.api.object_management.alloc_callback_fail.graphics_pipeline
Fixes:
1e84e53712ae "radv: add cache items to in memory cache when reading from disk"
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Plamena Manolova [Mon, 30 Oct 2017 21:14:24 +0000 (21:14 +0000)]
i965: Fix ARB_indirect_parameters logic.
This patch modifies the ARB_indirect_parameters logic in
brw_draw_prims, so that our implementation isn't affected if
another application attempts to use predicates. Previously we
were using a predicate with a DELTAS_EQUAL comparison operation
and relying on the MI_PREDICATE_DATA register being 0. Our code
to initialize MI_PREDICATE_DATA to 0 was incorrect, so we were
accidentally using whatever value was written there. Because the
kernel does not initialize the MI_PREDICATE_DATA register on
hardware context creation, we might inherit the value from whatever
context was last running on the GPU (likely another process).
The Haswell command parser also does not currently allow us to write
the MI_PREDICATE_DATA register. Rather than fixing this and requiring
an updated kernel, we switch to a different approach which uses a
SRCS_EQUAL predicate that makes no assumptions about the states of any
of the predicate registers.
Fixes Piglit's spec/arb_indirect_parameters/tf-count-arrays test.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103085
Signed-off-by: Plamena Manolova <plamena.manolova@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Fri, 20 Oct 2017 22:38:52 +0000 (15:38 -0700)]
i965: Don't flag BRW_NEW_SURFACES unless some push constants are dirty.
Due to a gaffe on my part, we were re-emitting all binding table entries
on every single draw call. The push_constant_packets atom listens to
BRW_NEW_DRAW_CALL, but skips emitting 3DSTATE_CONSTANT_XS for each stage
unless stage_state->push_constants_dirty is true. However, it flagged
BRW_NEW_SURFACES unconditionally at the end, by mistake.
Instead, it should only flag it if we actually emit 3DSTATE_CONSTANT_XS
for a stage. We can move it a few lines up, inside the loop - the early
continues will skip over it if push constants aren't dirty for a stage.
With INTEL_NO_HW=1 set, improves performance of GFXBench5 gl_driver_2
on Apollolake at 1280x720 by 1.01122% +/- 0.470723% (n=35).
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Kenneth Graunke [Thu, 26 Oct 2017 03:33:33 +0000 (20:33 -0700)]
intel/genxml: Fix decoding of groups with fields smaller than a DWord.
Groups containing fields smaller than a DWord were not being decoded
correctly. For example:
<group count="32" start="32" size="4">
<field name="Vertex Element Enables" start="0" end="3" type="uint"/>
</group>
gen_field_iterator_next would properly walk over each element of the
array, incrementing group_iter, and calling iter_group_offset_bits()
to advance to the proper DWord. However, the code to print the actual
values only considered iter->field->start/end, which are 0 and 3 in the
above example. So it would always fetch bits 3:0 of the current DWord
when printing values, instead of advancing to each element of the array,
printing bits 0-3, 4-7, 8-11, and so on.
To fix this, we add new iter->start/end tracking, which properly
advances for each instance of a group's field.
Caught by Matt Turner while working on 3DSTATE_VF_COMPONENT_PACKING,
with a patch to convert it to use an array of bitfields (the example
above).
This also fixes the decoding of 3DSTATE_SBE's "Attribute Active
Component Format" fields.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Ian Romanick [Thu, 26 Oct 2017 22:32:09 +0000 (15:32 -0700)]
glsl: Fix bad formatting in a comment
Trivial
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Eric Anholt [Fri, 27 Oct 2017 22:52:22 +0000 (15:52 -0700)]
broadcom/vc5: Force blending to treat alpha as 1 for formats without alpha.
Fixes fbo-blending-formats on RGB8 and 565. We will still need to demote
blending to shader code in the MRT case to fix it in general, but that can
be added when we start doing 32F blending (which also needs to be done in
the shader).
Eric Anholt [Fri, 27 Oct 2017 21:41:35 +0000 (14:41 -0700)]
broadcom/vc5: Do BGRA vs RGBA swapping for the BLEND_CONSTANT_COLOR.
Fixes many of the fbo-blending-formats tests.
Eric Anholt [Fri, 27 Oct 2017 21:13:46 +0000 (14:13 -0700)]
broadcom/vc5: Pack clear colors according to the TLB internal format/type.
The previous packing I did got us all the R*16F and R*32F formats, where
the pipe format basically matched the TLB's format, but since the clear
color will just be memcpyed to the TLB, we should be looking at its format
for deciding how to pack.
Fixes RGB565, RGB5_A1 and RGBA10 fbo-clear-formats tests and improves
4444.
Eric Anholt [Mon, 30 Oct 2017 17:13:52 +0000 (10:13 -0700)]
broadcom/vc5: Don't do r/b channel swapping on 565.
The HW's format actually matches the gallium format.
Eric Anholt [Fri, 27 Oct 2017 21:08:02 +0000 (14:08 -0700)]
broadcom/vc5: Use the proper gallium format for our RGB10_A2.
This keeps us from needing our own reswizzling of the B vs R fields.
Eric Anholt [Fri, 27 Oct 2017 20:27:22 +0000 (13:27 -0700)]
broadcom/vc5: Add some comments about the texture/output format ordering.
The output formats are consistent with their channels appearing from low
to high in their name. Textures are interpreted the same way, but their
names may have the channels swapped around. I'm retaining the texture
names so that we are consistent with the documentation, but I want to
leave a warning for others.
Eric Anholt [Thu, 26 Oct 2017 23:03:59 +0000 (16:03 -0700)]
broadcom/vc5: Drop duplicated setup of clip_window_height_in_pixels.
Eric Anholt [Thu, 26 Oct 2017 22:59:21 +0000 (15:59 -0700)]
broadcom/vc5: Don't forget to actually turn on stencil testing.
I had the rest of stencil state set up, but forgot to actually enable it
in the higher level configuration bits packet.
Eric Anholt [Thu, 26 Oct 2017 22:40:38 +0000 (15:40 -0700)]
broadcom/vc5: Stop lowering negates to subs.
In the case of fneg(0.0), we were getting back 0.0 instead of -0.0. We
were also needing an immediate 0 value for ineg, when there's an opcode to
do the job properly.
Fixes fs-floatBitsToInt-neg.shader_test.
Eric Anholt [Wed, 25 Oct 2017 20:00:44 +0000 (13:00 -0700)]
broadcom/vc5: Set up MSAA texture type according to the internal format.
It gets most of EXT_framebuffer_multisample-formats passing, but doesn't
really work for texture views.
Eric Anholt [Wed, 25 Oct 2017 19:51:04 +0000 (12:51 -0700)]
broadcom/vc5: Use the sampler view's format, not the resource's.
This should help with texture views, though I just noticed this while
reading the code.
Eric Anholt [Wed, 25 Oct 2017 19:29:51 +0000 (12:29 -0700)]
broadcom/vc5: Emit raw loads for MSAA buffers.
Similar to stores, but we also need to emit dummy stores in between each
load, to flush out the previous queued load.
Eric Anholt [Tue, 24 Oct 2017 20:28:53 +0000 (13:28 -0700)]
broadcom/vc5: Use raw stores for MSAA buffers.
We were storing the resolved pixels in all cases, but nr_samples > 0 means
we should be keeping the per-sample values.
We will probably want to change the job structure at some point, as we'll
want to recognize full-buffer resolves and do the resolved store in the
same job as the original rendering, meaning we'll need to track both the
MSAA and single-sample resources in the job. However, this will be enough
to build the rest of the MSAA support.
Eric Anholt [Tue, 24 Oct 2017 19:16:50 +0000 (12:16 -0700)]
broadcom/vc5: Add lowering for txf_ms to a txf on a 2x2-scaled texture.
The HW has no native sampler support for multisample textures, but since
we only need to support txf_ms and the layout is UIF, we just need to
scale up the texcoords and then add in the sample.
This drops the old TEXTURE_MSAA_ADDR special uniform, since we're treating
MSAA textures as textures, rather than basically texbos like VC4 had to.
Eric Anholt [Wed, 25 Oct 2017 01:45:57 +0000 (18:45 -0700)]
broadcom/vc5: Lay out MSAA textures/renderbuffers as UIF scaled by 4.
We just need to multiply width/height by 2 each, and always set them up as
UIF tiling, since that's how the TLB will store them in raw (per-sample)
mode.
Eric Anholt [Wed, 25 Oct 2017 01:35:00 +0000 (18:35 -0700)]
broadcom/vc5: Keep output height pad out of the store TLB general address.
The equivalent load already had the pad separated out.
Eric Anholt [Wed, 25 Oct 2017 02:14:29 +0000 (19:14 -0700)]
broadcom/vc5: Drop padding bits from the texture shader state's address.
Eric Anholt [Wed, 25 Oct 2017 02:14:08 +0000 (19:14 -0700)]
broadcom/vc5: Drop alignment bits from texture P1's address.
Eric Anholt [Wed, 25 Oct 2017 02:13:17 +0000 (19:13 -0700)]
broadcom/vc5: Drop alignment bits from Z/S rendering mode config address.
Improves CLIF dumping output.
Eric Anholt [Wed, 25 Oct 2017 02:10:37 +0000 (19:10 -0700)]
broadcom/xml: Fix address packing for address with >= 8 alignment bits.
We were handing the intra-byte padding fine, but with a 24-bit address
(bottom 8 bits implied 0) we would end up off by 8 bytes in our shift,
impacting vc5's load/store general packets (all other packets we have had
<8 bits of padding).
Eric Anholt [Wed, 25 Oct 2017 00:55:03 +0000 (17:55 -0700)]
broadcom/clif: Print out the contents of the generic tile list.
This is the real meat of the RCL, so let's get it printed again.
Eric Anholt [Wed, 25 Oct 2017 00:52:31 +0000 (17:52 -0700)]
broadcom/clif: Move the CL printing part of CL dumps to a helper.
This will let me reuse the printing for processing branches to other CLs.
Eric Anholt [Tue, 24 Oct 2017 20:08:17 +0000 (13:08 -0700)]
broadcom/vc5: Lower unpack_*_4x8 to normal math.
We only have 2x16 unpacking in our ALUs. To enable this, we also need
lower_fdiv for its new instructions, which had been handled at a higher
level previously.
Eric Anholt [Tue, 24 Oct 2017 19:29:39 +0000 (12:29 -0700)]
broadcom/vc5: Add PIPE_TEX_WRAP_CLAMP support for linear-filtered textures.
I already had the texture's wrapping set up to use different behavior for
nearest or linear, so we just needed to saturate the coordinates in linear
mode to get the "proper" blend between the edge and border values.
Eric Anholt [Tue, 24 Oct 2017 17:36:07 +0000 (10:36 -0700)]
broadcom/vc5: Disable GL_ARB_transform_feedback3.
We don't seem to have a way to generally handle gl_SkipComponents.
Eric Anholt [Tue, 24 Oct 2017 17:12:37 +0000 (10:12 -0700)]
broadcom/vc5: Fix gl_FragCoord pixel center setup.
Fixes glsl-arb-fragment-coord-conventions.
Eric Anholt [Tue, 24 Oct 2017 16:53:32 +0000 (09:53 -0700)]
broadcom/vc5: Always set up 1D textures as raster order.
1D is the exception to "all V3D textures are tiled", since tiling 1D
textures would just waste memory and cache space. This ended up being a
problem once we started actually marking 1D textures as 1D instead of 2D.
Eric Anholt [Mon, 23 Oct 2017 19:47:28 +0000 (12:47 -0700)]
broadcom/xml: Throw an #error in XML-based codegen for a >1bit bool
I've debugged two nasty errors now due to copy-and-pasting a bool type
when writing a uint field. Make sure I don't do that again.
Eric Anholt [Mon, 23 Oct 2017 19:45:59 +0000 (12:45 -0700)]
broadcom/vc4: Fix bool marking on Rasterizer Oversample Mode.
We don't set this field using the XML codegen, but this would help us
decode the right value in case of 16x (VG) oversampling.
Eric Anholt [Mon, 23 Oct 2017 19:40:35 +0000 (12:40 -0700)]
broadcom/vc5: Mark lookup type as uint, not bool.
Fixes non-2D texturing.
Eric Anholt [Mon, 23 Oct 2017 17:30:37 +0000 (10:30 -0700)]
broadcom/vc5: Fix GPU hang with no vertex elements used by the VS.
Like VC4, we need to at least have one element set up, but unlike VC4 it
seems we don't need to read it to keep the HW happy. Fixes GPU hangs with
glsl-no-vertex-attribs.shader_test.
Eric Engestrom [Sun, 29 Oct 2017 22:06:28 +0000 (22:06 +0000)]
git_sha1_gen: create empty file in fallback path
I missed this part in my conversion, the old stream redirection meant
the file was always created.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103496
Fixes:
7088622e5fb506b64c90 "buildsys: move file regeneration logic to
the script itself"
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Lionel Landwerlin [Fri, 27 Oct 2017 16:44:14 +0000 (17:44 +0100)]
intel: common: silence compiler warning
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Eduardo Lima Mitev [Sun, 5 Mar 2017 19:28:43 +0000 (20:28 +0100)]
glsl/linker: Check that re-declared, inter-shader built-in blocks match
>From GLSL 4.5 spec, section "7.1 Built-In Language Variables", page 130 of
the PDF states:
"If multiple shaders using members of a built-in block belonging to
the same interface are linked together in the same program, they must
all redeclare the built-in block in the same way, as described in
section 4.3.9 “Interface Blocks” for interface-block matching, or a
link-time error will result."
Fixes:
* GL45-CTS.CommonBugs.CommonBug_PerVertexValidation
v2 (Neil Roberts):
Explicitly look for gl_PerVertex in the symbol tables instead of
waiting to find a variable in the interface.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102677
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Eduardo Lima Mitev <elima@igalia.com>
Signed-off-by: Neil Roberts <nroberts@igalia.com>
Eduardo Lima Mitev [Sun, 5 Mar 2017 19:28:42 +0000 (20:28 +0100)]
glsl: Use the utility function to copy symbols between symbol tables
This effectively factorizes a couple of similar routines.
v2 (Neil Roberts): Non-trivial rebase on master
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Eduardo Lima Mitev <elima@igalia.com>
Signed-off-by: Neil Roberts <nroberts@igalia.com>
Eduardo Lima Mitev [Sun, 5 Mar 2017 19:28:41 +0000 (20:28 +0100)]
glsl_parser_extra: Add utility to copy symbols between symbol tables
Some symbols gathered in the symbols table during parsing are needed
later for the compile and link stages, so they are moved along the
process. Currently, only functions and non-temporary variables are
copied between symbol tables. However, the built-in gl_PerVertex
interface blocks are also needed during the linking stage (the last
step), to match re-declared blocks of inter-stage shaders.
This patch adds a new utility function that will factorize current code
that copies functions and variables between two symbol tables, and in
addition will copy explicitly declared gl_PerVertex blocks too.
The function will be used in a subsequent patch.
v2 (Neil Roberts):
Allow the src symbol table to be NULL and explicitly copy the
gl_PerVertex symbols in case they are not referenced in the exec_list.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Eduardo Lima Mitev <elima@igalia.com>
Signed-off-by: Neil Roberts <nroberts@igalia.com>
Eric Engestrom [Mon, 30 Oct 2017 10:35:34 +0000 (10:35 +0000)]
i965: remove unused variable
Fixes:
2c873060d3578c7004c0 "i965: Delete unused
brw_vs_prog_data::nr_attributes field."
Cc: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Eduardo Lima Mitev <elima@igalia.com>
Eric Engestrom [Tue, 24 Oct 2017 15:08:15 +0000 (16:08 +0100)]
meson: wire up egl/android
Cc: Rob Herring <robh@kernel.org>
Cc: Tomasz Figa <tfiga@chromium.org>
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Ian Romanick [Fri, 8 May 2015 19:55:00 +0000 (12:55 -0700)]
glsl: Remove ir_binop_greater and ir_binop_lequal expressions
NIR does not have these instructions. TGSI and Mesa IR both implement
them using < and >=, repsectively. Removing them deletes a bunch of
code and means I don't have to add code to the SPIR-V generator for
them.
v2: Rebase on 2+ years of change... and fix a major bug added in the
rebase.
text data bss dec hex filename
8255291 268856 294072 8818219 868e2b 32-bit i965_dri.so before
8254235 268856 294072 8817163 868a0b 32-bit i965_dri.so after
7815339 345592 420592 8581523 82f193 64-bit i965_dri.so before
7813995 345560 420592 8580147 82ec33 64-bit i965_dri.so after
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Ian Romanick [Wed, 20 Sep 2017 21:19:15 +0000 (16:19 -0500)]
glsl/parser: Track built-in types using the glsl_type directly
Without the lexer changes, tests/glslparsertest/glsl2/tex_rect-02.frag
fails. Before this change, the parser would determine that
sampler2DRect is not a valid type because the call to
state->symbols->get_type() in ast_type_specifier::glsl_type() would
return NULL. Since ast_type_specifier::glsl_type() is now going to
return the glsl_type pointer that it received from the lexer, it doesn't
have an opportunity to generate an error.
text data bss dec hex filename
8255243 268856 294072 8818171 868dfb 32-bit i965_dri.so before
8255291 268856 294072 8818219 868e2b 32-bit i965_dri.so after
7815195 345592 420592 8581379 82f103 64-bit i965_dri.so before
7815339 345592 420592 8581523 82f193 64-bit i965_dri.so after
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Ian Romanick [Wed, 20 Sep 2017 21:05:54 +0000 (16:05 -0500)]
glsl/parser: Return the glsl_type object from the lexer
This allows us to use a single token for every built-in type except void.
text data bss dec hex filename
8275163 269336 294072 8838571 86ddab 32-bit i965_dri.so before
8255243 268856 294072 8818171 868dfb 32-bit i965_dri.so after
7836963 346552 420592 8604107 8349cb 64-bit i965_dri.so before
7815195 345592 420592 8581379 82f103 64-bit i965_dri.so after
Yes, the 64-bit binary shrinks by 21k.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Ian Romanick [Thu, 21 Sep 2017 17:14:04 +0000 (12:14 -0500)]
glsl/parser: Allocate identifier inside classify_identifier
Passing YYSTYPE into classify_identifier enables a later patch.
text data bss dec hex filename
8310339 269336 294072 8873747 876713 32-bit i965_dri.so before
8275163 269336 294072 8838571 86ddab 32-bit i965_dri.so after
7845579 346552 420592 8612723 836b73 64-bit i965_dri.so before
7836963 346552 420592 8604107 8349cb 64-bit i965_dri.so after
Yes, the 64-bit binary shrinks by 8k.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Ian Romanick [Tue, 26 Sep 2017 03:29:35 +0000 (20:29 -0700)]
glsl/parser: Move anonymous struct name handling to the parser
There are two callers of the constructor, and they are right next to
each other. Move the "#anon_struct" name handling to the parser so that
the conditional can be removed.
I've also deleted part of the comment (about the memory leak) because I
don't think it's quite accurate or relevant.
text data bss dec hex filename
8310399 269336 294072 8873807 87674f 32-bit i965_dri.so before
8310339 269336 294072 8873747 876713 32-bit i965_dri.so after
7845611 346552 420592 8612755 836b93 64-bit i965_dri.so before
7845579 346552 420592 8612723 836b73 64-bit i965_dri.so after
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Ian Romanick [Tue, 26 Sep 2017 01:07:50 +0000 (18:07 -0700)]
glsl/parser: Silence unused parameter warning
glsl/glsl_parser_extras.cpp: In constructor ‘ast_struct_specifier::ast_struct_specifier(void*, const char*, ast_declarator_list*)’:
glsl/glsl_parser_extras.cpp:1675:50: warning: unused parameter ‘lin_ctx’ [-Wunused-parameter]
ast_struct_specifier::ast_struct_specifier(void *lin_ctx, const char *identifier,
^~~~~~~
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Ian Romanick [Tue, 26 Sep 2017 01:06:17 +0000 (18:06 -0700)]
glsl: Silence unused parameter warnings
glsl/standalone_scaffolding.cpp: In function ‘GLbitfield _mesa_program_state_flags(const gl_state_index*)’:
glsl/standalone_scaffolding.cpp:103:66: warning: unused parameter ‘state’ [-Wunused-parameter]
_mesa_program_state_flags(const gl_state_index state[STATE_LENGTH])
^
glsl/standalone_scaffolding.cpp: In function ‘char* _mesa_program_state_string(const gl_state_index*)’:
glsl/standalone_scaffolding.cpp:109:67: warning: unused parameter ‘state’ [-Wunused-parameter]
_mesa_program_state_string(const gl_state_index state[STATE_LENGTH])
^
glsl/standalone_scaffolding.cpp: In function ‘void _mesa_delete_shader(gl_context*, gl_shader*)’:
glsl/standalone_scaffolding.cpp:115:40: warning: unused parameter ‘ctx’ [-Wunused-parameter]
_mesa_delete_shader(struct gl_context *ctx, struct gl_shader *sh)
^~~
glsl/standalone_scaffolding.cpp: In function ‘void _mesa_delete_linked_shader(gl_context*, gl_linked_shader*)’:
glsl/standalone_scaffolding.cpp:123:47: warning: unused parameter ‘ctx’ [-Wunused-parameter]
_mesa_delete_linked_shader(struct gl_context *ctx,
^~~
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Mauro Rossi [Fri, 27 Oct 2017 19:54:14 +0000 (21:54 +0200)]
Android: move drivers' symlinks to /vendor (v2)
Having moved gallium_dri.so library to /vendor/lib/dri
also symlinks need to be coherently created using TARGET_OUT_VENDOR instead of TARGET_OUT
or all non Intel drivers will not be loaded with Android N and earlier,
thus causing SurfaceFlinger SIGABRT
(v2) simplification of post install command
Fixes:
c3f75d483c ("Android: move libraries to /vendor")
Cc: 17.3 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com> (v1)
Reviewed-by: Rob Herring <robh@kernel.org> (v1)
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Mon, 30 Oct 2017 15:32:56 +0000 (15:32 +0000)]
Revert "foo"
This reverts commit
27d5a7bce09aef83d3349cca5f3777007b3b94b6.
I fat fingered it, failing to reset the checkout before applying the
sequential commit.
Emil Velikov [Mon, 30 Oct 2017 15:24:00 +0000 (15:24 +0000)]
docs/release-calendar: update - 17.3.0-rc2 is out
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Emil Velikov [Wed, 25 Oct 2017 13:52:55 +0000 (14:52 +0100)]
foo
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Lionel Landwerlin [Fri, 27 Oct 2017 16:43:45 +0000 (17:43 +0100)]
util: hashtable: make hashing prototypes match
It seems nobody's using the string hashing function. If you try to
pass it directly to the hashtable creation function, you'll get
compiler warning for non matching prototypes. Let's make them match.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Andres Gomez [Mon, 30 Oct 2017 14:58:51 +0000 (16:58 +0200)]
docs: update calendar, add news item and link release notes for 17.2.4
Signed-off-by: Andres Gomez <agomez@igalia.com>
Andres Gomez [Mon, 30 Oct 2017 14:53:44 +0000 (16:53 +0200)]
docs: add sha256 checksums for 17.2.4
Signed-off-by: Andres Gomez <agomez@igalia.com>
Andres Gomez [Mon, 30 Oct 2017 14:46:20 +0000 (16:46 +0200)]
docs: add release notes for 17.2.4
Signed-off-by: Andres Gomez <agomez@igalia.com>
Alex Smith [Mon, 30 Oct 2017 08:38:14 +0000 (08:38 +0000)]
radv: Fix -Wformat-security issue
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103513
Fixes:
de889794134e ("radv: Implement VK_AMD_shader_info")
Signed-off-by: Alex Smith <asmith@feralinteractive.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Timothy Arceri [Wed, 25 Oct 2017 22:35:48 +0000 (09:35 +1100)]
radv: add cache items to in memory cache when reading from disk
Otherwise we will leak them, load duplicates from disk rather
than memory and never write items loaded from disk to the apps
pipeline cache.
Fixes:
fd24be134ffd 'radv: make use of on-disk cache'
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Tapani Pälli [Fri, 27 Oct 2017 11:49:40 +0000 (14:49 +0300)]
i965: fix blorp stage_prog_data->param leak
Patch uses mem_ctx for allocation to ensure param array gets freed
later.
==6164== 48 bytes in 1 blocks are definitely lost in loss record 61 of 193
==6164== at 0x4C2EB6B: malloc (vg_replace_malloc.c:299)
==6164== by 0x12E31C6C: ralloc_size (ralloc.c:121)
==6164== by 0x130189F1: fs_visitor::assign_constant_locations() (brw_fs.cpp:2095)
==6164== by 0x13022D32: fs_visitor::optimize() (brw_fs.cpp:5715)
==6164== by 0x13024D5A: fs_visitor::run_fs(bool, bool) (brw_fs.cpp:6229)
==6164== by 0x1302549A: brw_compile_fs (brw_fs.cpp:6570)
==6164== by 0x130C4B07: blorp_compile_fs (blorp.c:194)
==6164== by 0x130D384B: blorp_params_get_clear_kernel (blorp_clear.c:79)
==6164== by 0x130D3C56: blorp_fast_clear (blorp_clear.c:332)
==6164== by 0x12EFA439: do_single_blorp_clear (brw_blorp.c:1261)
==6164== by 0x12EFC4AF: brw_blorp_clear_color (brw_blorp.c:1326)
==6164== by 0x12EFF72B: brw_clear (brw_clear.c:297)
Fixes:
8d90e28839 ("intel/compiler: Allocate pull_param in assign_constant_locations")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable@lists.freedesktop.org
Kevin Rogovin [Mon, 25 Sep 2017 10:34:05 +0000 (13:34 +0300)]
i965: correctly assign SamplerCount of INTERFACE_DESCRIPTOR_DATA
We were dividing by 4 twice. This also papered over a bug where we
were neglecting to clamp the sampler count to the [0, 16] range.
This should have no functional impact, it only affects prefetching.
v2 [Kenneth Graunke]:
- Clamp sampler_count to [0, 16] to avoid overflowing the valid values
for this field. Write a commit message.
Signed-off-by: Kevin Rogovin <kevin.rogovin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Kenneth Graunke [Thu, 26 Oct 2017 22:22:45 +0000 (15:22 -0700)]
i965: Only set key->high_quality_derivatives when it matters.
This avoids recompiles for shaders that don't use explicit derivatives
when ctx->Hint.FragmentShaderDerivative == GL_NICEST.
For example, GFXBench 5 Aztec Ruins sets the GL_NICEST hint before
compiling any shaders, but none of them use dFdx() or dFdy() - only
implicit derivatives. This doesn't eliminate any recompiles, but
does eliminate one of the reasons for doing so.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Thu, 26 Oct 2017 22:19:25 +0000 (15:19 -0700)]
nir: Make nir_gather_info collect a uses_fddx_fddy flag.
i965 turns fddx/fddy into their coarse/fine variants based on the
ctx->Hint.FragmentShaderDerivative setting. It needs to know whether
this can impact a shader in order to better guess NOS settings.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Thu, 26 Oct 2017 21:58:26 +0000 (14:58 -0700)]
i965: Update brw_wm_debug_recompile() for newer key entries.
Also, reorder them to match the structure's field order, to make it
easier to check that they're all present.
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Kenneth Graunke [Thu, 26 Oct 2017 21:57:41 +0000 (14:57 -0700)]
i965: Delete brw_wm_prog_key::drawable_height.
This has been unused since we switched to nir_lower_wpos_ytransform.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Alex Smith [Fri, 27 Oct 2017 13:25:05 +0000 (14:25 +0100)]
radv: Implement VK_AMD_shader_info
This allows an app to query shader statistics and get a disassembly of
a shader. RenderDoc git has support for it, so this allows you to view
shader disassembly from a capture.
When this extension is enabled on a device (or when tracing), we now
disable pipeline caching, since we don't get the shader debug info when
we retrieve cached shaders.
v2: Improvements to resource usage reporting
v3: Disassembly string must be null terminated (string_buffer's length
does not include the terminator)
v4: Fixed LDS reporting. (Bas)
Signed-off-by: Alex Smith <asmith@feralinteractive.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Christian Gmeiner [Sat, 28 Oct 2017 15:24:58 +0000 (17:24 +0200)]
etnaviv: add ext_texture_srgb support
Following piglits are passing:
- glean@texture_srgb
- spec@ext_texture_srgb@fbo-srgb
- spec@ext_texture_srgb@tex-srgb
- spec@ext_texture_srgb@texwrap formats
- spec@ext_texture_srgb@texwrap formats-s3tc
Btw. this enables GL 2.1 :-)
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Wladimir J. van der Laan <laanwj@gmail.com>
Topi Pohjolainen [Wed, 25 Oct 2017 13:50:11 +0000 (16:50 +0300)]
intel/compiler/gen9: Pixel shader header only workaround
Fixes intermittent GPU hangs on Broxton with an Intel internal
test case.
There are plenty of similar fragment shaders in piglit that do
not use any varyings and any uniforms. According to the
documentation special timing is needed between pipeline stages.
Apparently we just don't hit that with piglit. Even with the
failing test case one doesn't always get the hang.
Moreover, according to the error states the hang happens
significantly later than the execution of the problematic shader.
There are multiple render cycles (primitive submissions) in between.
I've also seen error states where the ACTHD points outside the
batch. Almost as if the hardware writes somewhere that gets used
later on. That would also explain why piglit doesn't suffer from
this - most tests kick off one render cycle and any corruption
is left unseen.
v2 (Ken): Instead of enabling push constants, enable one of the
inputs (PSIZ).
v3 (Ken, Jason): Use LAYER instead making vulkan emit_3dstate_sbe()
happy.
Cc: "17.3 17.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Brian Paul [Fri, 27 Oct 2017 22:34:41 +0000 (16:34 -0600)]
scons: fix OSMesa driver build
Fixes:
ea53d9a8eb5d4b2 "glapi: include generated headers without path"
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Brian Paul [Fri, 27 Oct 2017 21:14:45 +0000 (15:14 -0600)]
scons: fix scons build to find generated glapitable.h
Fixes:
ea53d9a8eb5d4b2 "glapi: include generated headers without path"
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Brian Paul [Fri, 27 Oct 2017 20:36:01 +0000 (14:36 -0600)]
gallium: s/unsigned/enum pipe_prim_type/
In the vbuf_render::set_primitive() functions.
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Roland Scheidegger [Thu, 26 Oct 2017 19:23:27 +0000 (21:23 +0200)]
draw: don't cull tris with zero area
Culling tris with zero area seems like a great idea, but apparently with
fill mode line (and point) we're supposed to draw them, at least some tests
for some other state tracker complained otherwise.
Such tris also always seem to be back facing (not sure if this can be
inferred from anything, since in a mathematical sense it cannot really be
determined), so make sure to account for this when filling in the face
information.
(For solid tris, this is of course unnecessary, drivers will throw the tris
away later in any case.)
Reviewed-by: Brian Paul <brianp@vmware.com>
Dylan Baker [Fri, 27 Oct 2017 17:09:46 +0000 (10:09 -0700)]
meson: Add a dependency on nir_opcodes_h for freedreno
This fixes a race condition in the build.
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Mark Janes <mark.a.janes@intel.com>
Dylan Baker [Tue, 24 Oct 2017 22:52:57 +0000 (15:52 -0700)]
meson: build gallium based osmesa
This has been tested with the osdemo from mesa-demos
v2: - Add SELinux dependency
- fix typo GALLIUM_LLVM -> GALLIUM_LLVMPIPE
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Dylan Baker [Sat, 21 Oct 2017 04:48:18 +0000 (21:48 -0700)]
meson: build classic osmesa
This builds the classic (non-gallium) osmesa with meson. This has been
tested with the osdemo application from mesa-demos.
v2: - Remove unrelated change
- Add SELinux dependency to osmesa
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Dylan Baker [Sat, 21 Oct 2017 05:25:39 +0000 (22:25 -0700)]
meson: Add generated files to non-shared glapi
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Dylan Baker [Mon, 23 Oct 2017 23:09:41 +0000 (16:09 -0700)]
glapi: include generated headers without path
This has been tested wtih make dist-check and with meson.
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Dylan Baker [Mon, 23 Oct 2017 23:09:15 +0000 (16:09 -0700)]
osmesa: Include generated headers without path
This makes things much easier to ensure correctness with meson. Tested
with make dist-check and with meson.
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Dylan Baker [Sat, 21 Oct 2017 05:23:15 +0000 (22:23 -0700)]
meson: move gallium include declarations to src
These are used by non-gallium osmesa, so they need to be defined outside
of the gallium subdirectory.
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Dylan Baker [Sat, 21 Oct 2017 05:22:01 +0000 (22:22 -0700)]
meson: fix glprocs.h generator
There was a typo that causes the generated file to be called gl_procs.h
instead.
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Dylan Baker [Tue, 24 Oct 2017 18:34:04 +0000 (11:34 -0700)]
meson: rename all instances of xf86vm to xxf86vm
Because consistency
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Dylan Baker [Tue, 24 Oct 2017 18:28:42 +0000 (11:28 -0700)]
meson: fix pkg-config Gl Require.Private
xf86vm -> xxf86vm
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Kenneth Graunke [Thu, 26 Oct 2017 18:44:09 +0000 (11:44 -0700)]
mesa: Accept GL_BACK in get_fb0_attachment with ARB_ES3_1_compatibility.
According to the ARB_ES3_1_compatibility specification,
glGetFramebufferAttachmentParameteriv is supposed to accept BACK,
and it behaves exactly like BACK_LEFT.
Fixes a GL error in GFXBench 5 Aztec Ruins.
Cc: "17.3 17.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Brian Paul [Fri, 27 Oct 2017 00:30:51 +0000 (18:30 -0600)]
gallium/os: fix align_malloc() / os_malloc_aligned() comment mix-up
os_free_aligned() is the counterpart to os_malloc_aligned().
Trivial.
Alejandro Piñeiro [Wed, 25 Oct 2017 12:35:36 +0000 (14:35 +0200)]
formatquery: use correct target check for IMAGE_FORMAT_COMPATIBILITY_TYPE
From the spec:
"IMAGE_FORMAT_COMPATIBILITY_TYPE: The matching criteria use for the
resource when used as an image textures is returned in
<params>. This is equivalent to calling GetTexParameter"
So we would need to return None for any target not supported by
GetTexParameter. By mistake, we were using the target check for
GetTexLevelParameter.
v2: fix typo (GetTextParameter vs GetTexParemeter) on comment (Illia Mirkin)
Reviewed-by: Antia Puentes <apuentes@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Eric Engestrom [Tue, 24 Oct 2017 17:03:39 +0000 (18:03 +0100)]
meson: bring MESA_GIT_SHA1 in line with other build systems
Meson's vcs_tag() uses the output of `git describe`, eg.
17.3-branchpoint-5-gfbf29c3cd15ae831e249+
Whereas the other build systems used a script that outputs only the sha1
of the HEAD commit, eg.
fbf29c3cd1
Given that this information is used by printing it next to the version
number, there's some redundancy here, and inconsistency between build
systems.
Bring Meson in line by making it use the same script, with the added
advantage of now supporting the MESA_GIT_SHA1_OVERRIDE env var.
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Eric Engestrom [Wed, 25 Oct 2017 13:04:35 +0000 (14:04 +0100)]
buildsys: move file regeneration logic to the script itself
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Samuel Pitoiset [Thu, 26 Oct 2017 16:03:24 +0000 (18:03 +0200)]
radv: allow to use a compute shader for resetting the query pool
Serious Sam Fusion 2017 uses a huge number of occlusion queries,
and the allocated query pool buffer is greater than 4096 bytes.
This slightly improves performance (tested in Ultra) from
117.2 FPS to 119.7 FPS (~+2%) on my RX480.
This also improves Talos, from 69 FPS to 72/73 FPS (~+5%).
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Samuel Pitoiset [Thu, 26 Oct 2017 16:03:23 +0000 (18:03 +0200)]
radv: make radv_fill_buffer() return the needed flush bits
Only needed when the CS path is used.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Eric Engestrom [Thu, 26 Oct 2017 15:19:41 +0000 (16:19 +0100)]
meson: wire up selinux
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Eric Engestrom [Thu, 26 Oct 2017 16:13:47 +0000 (17:13 +0100)]
wayland-egl: fix wayland cflags
Fixes:
80bfff5c4f1d4d8c842a0 "wayland-egl: adds CFLAGS for wayland.egl.h include"
Suggested-by: Daniel Stone <daniel@fooishbar.org>
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Acked-by: Emil Velikov <emil.velikov@collabora.com>
Acked-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>