Heejin Ahn [Mon, 3 May 2021 01:03:25 +0000 (18:03 -0700)]
[WebAssembly] Reenable end-to-end test in wasm-eh.cpp
This was temporarily disabled while we were reimplementing the new spec.
Reviewed By: tlively
Differential Revision: https://reviews.llvm.org/D101735
MaheshRavishankar [Mon, 3 May 2021 21:39:36 +0000 (14:39 -0700)]
[mlir][Linalg] Add a utility method to get reassociations maps for reshape.
Given the source and destination shapes, if they are static, or if the
expanded/collapsed dimensions are unit-extent, it is possible to
compute the reassociation maps that can be used to reshape one type
into another. Add a utility method to return the reassociation maps
when possible.
This utility function can be used to fuse a sequence of reshape ops,
given the type of the source of the producer and the final result
type. This pattern supercedes a more constrained folding pattern added
to DropUnitDims pass.
Differential Revision: https://reviews.llvm.org/D101343
Christopher Di Bella [Mon, 12 Apr 2021 01:16:45 +0000 (01:16 +0000)]
[libcxx][iterator][ranges] adds `bidirectional_iterator` and `bidirectional_range`
Implements parts of:
* P0896R4 The One Ranges Proposal`
Depends on D100275.
Differential Revision: https://reviews.llvm.org/D100278
Aart Bik [Mon, 3 May 2021 18:11:41 +0000 (11:11 -0700)]
[mlir][sparse] fixed typo: sparse -> sparse_tensor
Test passes either way, but this is full name of dialect
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D101774
Dimitry Andric [Mon, 3 May 2021 21:08:04 +0000 (23:08 +0200)]
Revert "[MC][ELF] Work around R_MIPS_LO16 relocation handling problem"
This reverts commit
ab40c027f0ce9492919a72ad339de40bdb84b354.
Some additional test cases are influenced by the workaround, and I need
to do a complete test run to identify and check them all.
Dimitry Andric [Mon, 3 May 2021 18:08:49 +0000 (20:08 +0200)]
[MC][ELF] Work around R_MIPS_LO16 relocation handling problem
This fixes PR49821, and avoids "ld.lld: error: test.o:(.rodata.str1.1):
offset is outside the section" errors when linking MIPS objects with
negative R_MIPS_LO16 implicit addends.
ld.lld handles R_MIPS_HI16/R_MIPS_LO16 separately, not as a whole, so it
doesn't know that an R_MIPS_HI16 with implicit addend 1 and an
R_MIPS_LO16 with implicit addend -32768 represents 32768, which is in
range of a MergeInputSection. We could introduce a new RelExpr member
(like R_RISCV_PC_INDIRECT for R_RISCV_PCREL_HI20 / R_RISCV_PCREL_LO12)
but the complexity is unnecessary given that GNU as keeps the original
symbol for this case as well.
Reviewed By: atanasyan, MaskRay
Differential Revision: https://reviews.llvm.org/D101773
Fangrui Song [Mon, 3 May 2021 20:49:41 +0000 (13:49 -0700)]
[sanitizer] Set IndentPPDirectives: AfterHash in .clang-format
Code patterns like this are common, `#` at the line beginning
(https://google.github.io/styleguide/cppguide.html#Preprocessor_Directives),
one space indentation for if/elif/else directives.
```
#if SANITIZER_LINUX
# if defined(__aarch64__)
# endif
#endif
```
However, currently clang-format wants to reformat the code to
```
#if SANITIZER_LINUX
#if defined(__aarch64__)
#endif
#endif
```
This significantly harms readability in my review. Use `IndentPPDirectives:
AfterHash` to defeat the diagnostic. clang-format will now suggest:
```
#if SANITIZER_LINUX
# if defined(__aarch64__)
# endif
#endif
```
Unfortunately there is no clang-format option using indent with 1 for
just preprocessor directives. However, this is still one step forward
from the current behavior.
Reviewed By: #sanitizers, vitalybuka
Differential Revision: https://reviews.llvm.org/D100238
Tomas Matheson [Mon, 3 May 2021 20:48:20 +0000 (21:48 +0100)]
Revert "[CodeGen][ARM] Implement atomicrmw as pseudo operations at -O0"
This reverts commit
753185031d939711f8733639a77a6fdc3bdbad22.
Christopher Di Bella [Sun, 11 Apr 2021 22:11:03 +0000 (22:11 +0000)]
[libcxx][iterator][ranges] adds `forward_iterator` and `forward_range`
Implements parts of:
* P0896R4 The One Ranges Proposal`
Depends on D100271.
Differential Revision: https://reviews.llvm.org/D100275
Teresa Johnson [Wed, 28 Apr 2021 23:05:04 +0000 (16:05 -0700)]
[SimplifyCFG] Look for control flow changes instead of side effects.
When passingValueIsAlwaysUndefined scans for an instruction between an
inst with a null or undef argument and its first use, it was checking
for instructions that may have side effects, which is a superset of the
instructions it intended to find (as per the comments, control flow
changing instructions that would prevent reaching the uses). Switch
to using isGuaranteedToTransferExecutionToSuccessor() instead.
Without this change, when enabling -fwhole-program-vtables, which causes
assumes to be inserted by clang, we can get different simplification
decisions. In particular, when building with instrumentation FDO it can
affect the optimizations decisions before FDO matching, leading to some
mismatches.
I had to modify d83507-knowledge-retention-bug.ll since this fix enables
more aggressive optimization of that code such that it no longer tested
the original bug it was meant to test. I removed the undef which still
provokes the original failure (confirmed by temporarily reverting the
fix) and also changed it to just invoke the passes of interest to narrow
the testing.
Similarly I needed to adjust code for UnreachableEliminate.ll to avoid
an undef which was causing the function body to get optimized away with
this fix.
Differential Revision: https://reviews.llvm.org/D101507
Paulo Matos [Mon, 3 May 2021 20:04:50 +0000 (13:04 -0700)]
[WebAssembly] Fixup order of ins variables for table instructions
WebAssembly instruction arguments should have their arguments ordered from
the deepest to the shallowest on the stack.
Sanjay Patel [Mon, 3 May 2021 19:07:10 +0000 (15:07 -0400)]
[ValueTracking] soften assert for invertible recurrence matching
There's a TODO comment in the code and discussion in D99912
about generalizing this, but I wasn't sure how to implement that,
so just going with a potential minimal fix to avoid crashing.
The test is a reduction beyond useful code (there's no user of
%user...), but it is based on https://llvm.org/PR50191, so this
is asserting on real code.
Differential Revision: https://reviews.llvm.org/D101772
MaheshRavishankar [Mon, 3 May 2021 19:50:29 +0000 (12:50 -0700)]
[mlir][Linalg] Use rank-reduced versions of subtensor and subtensor insert when possible.
Convert subtensor and subtensor_insert operations to use their
rank-reduced versions to drop unit dimensions.
Differential Revision: https://reviews.llvm.org/D101495
Valentin Clement [Mon, 3 May 2021 19:42:19 +0000 (15:42 -0400)]
[OpenMPIRBuilder] Add createOffloadMaptypes and createOffloadMapnames functions
Add function to create the offload_maptypes and the offload_mapnames globals. These two functions
are used in clang. They will be used in the Flang/MLIR lowering as well.
Reviewed By: Meinersbur
Differential Revision: https://reviews.llvm.org/D101503
Tomas Matheson [Wed, 31 Mar 2021 16:45:45 +0000 (17:45 +0100)]
[CodeGen][ARM] Implement atomicrmw as pseudo operations at -O0
atomicrmw instructions are expanded by AtomicExpandPass before register allocation
into cmpxchg loops. Register allocation can insert spills between the exclusive loads
and stores, which invalidates the exclusive monitor and can lead to infinite loops.
To avoid this, reimplement atomicrmw operations as pseudo-instructions and expand them
after register allocation.
Floating point legalisation:
f16 ATOMIC_LOAD_FADD(*f16, f16) is legalised to
f32 ATOMIC_LOAD_FADD(*i16, f32) and then eventually
f32 ATOMIC_LOAD_FADD_16(*i16, f32)
Differential Revision: https://reviews.llvm.org/D101164
Originally submitted as
3338290c187b254ad071f4b9cbf2ddb2623cefc0.
Reverted in
c7df6b1223d88dfd15248fbf7b7b83dacad22ae3.
thomasraoux [Mon, 3 May 2021 18:56:11 +0000 (11:56 -0700)]
[mlir][linalg] Fix vectorization bug in vector transfer indexing map calculation
The current implementation had a bug as it was relying on the target vector
dimension sizes to calculate where to insert broadcast. If several dimensions
have the same size we may insert the broadcast on the wrong dimension. The
correct broadcast cannot be inferred from the type of the source and
destination vector.
Instead when we want to extend transfer ops we calculate an "inverse" map to the
projected permutation and insert broadcast in place of the projected dimensions.
Differential Revision: https://reviews.llvm.org/D101738
Frederik Gossen [Mon, 3 May 2021 19:05:43 +0000 (21:05 +0200)]
[MLIR][Linalg] Avoid forward declaration in `Loops.cpp`
Differential Revision: https://reviews.llvm.org/D101771
Frederik Gossen [Mon, 3 May 2021 18:58:21 +0000 (20:58 +0200)]
[MLIR][Linalg] Lower `linalg.tiled_loop` in a separate pass
Add dedicated pass `convert-linalg-tiled-loops-to-scf` to lower
`linalg.tiled_loop`s.
Differential Revision: https://reviews.llvm.org/D101768
Anirudh Prasad [Mon, 3 May 2021 18:57:45 +0000 (14:57 -0400)]
[AsmParser][SystemZ][z/OS] Implement HLASM location counter syntax ("*") for Z PC-relative instructions.
- This patch attempts to implement the location counter syntax (*) for the HLASM variant for PC-relative instructions.
- In the HLASM variant, for purely constant relocatable values, we expect a * token preceding it, with special support for " *" which is parsed as "<pc-rel-insn 0>"
- For combinations of absolute values and relocatable values, we don't expect the "*" preceding the token.
When you have a " * " what’s accepted is:
```
*<space>.*{.*} -> <pc-rel-insn> 0
*[+|-][constant-value] -> <pc-rel-insn> [+|-]constant-value
```
When you don’t have a " * " what’s accepted is:
```
brasl 1,func is allowed (MCSymbolRef type)
brasl 1,func+4 is allowed (MCBinary type)
brasl 1,4+func is allowed (MCBinary type)
brasl 1,-4+func is allowed (MCBinary type)
brasl 1,func-4 is allowed (MCBinary type)
brasl 1,*func is not allowed (* cannot be used for non-MCConstantExprs)
brasl 1,*+func is not allowed (* cannot be used for non-MCConstantExprs)
brasl 1,*+func+4 is not allowed (* cannot be used for non-MCConstantExprs)
brasl 1,*+4+func is not allowed (* cannot be used for non-MCConstantExprs)
brasl 1,*-4+8+func is not allowed (* cannot be used for non-MCConstantExprs)
```
Reviewed By: Kai
Differential Revision: https://reviews.llvm.org/D100987
Mitch Phillips [Mon, 3 May 2021 17:42:19 +0000 (10:42 -0700)]
[scudo] Don't track free/use stats for transfer batches.
The Scudo C unit tests are currently non-hermetic. In particular, adding
or removing a transfer batch is a global state of the allocator that
persists between tests. This can cause flakiness in
ScudoWrappersCTest.MallInfo, because the creation or teardown of a batch
causes mallinfo's uordblks or fordblks to move up or down by the size of
a transfer batch on malloc/free.
It's my opinion that uordblks and fordblks should track the statistics
related to the user's malloc() and free() usage, and not the state of
the internal allocator structures. Thus, excluding the transfer batches
from stat collection does the trick and makes these tests pass.
Repro instructions of the bug:
1. ninja ./projects/compiler-rt/lib/scudo/standalone/tests/ScudoCUnitTest-x86_64-Test
2. ./projects/compiler-rt/lib/scudo/standalone/tests/ScudoCUnitTest-x86_64-Test --gtest_filter=ScudoWrappersCTest.MallInfo
Reviewed By: cryptoad
Differential Revision: https://reviews.llvm.org/D101653
Louis Dionne [Thu, 30 Apr 2020 21:01:28 +0000 (17:01 -0400)]
[libc++] Use the internal Lit shell to run the tests
This makes the libc++ tests more portable -- almost all of them should
now work on Windows, except for some tests that assume a shell is
available on the target. We should probably provide a way to exclude
those anyway for the purpose of running tests on embedded targets.
Differential Revision: https://reviews.llvm.org/D89495
Louis Dionne [Mon, 3 May 2021 16:06:28 +0000 (12:06 -0400)]
[libc++] Fix template instantiation depth issues with std::tuple
This fixes the issue by implementing _And using the short-circuiting
SFINAE trick that we previously used only in std::tuple. One thing we
could look into is use the naive recursive implementation for disjunctions
with a small number of arguments, and use that trick with larger numbers
of arguments. It might be the case that the constant overhead for setting
up the SFINAE trick makes it only worth doing for larger packs, but that's
left for further work.
This problem was raised in https://reviews.llvm.org/D96523.
Differential Revision: https://reviews.llvm.org/D101661
Stella Laurenzo [Wed, 28 Apr 2021 20:04:17 +0000 (20:04 +0000)]
Move MLIR python sources to mlir/python.
* NFC but has some fixes for CMake glitches discovered along the way (things not cleaning properly, co-mingled depends).
* Includes previously unsubmitted fix in D98681 and a TODO to fix it more appropriately in a smaller followup.
Differential Revision: https://reviews.llvm.org/D101493
Louis Dionne [Tue, 13 Apr 2021 20:43:42 +0000 (16:43 -0400)]
[libc++] Disentangle std::pointer_safety
This patch gets rid of technical debt around std::pointer_safety which,
I claim, is entirely unnecessary. I don't think anybody has used
std::pointer_safety in actual code because we do not implement the
underlying garbage collection support. In fact, P2186 even proposes
removing these facilities entirely from a future C++ version. As such,
I think it's entirely fine to get rid of complex workarounds whose goals
were to avoid breaking the ABI back in 2017.
I'm putting this up both to get reviews and to discuss this proposal for
a breaking change. I think we should be comfortable with making these
tiny breaks if we are confident they won't hurt anyone, which I'm fairly
confident is the case here.
Differential Revision: https://reviews.llvm.org/D100410
Paul Robinson [Mon, 3 May 2021 18:07:12 +0000 (11:07 -0700)]
[DebuggerTuning] Move a comment to a more useful place.
The comment about how to make use of debugger tuning within DwarfDebug
really belongs inside the DwarfDebug declaration, where it will be
easier to find.
thomasraoux [Mon, 3 May 2021 17:56:15 +0000 (10:56 -0700)]
[mlir][spirv] Add support to convert std.splat op
Differential Revision: https://reviews.llvm.org/D101511
Stanislav Mekhanoshin [Fri, 30 Apr 2021 18:26:53 +0000 (11:26 -0700)]
[AMDGPU] Change FLAT Scratch SADDR to VADDR form in moveToVALU
Extend the legalization of global SADDR loads and stores
with changing to VADDR to the FLAT scratch instructions.
Differential Revision: https://reviews.llvm.org/D101408
Zarko Todorovski [Mon, 3 May 2021 17:01:49 +0000 (13:01 -0400)]
[AIX] Remove unused vector registers from allocation order in the default AltiVec ABI
The previous implementation of the default AltiVec ABI marked registers V20-V31
as reserved. This failed to prevent reserved VFRC registers being allocated.
In this patch instead of marking the registers reserved we remove unallowed
registers from the allocation order completely.
This is a slight rework of an implementation by @nemanjai
Reviewed By: jsji
Differential Revision: https://reviews.llvm.org/D100050
Duncan P. N. Exon Smith [Fri, 30 Apr 2021 22:16:36 +0000 (15:16 -0700)]
Modules: Remove an extra early return, NFC
Remove an early return from an `else` block that's immediately followed
by an equivalent early return after the `else` block.
Differential Revision: https://reviews.llvm.org/D101671
thomasraoux [Mon, 3 May 2021 17:47:02 +0000 (10:47 -0700)]
[mlir][vector] Extend vector transfer unrolling to support permutations and broadcast
Differential Revision: https://reviews.llvm.org/D101637
thomasraoux [Mon, 3 May 2021 17:41:15 +0000 (10:41 -0700)]
[mlir][vector] Add canonicalization for extract/insert -> shapecast
Differential Revision: https://reviews.llvm.org/D101643
Matt Morehouse [Mon, 3 May 2021 17:25:32 +0000 (10:25 -0700)]
[libFuzzer] Deflake entropic exec-time test.
Fabian Meumertzheim [Fri, 30 Apr 2021 16:16:43 +0000 (09:16 -0700)]
[libFuzzer] Fix off-by-one error in ApplyDictionaryEntry
In the overwrite branch of MutationDispatcher::ApplyDictionaryEntry in
FuzzerMutate.cpp, the index Idx at which W.size() bytes are overwritten
with the word W is chosen uniformly at random in the interval
[0, Size - W.size()). This means that Idx + W.size() will always be
strictly less than Size, i.e., the last byte of the current unit will
never be overwritten.
This is fixed by adding 1 to the exclusive upper bound.
Addresses https://bugs.llvm.org/show_bug.cgi?id=49989.
Reviewed By: morehouse
Differential Revision: https://reviews.llvm.org/D101625
Stanislav Mekhanoshin [Mon, 26 Apr 2021 23:12:50 +0000 (16:12 -0700)]
[AMDGPU] Change FLAT SADDR to VADDR form in moveToVALU
Instead of legalizing saddr operand with a readfirstlane
when address is moved from SGPR to VGPR we can just
change the opcode.
Differential Revision: https://reviews.llvm.org/D101405
Giorgis Georgakoudis [Mon, 3 May 2021 04:49:05 +0000 (21:49 -0700)]
[OpenMP] Fix non-determinism in clang task codegen
Reviewed By: jdoerfert
Differential Revision: https://reviews.llvm.org/D101739
Benjamin Kramer [Mon, 3 May 2021 17:24:00 +0000 (19:24 +0200)]
[mlir] Fix multidimensional lowering from std.select to llvm.select
The converter assumed that all operands have the same type, that's not
true for select.
Differential Revision: https://reviews.llvm.org/D101767
thomasraoux [Mon, 3 May 2021 17:04:12 +0000 (10:04 -0700)]
[mlir][vector][NFC] split TransposeOp lowerning out of contractLowering
Move TransposeOp lowering in its own populate function as in some cases
it is better to keep it during ContractOp lowering to better
canonicalize it rather than emiting scalar insert/extract.
Differential Revision: https://reviews.llvm.org/D101647
Arthur Eubanks [Tue, 20 Apr 2021 19:44:19 +0000 (12:44 -0700)]
[docs][NewPM] Add section on analyses
Reviewed By: asbirlea, ychen
Differential Revision: https://reviews.llvm.org/D100912
Uday Bondhugula [Sun, 2 May 2021 09:40:22 +0000 (15:10 +0530)]
[MLIR] Fix TestAffineDataCopy for test cases with no load ops
Add missing check in -test-affine-data-copy without which a test case
that has no affine.loads at all would crash this test pass. Fix two
clang-tidy warnings in the file while at this. (Not adding a test case
given the triviality.)
Differential Revision: https://reviews.llvm.org/D101719
Stella Laurenzo [Sun, 2 May 2021 22:15:21 +0000 (15:15 -0700)]
[mlir][Python] Add casting constructor to Type and Attribute.
* This makes them consistent with custom types/attributes, whose constructors will do a type checked conversion. Of course, the base classes can represent everything so never error.
* More importantly, this makes it possible to subclass Type and Attribute out of tree in sensible ways.
Differential Revision: https://reviews.llvm.org/D101734
Chris Lattner [Sat, 1 May 2021 21:07:17 +0000 (14:07 -0700)]
[Support/Parallel] Add a special case for 0/1 items to llvm::parallel_for_each.
This avoids the non-trivial overhead of creating a TaskGroup in these degenerate
cases, but also exposes parallelism. It turns out that the default executor
underlying TaskGroup prevents recursive parallelism - so an instance of a task
group being alive will make nested ones become serial.
This is a big issue in MLIR in some dialects, if they have a single instance of
an outer op (e.g. a firrtl.circuit) that has many parallel ops within it (e.g.
a firrtl.module). This patch side-steps the problem by avoiding creating the
TaskGroup in the unneeded case. See this issue for more details:
https://github.com/llvm/circt/issues/993
Note that this isn't a really great solution for the general case of nested
parallelism. A redesign of the TaskGroup stuff would be better, but would be
a much more invasive change.
Differential Revision: https://reviews.llvm.org/D101699
Marek Kurdej [Mon, 3 May 2021 16:52:19 +0000 (18:52 +0200)]
[clang-format] Fix build on gcc < 7 introduced in rG8d93d7ff.
This fixes another bogus build error on gcc, e.g. https://lab.llvm.org/buildbot/#/builders/118/builds/2504.
/home/ssglocal/clang-cmake-x86_64-avx2-linux/clang-cmake-x86_64-avx2-linux-perf/llvm/clang/lib/Format/UnwrappedLineFormatter.cpp:424:42: error: binding ‘clang::format::FormatToken* const’ to reference of type ‘clang::format::FormatToken*&’ discards qualifiers
auto IsElseLine = [&First = TheLine->First]() -> bool {
^
Frederik Gossen [Mon, 3 May 2021 16:45:28 +0000 (18:45 +0200)]
[MLIR][Linalg] Lower `linalg.tiled_loop` to `scf` loops
Differential Revision: https://reviews.llvm.org/D101747
Marek Kurdej [Mon, 3 May 2021 16:46:13 +0000 (18:46 +0200)]
[docs] Automatically update copyright year in libc++.
Marek Kurdej [Mon, 3 May 2021 16:44:47 +0000 (18:44 +0200)]
[docs] Bump the trunk major version to 13 and update copyright year.
David Green [Mon, 3 May 2021 16:34:05 +0000 (17:34 +0100)]
[AArch64] Fold CSEL x, x, cc -> x
This can come up in rare situations, where a csel is created with
identical operands. These can be folded simply to the original value,
allowing the csel to be removed and further simplification to happen.
This patch also removes FCSEL as it is unused, not being produced
anywhere or lowered to anything.
Differential Revision: https://reviews.llvm.org/D101687
Marek Kurdej [Mon, 3 May 2021 16:32:36 +0000 (18:32 +0200)]
[docs] Fix title overline.
Marek Kurdej [Mon, 3 May 2021 16:28:54 +0000 (18:28 +0200)]
[docs] Fix syntax typo.
Marek Kurdej [Mon, 3 May 2021 15:59:32 +0000 (17:59 +0200)]
[clang-format] Add options to AllowShortIfStatementsOnASingleLine to apply to "else if" and "else".
This fixes the bug http://llvm.org/pr50019.
Reviewed By: MyDeveloperDay
Differential Revision: https://reviews.llvm.org/D100727
Fangrui Song [Mon, 3 May 2021 16:04:55 +0000 (09:04 -0700)]
[ELF] Don't suggest alternative spelling of an empty name
Fix PR50111
Differential Revision: https://reviews.llvm.org/D101698
William S. Moses [Sun, 2 May 2021 02:54:23 +0000 (22:54 -0400)]
[MLIR] Canonicalize sub/add of a constant and another sub/add of a constant
Differential Revision: https://reviews.llvm.org/D101705
Anirudh Prasad [Mon, 3 May 2021 15:42:39 +0000 (11:42 -0400)]
[SystemZ][z/OS] Enforce prefix-less registers in SystemZAsmParser for the HLASM dialect.
- Previously, https://reviews.llvm.org/D101308 removed prefixes from register while printing them out. This was especially needed for inline asm statements which used input/output operands.
- However, the backend SystemZAsmParser, accepts both prefixed registers and prefix-less registers as part of its implementation
- This patch aims to change that by ensuring that prefixed registers are only allowed for the ATT dialect.
Reviewed By: uweigand
Differential Revision: https://reviews.llvm.org/D101665
Utkarsh Saxena [Mon, 3 May 2021 09:41:24 +0000 (11:41 +0200)]
[clangd] Find implementors only when index is present.
Differential Revision: https://reviews.llvm.org/D101750
Alexey Bataev [Mon, 3 May 2021 14:23:29 +0000 (07:23 -0700)]
[SLP]Allow masked gathers only if allowed by target.
Need to check if target allows/supports masked gathers before trying to
estimate its cost, otherwise we may fail to vectorize some of the
patterns because of too pessimistic cost model.
Part of D57059.
Differential Revision: https://reviews.llvm.org/D101297
Dávid Bolvanský [Mon, 3 May 2021 15:04:50 +0000 (17:04 +0200)]
[InstCombine] cttz(zext(x)) -> zext(cttz(x)) if the 'ZeroIsUndef' parameter is 'true' (PR50172)
Zext doesn't change the number of trailing zeros, so narrow cttz(zext(x)) -> zext(cttz(x)) if the 'ZeroIsUndef' parameter is 'true'.
Proofs:
https://alive2.llvm.org/ce/z/o2dnjY
Solves https://bugs.llvm.org/show_bug.cgi?id=50172
Reviewed By: spatel
Differential Revision: https://reviews.llvm.org/D101582
Jon Roelofs [Thu, 29 Apr 2021 22:36:24 +0000 (15:36 -0700)]
Partial revert of "Use std::foo_t rather than std::foo in LLVM." in googlebench
Since googlebench builds as c++11, the change there is incorrect and breaks the
googlebench build when the STL implementation is strict about std::enable_if_t
not being available in lesser c++ versions.
partial revert of:
1bd6123b781120c9190b9ba58b900cdcb718cdd1 (https://reviews.llvm.org/D74384)
Differential Revision: https://reviews.llvm.org/D101583
Louis Dionne [Fri, 30 Apr 2021 22:03:17 +0000 (18:03 -0400)]
[libc++] Acquire locks on Ranges work
This commit acquires locks on a few elements of Ranges to make sure we don't
duplicate work.
Differential Revision: https://reviews.llvm.org/D101668
Saurabh Jha [Mon, 3 May 2021 13:57:31 +0000 (14:57 +0100)]
[Matrix] Remove bitcast when casting between matrices of the same size
In matrix type casts, we were doing bitcast when the matrices had the same size. This was incorrect and this patch fixes that.
Also added some new CodeGen tests for signed <-> usigned conversions
Reviewed By: fhahn
Differential Revision: https://reviews.llvm.org/D101754
Alexey Bataev [Mon, 3 May 2021 14:20:00 +0000 (07:20 -0700)]
Revert "[SLP]Allow masked gathers only if allowed by target."
This reverts commit
b5f64768cfeecca16c7c9c53cbd97ac7289c43aa to fix
a compiler crash revealed by buildbots.
Alexey Bataev [Mon, 26 Apr 2021 14:37:53 +0000 (07:37 -0700)]
[SLP]Allow masked gathers only if allowed by target.
Need to check if target allows/supports masked gathers before trying to
estimate its cost, otherwise we may fail to vectorize some of the
patterns because of too pessimistic cost model.
Part of D57059.
Differential Revision: https://reviews.llvm.org/D101297
Konstantin Zhuravlyov [Mon, 3 May 2021 13:44:16 +0000 (09:44 -0400)]
AMDGPU: XFAIL LLVM::note-amd-valid-v2.test for big endian
Florian Hahn [Mon, 3 May 2021 11:13:17 +0000 (12:13 +0100)]
[LV] Iterate over recipes in VPlan to fix PHI (NFC).
As we gradually move more elements of LV to VPlan, we are trying to
reduce the number of places that still has to check IR of the original
loop.
This patch adjusts the code to fix cross iteration phis to get the PHIs
to fix directly from the VPlan that is executed. We still need the
original PHI to check for first-order recurrences, but we can get rid of
that once we model that explicitly in VPlan as well.
Reviewed By: Ayal
Differential Revision: https://reviews.llvm.org/D99293
LLVM GN Syncbot [Mon, 3 May 2021 12:53:10 +0000 (12:53 +0000)]
[gn build] Port
1527a5e4b483
Abhina Sreeskantharajan [Mon, 3 May 2021 12:49:35 +0000 (08:49 -0400)]
[SystemZ][z/OS] Add the functions needed for handling EBCDIC I/O
This patch adds the basic functions needed for controlling auto conversion on z/OS.
Auto conversion is enabled on untagged input file to ASCII by making the assumption that all untagged files are EBCDIC encoded. Output files are auto converted to EBCDIC IBM-1047.
This change also enables conversion for stdin/stdout/stderr.
For more information on how fcntl controls codepage https://www.ibm.com/docs/en/zos/2.4.0?topic=descriptions-fcntl-bpx1fct-bpx4fct-control-open-file-descriptors
Reviewed By: anirudhp
Differential Revision: https://reviews.llvm.org/D100483
Sanjay Patel [Mon, 3 May 2021 12:17:14 +0000 (08:17 -0400)]
[InstCombine] improve demanded bits analysis of left-shifted operand
If we don't demand high bits, then we also don't care about those
high bits of a left-shift operand regardless of shift amount.
I noticed the sext/trunc pattern in a motivating example.
It seems like there should be a low-bits with right-shift sibling,
but I haven't looked at that yet.
https://alive2.llvm.org/ce/z/JuS6jc
https://rise4fun.com/Alive/Trm (not sure how to use 'width' with Alive1)
https://alive2.llvm.org/ce/z/gRadbF
Differential Revision: https://reviews.llvm.org/D101489
Nathan Sidwell [Mon, 3 May 2021 12:00:26 +0000 (05:00 -0700)]
[clang] Spell correct variable
fix Trailling -> Trailing (two ll-> one l)
Differential Revision: https://reviews.llvm.org/D101753
Aaron Puchert [Mon, 3 May 2021 11:59:47 +0000 (13:59 +0200)]
Thread safety analysis: Fix false negative on break
We weren't modifying the lock set when intersecting with one coming
from a break-terminated block. This is inconsistent, since break isn't a
back edge, and it leads to false negatives with scoped locks. We usually
don't warn for those when joining locksets aren't the same, we just
silently remove locks that are not in the intersection. But not warning
and not removing them isn't right.
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D101202
Aaron Puchert [Mon, 3 May 2021 11:57:44 +0000 (13:57 +0200)]
Thread safety analysis: Replace flags in FactEntry by SourceKind (NFC)
The motivation here is to make it available in the base class whether a
fact is managed or not. That would have meant three flags on the base
class, so I had a look whether we really have 8 possible combinations.
It turns out we don't: asserted and declared are obviously mutually
exclusive. Managed facts are only created when we acquire a capability
through a scoped capability. Adopting an asserted or declared lock will
not (in fact can not, because Facts are immutable) make them managed.
We probably don't want to allow adopting an asserted lock (because then
the function should probably have a release attribute, and then the
assertion is pointless), but we might at some point decide to replace a
declared fact on adoption.
Reviewed By: aaron.ballman
Differential Revision: https://reviews.llvm.org/D100801
Hans Wennborg [Wed, 28 Apr 2021 10:21:09 +0000 (12:21 +0200)]
[clang-cl] Add parsing support for a bunch of new flags
MSVC has added some new flags. Although they're not supported, this adds
parsing support for them so clang-cl doesn't treat them as filenames.
Except for /fsanitize=address which we do support. (clang-cl already
exposes the -fsanitize= option, but this allows using the
MSVC-spelling with a slash.)
Differential revision: https://reviews.llvm.org/D101439
Nathan Sidwell [Tue, 27 Apr 2021 19:03:40 +0000 (12:03 -0700)]
[clang] Remove libstdc++ friend template hack
this hack is for a now-unsupported version of libstdc++
Differential Revision: https://reviews.llvm.org/D101392
Muhammad Omair Javaid [Mon, 3 May 2021 10:59:30 +0000 (15:59 +0500)]
Support AArch64 PAC elf-core register read
This adds support for reading AArch64 Pointer Authentication regset
from elf-core file. Also includes a test-case for the same. Furthermore
there is also a slight refactoring of RegisterContextPOSIXCore_arm64
members and constructor. linux-aarch64-pac.core file is generated using
lldb/test/API/functionalities/postmortem/elf-core/main.c with following
clang arguments:
-march=armv8.5-a -mbranch-protection=pac-ret+leaf -nostdlib -static -g
Reviewed By: DavidSpickett
Differential Revision: https://reviews.llvm.org/D99941
David Green [Mon, 3 May 2021 10:24:59 +0000 (11:24 +0100)]
[ARM] Memory operands for MVE gathers/scatters
Similarly to D101096, this makes sure that MMO operands get propagated
through from MVE gathers/scatters to the Machine Instructions. This
allows extra scheduling freedom, not forcing the instructions to act as
scheduling barriers. We create MMO's with an unknown size, specifying
that they can load from anywhere in memory, similar to the masked_gather
or X86 intrinsics.
Differential Revision: https://reviews.llvm.org/D101219
Nathan James [Mon, 3 May 2021 10:20:20 +0000 (11:20 +0100)]
[clang-tidy][NFC] Short circuit getting enum options suggestions.
Use the MaxEditDistance to skip checking candidates we know we'll skip.
Fraser Cormack [Thu, 29 Apr 2021 10:35:33 +0000 (11:35 +0100)]
[RISCV] Add support for fmin/fmax vector reductions
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D101518
Benjamin Kramer [Thu, 29 Apr 2021 13:53:12 +0000 (15:53 +0200)]
[mlir] Allow lowering cmpi/cmpf with multidimensional vectors to LLVM
Differential Revision: https://reviews.llvm.org/D101535
Christian Kühnel [Mon, 3 May 2021 08:59:51 +0000 (10:59 +0200)]
[doc] typo fixes
as proposed by @FlashSheridan in
https://reviews.llvm.org/rG7f9717b922d4
Guillaume Chatelet [Mon, 3 May 2021 08:39:26 +0000 (08:39 +0000)]
[libc] warns about missing linting only in full build mode
Differential Revision: https://reviews.llvm.org/D101609
Sebastian Neubauer [Mon, 3 May 2021 08:33:11 +0000 (10:33 +0200)]
[AMDGPU] Do not annotate features for graphics
SITargetLowering::LowerFormalArguments asserts that none of these
features are used for graphics calling conventions, so
AnnotateKernelFeatures should not add them.
Differential Revision: https://reviews.llvm.org/D101534
Diana Picus [Tue, 27 Apr 2021 08:56:14 +0000 (08:56 +0000)]
[flang] Fix a bug in the character runtime
The number of bytes copied in CopyAndPad should depend on the size of
the type being copied, not on its shift value (which in the case of char
is 0, leading to no bytes at all being copied).
Add unit tests for CharacterMin and CharacterMax, which exercise this
code path.
Differential Revision: https://reviews.llvm.org/D101355
Diana Picus [Fri, 30 Apr 2021 18:22:01 +0000 (18:22 +0000)]
[flang] Fix handling of elem_len in CFI_establish
The current code computes the minimum element length based on the `type`
used to create the descriptor and uses that as the element length
whenever it is greater than 0. This means that the `elem_len` parameter
is essentially ignored for any type where we can compute a minimum
element length (which includes `CFI_type_char[16|32]_t`), and we may
therefore end up with descriptors with a lower element length than
expected.
This patch fixes the issue by explicitly doing what the standard says,
i.e. it uses the given `elem_len` for character types, `CFI_type_struct`
and `CFI_type_other`, and ignores it (falls back to the minimum element
length) for everything else.
Differential Revision: https://reviews.llvm.org/D101659
Diana Picus [Fri, 30 Apr 2021 17:21:56 +0000 (17:21 +0000)]
[flang] Use CFI_TYPE_LAST instead of CFI_type_struct
It looks like CFI_type_struct was once used as the last valid CFI_type
value, but in the meantime CFI_type_char16_t and CFI_type_char32_t were
added, making that assumption no longer true. Luckily, in the meantime
we also got a define for CFI_TYPE_LAST, which we can now use to allow
CFI_establish and CFI_allocate to work with descriptors of
CFI_type_char16_t, CFI_type_char32_t and any other future types.
Differential Revision: https://reviews.llvm.org/D101658
Nathan Ridge [Mon, 19 Apr 2021 07:25:57 +0000 (03:25 -0400)]
[clangd] Parameter hints for dependent calls
Differential Revision: https://reviews.llvm.org/D100742
Pushpinder Singh [Wed, 28 Apr 2021 06:53:46 +0000 (06:53 +0000)]
[AMDGPU][OpenMP] Enable Libomptarget runtime tests
This enables the runtime tests on amdgpu targets.
10 tests have been marked as XFAIL on amdgcn currently mostly due to
missing printf.
Reviewed By: protze.joachim
Differential Revision: https://reviews.llvm.org/D99656
Nathan Ridge [Mon, 3 May 2021 05:36:08 +0000 (01:36 -0400)]
[clangd] Fix test failure in initialize-params.test
Differential Revision: https://reviews.llvm.org/D101740
Nathan Ridge [Mon, 3 May 2021 05:18:49 +0000 (01:18 -0400)]
[clangd] Fix build error in SemanticHighlighting.cpp
Nathan Ridge [Mon, 26 Apr 2021 03:46:51 +0000 (23:46 -0400)]
[clangd] Hide inlay hints capability behind a command-line flag
Differential Revision: https://reviews.llvm.org/D101275
Nathan Ridge [Mon, 26 Apr 2021 00:01:32 +0000 (20:01 -0400)]
[clangd] Avoid including HeuristicResolver.h from ParsedAST.h
Differential Revision: https://reviews.llvm.org/D101270
Reshabh Sharma [Mon, 3 May 2021 03:31:15 +0000 (09:01 +0530)]
[ASAN][AMDGPU] Add support for accesses to global and constant addrspaces
Add address sanitizer instrumentation support for accesses to global
and constant address spaces in AMDGPU. It strictly avoids instrumenting
the stack and assumes x86 as the host.
Reviewed by: vitalybuka
Differential Revision: https://reviews.llvm.org/D99071
Konstantin Zhuravlyov [Fri, 30 Apr 2021 19:20:28 +0000 (15:20 -0400)]
Reland "AMDGPU/llvm-readobj: Add missing tests for note parsing/displaying"
This reverts commit
54aad6365951247e9f18c718c14422745b3afa4c.
Includes fix for note-amd-valid-v3.s test.
Sergio Perez Gonzalez [Mon, 3 May 2021 02:25:39 +0000 (19:25 -0700)]
[Object] Fix e_machine description for EM_CR16 and add EM_MICROBLAZE
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D101133
David Green [Sun, 2 May 2021 23:04:21 +0000 (00:04 +0100)]
[ARM] Transfer memory operands for VLDn
We create MMO's for the VLDn/VSTn intrinsics in ARMTargetLowering::
getTgtMemIntrinsic, but they do not currently make it ll the way through
ISel. This changes that in the various places it needs changing, making
sure that the MMO is propagate through to the final instruction. This
can help in scheduling, not treating the VLD2/VST2 as a scheduling
barrier.
Differential Revision: https://reviews.llvm.org/D101096
Stelios Ioannou [Fri, 30 Apr 2021 16:55:35 +0000 (17:55 +0100)]
[AArch64] Sets the preferred function alignment for Cortex-A53/A55.
Setting the preffered function alignment to 16 for Cortex A53/A55
improves performance in a wide range of benchmarks. This brings it
in line with the Cortex-A53/A55 tuning that is used in GCC
(gcc/config/aarch64/aarch64.c).
Differential Revision: https://reviews.llvm.org/D101636
Change-Id: I2ce47fe7ab5e3b54f49c89038d8da4e404742de2
Craig Topper [Sun, 2 May 2021 19:33:44 +0000 (12:33 -0700)]
[TableGen] Use sign rotated VBR for OPC_EmitInteger.
This allows for a much more efficient encoding for small negative
numbers by storing the sign bit first and negating the rest of
the bits. This was already being used for OPC_CheckInteger.
For every in tree target this affects, the table got smaller.
R600GenDAGISel.inc saw the largest reduction of 7K.
I did have to add a new opcode for StringIntegers used for
register class ids and subregister indices since we don't have the
integer value to encode. The enum name is emitted directly into
the table. Previously assumed the enum would expand to a positive
7-bit number. We might be able to just shift that right by 1 and
assume it is a positive 6 bit number, but that will need more
investigation.
Craig Topper [Sun, 2 May 2021 19:01:18 +0000 (12:01 -0700)]
[RISCV] Store SEW in RISCV vector pseudo instructions in log2 form.
This shrinks the immediate that isel table needs to emit for these
instructions. Hoping this allows me to change OPC_EmitInteger to
use a better variable length encoding for representing negative
numbers. Similar to what was done a few months ago for OPC_CheckInteger.
The alternative encoding uses less bytes for negative numbers, but
increases the number of bytes need to encode 64 which was a very
common number in the RISCV table due to SEW=64. By using Log2 this
becomes 6 and is no longer a problem.
Martin Storsjö [Sun, 2 May 2021 18:50:25 +0000 (21:50 +0300)]
[OpenMP] Fix warnings due to redundant semicolons. NFC.
Arthur Eubanks [Sun, 2 May 2021 04:44:32 +0000 (21:44 -0700)]
[NFC] Use Aliasee to determine Type and AddrSpace in GlobalAlias::create()
As opposed to going through the Aliasee type.
For opaque pointers, we're trying to remove uses of PointerType::getElementType().
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D101715
Florian Hahn [Sun, 2 May 2021 17:56:42 +0000 (18:56 +0100)]
[VPlan] Add VPBasicBlock::phis() helper (NFC).
This patch introduces a helper to obtain an iterator range for the
PHI-like recipes in a block.
Reviewed By: Ayal
Differential Revision: https://reviews.llvm.org/D100101
Craig Topper [Sat, 1 May 2021 20:18:21 +0000 (13:18 -0700)]
[RISCV] Reorder masked builtin operands. Use clang_builtin_alias for all overloaded vector builtins.
This patch makes the builtin operand order match the C operand order
for all intrinsics. With this we can use clang_builtin_alias for
all overloaded intrinsics.
This should further reduce the test time for vector intrinsics.
Differential Revision: https://reviews.llvm.org/D101700
Christopher Di Bella [Sun, 2 May 2021 17:43:05 +0000 (17:43 +0000)]
[libcxx][nfc] removes duplicate test file
`test/std/ranges/range.access/range.access.cbegin/incomplete.compile.verify.cpp`
was accidentally copied (and apparently the author either forgot to
delete it or forgot to commit the deletion).
TEST=`ninja cxx && ninja check-cxx` locally
Nikita Popov [Sun, 2 May 2021 16:12:59 +0000 (18:12 +0200)]
[SCEV] Add test for non-unit stride with multiple exits (NFC)
We currently can't determine any exit counts here, because there
is no "controlling exit".