Nathan Ridge [Tue, 29 Sep 2020 07:19:59 +0000 (03:19 -0400)]
[clangd] Heuristic resolution for dependent type and template names
Fixes https://github.com/clangd/clangd/issues/543
Differential Revision: https://reviews.llvm.org/D88469
Adhemerval Zanella [Mon, 12 Oct 2020 17:23:26 +0000 (14:23 -0300)]
[sanitizer] Disable fast_unwind_on_malloc as default for arm-linux-gnu
ARM thumb/thumb2 frame pointer is inconsistent on GCC and Clang [1]
and fast-unwider is also unreliable when mixing arm and thumb code [2].
The fast unwinder on ARM tries to probe and compare the frame-pointer
at different stack layout positions and it works reliable only on
systems where all the libraries were built in arm mode (either with
gcc or clang) or with clang in thmb mode (which uses the same stack
frame pointer layout in arm and thumb).
However when mixing objects built with different abi modes the
fast unwinder is still problematic as shown by the failures on the
AddressSanitizer.ThreadStackReuseTest. For these failures, the
malloc is called by the loader itself and since it has been built
with a thum enabled gcc, the stack frame is not correctly obtained
and the suppression rule is not applied (resulting in a leak warning).
The check for fast-unwinder-works is also changed: instead of checking
f it is explicit enabled in the compiler flags, it now checks if
compiler defined thumb pre-processor.
This should fix BZ#44158.
[1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92172
[2] https://bugs.llvm.org/show_bug.cgi?id=44158
Reviewed By: eugenis
Differential Revision: https://reviews.llvm.org/D88958
Fangrui Song [Mon, 12 Oct 2020 16:35:22 +0000 (09:35 -0700)]
[X86] Support -march=x86-64-v[234]
PR47686. These micro-architecture levels are defined in the x86-64 psABI:
https://gitlab.com/x86-psABIs/x86-64-ABI/-/commit/
77566eb03bc6a326811cb7e9
GCC 11 will support these levels.
Note, -mtune=x86-64-v[234] are invalid and __builtin_cpu_is cannot be
used on them.
Reviewed By: craig.topper, RKSimon
Differential Revision: https://reviews.llvm.org/D89197
Valentin Clement [Mon, 12 Oct 2020 17:20:52 +0000 (13:20 -0400)]
[flang][openacc] Lower parallel construct
This patch upstream the lowering of Parallel construct that was initially done in
https://github.com/flang-compiler/f18-llvm-project/pull/460.
Reviewed By: jeanPerier
Differential Revision: https://reviews.llvm.org/D88917
Valentin Clement [Mon, 12 Oct 2020 17:19:40 +0000 (13:19 -0400)]
[flang][openacc] Update Loop Construct lowering to use fir::getBase
This patch update the loop construct lowring to match fir-dev changes.
Reviewed By: jeanPerier
Differential Revision: https://reviews.llvm.org/D88914
Simon Pilgrim [Mon, 12 Oct 2020 17:17:08 +0000 (18:17 +0100)]
[InstCombine] FoldShiftByConstant - create Scalar/Vector constant with ConstantInt::get(). NFCI.
There's no need to create constant vector splats manually.
Simon Pilgrim [Mon, 12 Oct 2020 16:47:36 +0000 (17:47 +0100)]
[InstCombine] FoldShiftByConstant - merge equivalent types. NFCI.
Consistently use the original shift instruction's Type/BitWidth instead of the operands, casted values etc.
Teresa Johnson [Fri, 25 Sep 2020 04:52:15 +0000 (21:52 -0700)]
Restore "[ThinLTO] Avoid temporaries when loading global decl attachment metadata"
This restores commit
ab1b4810b55279bcf6fdd87be74a403440be3991 which was
reverted in
01b9deba76a950f04574b656c7c31ae389104f2d, with a fix for the
issue it caused. We should use a temporary BitstreamCursor when
loading the global decl attachment records so that the abbrev ids held
in the lazy loading IndexCursor are not clobbered. Enhanced the test so
that the issue is exposed there.
Original description:
When performing ThinLTO importing, the metadata loader attempts to lazy
load, by building an index. However, module level global decl attachment
metadata was being parsed early while building the index, since the
associated (module level) global values aren't materialized on demand.
This results in the creation of forward reference temporary metadatas,
which are expensive.
Normally, these module level global values don't have much attached
metadata. However, in the case of -fwhole-program-vtables (e.g. for
whole program devirtualization), the vtables may have many attached type
metadatas. This was resulting in very slow performance when performing
ThinLTO importing with the default lazy loading.
This patch restructures the handling of these global decl attachment
records, delaying their parsing until after the lazy loading index has
been built. Then the parser can use the interface that loads from the
index, which resolves forward references immediately instead of creating
expensive temporaries.
For one ThinLTO backend that imports from modules containing huge
numbers of vtables and associated types, I measured the following
compile times for the metadata materialization during function
importing, rounded to nearest second:
No -fwhole-program-vtables:
Lazy loading on (head): 1s
Lazy loading off (head): 3s
Lazy loading on (patch): 1s
With -fwhole-program-vtables:
Lazy loading on (head): 440s
Lazy loading off (head): 4s
Lazy loading on (patch): 2s
Differential Revision: https://reviews.llvm.org/D87970
Florian Hahn [Mon, 12 Oct 2020 16:04:38 +0000 (17:04 +0100)]
[VPlan] Use VPValue def for VPMemoryInstructionRecipe.
This patch turns VPMemoryInstructionRecipe into a VPValue and uses it
during VPlan construction and codegeneration instead of the plain IR
reference where possible.
Reviewed By: dmgreen
Differential Revision: https://reviews.llvm.org/D84680
Mark de Wever [Sun, 11 Oct 2020 13:07:12 +0000 (15:07 +0200)]
Make likelihood lit test less brittle
Jeremy Morse discovered an issue with the lit test introduced in D88363. The
test gives different results for Sony's `-O1`.
The test needs to run at `-O1` otherwise the likelihood attribute will be
ignored. Instead of running all `-O1` passes it only runs the lower-expect pass
which is needed to lower `__builtin_expect`.
Differential Revision: https://reviews.llvm.org/D89204
Fangrui Song [Mon, 12 Oct 2020 16:57:12 +0000 (09:57 -0700)]
[compiler-rt] Suppress -Wunused-result due to ::write when _FORTIFY_SOURCE>0 in glibc
Noticed by Peter Foley.
In glibc, ::write is declared as __attribute__((__warn_unused_result__)) when __USE_FORTIFY_LEVEL is larger than 0.
Hans Wennborg [Mon, 12 Oct 2020 16:32:25 +0000 (18:32 +0200)]
Revert
1c021c64c "[SCEV] Model ptrtoint(SCEVUnknown) cast not as unknown, but as zext/trunc/self of SCEVUnknown"
> While we indeed can't treat them as no-ops, i believe we can/should
> do better than just modelling them as `unknown`. `inttoptr` story
> is complicated, but for `ptrtoint`, it seems straight-forward
> to model it just as a zext-or-trunc of unknown.
>
> This may be important now that we track towards
> making inttoptr/ptrtoint casts not no-op,
> and towards preventing folding them into loads/etc
> (see D88979/D88789/D88788)
>
> Reviewed By: mkazantsev
>
> Differential Revision: https://reviews.llvm.org/D88806
It caused the following assert during Chromium builds:
llvm/lib/IR/Constants.cpp:1868:
static llvm::Constant *llvm::ConstantExpr::getTrunc(llvm::Constant *, llvm::Type *, bool):
Assertion `C->getType()->isIntOrIntVectorTy() && "Trunc operand must be integer"' failed.
See code review for a link to a reproducer.
This reverts commit
1c021c64caef83cccb719c9bf0a2554faa6563af.
Konstantin Schwarz [Mon, 12 Oct 2020 09:45:33 +0000 (11:45 +0200)]
[GlobalISel][KnownBits] Early return on out of bound shift amounts
If the known shift amount is bigger than or equal to the bitwidth of the type of the value to be shifted,
the result is target dependent, so don't try to infer any bits.
This fixes a crash we've seen in one of our internal test suites.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D89232
Dávid Bolvanský [Mon, 12 Oct 2020 15:54:16 +0000 (17:54 +0200)]
[Tests] Regenerate test checks; NFC
Mircea Trofin [Fri, 9 Oct 2020 17:04:29 +0000 (10:04 -0700)]
[NFC][MC] Use MCRegister in LiveRangeMatrix
The change starts from LiveRangeMatrix and also checks the users of the
APIs are typed accordingly.
Differential Revision: https://reviews.llvm.org/D89145
Florian Hahn [Fri, 2 Oct 2020 18:02:22 +0000 (19:02 +0100)]
[VPlan] Use operands for printing of VPWidenMemoryInstructionRecipe.
Now that operands of the recipe are managed through VPUser, we can
simplify the printing by just using the operands.
Mircea Trofin [Fri, 9 Oct 2020 23:38:42 +0000 (16:38 -0700)]
[NFC][Regalloc] Pass VirtRegMap by reference.
It's never null - the reason it's modeled as a pointer is because the
pass can't init it in its ctor. Passing by ref simplifies the code, too,
as the null checks were unnecessary complexity.
Differential Revision: https://reviews.llvm.org/D89171
Sebastian Neubauer [Mon, 12 Oct 2020 14:38:14 +0000 (16:38 +0200)]
[AMDGPU] Print metadata on error
If the metadata is valid yaml, we can print it, even if it failed
validation. That makes it easier to debug any wrong metadata.
Differential Revision: https://reviews.llvm.org/D89243
Florian Hahn [Mon, 12 Oct 2020 15:13:26 +0000 (16:13 +0100)]
[LoopDeletion] Remove over-eager SCEV verification.
60b852092c98dbdc6248d60109d90ae6f8ad841c introduced SCEV verification to
deleteDeadLoop, but it appears this check is currently a bit over-eager
and some users of deleteDeadLoop appear to only patch up SE after
calling it (e.g. PR47753).
Remove the extra check for now. We can consider adding it back after we
tracked down the source of the inconsistency for PR47753.
Sebastian Neubauer [Fri, 25 Sep 2020 09:59:31 +0000 (11:59 +0200)]
[AMDGPU] Insert waterfall loops for divergent calls
Extend loadSRsrcFromVGPR to allow moving a range of instructions into
the loop. The call instruction is surrounded by copies into physical
registers which should be part of the waterfall loop.
Differential Revision: https://reviews.llvm.org/D88291
Cameron McInally [Thu, 8 Oct 2020 14:33:20 +0000 (09:33 -0500)]
[SVE] Lower fixed length VECREDUCE_XOR operation
Differential Revision: https://reviews.llvm.org/D88974
Jay Foad [Mon, 12 Oct 2020 15:10:12 +0000 (16:10 +0100)]
[AMDGPU] Use @LINE for error checking in gfx10 assembler tests
Simon Pilgrim [Mon, 12 Oct 2020 15:06:41 +0000 (16:06 +0100)]
[InstCombine] matchFunnelShift - fold or(shl(a,x),lshr(b,sub(bw,x))) -> fshl(a,b,x) iff x < bw (REAPPLIED)
If value tracking can confirm that a shift value is less than the type bitwidth then we can more confidently fold general or(shl(a,x),lshr(b,sub(bw,x))) patterns to a funnel/rotate intrinsic pattern without causing bad codegen regressions in the backend (see D89139).
Reapplied after the shift canonicalization in rG02295e6d1a15 which removed the need to flip the shift values.
Differential Revision: https://reviews.llvm.org/D88783
Simon Pilgrim [Mon, 12 Oct 2020 14:55:18 +0000 (15:55 +0100)]
[InstCombine] matchFunnelShift - remove shift value commutation. NFCI.
After rG02295e6d1a15 we no longer need to invert the shift values for fshr - this is just hidden at the moment as funnel shifts only ever match for constant values so never use the fshr "Sub on SHL" path.
Simon Pilgrim [Mon, 12 Oct 2020 14:10:16 +0000 (15:10 +0100)]
[InstCombine] matchFunnelShift - canonicalize to OR(SHL,LSHR). NFCI.
Simplify the shift amount matching code by canonicalizing the shift ops first.
David Spickett [Mon, 12 Oct 2020 10:14:14 +0000 (11:14 +0100)]
[lldb] Note difference in vFile:pread/pwrite format for lldb
https://sourceware.org/gdb/current/onlinedocs/gdb/Host-I_002fO-Packets.html
States that all numbers should be hexidecimal but lldb
uses decimals in vFile:pread and vFile:pwrite.
lldb-server can accept either since it ends up using
strtoull which will detect the base being used.
Reviewed By: labath
Differential Revision: https://reviews.llvm.org/D89227
Haojian Wu [Mon, 12 Oct 2020 14:02:52 +0000 (16:02 +0200)]
[clangd] Disable a failure TopLevelDecls test.
The test fails on clang-ppc64le-rhel buildbot, needs further
investigation.
Haojian Wu [Mon, 12 Oct 2020 13:41:04 +0000 (15:41 +0200)]
Dump decl when the test matcher fails.
Max Kazantsev [Mon, 12 Oct 2020 13:31:13 +0000 (20:31 +0700)]
[NFC] Remove redundant isFullSet checks
Full set case is handled inside intersection, no need to
litter the code with duplicating them outside.
LLVM GN Syncbot [Mon, 12 Oct 2020 13:27:45 +0000 (13:27 +0000)]
[gn build] Port
f9317f7bf6b
Kadir Cetinkaya [Mon, 28 Sep 2020 13:09:55 +0000 (15:09 +0200)]
[clangd] Record memory usages after each notification
Depends on D88415
Differential Revision: https://reviews.llvm.org/D88417
Kadir Cetinkaya [Fri, 9 Oct 2020 08:35:40 +0000 (10:35 +0200)]
[clangd] Add a helper for exposing tracer status
Kadir Cetinkaya [Mon, 28 Sep 2020 13:38:26 +0000 (15:38 +0200)]
[clangd] Introduce memory usage dumping to TUScheduler, for Preambles and ASTCache
File-granular information is considered details.
Depends on D88411
Differential Revision: https://reviews.llvm.org/D88415
Kadir Cetinkaya [Mon, 28 Sep 2020 13:15:13 +0000 (15:15 +0200)]
[clangd] Introduce memory dumping to FileIndex, FileSymbols and BackgroundIndex
File-granular information is considered details.
Depends on D88411
Differential Revision: https://reviews.llvm.org/D88414
Kadir Cetinkaya [Mon, 28 Sep 2020 13:03:45 +0000 (15:03 +0200)]
[clangd] Add a metric for tracking memory usage
Differential Revision: https://reviews.llvm.org/D88413
Kadir Cetinkaya [Mon, 28 Sep 2020 12:17:02 +0000 (14:17 +0200)]
[clangd] Introduce MemoryTrees
A structure that can be used to represent memory usage of a nested
set of systems.
Differential Revision: https://reviews.llvm.org/D88411
Simon Pilgrim [Mon, 12 Oct 2020 13:10:18 +0000 (14:10 +0100)]
[DAG][ARM][MIPS][RISCV] Improve funnel shift promotion to use 'double shift' patterns
Based on a discussion on D88783, if we're promoting a funnel shift to a width at least twice the size as the original type, then we can use the 'double shift' patterns (shifting the concatenated sources).
Differential Revision: https://reviews.llvm.org/D89139
Alexander Kornienko [Mon, 12 Oct 2020 13:05:42 +0000 (15:05 +0200)]
[clang-tidy] Fix IncludeInserter usage example in a comment.
Kadir Cetinkaya [Mon, 12 Oct 2020 12:24:05 +0000 (14:24 +0200)]
[clangd][NFC] Fix formatting in ClangdLSPServer
Christian Sigg [Thu, 8 Oct 2020 14:37:44 +0000 (16:37 +0200)]
[mlir][gpu] Adding gpu runtime wrapper functions for async execution.
Reviewed By: herhut
Differential Revision: https://reviews.llvm.org/D89037
Kazushi (Jam) Marukawa [Sun, 11 Oct 2020 08:33:47 +0000 (17:33 +0900)]
[VE] Support copysign math function
VE doesn't have instruction for copysign, so expand it. Add a
regression test also.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D89228
Pavel Labath [Fri, 9 Oct 2020 09:23:17 +0000 (11:23 +0200)]
[lldb/Utility] Introduce UnimplementedError
This is essentially a replacement for the PacketUnimplementedError
previously present in the gdb-remote server code.
The reason I am introducing a generic error is because I wanted the
native process classes to be able to signal that they do not support
some functionality. They could not use PacketUnimplementedError as they
are independent of a specific transport protocol. Putting the error
class in the the native process code was also not ideal because the
gdb-remote code is also used for lldb-server's platform mode, which does
not (should not) know how to debug individual processes.
I'm putting it under Utility, as I think it can be generally useful for
notifying about unsupported/unimplemented functionality (and in
particular, for programatically testing whether something is
unsupported).
Differential Revision: https://reviews.llvm.org/D89121
Sam McCall [Fri, 9 Oct 2020 15:22:24 +0000 (17:22 +0200)]
[clangd] Stop capturing trace args if the tracer doesn't need them.
The tracer is now expected to allocate+free the args itself.
Differential Revision: https://reviews.llvm.org/D89135
Jan Kratochvil [Mon, 12 Oct 2020 09:25:47 +0000 (11:25 +0200)]
[nfc] [lldb] Simplify calling SymbolFileDWARF::GetDWARFCompileUnit
Only SymbolFileDWARF::ParseCompileUnit creates a CompileUnit and it uses
DWARFCompileUnit for that.
Differential Revision: https://reviews.llvm.org/D89165
Nicolas Vasilache [Mon, 12 Oct 2020 11:21:43 +0000 (11:21 +0000)]
[mlir][Linalg] NFC - Automate the printing of canonicalizers and folders for nameds Linalg ops.
This revision reduces the number of places that specific information needs to be modified when adding new named Linalg ops.
Differential Revision: https://reviews.llvm.org/D89223
Nicolas Vasilache [Mon, 12 Oct 2020 10:09:50 +0000 (10:09 +0000)]
[mlir][Linalg] Add named Linalg ops on tensor to buffer support.
This revision introduces support for buffer allocation for any named linalg op.
To avoid template instantiating many ops, a new ConversionPattern is created to capture the LinalgOp interface.
Some APIs are updated to remain consistent with MLIR style:
`OwningRewritePatternList * -> OwningRewritePatternList &`
`BufferAssignmentTypeConverter * -> BufferAssignmentTypeConverter &`
Differential revision: https://reviews.llvm.org/D89226
Sam McCall [Fri, 9 Oct 2020 14:06:46 +0000 (16:06 +0200)]
[clangd] Validate optional fields more strictly.
Differential Revision: https://reviews.llvm.org/D89131
Sam McCall [Fri, 9 Oct 2020 13:33:56 +0000 (15:33 +0200)]
[JSON] Add ObjectMapper::mapOptional to validate optional data.
Currently the idiom for mapping optional fields is:
ObjectMapper O(Val, P);
if (!O.map("required1", Out.R1) || !O.map("required2", Out.R2))
return false;
O.map("optional1", Out.O1); // ignore result
return true;
If `optional1` is present but malformed, then we won't detect/report
that error. We may even leave `Out` in an incomplete state while returning true.
Instead, we'd often prefer to ignore `optional1` if it is absent, but otherwise
behave just like map().
Differential Revision: https://reviews.llvm.org/D89128
Simon Pilgrim [Mon, 12 Oct 2020 10:38:52 +0000 (11:38 +0100)]
Revert rGb97093e520036f8 - "[InstCombine] matchFunnelShift - fold or(shl(a,x),lshr(b,sub(bw,x))) -> fshl(a,b,x) iff x < bw"
This reverts commit
b97093e520036f88c5b39e572966f1c8c387661e.
Funnel shift argument commutation isn't working correctly
Kazushi (Jam) Marukawa [Sun, 11 Oct 2020 08:33:47 +0000 (17:33 +0900)]
[VE] Support fneg and frem
VE doesn't have fneg or frem instruction, so change them to expand. Add
regression tests also.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D89205
Kazushi (Jam) Marukawa [Tue, 6 Oct 2020 14:15:42 +0000 (23:15 +0900)]
[VE] Change to expand BRCOND
VE doesn't have BRCOND instruction, so need to expand it. Also add
a regression test.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D89173
Haojian Wu [Mon, 12 Oct 2020 10:04:44 +0000 (12:04 +0200)]
Evgeny Leviant [Mon, 12 Oct 2020 09:49:56 +0000 (12:49 +0300)]
Add test for cortex-a57/ARM sched model. NFC
sstefan1 [Mon, 12 Oct 2020 09:25:52 +0000 (11:25 +0200)]
[IR][FIX] Intrinsics - don't apply default willreturn if IntrNoReturn is specified
Summary: Since willreturn will soon be added as default attribute, we can end up with both noreturn and willreturn on the same intrinsic. This was exposed by llvm.wasm.throw which has IntrNoReturn.
Reviewers: jdoerfert, arsenm
Differential Revision: https://reviews.llvm.org/D88644
Haojian Wu [Mon, 12 Oct 2020 09:24:45 +0000 (11:24 +0200)]
[AST][RecoveryExpr] Don't perform early typo correction in C.
The dependent mechanism for C error-recovery is mostly finished,
this is the only place we have missed.
Differential Revision: https://reviews.llvm.org/D89045
Haojian Wu [Mon, 12 Oct 2020 09:12:58 +0000 (11:12 +0200)]
[AST][RecoveryExpr] Build dependent callexpr in C for error-recovery.
See whole context: https://reviews.llvm.org/D85025
Reviewed By: sammccall
Differential Revision: https://reviews.llvm.org/D84304
Georgii Rymar [Mon, 5 Oct 2020 10:25:59 +0000 (13:25 +0300)]
[llvm-readobj/elf] - Ignore the hash table when on EM_S390/EM_ALPHA platforms.
Specification for `SHT_HASH` table says (https://refspecs.linuxbase.org/elf/gabi4+/ch5.dynamic.html#hash)
that it contains `Elf32_Word` entries for both `32/64` bit objects.
But there is a problem with `EM_S390` and `ELF::EM_ALPHA` platforms: they use 8-bytes entries.
(see the issue reported: https://bugs.llvm.org/show_bug.cgi?id=47681).
Currently we might infer the size of the dynamic symbols table from hash table,
but because of the issue mentioned, the calculation is wrong. And also we don't dump the hash table
properly.
I am not sure if we want to support 8-bytes entries as they violates specification and also the
`.hash` table is kind of deprecated by itself (the `.gnu.hash` table is used nowadays).
So, the solution this patch suggests is to ban using of the hash table on `EM_S390/EM_ALPHA` platforms.
Differential revision: https://reviews.llvm.org/D88817
Haojian Wu [Mon, 12 Oct 2020 08:45:37 +0000 (10:45 +0200)]
[clang] Fix returning the underlying VarDecl as top-level decl for VarTemplateDecl.
Given the following VarTemplateDecl AST,
```
VarTemplateDecl col:26 X
|-TemplateTypeParmDecl typename depth 0 index 0
`-VarDecl X 'bool' cinit
`-CXXBoolLiteralExpr 'bool' true
```
previously, we returned the VarDecl as the top-level decl, which was not
correct, the top-level decl should be VarTemplateDecl.
Differential Revision: https://reviews.llvm.org/D89098
Nicolas Vasilache [Mon, 12 Oct 2020 08:23:54 +0000 (08:23 +0000)]
Revert "Revert "Give attributes C++ namespaces.""
This reverts commit
df295fac6cd14977672b2874700572e0f77b77da.
Reactivates a spuriously rolled back change.
Alexander Belyaev [Sun, 11 Oct 2020 18:09:27 +0000 (20:09 +0200)]
[mlir] Move Linalg tensors-to-buffers tests to Linalg tests.
The buffer placement preparation tests in
test/Transforms/buffer-placement-preparation* are using Linalg as a test
dialect which leads to confusion and "copy-pasta", i.e. Linalg is being
extended now and when TensorsToBuffers.cpp is changed, TestBufferPlacement is
sometimes kept in-sync, which should not be the case.
This has led to the unnoticed bug, because the tests were in a different directory and the patterns were slightly off.
Differential Revision: https://reviews.llvm.org/D89209
David Sherwood [Mon, 12 Oct 2020 08:04:42 +0000 (09:04 +0100)]
Roman Lebedev [Mon, 12 Oct 2020 08:00:52 +0000 (11:00 +0300)]
[SCEV] Model ptrtoint(SCEVUnknown) cast not as unknown, but as zext/trunc/self of SCEVUnknown
While we indeed can't treat them as no-ops, i believe we can/should
do better than just modelling them as `unknown`. `inttoptr` story
is complicated, but for `ptrtoint`, it seems straight-forward
to model it just as a zext-or-trunc of unknown.
This may be important now that we track towards
making inttoptr/ptrtoint casts not no-op,
and towards preventing folding them into loads/etc
(see D88979/D88789/D88788)
Reviewed By: mkazantsev
Differential Revision: https://reviews.llvm.org/D88806
David Sherwood [Wed, 23 Sep 2020 13:05:15 +0000 (14:05 +0100)]
[SVE] Make ElementCount and TypeSize use a new PolySize class
I have introduced a new template PolySize class, where the template
parameter determines the type of quantity, i.e. for an element
count this is just an unsigned value. The ElementCount class is
now just a simple derivation of PolySize<unsigned>, whereas TypeSize
is more complicated because it still needs to contain the uint64_t
cast operator, since there are still many places in the code that
rely upon this implicit cast. As such the class also still needs
some of it's own operators.
I've tried to minimise the amount of code in the base PolySize
class, which led to a couple of changes:
1. In some places we were relying on '==' operator comparisons
between ElementCounts and the scalar value 1. I didn't put this
operator in the new PolySize class, and thought it was actually
clearer to use the isScalar() function instead.
2. I removed the isByteSized function and replaced it with calls
to isKnownMultipleOf(8).
I've also renamed NextPowerOf2 to be coefficientNextPowerOf2 so
that it's more consistent with coefficientDivideBy.
Differential Revision: https://reviews.llvm.org/D88409
Kito Cheng [Wed, 7 Oct 2020 09:01:18 +0000 (17:01 +0800)]
[Tablegen][SubtargetEmitter] Print TuneCPU in Subtarget::ParseSubtargetFeatures
Let user able to know which -tune-cpu are used now.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D88951
Vitaly Buka [Sat, 3 Oct 2020 04:08:13 +0000 (21:08 -0700)]
[NFC][Asan] Remove unused macro
John McCall [Mon, 12 Oct 2020 05:09:25 +0000 (01:09 -0400)]
Revert "[SYCL] Implement __builtin_unique_stable_name."
This reverts commit
b5a034e771d0e4d7d8e71fc545b230d98e5a1f42.
This feature was added without following the proper process.
Fangrui Song [Sun, 11 Oct 2020 22:51:55 +0000 (15:51 -0700)]
[SchedDAGInstrs] Delete redundant contains(). NFC
Jonas Devlieghere [Mon, 12 Oct 2020 03:14:00 +0000 (20:14 -0700)]
Revert "PR47792: Include the type of a pointer or reference non-type template"
This reverts commit
849c60541b630ddf8cabf9179fa771b3f4207ec8 because it
results in a stage 2 build failure:
llvm-project/clang/include/clang/AST/ExternalASTSource.h:409:20: error:
definition with same mangled name
'_ZN5clang25LazyGenerationalUpdatePtrIPKNS_4DeclEPS1_XadL_ZNS_17ExternalASTSource19CompleteRedeclChainES3_EEE9makeValueERKNS_10ASTContextES4_'
as another definition
static ValueType makeValue(const ASTContext &Ctx, T Value);
Qiu Chaofan [Mon, 12 Oct 2020 02:40:19 +0000 (10:40 +0800)]
[NFC] Move PPC strict-fp MIR test to dedicated file
fp-strict-conv-f128.ll is generated by script, but some manual MIR tests
exist in it. Move them to another file to satisfy script when updating.
Valentin Clement [Mon, 12 Oct 2020 01:26:54 +0000 (21:26 -0400)]
[mlir][openacc] Introduce acc.enter_data operation
This patch introduces the acc.enter_data operation that represents an OpenACC Enter Data directive.
Operands and attributes are dervied from clauses in the spec 2.6.6.
Reviewed By: kiranchandramohan
Differential Revision: https://reviews.llvm.org/D88941
Richard Smith [Sun, 11 Oct 2020 22:57:52 +0000 (15:57 -0700)]
PR47792: Include the type of a pointer or reference non-type template
parameter in its notion of template argument identity.
We already did this for all the other kinds of non-type template
argument. We're still missing the type from the mangling, so we continue
to be able to see collisions at link time; that's an open ABI issue.
Craig Topper [Sun, 11 Oct 2020 20:31:15 +0000 (13:31 -0700)]
[ValueTracking] Use KnownBits::countMaxLeadingZeros/countMaxTrailingZeros to make code more readable. NFC
Richard Smith [Sun, 11 Oct 2020 21:20:01 +0000 (14:20 -0700)]
Fix arc lint's clang-format rule: only format the file we were asked to format.
This avoids diffs being applied in the work tree to files that are
supposed to be excluded (clang tests), allows arc to properly provide
interactive feedback for the formatting fixes, and reduces the number of
files that we format, in a change affecting N files, from N^2 to N.
Christian Iversen [Sun, 11 Oct 2020 21:19:25 +0000 (14:19 -0700)]
[ELF] Fix broken bitstream linking with lld when e_machine > 255
In ELF/InputFiles.cpp, getBitcodeMachineKind() is limited to uint8_t return
type. This works as long as EM_xxx is < 256, which is true for common
architectures, but not for some newly assigned or unofficial EM_* values.
The corresponding ELF field (e_machine) can hold uint16_t.
Reviewed By: MaskRay
Differential Revision: https://reviews.llvm.org/D89185
Tres Popp [Fri, 9 Oct 2020 14:45:50 +0000 (16:45 +0200)]
[mlir] Type erase inputs to select statements in shape.broadcast lowering.
This is required or broadcasting with operands of different ranks will lead to
failures as the select op requires both possible outputs and its output type to
be the same.
Differential Revision: https://reviews.llvm.org/D89134
Nathan Ridge [Sat, 5 Sep 2020 23:22:59 +0000 (19:22 -0400)]
[clangd] Avoid relations being overwritten in a header shard
Fixes https://github.com/clangd/clangd/issues/510
Differential Revision: https://reviews.llvm.org/D87256
Roman Lebedev [Sun, 11 Oct 2020 17:17:09 +0000 (20:17 +0300)]
[InstCombine] combineLoadToOperationType(): don't fold int<->ptr cast into load
And another step towards transforms not introducing inttoptr and/or
ptrtoint casts that weren't there already.
As we've been establishing (see D88788/D88789), if there is a int<->ptr cast,
it basically must stay as-is, we can't do much with it.
I've looked, and the most source of new such casts being introduces,
as far as i can tell, is this transform, which, ironically,
tries to reduce count of casts..
On vanilla llvm test-suite + RawSpeed, @ `-O3`, this results in
-33.58% less `IntToPtr`s (19014 -> 12629)
and +76.20% more `PtrToInt`s (18589 -> 32753),
which is an increase of +20.69% in total.
However just on RawSpeed, where i know there are basically
none `IntToPtr` in the original source code,
this results in -99.27% less `IntToPtr`s (2724 -> 20)
and +82.92% more `PtrToInt`s (4513 -> 8255).
which is again an increase of 14.34% in total.
To me this does seem like the step in the right direction,
we end up with strictly less `IntToPtr`, but strictly more `PtrToInt`,
which seems like a reasonable trade-off.
See https://reviews.llvm.org/D88860 / https://reviews.llvm.org/D88995
for some more discussion on the subject.
(Eventually, `CastInst::isNoopCast()`/`CastInst::isEliminableCastPair`
should be taught about this, yes)
Reviewed By: nlopes, nikic
Differential Revision: https://reviews.llvm.org/D88979
Fangrui Song [Sun, 11 Oct 2020 05:21:47 +0000 (22:21 -0700)]
[X86] Define __LAHF_SAHF__ if feature 'sahf' is set or 32-bit mode
GCC 11 will define this macro.
In LLVM, the feature flag only applies to 64-bit mode and we always define the
macro in 32-bit mode. This is different from GCC -m32 in which -mno-sahf can
suppress the macro. The discrepancy can unlikely cause trouble.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D89198
David Green [Sun, 11 Oct 2020 15:58:34 +0000 (16:58 +0100)]
[LV] Tail folded inloop reductions.
This expands upon the inloop reductions added in
e9761688e41cb9e976,
allowing them to be inserted into tail folded loops. Reductions are
generates with the form:
x = select(mask, vecop, zero)
v = vecreduce.add(x)
c = add chain, v
Where zero here is chosen as the identity value for add reductions. The
backend is then expected to fold the select and the vecreduce into a
single predicated instruction.
Most of the code is fairly straight forward, except for the creation of
blockmasks which need to ensure they are created in dominance order. The
order they are added is altered to be after any phis, keeping the
requirements for the underlying IR.
Differential Revision: https://reviews.llvm.org/D84451
Zinovy Nis [Sat, 10 Oct 2020 18:32:51 +0000 (21:32 +0300)]
[clang-tidy] Fix crash in readability-function-cognitive-complexity on weak refs
Fix for https://bugs.llvm.org/show_bug.cgi?id=47779
Differential Revision: https://reviews.llvm.org/D89194
Nikita Popov [Sun, 11 Oct 2020 15:07:28 +0000 (17:07 +0200)]
[MemCpyOpt] Add lifetime may alias test (NFC)
Test the case where a lifetime intrinsic may alias the memcpy
source. Other cases test must or no alias.
David Green [Sun, 11 Oct 2020 14:06:21 +0000 (15:06 +0100)]
[LV] Extra predicated inloop reduction tests. NFC
Nikita Popov [Sun, 11 Oct 2020 13:21:49 +0000 (15:21 +0200)]
[MemCpyOpt] Add additional byval tests (NFC)
Test read/write clobbers and the the non-local case.
Sanjay Patel [Sat, 10 Oct 2020 15:08:50 +0000 (11:08 -0400)]
[InstCombine] allow vector splats for add+xor --> shifts
Sanjay Patel [Sat, 10 Oct 2020 14:35:18 +0000 (10:35 -0400)]
[InstCombine] add one-use check to add+xor transform
As shown in the affected test, we could increase instruction
count without this limitation. There's another test with extra
use that shows we still convert directly to a real "sext" if
possible.
Sanjay Patel [Sat, 10 Oct 2020 14:24:15 +0000 (10:24 -0400)]
[InstCombine] add tests with extra uses for add+xor transform; NFC
Sanjay Patel [Sat, 10 Oct 2020 13:50:34 +0000 (09:50 -0400)]
[InstCombine] add/adjust tests for add+xor -> shifts; NFC
Kazushi (Jam) Marukawa [Sun, 11 Oct 2020 10:34:12 +0000 (19:34 +0900)]
[VE][NFC] Clean VEISelLowering.cpp
Clean the order of setOperationActions and others.
Differential Revision: https://reviews.llvm.org/D89203
Simon Pilgrim [Sun, 11 Oct 2020 10:25:22 +0000 (11:25 +0100)]
Fix Wdocumentation warning. NFCI.
Add a space after /param names before any commas otherwise the doxygen parsers get confused.
Simon Pilgrim [Sun, 11 Oct 2020 10:21:23 +0000 (11:21 +0100)]
[X86][SSE2] Use smarter instruction patterns for lowering UMIN/UMAX with v8i16.
This is my first LLVM patch, so please tell me if there are any process issues.
The main observation for this patch is that we can lower UMIN/UMAX with v8i16 by using unsigned saturated subtractions in a clever way. Previously this operation was lowered by turning the signbit of both inputs and the output which turns the unsigned minimum/maximum into a signed one.
We could use this trick in reverse for lowering SMIN/SMAX with v16i8 instead. In terms of latency/throughput this is the needs one large move instruction. It's just that the sign bit turning has an increased chance of being optimized further. This is particularly apparent in the "reduce" test cases. However due to the slight regression in the single use case, this patch no longer proposes this.
Unfortunately this argument also applies in reverse to the new lowering of UMIN/UMAX with v8i16 which regresses the "horizontal-reduce-umax", "horizontal-reduce-umin", "vector-reduce-umin" and "vector-reduce-umax" test cases a bit with this patch. Maybe some extra casework would be possible to avoid this. However independent of that I believe that the benefits in the common case of just 1 to 3 chained min/max instructions outweighs the downsides in that specific case.
Patch By: @TomHender (Tom Hender) ActuallyaDeviloper
Differential Revision: https://reviews.llvm.org/D87236
Simon Pilgrim [Sun, 11 Oct 2020 09:39:51 +0000 (10:39 +0100)]
[InstCombine] Remove accidental unnecessary ConstantExpr qualification added in rGb752daa26b64155
MSVC didn't complain but everything else did....
Simon Pilgrim [Sun, 11 Oct 2020 09:37:20 +0000 (10:37 +0100)]
[InstCombine] matchFunnelShift - fold or(shl(a,x),lshr(b,sub(bw,x))) -> fshl(a,b,x) iff x < bw
If value tracking can confirm that a shift value is less than the type bitwidth then we can more confidently fold general or(shl(a,x),lshr(b,sub(bw,x))) patterns to a funnel/rotate intrinsic pattern without causing bad codegen regressions in the backend (see D89139).
Differential Revision: https://reviews.llvm.org/D88783
Simon Pilgrim [Sun, 11 Oct 2020 09:31:17 +0000 (10:31 +0100)]
[InstCombine] Replace getLogBase2 internal helper with ConstantExpr::getExactLogBase2. NFCI.
This exposes the helper for other power-of-2 instcombine folds that I'm intending to add vector support to.
The helper only operated on power-of-2 constants so getExactLogBase2 is a more accurate name.
Tobias Gysi [Sun, 11 Oct 2020 08:40:28 +0000 (10:40 +0200)]
[mlir] add scf.if op canonicalization pattern that removes unused results
The patch adds a canonicalization pattern that removes the unused results of scf.if operation. As a result, cse may remove unused computations in the then and else regions of the scf.if operation.
Reviewed By: mehdi_amini
Differential Revision: https://reviews.llvm.org/D89029
Xun Li [Sun, 11 Oct 2020 05:21:34 +0000 (22:21 -0700)]
[Coroutines] Refactor/Rewrite Spill and Alloca processing
This patch is a refactoring of how we process spills and allocas during CoroSplit.
In the previous implementation, everything that needs to go to the heap is put into Spills, including all the values defined by allocas.
And the way to identify a Spill, is to check whether there exists a use-def relationship that crosses suspension points.
This approach is fundamentally confusing, and unfortunately, incorrect.
First of all, allocas are always process differently than spills, hence it's quite confusing to put them together. It's a much cleaner to separate them and process them separately.
Doing so simplify lots of code and makes the logic more clear and easier to reason about.
Secondly, use-def relationship is insufficient to decide whether a value defined by AllocaInst needs to go to the heap.
There are many cases where a value defined by AllocaInst can implicitly be used across suspension points without a direct use-def relationship.
For example, you can store the address of an alloca into the heap, and load that address after suspension. Or you can escape the address into an object through a function call.
Or you can have a PHINode that takes two allocas, and this PHINode is used across suspension point (when this happens, the existing implementation will spill the PHINode, a.k.a a stack adddress to the heap!).
All these issues suggest that we need to separate spill and alloca in order to properly implement this.
This patch does not yet fix these bugs, however it sets up the code in a better shape so that we can start fixing them in the next patch.
The core idea of this patch is to add a new struct called FrameDataInfo, which contains all Spills, all Allocas, and a map from each definition to its layout index in the frame (FieldIndexMap).
Spills and Allocas are identified, stored and processed independently. When they are initially added to the frame, we record their field index through FieldIndexMap. When the frame layout is finalized, we update each index into their final layout index.
In doing so, I also cleaned up a few things and also discovered a few other bugs.
Cleanups:
1. Found out that PromiseFieldId is not used, delete it.
2. Previously, SpillInfo is a vector, which is strange because every def can have multiple users. This patch cleans it up by turning it into a map from def to users.
3. Previously, a frame Field struct contains a list of Spills that field corresponds to. This isn't necessary since we only need the layout index for each given definition. This patch removes that list. Instead, we connect each field and definition using the FieldIndexMap.
4. All the loops that process Spills are simplified now because we use a map instead of a vector.
Bugs:
It seems that we are only keeping llvm.dbg.declare intrinsics in the .resume part of the function. The ramp function will no longer has it. This means we are dropping some debug information in the ramp function.
The next step is to start fixing the bugs where the implementation fails to identify some allocas that should live on the frame.
Differential Revision: https://reviews.llvm.org/D88872
Craig Topper [Sun, 11 Oct 2020 04:34:37 +0000 (21:34 -0700)]
[X86] Redefine X86ISD::PEXTRB/W and X86ISD::PINSRB/PINSRW to use a i8 TargetConstant for the immediate instead of a ptr constant.
This is more consistent with other target specific ISD opcodes that
require immediates.
Craig Topper [Sun, 11 Oct 2020 03:11:26 +0000 (20:11 -0700)]
[X86] AMX intrinsics should have ImmArg for the register numbers and use timm in isel patterns.
Craig Topper [Sun, 11 Oct 2020 02:18:02 +0000 (19:18 -0700)]
[X86] Add a X86ISD::BEXTRI to distinquish the case where the control must be a constant.
The bextri intrinsic has a ImmArg attribute which will be converted
in SelectionDAG using TargetConstant. We previously converted this
to a plain Constant to allow X86ISD::BEXTR to call SimplifyDemandedBits
on it.
But while trying to decide if D89178 was safe, I realized that
this conversion of TargetConstant to Constant would be one case
where that would break.
So this patch adds a new opcode specifically for the immediate case.
And then teaches computeKnownBits and SimplifyDemandedBits to also
handle it, but not try to SimplifyDemandedBits on it. To make up
for that, I immediately masked the constant to 16 bits when
converting from the intrinsic node to the X86ISD node.
Krzysztof Parzyszek [Sat, 10 Oct 2020 01:17:50 +0000 (20:17 -0500)]
[Hexagon] Replace HexagonISD::VSPLAT with ISD::SPLAT_VECTOR
This removes VSPLAT and VZERO. VZERO is now SPLAT_VECTOR of (i32 0).
Included is also a testcase for the previous (target-independent)
commit.
Krzysztof Parzyszek [Sat, 10 Oct 2020 20:37:32 +0000 (15:37 -0500)]
[SDAG] Remember to set UndefElts in isSplatValue for SPLAT_VECTOR