Simon Ser [Fri, 9 Apr 2021 11:58:40 +0000 (13:58 +0200)]
ac/surface: use blocksizebits instead of blocksize
util_format_get_blocksize asserts that the blocksize isn't zero.
However the blocksize will be zero if the format's channel encoding
is unspecified. The channel encoding is only meaningful for the
plain u_format layout, so util_format_get_blocksize can't be used
for formats with another layout. For example, YUV formats don't have
the channel encoding specified.
Use util_format_get_blocksizebits, which just returns zero without
an assertion for formats which don't have a channel encoding.
Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10134>
Simon Ser [Fri, 9 Apr 2021 11:54:28 +0000 (13:54 +0200)]
util/format: document block depth field
After the pixel block width and height, a third field is used to
store the pixel block depth. Document this field.
Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10134>
Simon Ser [Fri, 9 Apr 2021 08:18:44 +0000 (10:18 +0200)]
radeon/vcn: handle tiled buffers when decoding
Set the swizzle mode when decoding.
Add a safe-guard to make sure the provided surface isn't DCC, because
we don't handle this situation.
Signed-off-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Simon Ser <contact@emersion.fr>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10134>
Samuel Iglesias Gonsálvez [Thu, 21 Jan 2021 09:23:51 +0000 (10:23 +0100)]
turnip: fix typo in tu_CmdBeginRenderPass2()
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8615>
Samuel Iglesias Gonsálvez [Wed, 20 Jan 2021 15:22:53 +0000 (16:22 +0100)]
turnip/lrz: added support for depth bounds test enable
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8615>
Samuel Iglesias Gonsálvez [Wed, 20 Jan 2021 14:46:00 +0000 (14:46 +0000)]
turnip: document GRAS_LRZ_CNTL's UNK5 bitfield
It is used by the blob to enable depth bounds test for LRZ.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8615>
Samuel Iglesias Gonsálvez [Thu, 21 Jan 2021 08:55:03 +0000 (09:55 +0100)]
turnip/lrz: add support for VK_EXT_extended_dynamic_state
When the depth or stencil state changes dynamically, that might affect
LRZ state and we need to recalculate it and emit it again.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8615>
Samuel Iglesias Gonsálvez [Tue, 19 Jan 2021 09:07:28 +0000 (10:07 +0100)]
turnip: refactor how LRZ state is calculated
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8615>
Samuel Iglesias Gonsálvez [Thu, 11 Feb 2021 06:53:06 +0000 (07:53 +0100)]
turnip: initialize pipeline->rb_{stencil,depth}_cntl always
This change will simplify further changes on LRZ state management.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8615>
Samuel Iglesias Gonsálvez [Wed, 3 Feb 2021 12:01:51 +0000 (13:01 +0100)]
turnip: move pipeline gras_su and rb{stencil,depth}_cntl_mask initialization
Move them up, so they are initialized even when the dynamic state is
not used.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8615>
Iago Toral Quiroga [Wed, 14 Apr 2021 07:08:36 +0000 (09:08 +0200)]
v3dv: use a bitfield to implement a quick check for job BO tracking
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10210>
Iago Toral Quiroga [Tue, 13 Apr 2021 10:21:08 +0000 (12:21 +0200)]
v3dv: optimize a few cases of BO job additions
In these cases we know that the BO has not been added to the job
before, so we can skip the usual process for adding the BO where
we check if we had already added it before to avoid duplicates.
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10210>
Iago Toral Quiroga [Wed, 14 Apr 2021 08:54:16 +0000 (10:54 +0200)]
v3dv: avoid redundant BO job additions for spill / shared BOs
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10210>
Iago Toral Quiroga [Wed, 14 Apr 2021 08:52:17 +0000 (10:52 +0200)]
v3dv: avoid redundant BO job additions for UBO/SSBO
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10210>
Iago Toral Quiroga [Tue, 13 Apr 2021 08:42:18 +0000 (10:42 +0200)]
v3dv: avoid redundant BO job additions for textures and samplers
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10210>
Felix DeGrood [Mon, 12 Apr 2021 16:15:17 +0000 (09:15 -0700)]
intel/blorp: remove tile flush from emit surface state
Tile cache flush not required when emitting new surface state.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10217>
Felix DeGrood [Tue, 30 Mar 2021 00:11:42 +0000 (17:11 -0700)]
iris: reduce redundant tile cache flushes
We are flushing tile cache more often than is necessary. In
unified cache mode, tile cache flushing is expensive, evicting all
depth/pixel data from the L3$. This is only need for a handful of
cases, such as: making cpu or gpu changes globally visible
(e.g. map), fast color clears, or slow depth clears. Tile cache
flushing is a gen12+ feature.
Remove blanket flushing of tile cache on all depth/RT flushes.
Replace with selective tile cache flushing.
Improves performance in several workloads:
AztecRuins.ogl-high-offscreen-1440p 1%
UnigineValley.ogl-g2 1%
Dota 2 (replay Jul 2020).ogl-g2 1%
Counter-Strike GO.ogl-g2 1%
Manhattan.ogl-Off-19x10 2%
CarChase.ogl-Off-19x10 1%
Bioshock Infinite.ogl-g2 1%
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10217>
Kenneth Graunke [Mon, 8 Feb 2021 23:35:35 +0000 (15:35 -0800)]
iris: only flush the render cache for aux changes, not format changes
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10217>
Felix DeGrood [Mon, 12 Apr 2021 17:11:40 +0000 (10:11 -0700)]
iris: Cache VB/IB in L3$ for Gen12
Gen12 enables caching of Vertex and Index Buffers in L3.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10217>
Felix DeGrood [Wed, 24 Mar 2021 16:08:33 +0000 (09:08 -0700)]
intel: add L3 Bypass Disable to gen xml
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10217>
Mike Blumenkrantz [Sun, 4 Apr 2021 22:42:47 +0000 (18:42 -0400)]
mesa/st: plumb GL_TEXTURE_REDUCTION_MODE_ARB through QueryInternalFormat
enable per-format querying of texture_filter_minmax support if the ARB extension
is enabled
also now return 0 if neither extension is supported
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10030>
Mike Blumenkrantz [Mon, 5 Apr 2021 16:13:04 +0000 (12:13 -0400)]
gallium: split PIPE_CAP_SAMPLER_REDUCTION_MINMAX into modes
this enables detection for the EXT vs the ARB extension, which have
different specifications regarding which formats must be supported
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10030>
Mike Blumenkrantz [Sun, 4 Apr 2021 22:42:23 +0000 (18:42 -0400)]
gallium: add PIPE_BIND_SAMPLER_REDUCTION_MINMAX
for querying format support
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10030>
Yiwei Zhang [Mon, 12 Apr 2021 22:02:05 +0000 (22:02 +0000)]
venus: implement dma_buf fd import and properties query
This change is for supporting VK_ANDROID_native_buffer implementation,
and it does not advertise VK_KHR_external_memory_fd.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10195>
Yiwei Zhang [Mon, 12 Apr 2021 21:34:24 +0000 (21:34 +0000)]
venus: update venus-protocol headers
Add support for external memory fd properties query and import
- vkGetMemoryResourcePropertiesMESA
- VkImportMemoryResourceInfoMESA
- VkMemoryResourcePropertiesMESA
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10195>
Rob Clark [Wed, 14 Apr 2021 23:48:04 +0000 (16:48 -0700)]
freedreno: Add missing foreach macros and update indentation
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10247>
Chia-I Wu [Fri, 9 Apr 2021 20:14:49 +0000 (13:14 -0700)]
venus: remove vn_renderer_info::has_timeline_sync
We are no longer limited to Vulkan 1.1 in VMs.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10146>
Chia-I Wu [Thu, 1 Apr 2021 19:31:21 +0000 (12:31 -0700)]
venus: wait on vkQueuePresentKHR
Add vn_renderer_info::has_implicit_fencing. Force vkQueueWaitIdle
during vkQueuePresentKHR when it is false.
This kills the performance, but we have to do this until the kernel does
implicit fencing.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10146>
Chia-I Wu [Fri, 9 Apr 2021 17:05:17 +0000 (10:05 -0700)]
venus: remove vn_ring_wait_all
It is unused now.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10146>
Chia-I Wu [Fri, 2 Apr 2021 16:52:24 +0000 (09:52 -0700)]
venus: remove vn_queue::sync_queue_index
It is unused now.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10146>
Chia-I Wu [Fri, 2 Apr 2021 16:48:25 +0000 (09:48 -0700)]
venus: remove VN_SYNC_TYPE_SYNC
It is unused now.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10146>
Chia-I Wu [Fri, 9 Apr 2021 20:14:44 +0000 (13:14 -0700)]
venus: remove vn_renderer_sync support from vn_queue_submission
It is unused now.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10146>
Chia-I Wu [Thu, 1 Apr 2021 21:00:21 +0000 (14:00 -0700)]
venus: stop using vn_renderer_sync in vn_queue
Move away from vn_renderer_sync and toward a userspace-only solution
temporarily until the kernel does what we need.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10146>
Chia-I Wu [Thu, 1 Apr 2021 22:22:17 +0000 (15:22 -0700)]
venus: stop using vn_renderer_sync in vn_semaphore
Move away from vn_renderer_sync and toward a userspace-only solution
temporarily until the kernel does what we need.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10146>
Chia-I Wu [Thu, 1 Apr 2021 22:22:17 +0000 (15:22 -0700)]
venus: stop using vn_renderer_sync in vn_fence
Move away from vn_renderer_sync and toward a userspace-only solution
temporarily until the kernel does what we need.
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10146>
Eric Engestrom [Wed, 14 Apr 2021 19:25:53 +0000 (21:25 +0200)]
docs: reset new_features.txt
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10242>
Eric Engestrom [Wed, 14 Apr 2021 19:24:29 +0000 (21:24 +0200)]
VERSION: bump to 21.2.0-devel
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10242>
Sagar Ghuge [Wed, 7 Apr 2021 21:05:21 +0000 (14:05 -0700)]
anv: Avoid corrupting indirect depth clear values
We don't need to initialize the BO since blorp updates the clear color
BO content with fast clear value i.e ANV_HZ_FC_VAL for depth surface.
With this approach, we can get rid of possibility of corruption since we
are no longer sharing the same clear BO for depth formats.
Closes: #3614
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9941>
Sagar Ghuge [Fri, 9 Apr 2021 00:10:07 +0000 (17:10 -0700)]
anv: Set correct fast clear value for depth during blorp operation
Previously, on the platforms which support the indirect clear color
values, we were just setting the clear color address and not enforcing
any clear color values but some of the blorp operations were using the
wrong fast clear value.
With this patch, we make sure to set the correct fast clear color value
during blorp operations.
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9941>
Boris Brezillon [Wed, 14 Apr 2021 09:08:03 +0000 (11:08 +0200)]
panfrost: Don't advertise AFBC mods when the format is not supported
On Bifrost, AFBC is not supported if the format has a non-identity
swizzle. For internal resources we fix the format at runtime, but this
fixup is not applicable when we export the resource. Don't advertise
AFBC modifiers on such formats.
Fixes:
44217be92134 ("panfrost: Adjust the format for AFBC textures on Bifrost v7")
Cc: mesa-stable
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10233>
Rob Clark [Fri, 5 Feb 2021 21:42:42 +0000 (13:42 -0800)]
freedreno: Manual fixups
Things I couldn't figure out how to get clang-format to not mess up.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8883>
Rob Clark [Wed, 14 Apr 2021 15:04:06 +0000 (08:04 -0700)]
freedreno: Re-indent
clang-format -fallback-style=none --style=file -i src/gallium/drivers/freedreno/*.[ch] src/gallium/drivers/freedreno/*/*.[ch]
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8883>
Rob Clark [Fri, 5 Feb 2021 20:26:16 +0000 (12:26 -0800)]
freedreno: Some manual reformatting
Take care of a few things that clang-format makes a hash of.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8883>
Rob Clark [Fri, 5 Feb 2021 20:22:59 +0000 (12:22 -0800)]
freedreno: Add .clang-format
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8883>
James Park [Mon, 12 Apr 2021 22:09:57 +0000 (15:09 -0700)]
meson: Fix winflexbison warnings
Undefine __STDC_VERSION__ for C files to avoid mismatch with C11/C17.
Define __STDC_VERSION__ for C++ files to use <inttypes.h> path.
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10196>
Rhys Perry [Wed, 14 Apr 2021 13:48:33 +0000 (14:48 +0100)]
aco/ra: remove live-in temporary from live_out_per_block when moving it
Otherwise, handle_loop_phis() might pass it to handle_live_in() and then
we could have two phis for this variable.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes:
7c64623e948 ("aco/ra: refactor SSA repairing during register allocation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10236>
Rhys Perry [Wed, 14 Apr 2021 15:02:00 +0000 (16:02 +0100)]
aco/ra: use original names when renaming loop carried phi operands
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes:
7c64623e948 ("aco/ra: refactor SSA repairing during register allocation")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10236>
Lionel Landwerlin [Wed, 14 Apr 2021 08:58:06 +0000 (11:58 +0300)]
anv: bump internal descriptor index fields to 32bits
Prior to supporting VK_EXT_descriptor_indexing all of our descriptor
limits where below 64k which fitted a uint16_t. Now all of those can
go up to 2^20 entries so we need 32bits indexes to keep track of them.
This change leaves the dynamic indexes at 16bits. We could arguably
bump them too, up to the reviewer's taste.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes:
6e230d7607f9b3 ("anv: Implement VK_EXT_descriptor_indexing")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4636
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10228>
Samuel Pitoiset [Wed, 14 Apr 2021 08:25:43 +0000 (10:25 +0200)]
ac: add missing BUF_DATA_FORMAT_10_11_11 vertex format on GFX10+
This format is supported by the driver.
Fixes vertex explosion in Dirt 5.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4635
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10226>
Connor Abbott [Wed, 11 Nov 2020 14:31:09 +0000 (15:31 +0100)]
ir3/sched: Don't schedule too many tex/SFU instructions
Consider a simple loop that does a series of texture instructions and
then reduces the results:
vec4 sum = vec4(0);
for (int i = 0; i < N; i++) {
sum += texture(...);
}
Assume that the loop is unrolled and we schedule the resulting basic
block. Right now, after we schedule the first texture instruction, the
only instructions available to schedule that don't incur a sync are the
instructions to setup the second texture instruction. So we keep picking
the texture instructions, no matter how large N is, resulting in a
pathological schedule for register pressure when N is very large:
sum1 = texture(...);
sum2 = texture(...);
sum3 = texture(...);
...
sum = sum1 + sum2 + sum3 + ...;
In particular this happens with some CTS tests for VK_EXT_robustness2,
where a loop like that with many iterations is marked as [[unroll]],
forcing NIR to unroll it.
This solution is a balance between the current approach and always
scheduling for register pressure (and ignoring sync's). We only allow a
certain number of texture fetches to be in flight before considering
textures to "sync", even though they don't really, both because they
likely *will* sync in reality (overflowing the internal queue of waiting
texture instructions) and because at some point we need the normal
algorithm to kick in and start lowering register pressure.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7571>
Connor Abbott [Wed, 11 Nov 2020 14:04:22 +0000 (15:04 +0100)]
ir3/sched: Don't penalize uses of already-waited tex/SFU
Once we insert a use of a given tex or SFU instruction, then we must
wait for that tex/SFU instruction (as well as all earlier ones) to
complete, so we shouldn't penalize further uses, even if a subsequent
tex/SFU instruction gets scheduled after the first use. This especially
matters after the next commit when we start forcibly breaking up long
sequences of texture instructions, since if we schedule a group of 8
texture instructions then we want to schedule the uses of those
instructions in parallel with the next 8 texture instructions to reduce
register pressure.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7571>
Erik Faye-Lund [Wed, 14 Apr 2021 14:47:42 +0000 (16:47 +0200)]
zink: verify that source-format support linear-filter
Similar to the previous commit, we should also verify that the
source-format support linear-filter if we try to blit with it.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10234>
Erik Faye-Lund [Wed, 14 Apr 2021 14:03:38 +0000 (16:03 +0200)]
zink: verify that src/dst support blitting
Some Vulkan-drivers don't support blitting between all formats and
layouts. So let's verify this while blitting, and fall back to the
normal rendering code-path instead.
This fixes a crash on start-up in OpenArena on V3DV.
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10234>
Bas Nieuwenhuizen [Wed, 14 Apr 2021 13:43:12 +0000 (15:43 +0200)]
radv/winsys: Remove use_local_bos
Now that perftest is stored in the winsys.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10198>
Bas Nieuwenhuizen [Tue, 13 Apr 2021 01:14:54 +0000 (03:14 +0200)]
radv: Use VRAM cmdbuffers in more situations.
In most games I tested we use 32 MiB of cmdbuffers+cmd upload buffers
at most. Especially since we have mutable descriptors it seems
somewhat unlikely anything else will eat it up so be a bit more
aggressive allocating them in VRAM.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10198>
Bas Nieuwenhuizen [Tue, 13 Apr 2021 01:10:49 +0000 (03:10 +0200)]
radv: Refactor cs_domain to be a winsys function.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10198>
Erik Faye-Lund [Wed, 14 Apr 2021 13:44:16 +0000 (15:44 +0200)]
zink: do not dereference NULL pointer
If first_frame_done isn't set, but fence is NULL, we end up dereferncing
that NULL-pointer.
This can happen in the case where the first submitted batch has no work,
and pfence was passed as a NULL-pointer.
While we're at it, simplify the check with the surrounding code, which
also checks for a NULL-pointer here.
Fixes:
e93ca92d4ae ("zink: force explicit fence only on first frame flush")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10235>
Timur Kristóf [Thu, 8 Apr 2021 15:40:28 +0000 (17:40 +0200)]
aco: Add a simple heuristic to decide early or late primitive export.
Late export is theoretically better if used with LATE_ALLOC,
but in practice, the early export has an advantage of
lower register usage, therefore more concurrent waves.
The idea of this commit is that "small" shaders benefit from early
primitive export more, due to being able to launch much more waves.
Let's consider a NIR shader "small" when it has only 1 block.
This yields both better performance, and better stats, than always
using late export.
Fossil DB on Sienna:
Totals from 12807 (8.76% of 146265) affected shaders:
VGPRs: 609128 -> 620216 (+1.82%); split: -0.01%, +1.83%
SpillSGPRs: 1458 -> 1538 (+5.49%)
CodeSize:
37028204 ->
37019320 (-0.02%); split: -0.17%, +0.14%
MaxWaves: 282902 -> 278516 (-1.55%)
Instrs: 7163142 -> 7162925 (-0.00%); split: -0.18%, +0.18%
VClause: 169285 -> 169547 (+0.15%); split: -1.15%, +1.30%
SClause: 267373 -> 267151 (-0.08%); split: -0.24%, +0.16%
Copies: 446442 -> 444567 (-0.42%); split: -2.68%, +2.26%
Branches: 156245 -> 156195 (-0.03%); split: -0.30%, +0.26%
PreSGPRs: 434701 -> 447396 (+2.92%)
PreVGPRs: 527783 -> 540527 (+2.41%)
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10106>
Timur Kristóf [Thu, 8 Apr 2021 15:37:13 +0000 (17:37 +0200)]
aco: Emit fewer branches for NGG VS/TES with late primitive export.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10106>
Timur Kristóf [Thu, 8 Apr 2021 13:42:17 +0000 (15:42 +0200)]
aco: Set block_kind_export_end in create_vs/fs_exports.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10106>
Timur Kristóf [Thu, 8 Apr 2021 13:39:39 +0000 (15:39 +0200)]
aco: Extract ngg_nogs_export_prim_id to a separate function.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10106>
Timur Kristóf [Thu, 8 Apr 2021 11:38:13 +0000 (13:38 +0200)]
aco: Use s_setprio 3 at the beginning of every VS and TES.
The user-set priority of shaders matters very little, but we hope
this might still help speed up VS input loads especially.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10106>
Timur Kristóf [Thu, 8 Apr 2021 11:32:01 +0000 (13:32 +0200)]
aco: Remove useless s_setprio near gs_alloc_req.
We learned that the gs_alloc_req is not actually when the export
space allocation happens. So it makes no sense to prioritize it.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10106>
Erik Faye-Lund [Wed, 14 Apr 2021 11:35:34 +0000 (13:35 +0200)]
zink: fall back from cached to non-cached memory
This fixes basic rendering on top of V3DV, which doesn't seem to expose
the cached memory we expect and love.
Fixes:
598dc3dca41 ("zink: use cached memory for all resources when possible")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10230>
Timur Kristóf [Sat, 10 Apr 2021 12:51:56 +0000 (14:51 +0200)]
aco: Align NGG scratch size to 16 so a single ds_read can always read it.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10155>
Timur Kristóf [Sat, 10 Apr 2021 12:52:55 +0000 (14:52 +0200)]
aco: Optimize workgroup exclusive scan to better avoid bank conflicts.
Previously, every wave had multiple active lanes read the LDS, and
the data was processed by VALU DPP instructions.
Now, only the first lane reads the LDS in order to avoid bank
conflicts, and the results are processed by SALU.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10155>
Boris Brezillon [Wed, 14 Apr 2021 12:11:19 +0000 (14:11 +0200)]
panfrost: Fix pan_blitter_get_blit_shader()
The key passed to _mesa_hash_table_search() is wrong, fix it.
Fixes:
8ba2f9f69858 ("panfrost: Create a blitter library to replace the existing preload helpers")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10232>
Erik Faye-Lund [Tue, 13 Apr 2021 12:27:39 +0000 (14:27 +0200)]
zink: do not clear on cpu
This seems to simply be a mixup of what utility function to use.
util_clear_render_target clears on the CPU, whereas
util_blitter_clear_render_target clears on the GPU. Because we do the
zink_blit_begin dance, it seems reasonable to assume the latter was
intended.
Fixes:
622f8f6ed57 ("zink: add a pipe_context::clear_texture hook")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10211>
Michel Dänzer [Thu, 1 Apr 2021 09:56:17 +0000 (11:56 +0200)]
ci: Update to latest ci-templates
This is possible again thanks to
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9955 , and
this MR requires rebuilding all templates based docker images anyway,
so we can pull in the latest templates for free.
We need to exclude /dev/* when unpacking rootfs tarballs for the
arm_test image, since x86 container build jobs do not allow mknod
anymore with current templates. The baremetal test jobs have another
filesystem mounted on /dev anyway.
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9833>
Michel Dänzer [Wed, 14 Apr 2021 12:34:16 +0000 (14:34 +0200)]
ci: Do not append ci-templates commit hash to Windows docker image tag
We're not using the templates for the Windows image.
Fixes needless rebuild of the Windows image when the ci-templates
commit is changed.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9833>
Michel Dänzer [Mon, 22 Mar 2021 16:02:50 +0000 (17:02 +0100)]
ci: Install Rust & cargo from Debian for x86_test* images
Also build deqp-runner once in x86_test-base instead of separately in
x86_test-{gl,vk}.
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9833>
Michel Dänzer [Mon, 22 Mar 2021 15:45:54 +0000 (16:45 +0100)]
ci: Install GLVND from Debian bullseye
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9833>
Michel Dänzer [Mon, 22 Mar 2021 15:43:02 +0000 (16:43 +0100)]
ci: Install llvm-spirv from Debian bullseye
While we're at it, use a tag instead of whatever happens to be the
current main branch for building libclc.
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9833>
Michel Dänzer [Mon, 22 Mar 2021 15:31:48 +0000 (16:31 +0100)]
ci: Install spirv-tools from Debian bullseye
v2:
* Drop local build from x86_test-gl image as well (Eric Anholt)
Reviewed-by: Eric Anholt <eric@anholt.net> # v1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9833>
Michel Dänzer [Sat, 20 Mar 2021 10:00:05 +0000 (11:00 +0100)]
ci: Install librenderdoc from Debian bullseye
Debian bullseye has a separate command-line-only renderdoc package, so
no need to install Qt packages and build renderdoc anymore.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3125
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9833>
Michel Dänzer [Fri, 19 Mar 2021 11:52:35 +0000 (12:52 +0100)]
ci: Move docker images from Debian buster to bullseye
Among other things, this gets us GCC 10 (was 6).
Requires some changes to third party components we use:
* Install apitrace (& waffle) from Debian; was hitting issues with the
local build, and it's the same version 9.0 anyway.
* Update Fossilize to a newer commit which builds with GCC 10.
* apt.llvm.org repositories are no longer needed.
* Use an SPIRV-LLVM-Translator commit which builds with LLVM 11.0.1.
* Install XCB packages from Debian, 1.13 fails to build with Python 3.9.
* Install wayland-protocols from Debian, 1.12 is too old for
libgtk-3-dev in bullseye.
LLVM 7/8 packages are no longer available.
Also adapt expected test results to Xvfb now exposing multi-samle
GLXFBConfigs.
v2:
* Install clang instead of clang-11.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3124
Reviewed-by: Eric Anholt <eric@anholt.net> # v1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9833>
Michel Dänzer [Fri, 19 Mar 2021 11:25:54 +0000 (12:25 +0100)]
ci: Bump LLVM/clang from 10 to 11
Preparation for moving to Debian bullseye, which has packages for LLVM
9 & 11, but not 10.
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9833>
Michel Dänzer [Mon, 22 Mar 2021 11:15:04 +0000 (12:15 +0100)]
ci: Do not install armhf LLVM packages
LLVM support has been disabled in the meson-armhf job for some time, so
they were unused.
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9833>
Michel Dänzer [Thu, 1 Apr 2021 13:16:35 +0000 (15:16 +0200)]
intel/blorp: Initialize texture_data[0]
Avoids warning with GCC 10:
../src/intel/blorp/blorp_blit.c: In function 'blorp_nir_combine_samples':
../src/intel/blorp/blorp_blit.c:702:25: error: 'texture_data[0]' may be used uninitialized in this function [-Werror=maybe-uninitialized]
702 | texture_data[0] = nir_fmul(b, texture_data[0],
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
703 | nir_imm_float(b, 1.0 / tex_samples));
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9833>
Pierre-Eric Pelloux-Prayer [Tue, 23 Mar 2021 09:40:43 +0000 (10:40 +0100)]
r600/sb: Use assignments for resetting struct r600_sb::literal
Avoids warning with newer GCC:
../src/gallium/drivers/r600/sb/sb_sched.cpp: In member function 'void r600_sb::literal_tracker::reset()':
../src/gallium/drivers/r600/sb/sb_sched.cpp:1953:26: error: 'void* memset(void*, int, size_t)' clearing an object of non-trivial type 'struct r600_sb::literal'; use assignment or value-initialization instead [-Werror=class-memaccess]
1953 | memset(lt, 0, sizeof(lt));
| ^
In file included from ../src/gallium/drivers/r600/sb/sb_sched.cpp:35:
../src/gallium/drivers/r600/sb/sb_bc.h:409:8: note: 'struct r600_sb::literal' declared here
409 | struct literal {
| ^~~~~~~
[ Michel Dänzer:
* Expanded commit log
v2:
* Clear all 4 members of lt[4] (Eric Anholt)
]
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9833>
Michel Dänzer [Tue, 23 Mar 2021 14:27:17 +0000 (15:27 +0100)]
ci: Fix HTML summary path for piglit OpenCL job artifacts
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9833>
Juan A. Suarez Romero [Wed, 14 Apr 2021 11:36:25 +0000 (13:36 +0200)]
ci/v3dv: skip Vulkan waiver tests
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10231>
Rhys Perry [Wed, 14 Apr 2021 09:18:17 +0000 (10:18 +0100)]
radv: fix conditions for running nir_opt_vectorize
No fossil-db changes, probably because all fp16 shaders have at least one
16-bit mov or vec2 somehwere.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10227>
Connor Abbott [Fri, 4 Dec 2020 16:26:31 +0000 (17:26 +0100)]
tu: Expose VK_KHR_relaxed_block_layout
This was absorbed into Vulkan 1.1, but we forgot to expose it
separately. It's a subset of what's allowed by
VK_EXT_scalar_block_layout.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8695>
Connor Abbott [Thu, 3 Dec 2020 10:46:48 +0000 (11:46 +0100)]
tu: Expose VK_KHR_spirv_1_4 and VK_EXT_scalar_block_layout
VK_KHR_spirv_1_4 is trivial because vtn already supports all the added
SPIR-V features that aren't gated behind Vulkan extensions. I've
observed some robustness2 CTS tests requiring this. However there are
a few tests currently failing due to lacking spilling.
VK_EXT_scalar_block_layout should also be trivial, since support for
"straddling" UBO loads was added recently for other reasons. This is
used by every robustness2 CTS test.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8695>
Juan A. Suarez Romero [Tue, 2 Feb 2021 12:38:49 +0000 (13:38 +0100)]
v3d: do not emit attribute if has no resource
When emitting the GL shader state, verify the attribute has a resource
bound; otherwise just skip it
v2 (chema):
- Move comment
- Set num_elements_to_emit = 1 if it is 0
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4205
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8826>
Alejandro Piñeiro [Tue, 13 Apr 2021 21:19:23 +0000 (23:19 +0200)]
v3dv/pipeline: reduce descriptor_map size
64 was a temporary and conservative "big enough" value, but we can do
better.
Note that as mentioned on the FIXME, we could be even more detailed,
adding a descriptor map allocate method based on the descriptor
type. That would mean more individual allocations, and slightly more
complexity.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10207>
Alejandro Piñeiro [Tue, 13 Apr 2021 21:18:37 +0000 (23:18 +0200)]
v3dv/device: fix and cleanup v3dv limits
We had some cases were we have defined a value on v3dv_limits but
using other when setting it at GetPhysicalDeviceProperties (like
dynamic storage buffers).
Also we do a cleanup. So far we were adding on v3dv_limits only the
limits that were used on more that one place. But then we had the
definition of several limits on different places. It is clearer to
have a common place for those, even if it is used on just one place.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10207>
Alejandro Piñeiro [Tue, 13 Apr 2021 21:14:43 +0000 (23:14 +0200)]
v3dv/device: do not compute per-pipeline limits multiplying per-stage
There were two problems here:
* We were multiplying by 6, when for graphics pipelines, we only
support 2.
* Right now we are tracking descriptors through the descriptor
maps, and we have one per pipeline. So in practice there is no
difference between per-stage and per-pipeline limits. So far this
was not a problem, we could revisit in the future.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10207>
Samuel Pitoiset [Tue, 15 Dec 2020 10:54:31 +0000 (11:54 +0100)]
radv: advertise attachmentFragmentShadingRate on GFX10.3
Layered VRS attachments is for later.
The CTS failures are similar to the existing ones, I will investigate
soon.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10187>
Samuel Pitoiset [Fri, 9 Apr 2021 11:58:53 +0000 (13:58 +0200)]
radv: configure the VRS combiners when an attachment is used
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10187>
Samuel Pitoiset [Thu, 8 Apr 2021 17:10:00 +0000 (19:10 +0200)]
radv: copy VRS rates to HTILE when beginning a subpass
The global VRS image is created on-demand to avoid wasting space.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10187>
Samuel Pitoiset [Tue, 8 Dec 2020 14:36:22 +0000 (15:36 +0100)]
radv: add support for copying VRS rates into HTILE
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10187>
Samuel Pitoiset [Thu, 8 Apr 2021 09:43:00 +0000 (11:43 +0200)]
radv: bind our internal depth buffer when not provided by the app
When a subpass uses a VRS attachment without binding a depth/stencil
attachment (yes, this is allowed by the Vulkan spec), we have to bind
our internal depth buffer that contains the VRS data.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10187>
Samuel Pitoiset [Fri, 9 Apr 2021 11:57:21 +0000 (13:57 +0200)]
radv: handle the VRS attachment subpass
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10187>
Samuel Pitoiset [Wed, 7 Apr 2021 15:55:00 +0000 (17:55 +0200)]
radv: create an image for VRS if no depth/stencil attachment is bound
The Vulkan spec doesn't require the application to always binds
a depth/stencil attachment when a VRS attachment is used inside the
same subpass.
To handle this situation, the driver creates a global 4096x4096
VRS image that will be bind at draw-time if needed. This isn't
super ideal but we have to do that unfortunately.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10187>
Samuel Pitoiset [Mon, 12 Apr 2021 13:01:24 +0000 (15:01 +0200)]
radv: allow HTILE for very small images if VRS attachment is used
We need a HTILE buffer to store the VRS rates.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10187>
Samuel Pitoiset [Mon, 22 Mar 2021 17:15:26 +0000 (18:15 +0100)]
radv: update the HTILE clear word when VRS is used
SR1 is the VRS x-rate.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10187>
Samuel Pitoiset [Fri, 9 Apr 2021 11:26:30 +0000 (13:26 +0200)]
radv: do not use the whole HTILE buffer for depth when VRS is used
The stencil data needs to be included for storing the VRS rates
into the HTILE buffer.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10187>
Samuel Pitoiset [Fri, 9 Apr 2021 11:30:01 +0000 (13:30 +0200)]
radv: configure the VRS HTILE encoding size
Any depth buffer can potentially use VRS.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10187>