Nico Weber [Fri, 18 Nov 2022 15:36:14 +0000 (10:36 -0500)]
[bolt] Clean up lit site cfg files a bit
* Stop setting config.python_executable in Unit/lit.site.cfg.py.in.
All other projects only set this in the main lit config, not in the
one for unit tests. (Unit tests don't spawn Python.)
* Set config.python_executable to Python3_EXECUTABLE in main
lit.site.cfg.py.in instead of PYTHON_EXECUTABLE. All other files
did this in
c4c3883b00.
* Stop setting enable_abi_breaking_checks, enable_backtrace, enable_shared.
Nothing in bolt's tests (or in lit) reads them.
Differential Revision: https://reviews.llvm.org/D138299
Alex Langford [Thu, 17 Nov 2022 21:46:40 +0000 (13:46 -0800)]
[lldb] Restore default setting of LLDB_INCLUDE_TESTS in standalone builds
In
52f39853abd46495a6d636c4b035e1b92cf4b833 the option LLDB_INCLUDE_TESTS was
moved above the inclusion of LLDBStandalone. This isn't a problem per-se, but
it changes the default value of LLDB_INCLUDE_TESTS in standalone builds.
LLDBStandalone explicitly sets LLVM_INCLUDE_TESTS to true, indicating that
for standalone builds this is considered the default behavior.
This patch restores said default behavior.
Differential Revision: https://reviews.llvm.org/D138237
Petar Avramovic [Fri, 18 Nov 2022 17:00:01 +0000 (18:00 +0100)]
AMDGPU/GlobalISel: Fix crash after mad/fma_mix fails selection
When selectVOP3PMadMixModsImpl fails, it can still create new copy instr
via selectVOP3ModsImpl. When selectG_FMA_FMAD gives up, new copy instr
will remain dead but will not be automatically removed.
InstructionSelect does not check if instructions created during selection
are dead.
Such dead copy doesn't have register class on dst operand and causes crash.
Fix is to build copy when operands are being added to selected instruction.
Differential Revision: https://reviews.llvm.org/D138044
Jay Foad [Fri, 18 Nov 2022 16:11:18 +0000 (16:11 +0000)]
[AMDGPU] Stop looking for implicit M0 uses on MOV instructions
Before D114230, indirect moves used regular MOV opcodes and were
identified by having an implicit use of M0. Since D114230 they use
dedicated opcodes instead, so remove some old code that checks for
implicit uses of M0. NFCI.
Differential Revision: https://reviews.llvm.org/D138308
Matt Arsenault [Fri, 11 Nov 2022 18:30:22 +0000 (10:30 -0800)]
InstSimplify: Add baseline tests for canonicalize
Matt Arsenault [Fri, 18 Nov 2022 06:14:35 +0000 (22:14 -0800)]
AMDGPU/GlobalISel: Fix strictfp fmul
Xing Xue [Fri, 18 Nov 2022 16:36:56 +0000 (11:36 -0500)]
[Clang][CodeGen][AIX] Map __builtin_frexpl, __builtin_ldexpl, and __builtin_modfl to 'double' version lib calls in 64-bit 'long double' mode
Summary:
AIX library functions frexpl(), ldexpl(), and modfl() are for 128-bit IBM long double, i.e. __ibm128. Other *l() functions, e.g., acosl(), are for 64-bit long double. The AIX Clang compiler currently maps builtin functions __builtin_frexpl(), __builtin_ldexpl(), and __builtin_modfl() to frexpl(), ldexpl(), and modfl() in 64-bit long double mode which results in seg-faults or incorrect return values. This patch changes to map __builtin_frexpl(), __builtin_ldexpl(), and __builtin_modfl() to double version lib functions frexp(), ldexp() and modf() in 64-bit long double mode.
Reviewed by: hubert.reinterpretcast, daltenty
Differential Revision: https://reviews.llvm.org/D137986
Louis Dionne [Thu, 17 Nov 2022 15:33:08 +0000 (10:33 -0500)]
[libc++] Use numeric_limits instead of raw INT_MAX
This allows discard_block_engine to work on platforms that might not
provide a full <limits.h> header.
Differential Revision: https://reviews.llvm.org/D138212
Dinar Temirbulatov [Fri, 18 Nov 2022 16:21:10 +0000 (16:21 +0000)]
[AArch64][SVE] Use PTRUE instruction instead of WHILELO if the range is appropriate for predicator constant.
While get_active_lane_mask lowering it uses WHILELO instruction,
but forconstant range suitable for PTRUE then we could issue PTRUE instruction
instead.
Differential Revision: https://reviews.llvm.org/D137547
David Spickett [Fri, 18 Nov 2022 16:15:51 +0000 (16:15 +0000)]
[LLDB][AArch64] Add
BF16BF16, SME2p1 and SVE2p1 to disassembler test
See:
https://reviews.llvm.org/rGcf69895ab31b
https://reviews.llvm.org/D136352
https://reviews.llvm.org/D137410
Krzysztof Parzyszek [Fri, 18 Nov 2022 15:35:03 +0000 (07:35 -0800)]
[Hexagon] Add missing patterns for mulhs/mulhu
bzcheeseman [Wed, 16 Nov 2022 05:23:18 +0000 (21:23 -0800)]
[MLIR][Parser] Add `parseBase64Bytes`.
This patch adds `parseBase64Bytes` to the parser. It attempts to avoid double-allocating the buffer by re-using the token's spelling directly and eliding the quotes if they exist. It also avoids extra allocations by using std::vector<char> in the API - something we should change when the llvm::decodeBase64 API changes.
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D138090
Raphael Isemann [Wed, 16 Nov 2022 23:52:02 +0000 (00:52 +0100)]
[lldb] Fix that empty target.run-args are not actually used when launching process
`GetPropertyAtIndexAsArgs` returns true on success and false on failure. Right
now it returns the converted `size_t` returned from `GetArgs` which describes
the number of arguments in the argument list. So for empty argument lists
(`(size_t)0` -> `(bool)false`) this function always fails.
The only observable effect of this seems to be that empty arguments are never
propagated to the internal LaunchInfo for a process. This causes that once any
argument has been added to `target.run-args`, clearing `target.run-args` doesn't
have any effect.
Fixes issue #55568
Reviewed By: JDevlieghere, jingham
Differential Revision: https://reviews.llvm.org/D126057
David Spickett [Fri, 18 Nov 2022 12:55:15 +0000 (12:55 +0000)]
[libcxx] Fix link to Buildbot interface
Reviewed By: #libc, philnik, ldionne
Differential Revision: https://reviews.llvm.org/D138286
Philip Reames [Fri, 18 Nov 2022 15:23:10 +0000 (07:23 -0800)]
[SDAG] Allow scalable vectors in ComputeKnownBits
his is the SelectionDAG equivalent of D136470, and is thus an alternate patch to D128159.
The basic idea here is that we track a single lane for scalable vectors which corresponds to an unknown number of lanes at runtime. This is enough for us to perform lane wise reasoning on many arithmetic operations.
This patch also includes an implementation for SPLAT_VECTOR as without it, the lane wise reasoning has no base case. The original patch which inspired this (D128159), also included STEP_VECTOR. I plan to do that as a separate patch.
Differential Revision: https://reviews.llvm.org/D137140
Timm Bäder [Fri, 18 Nov 2022 13:53:28 +0000 (14:53 +0100)]
[clang][NFC] Remove unused parameter from ParseConstantExpression
Florian Hahn [Fri, 18 Nov 2022 15:19:50 +0000 (15:19 +0000)]
[llvm-reduce] Do not crash when accessing landingpads of invokes.
Unconditionally removing landing pads results in invalid IR,
if there is a different `invoke` that uses it. Update the code
to only remove the landing pad if the current invoke is the only
user. Also carefully avoid creating plain branches to bbs with
landing pads we couldn't remove.
Reviewed By: arsenm, aeubanks
Differential Revision: https://reviews.llvm.org/D138072
Timm Bäder [Fri, 18 Nov 2022 13:46:16 +0000 (14:46 +0100)]
[clang][parse] Avoid creating StmtVectors every loop iteration
Timm Bäder [Sat, 12 Nov 2022 17:06:06 +0000 (18:06 +0100)]
[clang][sema][NFC] Make some local variables const
We don't modify them. Also use auto here since we already wrote the full
type in the cast.
Alexander Timofeev [Fri, 18 Nov 2022 15:16:10 +0000 (16:16 +0100)]
ARCRegisterInfo::eliminateFrameIndex updated to fix build error caused by
32bd75716c27d1a094c2436529b596ce1547f6eb
Alexander Timofeev [Thu, 17 Nov 2022 18:03:22 +0000 (19:03 +0100)]
PEI should be able to use backward walk in replaceFrameIndicesBackward.
The backward register scavenger has correct register
liveness information. PEI should leverage the backward register scavenger.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D137574
Oleg Shyshkov [Fri, 18 Nov 2022 13:45:33 +0000 (14:45 +0100)]
[mlir][linalg] Do not check if added dimension are static in linalg.broadcast.
Added dimensions can be both static and dinamic. Mapped dimension should be the same in the input and the init.
Differential Revision: https://reviews.llvm.org/D138291
Nico Weber [Fri, 18 Nov 2022 14:47:01 +0000 (09:47 -0500)]
[bolt] add missing space in "llvm-bolt -help" output
gbreynoo [Fri, 18 Nov 2022 14:37:56 +0000 (14:37 +0000)]
[llvm-ar] Fix when llvm-ar fails to replace existing members when updating a thin archive
As seen in https://github.com/llvm/llvm-project/issues/55023 when a thin
archive is updated when not in the CWD, replacement does not work as
expected. This change fixes the relative file path comparison so the
correct files are updated.
Differential Revision: https://reviews.llvm.org/D138218
David Sherwood [Fri, 18 Nov 2022 13:07:35 +0000 (13:07 +0000)]
[AArch64][SME2] Remove vector constraints from zip/uzp (2-vector) instruction classes
The zip/uzp (2-vector) instruction classes have the incorrect
register constraints and mark the destination as also being an
input. However, the instructions are fully destructive so I've
restructured the classes.
Differential Revision: https://reviews.llvm.org/D138288
Tobias Gysi [Fri, 18 Nov 2022 14:04:38 +0000 (15:04 +0100)]
[mlir][llvm] Iterative constant import from LLVM IR.
Instead of importing constant expressions recursively, the revision
walks all dependencies of an LLVM constant iteratively. The actual
conversion then iterates over a list of constants and all intermediate
constant values are added to the value mapping. As a result, an LLVM IR
constant maps to exactly one MLIR operation per function. The revision
adapts the existing tests since the constant ordering changed for
aggregate types. Additionally, it adds extra tests that mix aggregate
constants and constant expressions.
Depends on D137416
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D137559
Haojian Wu [Fri, 18 Nov 2022 14:05:56 +0000 (15:05 +0100)]
[clang-tidy] Remove a duplicated if-branch in the unused-using-decl
check, NFC
Aarush Bhat [Fri, 18 Nov 2022 13:54:31 +0000 (21:54 +0800)]
[docs] remove extra slash from llvm github url
Reviewed By: tstellar
Differential Revision: https://reviews.llvm.org/D137418
Phoebe Wang [Fri, 18 Nov 2022 13:08:01 +0000 (21:08 +0800)]
[X86] Use lock add/sub for cases that we only care about the EFLAGS
This fixes #36373, #36905 and partial of #58685.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D137711
Guillaume Chatelet [Fri, 18 Nov 2022 10:14:37 +0000 (10:14 +0000)]
[reland][libc][bazel] Add tests to the bazel build
This patch adds bazel tests for llvm-libc.
Some math tests rely on the `mpfr` library. This is controlled via the `--@llvm-project//libc:libc_math_mpfr` flag. It can take three values:
- `external` (default) will build `mpfr` and `gmp` from source.
- `system` will use the system installed `mpfr` library.
- `disable` will skip tests relying on `mpfr`.
Reviewed By: sivachandra, GMNGeoffrey
Differential Revision: https://reviews.llvm.org/D119547
Tom Praschan [Wed, 16 Nov 2022 23:20:37 +0000 (00:20 +0100)]
[Support] Add support for attaching payloads to points and ranges
This is useful where tests previously encoded information in the name
names of ranges and points. Currently, this is pretty limited because
names consist of only alphanumeric characters and '_'.
With this patch, we can keep the names simple and attach optional
payloads to ranges and points instead.
The new syntax should be fully backwards compatible (if I haven't missed
anything). I tested this against clangd unit tests and everything still passes.
Differential Revision: https://reviews.llvm.org/D137909
Haojian Wu [Mon, 14 Nov 2022 08:58:39 +0000 (09:58 +0100)]
[include-cleaner] Add self-contained file support for PragmaIncludes.
And use it findHeaders. findHeaders now finds all header candidates
given a symbol location (these headers will be attached with proper
signals, in a followup patch).
Differential Revision: https://reviews.llvm.org/D137698
Phoebe Wang [Fri, 18 Nov 2022 12:50:24 +0000 (20:50 +0800)]
[X86] Pre-commit tests for pr58685
OCHyams [Fri, 18 Nov 2022 12:36:41 +0000 (12:36 +0000)]
[Assignment Tracking][24/*] Always RemoveRedundantDbgInstrs in instcombine in assignment tracking builds
The Assignment Tracking debug-info feature is outlined in this RFC:
https://discourse.llvm.org/t/
rfc-assignment-tracking-a-better-way-of-specifying-variable-locations-in-ir
This reduces peak memory overhead by 15% when building CTMark's tramp3d-v4 with
-O2 -g with assignment tracking enabled.
Reviewed By: jmorse
Differential Revision: https://reviews.llvm.org/D133321
OCHyams [Fri, 18 Nov 2022 12:20:58 +0000 (12:20 +0000)]
Fix inliner test after
e3cd498ff7748f967be1bdcc0a994e40ce82268f
Bot failure: https://lab.llvm.org/buildbot/#/builders/16/builds/38156
e3cd498ff7748f967be1bdcc0a994e40ce82268f (D133318) updates CloneBlock to
preserve debug use-before-defs. Update local-as-metadata-undominated-use.ll to
reflect this.
Hassnaa Hamdi [Thu, 17 Nov 2022 17:40:51 +0000 (17:40 +0000)]
[AArch64][SME]: Generate streaming-compatible code for ISD::INSERT_VECTOR_ELT.
1- Enable custom lowering INSERT_VECTOR_ELT to generate code compatible
to streaming mode.
2- Add testing file:
insert-vector-elt.ll
Differential Revision: https://reviews.llvm.org/D138222
Hassnaa Hamdi [Thu, 17 Nov 2022 17:38:30 +0000 (17:38 +0000)]
[AArch64][SME]: Add precursory tests for D138222
Dominik Adamski [Thu, 20 Oct 2022 13:20:37 +0000 (08:20 -0500)]
[mlir][OpenMP] Add order clause definition to simd construct
Update simd construct definition and add mlir tests to prove
that order(concurrent) clause is correctly modeled for simd
construct.
Jay Foad [Fri, 18 Nov 2022 11:56:12 +0000 (11:56 +0000)]
[AMDGPU] Test MAD formation on GFX11
GFX11 has no MAD instructions, only FMA, so this is just testing that we
generate separate MUL and ADD.
OCHyams [Fri, 18 Nov 2022 11:49:43 +0000 (11:49 +0000)]
[Assignment Tracking][21/*] Account for assignment tracking in inliner
The Assignment Tracking debug-info feature is outlined in this RFC:
https://discourse.llvm.org/t/
rfc-assignment-tracking-a-better-way-of-specifying-variable-locations-in-ir
The inliner requires two additions:
fixupAssignments - Update inlined instructions' DIAssignID metadata so that
inlined DIAssignID attachments are unique to the inlined instance.
trackInlinedStores - Treat inlined stores to caller-local variables
(i.e. callee stores to argument pointers that point to the caller's allocas) as
assignments. Track them using trackAssignments, which is the same method as is
used by the AssignmentTrackingPass. This means that we're able to detect stale
memory locations due to DSE after inlining. Because the stores are only tracked
_after_ inlining, any DSE or movement of stores _before_ inlining will not be
accounted for. This is an accepted limitation mentioned in the RFC.
One change is also required:
Update CloneBlock to preserve debug use-before-defs. Otherwise the assignments
will be dropped due to having the intrinsic operands replaced with empty
metadata (see use-before-def.ll in this patch and this related discourse post.
Reviewed By: jmorse
Differential Revision: https://reviews.llvm.org/D133318
Nico Weber [Fri, 18 Nov 2022 11:48:07 +0000 (06:48 -0500)]
[gn build] port
7059a6c32cfa
Hassnaa Hamdi [Thu, 17 Nov 2022 15:27:45 +0000 (15:27 +0000)]
[AArch64][SME]: Use SVE mov instruction for FPR128 registers in streaming-compatible mode.
1- in streaming mode, use SVE OR/mov instruction instead of NEON OR,
during copying phyReg -AArch64InstrInfo::copyPhysReg-.
2- add testing file:
register-mov.ll
Differential Revision: https://reviews.llvm.org/D138211
Dmitry Preobrazhensky [Fri, 18 Nov 2022 11:12:22 +0000 (14:12 +0300)]
[AMDGPU][GFX11][NFC] Refactor VOPD operands handling (part 2)
Rename interface functions and operands to make code clearer.
Differential Revision: https://reviews.llvm.org/D138133
Valery Pykhtin [Thu, 17 Nov 2022 19:19:04 +0000 (20:19 +0100)]
[AMDGPU] Fix PreRARematStage::sinkTriviallyRematInsts region boundary update after sinking.
First boundary of a region wasn't updated when a sinked instruction was added first into the region.
Reviewed By: vangthao
Differential Revision: https://reviews.llvm.org/D138256
Matthias Springer [Fri, 18 Nov 2022 10:18:19 +0000 (11:18 +0100)]
[mlir] GreedyPatternRewriter: Reprocess modified ops
Ops that were modifed in-place (`finalizeRootUpdate` was called) should be reprocessed by the GreedyPatternRewriter. This is currently not happening with `GreedyRewriteConfig::maxIterations = 1`.
Note: If your project goes into an infinite loop because of this change, you likely have one or multiple faulty patterns that modify the same operations in-place (`updateRootInplace`) indefinitely.
Differential Revision: https://reviews.llvm.org/D138038
Benjamin Maxwell [Fri, 18 Nov 2022 10:14:55 +0000 (10:14 +0000)]
[DAG] Allow folding AND of anyext masked_load with >1 user to zext version
This now allows folding an AND of a anyext masked_load to a
zext_masked_load even if the masked load has multiple users. Doing is
eliminates some redundant ANDs/MOVs for certain AArch64 SVE code.
I'm not sure if there's any cases where doing this could negatively the
other users of the masked_load. Looking at other optimizations of
masked loads, most don't apply if the load is used more than once, so it
doesn't look like this would interfere.
Reviewed By: c-rhodes
Differential Revision: https://reviews.llvm.org/D137844
Matt Jacobson [Fri, 18 Nov 2022 10:19:53 +0000 (05:19 -0500)]
[Driver] exclude recently added tests from Windows
OCHyams [Fri, 18 Nov 2022 10:07:30 +0000 (10:07 +0000)]
[Assignment Tracking][15/*] Account for assignment tracking in simplifycfg
The Assignment Tracking debug-info feature is outlined in this RFC:
https://discourse.llvm.org/t/
rfc-assignment-tracking-a-better-way-of-specifying-variable-locations-in-ir
Update simplifycfg:
sinkLastInstruction - preserve debug use-before-defs.
SpeculativelyExecuteBB - replace the value component of dbg.assign intrinsics
when stores are hoisted and merged using a select, and don't delete them.
Reviewed By: jmorse
Differential Revision: https://reviews.llvm.org/D133310
River Riddle [Fri, 18 Nov 2022 04:51:38 +0000 (20:51 -0800)]
[mlir][SubElementInterfaces] Add a recursivelyReplaceElementsIn helper to AttrTypeReplacer
This somewhat improves the ergonomics when replacing recursively within
a set of IR.
River Riddle [Fri, 18 Nov 2022 04:44:27 +0000 (20:44 -0800)]
[mlir][AsmPrinter] Allow explicitly disabling debug info
This adds an `enable` flag to OpPrintingFlags::enableDebugInfo
that allows for overriding any command line flags for debug printing,
and matches the format that we use for other `enableBlah` API.
River Riddle [Thu, 17 Nov 2022 00:26:18 +0000 (16:26 -0800)]
[mlir] Fix ordering of intermixed attribute/type aliases
We properly order dependencies between attribute/type aliases,
but we currently always print attribute aliases separately from type
aliases. This creates problems if an attribute wants to use a type
alias during printing.
This commit refactors alias collection such that attribute/type aliases
are collected together and printed together.
Differential Revision: https://reviews.llvm.org/D138162
OCHyams [Fri, 18 Nov 2022 09:22:29 +0000 (09:22 +0000)]
[Assignment Tracking][14/*] Account for assignment tracking in instcombine
The Assignment Tracking debug-info feature is outlined in this RFC:
https://discourse.llvm.org/t/
rfc-assignment-tracking-a-better-way-of-specifying-variable-locations-in-ir
Most of the updates here are just to ensure DIAssignID attachments are
maintained and propagated correctly.
Reviewed By: jmorse
Differential Revision: https://reviews.llvm.org/D133307
Adrian Kuegel [Fri, 18 Nov 2022 09:18:37 +0000 (10:18 +0100)]
[mlir][Bazel] Add DebugImporter sources to build target.
serge-sans-paille [Fri, 18 Nov 2022 09:10:21 +0000 (10:10 +0100)]
[clang] Fix assert message
Jean Perier [Fri, 18 Nov 2022 09:08:56 +0000 (10:08 +0100)]
[flang] Lower ArrayRef to hlfir.designate
Also add support for fir.boxchar in HLFIRTools so that character
designator with none constant lengths can be processed/converted to
fir::ExtendedValue.
Differential Revision: https://reviews.llvm.org/D138190
Alexander Shaposhnikov [Fri, 18 Nov 2022 08:45:05 +0000 (08:45 +0000)]
Revert "Revert "[opt][clang] Enable using -module-summary/-flto=thin with -S/-emit-llvm""
This reverts commit
7f608a2497c7578b9f3ca98014176ab95cffe3c0
and removes the dependency of Object on IRPrinter.
Vitaly Buka [Fri, 18 Nov 2022 08:54:21 +0000 (00:54 -0800)]
[NFC][asan] Simplify __sanitizer_annotate_contiguous_container
wanglei [Fri, 18 Nov 2022 08:33:49 +0000 (16:33 +0800)]
[LoongArch] Implement assembler branches pseudo instructions
These instructions always output the canonical mnemonic. The GNU tools
emit the canonical mnemonic for the branch pseudo instructions as well
(e.g. "bgt" will be recognised by the assembler but never printed by
objdump).
Reviewed By: xen0n
Differential Revision: https://reviews.llvm.org/D138100
Tobias Gysi [Fri, 18 Nov 2022 08:44:26 +0000 (09:44 +0100)]
[mlir][llvm] Import additional debug info from LLVMIR.
Add a DebugImporter to convert LLVMIR debug metadata into
MLIR debug attributes. It is the counterpart to the
DebugTranslation class and supports the same attributes.
The revision only supports the translation of instruction,
function, and module debug information. The import of
intrinsics is left to a later revision.
Depends on D138206
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D138209
Tobias Gysi [Fri, 18 Nov 2022 08:35:15 +0000 (09:35 +0100)]
[mlir][llvm] Make some debug info attribute parameters optional.
The revision makes specific debug information attribute parameters
optional since some of them can be omitted in LLVMIR. The additional
flexibility enables a later revision that will support importing
debug information from LLVMIR. A special case is the types parameter
of the SubroutineTypeAttr. For void functions, its first entry is
null in LLVMIR. This revision splits the type parameter in an optional
resultType parameter and an argumentTypes array to support this corner
case.
Reviewed By: rriddle
Differential Revision: https://reviews.llvm.org/D138206
Martin Storsjö [Fri, 18 Nov 2022 08:27:46 +0000 (10:27 +0200)]
[include-cleaner] Fix building with LLVM_LINK_LLVM_DYLIB=ON on mingw
Make sure to use clang_target_link_libraries, which skips linking
against libraries and links against libclang-cpp instead, if
LLVM_LINK_LLVM_DYLIB is enabled.
This fixes errors like these:
ld.lld: error: duplicate symbol: clang::PPCallbacks::~PPCallbacks()
>>> defined at libclangLex.a(PPCallbacks.cpp.obj)
>>> defined at libclang-cpp.dll
Mikhail Goncharov [Fri, 18 Nov 2022 08:25:45 +0000 (09:25 +0100)]
Revert "[opt][clang] Enable using -module-summary/-flto=thin with -S/-emit-llvm"
This reverts commit
34ab474348e2623cc67abddb7bb662385297ac65.
as it has introduced circular dependency lib - analysis
Adrian Kuegel [Fri, 18 Nov 2022 07:46:54 +0000 (08:46 +0100)]
[llvm][Bazel] Remove dependency to avoid cycyle.
Differential Revision: https://reviews.llvm.org/D138266
Jean Perier [Fri, 18 Nov 2022 07:38:11 +0000 (08:38 +0100)]
[flang] Add hlfir.designate definition
Add hlfir.designate operation definition. This is the HLFIR building
blocks to represent Fortran designator. An hlfir.designator is a
Fortran "part-ref" and an optional susbstring or part ref.
See the operation added description for more detail, and
https://github.com/llvm/llvm-project/blob/main/flang/docs/HighLevelFIR.md
for the rational of this operation.
Differential Revision: https://reviews.llvm.org/D138121
Chuanqi Xu [Thu, 17 Nov 2022 07:01:32 +0000 (15:01 +0800)]
[Coroutines] Handle the writes to promise alloca prior to
llvm.coro.begin
Previously we've taken care of the writes to allocas prior to llvm.coro.begin.
However, since the promise alloca is special so that we never handled it
before. For the long time, since the programmers can't access the
promise_type due to the c++ language specification, we still failed to
recognize the problem until a recent report:
https://github.com/llvm/llvm-project/issues/57861
And we've tested many codes that the problem gone away after we handle
the writes to the promise alloca prior to @llvm.coro.begin()
prope until a recent report:
https://github.com/llvm/llvm-project/issues/57861
And we've tested many codes that the problem gone away after we handle
the writes to the promise alloca prior to @llvm.coro.begin() properly.
Closes https://github.com/llvm/llvm-project/issues/57861
Guray Ozen [Fri, 18 Nov 2022 07:38:03 +0000 (08:38 +0100)]
[mlir] [transform] Error for duplicated processor mapping
In a nested loop nest, it is not feasible to map different loops to the same processing unit; for an example, check the code below. This modification includes a check in this circumstance.
```
scf.foreach_thread (%i, %j) in (%c32, %c32) {...}
{ mapping = [#gpu.thread<x>, #gpu.thread<x>] }
```
Note: It also deletes a test because it is not possible to reproduce this error.
Depends on D138020
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D138032
Vitaly Buka [Fri, 18 Nov 2022 07:30:54 +0000 (23:30 -0800)]
[NFC][OpenMP] Remove unused label
Matt Jacobson [Thu, 17 Nov 2022 04:42:15 +0000 (23:42 -0500)]
[Driver] move FreeBSD header search path management to the driver
This matches OpenBSD, and it supports Swift's use of clang for its C interop
functionality. Recent changes to Swift use AddClangSystemIncludeArgs() to
inspect the cc1 args; this doesn't work for platforms where cc1 adds standard
include paths implicitly. See:
<https://github.com/apple/swift/commit/
cf3354222d9f480de74db390f53a6dcc749fde14>
Also clean up InitHeaderSearch, making it clearer which targets manage header
search paths in the driver.
Differential Revision: https://reviews.llvm.org/D138183
Vitaly Buka [Fri, 18 Nov 2022 07:17:15 +0000 (23:17 -0800)]
[NFC][OpenMP] Fix const cast warning
Vitaly Buka [Fri, 18 Nov 2022 07:16:31 +0000 (23:16 -0800)]
[test][OpenMP] Expect more tsan reports
Vitaly Buka [Fri, 18 Nov 2022 07:05:17 +0000 (23:05 -0800)]
[NFC][OpenMP] Remove extra ";"
Vitaly Buka [Fri, 18 Nov 2022 07:03:01 +0000 (23:03 -0800)]
[NFC][OpenMP] Fix warning about non-virtual dtor
Vitaly Buka [Fri, 18 Nov 2022 06:34:30 +0000 (22:34 -0800)]
[NFC][asan] Rename variables in test
luxufan [Fri, 18 Nov 2022 06:56:36 +0000 (14:56 +0800)]
[RegisterScavenger][RISCV] Don't search for FrameSetup instrs if we were searching from Non-FrameSetup instrs
Otherwise, the spill position may point to position where before
FrameSetup instructions. In which case, the spill instruction may store
to caller's frame since the stack pointer has not been adjustted.
Fixes https://github.com/llvm/llvm-project/issues/58286
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D135693
Chen Zheng [Thu, 17 Nov 2022 05:18:04 +0000 (05:18 +0000)]
[PowerPC] mark dead def for ctr be clobber.
TLS pseudo ADDIStlsgdHA will have such def. This dead def should
also prevent PPC from generating CTR loops.
Martin Storsjö [Tue, 8 Nov 2022 09:45:41 +0000 (11:45 +0200)]
[openmp] [test] Fix warnings about printf format mismatches on Windows
This fixes warnings like this:
```
openmp/runtime/test/omp_testsuite.h:107:60: warning: format specifies type 'unsigned int' but the argument has type 'DWORD' (aka 'unsigned long') [-Wformat]
fprintf(stderr, "CreateThread() failed: Error #%u.\n", GetLastError());
~~ ^~~~~~~~~~~~~~
%lu
```
Differential Revision: https://reviews.llvm.org/D137747
Martin Storsjö [Tue, 8 Nov 2022 13:31:40 +0000 (15:31 +0200)]
[openmp] Only try to add the -mrtm flag on i386/x86_64
Clang does accept the flag for any architecture, but prints a
warning:
clang-16: warning: argument unused during compilation: '-mrtm' [-Wunused-command-line-argument]
This flag is documented as an x86 specific flag, so don't try to
add it for other architectures, to silence this warning.
Differential Revision: https://reviews.llvm.org/D137744
Han-Kuan Chen [Tue, 15 Nov 2022 11:34:44 +0000 (03:34 -0800)]
[RISCV] Make lowerVECTOR_SHUFFLEAsVSlidedown follow source until not EXTRACT_SUBVECTOR.
Current lowerVECTOR_SHUFFLEAsVSlidedown only seeks whether input are
EXTRACT_SUBVECTOR and their source are same. The commit will make the
function seek input and their source until they are not
EXTRACT_SUBVECTOR.
Differential Revision: https://reviews.llvm.org/D138025
Han-Kuan Chen [Tue, 15 Nov 2022 12:02:41 +0000 (04:02 -0800)]
[RISCV] Pre-commit test.
Differential Revision: https://reviews.llvm.org/D138024
Vitaly Buka [Fri, 18 Nov 2022 06:29:19 +0000 (22:29 -0800)]
[asan] Simplify the test
Mehdi Amini [Thu, 17 Nov 2022 09:09:30 +0000 (09:09 +0000)]
Apply clang-tidy fixes for llvm-else-after-return in SparseTensorCodegen.cpp (NFC)
Mehdi Amini [Thu, 17 Nov 2022 08:06:15 +0000 (08:06 +0000)]
Apply clang-tidy fixes for bugprone-argument-comment in LinalgTransformOps.cpp (NFC)
Mehdi Amini [Wed, 16 Nov 2022 21:29:28 +0000 (21:29 +0000)]
MLIR: Add --fix-error to clang-tidy script
Alexander Shaposhnikov [Fri, 18 Nov 2022 04:26:08 +0000 (04:26 +0000)]
[opt][clang] Enable using -module-summary/-flto=thin with -S/-emit-llvm
Enable using -module-summary with -S
(similarly to what currently can be achieved with opt <input> -o - | llvm-dis).
This is a recommit of
ef9e62469.
Test plan: ninja check-all
Differential revision: https://reviews.llvm.org/D137768
Fazlay Rabbi [Fri, 18 Nov 2022 00:20:14 +0000 (16:20 -0800)]
[OpenMP] Initial parsing/sema for 'strict' modifier with 'grainsize' clause
This patch gives basic parsing and semantic analysis support for 'strict'
modifier with 'grainsize' clause of 'taskloop' construct introduced in
OpenMP 5.1 (section 2.12.2)
Differential Revision: https://reviews.llvm.org/D138217
Lei Zhang [Fri, 18 Nov 2022 04:46:18 +0000 (23:46 -0500)]
[mlir][spirv] Support attribute in MapMemRefStorageClassPass
MemRef memory space actually can be an attribute. Update the
map function signature to accept an attribute. The default
mappings can still only covers numeric ones, but this allows
downstream callers to extend with custom memory spaces.
Reviewed By: kuhar
Differential Revision: https://reviews.llvm.org/D138257
Matt Arsenault [Sun, 31 May 2020 17:23:20 +0000 (13:23 -0400)]
AMDGPU/GlobalISel: Make strict fadd, fmul and fma legal
Timm Bäder [Thu, 17 Nov 2022 14:49:30 +0000 (15:49 +0100)]
[clang][Parse][NFC] Remove unused CommaLocs parameters
Timm Bäder [Thu, 17 Nov 2022 11:12:11 +0000 (12:12 +0100)]
[clang][Parser][NFC] Simplify ParseParenExprOrCondition
Differential Revision: https://reviews.llvm.org/D138194
Chuanqi Xu [Fri, 18 Nov 2022 03:49:33 +0000 (11:49 +0800)]
[NFC] Remove unused codes after
4a7be42d922af
There are still some unused codes remained after
4a7be42d922af. And this
patch tries to remove them.
Chuanqi Xu [Fri, 18 Nov 2022 02:45:08 +0000 (10:45 +0800)]
[C++20] [Modules] Don't emit macro definitions with named module
It is meaningless to emit macro definitions for named modules. With some
small experiments, the size of the module for the named modules reduced
2%~4% after this patch.
Matt Arsenault [Fri, 18 Nov 2022 02:05:30 +0000 (18:05 -0800)]
AMDGPU/GlobalISel: Fix not selecting modifiers for f16 fma on gfx9
VOP3OpSel wasn't trying to match any modifiers. Just try to match the
basic case, like the DAG does.
YingChi Long [Tue, 1 Nov 2022 16:08:40 +0000 (00:08 +0800)]
[VP] Add support for vp.inttoptr & vp.ptrtoint
Add vp.inttoptr & vp.ptrtoint support by lowering them into
vp.zext / vp.truncate with in SelectionDAGBuilder.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D137169
Chuanqi Xu [Fri, 18 Nov 2022 02:13:40 +0000 (10:13 +0800)]
[C++20] [Modules] Remove unmaintained Header Module
Currently there is a -emit-header-module mode, which can combine several
headers together as a module interface. However, this breaks our
assumption (for standard c++ modules) about module interface. The module
interface should come from a module interface unit. And if it is a
header, it should be a header unit. And currently we have no ideas to
combine several headers together.
So I think this mode is an experimental one and it is not maintained and
it is not used. So it will be better to remove them.
Reviewed By: Bigcheese, dblaikie, bruno
Differential Revision: https://reviews.llvm.org/D137609
Qiu Chaofan [Fri, 18 Nov 2022 02:28:24 +0000 (10:28 +0800)]
[Clang] Fix behavior of -ffp-model option when overriden
-ffp-model=strict -ffp-model=fast will still enable strict exception
handling behavior, therefore clang still emits constrained FP operations
in IR.
-ffp-model=fast -ffp-model=strict emits two warnings: one for strict
overriding fast, the other for strict overriding strict, which is
confusing.
Reviewed By: zahiraam
Differential Revision: https://reviews.llvm.org/D137618
Volodymyr Sapsai [Fri, 8 Jul 2022 20:10:31 +0000 (13:10 -0700)]
[ODRHash] Detect duplicate `ObjCProtocolDecl` ODR mismatches during parsing.
When during parsing we encountered a duplicate `ObjCProtocolDecl`, we
were always emitting an error. With this change we accept
* when a previous `ObjCProtocolDecl` is in a hidden [sub]module;
* parsed `ObjCProtocolDecl` is the same as the previous one.
And in case of mismatches we provide more detailed error messages.
rdar://
93069080
Differential Revision: https://reviews.llvm.org/D130327
Alexander Shaposhnikov [Fri, 18 Nov 2022 01:47:56 +0000 (01:47 +0000)]
[IR] Split out IR printing passes into IRPrinter
This diff splits out (from LLVMCore) IR printing passes into IRPrinter.
This structure is similar to what we already have for IRReader and
enables us to avoid circular dependencies between LLVMCore and Analysis
(this is a preparation for https://reviews.llvm.org/D137768).
The legacy interface is left unchanged, once the legacy pass manager
is removed (in the future) we will be able to clean it up further.
The bazel build configuration has been updated as well.
Test plan:
1/ Tested the following cmake configurations: static/dynamic linking * lld/gold * clang/gcc
2/ bazel build --config=generic_clang @llvm-project//...
Differential revision: https://reviews.llvm.org/D138081
Alexey Bataev [Fri, 18 Nov 2022 00:46:51 +0000 (16:46 -0800)]
[SLP]Fix PR59053: trying to erase instruction with users.
Need to count the reduced values, vectorized in the tree but not in the top node. Such scalars still must be extracted out of the vector node instead of the original scalar.
Fangrui Song [Fri, 18 Nov 2022 01:23:12 +0000 (01:23 +0000)]
[Sink] Process basic blocks with a single successor
This condition seems unnecessary.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D93511
Volodymyr Sapsai [Wed, 6 Jul 2022 21:58:26 +0000 (14:58 -0700)]
[ODRHash] Hash `ObjCPropertyDecl` and diagnose discovered mismatches.
Differential Revision: https://reviews.llvm.org/D130326