panfrost: Don't flush readers for reads

Unsure if this can actually be hit, but bug fix by inspection: there is no need
to flush for read-after-read relationships.

This might be a bit faster, shrug.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20426>

panfrost: Remove rsrc->track

Just check on the context instead. Usually the number of batches is small so
this is still fast, and avoids all the tricky atomics and the batch->resources
set which existed only for bookkeeping.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20426>

panfrost: Upload sysvals to a staging buffer

Avoids reading write-combine memory to push sysvals.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20426>

panfrost,asahi: Set vendor to Mesa

Picked from !16064.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20427>

anv: Pass anv_bo as parameter to anv_gem_mmap()

anv_bo has information that will be needed by a future patch in
anv_gem_mmap(), so here already preparing for that.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20423>

intel/common: Move i915 gem specific code to its own file

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20423>

intel/common: Move i915 engine specific code to its own file

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20423>

iris: Make iris_bo_export_gem_handle() static

It is only used in iris_bufmgr.c so no neeed to export it.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20423>

pan/lower_framebuffer: Remove unused pack

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20420>

pan/mdg: Remove unused disassembler functions

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20420>

panfrost: Remove unused so_mask calculation

This was copied from Iris, but it's not actually used in the new NIR-based
transform feedback implementation that we now use on all chips.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20420>

panfrost: Remove experimental v7-only indirect draw path

There are too many problems with indirect draws on v7 that we never got this
code path to the finish line, and none of us have a good plan (or reason) to fix
this. Proper indirect draws are only possible since v10 on Mali.

There was interest in using this path to implement indexed draws in PanVK, that
MR is stalled and it's not clear how much sense it makes to do Vulkan on
anything older than v9 or v10 at this point. This code isn't *gone*, it'll still
be in git history, but I don't see a lot of reason in keeping it in tree if it's
unused and complicating e.g. the sysval upload path of the driver.

Indirect dispatch remains supported on v7, as that path *is* working and flipped
on for end users. Indirect dispatch on v7 is considerably less complicated than
indirect draws.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20420>

ir3: Do 16b tex dst folding only for floats

Folding signed or unsigned i32 -> i16 conversion into sampling
instruction causes it to behave differently with out-of-bounds
values. The conversion expects higher bits being masked, however
folded variant does clamp the value.

A concrete example is that:

 isaml.base0 (u16)(x)hr0.x

is not equal this:

 isaml.base0 (u32)(x)r0.w
 (sy)cov.u32u16 hr0.x, r0.w

Fixes misrendering in "Injustice 2".

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7869

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20396>

nir/fold_16bit_tex_image: Add type granularity for dst folding

Some HW may be able to fold only some of dst types, e.g.
for Adreno folding i32 -> i16 could cause a different result since
folded variant clamps the result instead of masking it.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20396>

etnaviv: disable linear PE by default

Linear PE causes a lot of issues in the ZS stage. While some of those issues
can be worked around on newer GPU cores by doing all ZS operations in the
late stage, GC600 r4653 exhibits spurious Z fails when linear PE is active
even though this GPU does not even have a early Z stage.

Disable linear PE for now, until the issue can be analyzed further. Leave the
debug option in place to allow to enable linear PE for testing.

Fixes: 43eb5e777e4b ("etnaviv: add debug option to disable linear PE feature")
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20405>

intel/blorp: Fix a hang caused by invalid dispatch enables on gfx7

Because commit b9403b1c477 moved dispatch enable handling away from the
compiler, the drivers must ensure correct dispatch enable values. This
is handled by the intel_set_ps_dispatch_state function.

v2: Fix gfx6 build and use brw_fs_get_dispatch_enables for gfx6 in
crocus
v3: Rebase, use intel_set_ps_dispatch_state, drop gfx6 handling

Fixes: b9403b1c477 ("intel: factor out dispatch PS enabling logic")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20267>

intel/dev: setup 1024 GS urb entries for ADL-N

v2: apply only for devices with less than 32 EUs (Lionel)

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7942
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20414>

intel/compiler: mark shader_record_ptr as uniform

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20413>

nir/divergence: handle shader_record_ptr intrinsic

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes 6b8fd65e84 ("spirv: Implement the new ray-tracing storage classes")

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20413>

nouveau/ci: temporary disable gk20a-gles

Jobs are failing almost immediately with :

Cleaning up project directory and file based variables
ERROR: Failed to cleanup volumes
ERROR: Job failed: exit code 1

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20421>

freedreno: bump up FD6_MAX_BORDER_COLORS

Fixes

  $ deqp-gles31 -n 'dEQP-GLES31.functional.texture.border_clamp.*'

on a618/a635.

Fixes: c0fc8d5046a ("freedreno/a6xx: Switch to global bcolor buffer")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20419>

radv/ci: remove locally-deleted files from the job bucket

This makes the downloaded artifacts reflect the content of the folder
as generated by the job.

In this the case of vkcts, this removes from the downloaded artifacts
the log files that were deemed uninteresting by deqp-runner.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20415>

radv/ci/vkcts: do not sync back the *.qpa

These files are relatively big (amounting to ~4.5GB for one run) but
are not really useful.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20415>

radeon: drmGetVersion can return NULL

Do not crash on scenarios where drmGetVersion returns NULL.
Make Radeon driver initialization more robust.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/476

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20402>

anv: handle null push descriptors in deferred optimization

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: b49b18f0 ("anv: reduce BT emissions & surface state writes with push descriptors")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20410>

ci: Windows runner is experiencing DNS issues; disable Microsoft farm

Multiple failures in https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20097

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20411>

radv: Only apply taskmesh indirect 0 bug workaround when necessary.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20097>

ac: Add has_taskmesh_indirect0_bug field to ac_gpu_info struct.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20097>

radv: Include view index SET_SH_REG in ace_predication_size.

This fixes an issue when conditional rendering and multiple views
were used with a task+mesh draw call.

Fixes: 2479b6286974c1467bec5120df96650d297dcb7f
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20098>

ci/lava: Show LAVA job info during fails

Currently, LAVA jobs only show metadata when successful, let's show this
info in all retries to make it easier to debug or report issues.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20051>

ci/lava: Anticipate overlayfs download

To debug the LAVA jobs locally, we have an option in the
lava_job_submitter script to ignore the JWT token to make it possible to
retry jobs without the need to get an unexpired token.

But this trick needs to modify the overlayed directory so that we would
need to download and extract it earlier in the run.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20051>

ci/lava: Fix Gitlab section rendering

LAVA splits the DUT log lines with `\r` in them. Unfortunately, it
breaks the Gitlab section line syntax when the HWCI script calls it
since it is a oneliner.

This commit changes the` fix_lava_gitlab_section_log` function to a
stateful generator that can merge lines that respects two consecutive
patterns.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7703

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20051>

ci/lava: Feed yaml.load with raw bytes data

LAVA uses XMLRPC to send jobs information and control, more specifically
it sends device logs via YAML dumps encoded in UTF-8 bytes.

In Python, we have xmlrpc.client.Binary class as the serializer
protocol, we get the logs wrapped by this class, which encodes the data
as UTF-8 bytes data.

We were converting the encoded data to a string via the `str` function,
but this led the loaded YAML data to use single quotes instead of double
quotes for string values that made special characters, such as `\x1b` to
be escaped as `\\x1b`.

With this fix, we can now drop one of the hacks that fixed the bash
colors.

Signed-off-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20051>

Revert "ci: Lima farm maintenance"

This reverts commit e66df0d36209a708477112d5df4ad2760c666542.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20390>

radv: Don't assume there is always at least 1 preamble.

This fixes a mistake which assumes there is always at least 1 preamble.
This assumption is currently incorrect on transfer queues.

Fixes: e10b2f273e8a48a2db977469d30f6ed1014484c4
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20401>

venus: fallback to passthrough pci bus info when not natively supported

This avoids an assert with VN_DEBUG=all on virtgpu backend.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20383>

r600/sfn: Fix possible dest channels for variable size dot

Fixes:  357e5fac9953b26eedc8819ab528b981be6e1b69
    r600/sfn: Use variable length DOT on Evergreen and Cayman

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20398>

radv: Fix uninitalized struct for trap handler

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20354>

r600/sfn: Don't try to re-use the iterator when uses is updated

It seems on libc++ the iterator is invalidated when an element is removed
from the set, so make sure that we don't implicitely use the old,
invalidated iterator in the range based - open code the loop using while
instead.

Fixes: f3415c (r600/sfn: copy propagate register load chains)

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7931

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20394>

radv: Enable EXT_mesh_shader by default on GFX10.3.

Only enable mesh+task shaders when IBs and gang submit are enabled.
We won't support gang submit with noibs.

Also remove the RADV_PERFTEST=ext_ms option.
Side note, GFX11 task/mesh support is still a TODO.

Don't skip the CTS tests which require GFX->ACE synchronization.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>

radv/amdgpu: Remove cs_add_buffers because it's no longer necessary.

This function was added because previously ACE and GFX work was
submitted separately and we needed to make sure they both use the
same BOs. Now they are part of the same submission so this
function is not necessary anymore.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>

radv/amdgpu: Remove command submission with scheduled dependencies.

These are no longer used by any part of RADV, so we
can just safely delete it.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>

radv: Add gang wait preambles and postambles to ensure correct behaviour.

Add new preambles and postambles for synchronizing gang members in a
gang submission using semaphores.
These semaphores are both located in a small BO.

Gang wait preambles:

- gang leader writes 1 to a semaphore
- gang member waits for it to be written

When task shaders are used, make sure ACE waits until GFX starts to execute.
Userspace is required to emit this wait to make sure it behaves correctly
in a multi-process environment, because task shader dispatches are not
meant to be executed on multiple compute engines at the same time.

Gang wait postambles:

- gang member writes 1 to a semaphore
- gang leader waits for it to be written

This ensures that the gang leader waits for the whole gang,
which is necessary because the kernel signals the userspace fence
as soon as the gang leader is done, which may lead to bugs because the
same command buffers could be submitted again while still being executed.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>

radv: Remove ACE->GFX wait at the end of each command buffer.

This is now handled in the queue submission code so is not necessary.
However, keep the semaphore for future use.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>

radv: Rename radv_update_ace_preambles to radv_update_gang_preambles.

The new name reflects more accurately what this is.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>

radv: Implement gang submit in radv_queue_submit_normal.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>

radv: Update ACE preambles in radv_queue_submit_normal.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>

radv: Refactor command buffer handling in radv_queue_submit_normal.

Move processing of the command buffer array inside the loop that
splits a submission.

We now also add the perf counter lock/unlock to each submission
instead of just the first and last.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>

radv: Remove radv_queue_submit_with_ace and disable task/mesh shaders.

It would be too difficult to keep the radv_queue_submit_with_ace
function while also refactoring the radv_queue_submit_with_ace function,
so let's delete it first.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>

radv: Enable gang submit on the null winsys.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>

ac: Add has_gang_submit field to ac_gpu_info.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>

radv/amdgpu: Allow using more than 1 preamble with cs_submit.

Add the ability to have multiple preambles,
except for the sysmem (NOIBS/GFX6) code path which still only allows 1.

This is necessary because with gang submit we will need a way to submit
a preamble to different queues at the same time.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>

radv/amdgpu: Add IP type to IB info and use it when submitting.

This is necessary for supporting gang submit.

With gang submit, the kernel now allows us to submit multiple IBs
with different IP types. Therefore, RADV will also need to group
various CSs with different IP types together and remember the IP
type of each CS.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>

radv/amdgpu: Introduce a custom struct for submitted BO info.

We are going to need additional data which is not present in
the currently used struct.

This commit just adds the new struct but does not yet add
new fields to it.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>

radv/amdgpu: Set fallback submit request ip_type from the last CS.

When using gang submit, the last IB is considered the "gang leader"
and its IP type will determine which fence to signal when the
submission is done. Therefore, use the last CS to set the IP type.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>

radv/amdgpu: Change extra_cs to array in get_bo_list.

This is necessary because we are going to want to allow using
more than just 1 preamble.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>

radv: Return correct error code when failed to allocate CS array.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>

radv: Determine use_ace in radv_update_preambles.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>

radv: Rename uses_perf_counters to use_perf_counters.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>

radv: Stylistic changes in radv_queue_submit_normal.

Move some variables, add const, and fix a comment.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>

radv: Destroy mesh shader scratch ring in radv_queue_state_finish.

Fixes: 0280b526d58e85d65b53d3f9c8b0f7364d853751
Signed-off--by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>

radv: Remove trailing whitespace again.

Also ran clang-format on the affected line.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20010>

lvp: fix load_helper_invocation not being lowered

nir_lower_is_helper_invocation should be after nir_lower_system_values
to handle possible nir_intrinsic_is_helper_invocation which may be
produced by nir_lower_system_values.

Happens with SPIR-V 1.6 for which gl_HelperInvocation is translated into
"BuiltIn HelperInvocation" + "Volatile", which nir_lower_system_values
translates into is_helper_invocation.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19677>

tu: fix load_helper_invocation not being lowered

nir_lower_is_helper_invocation should be after nir_lower_system_values
to handle possible nir_intrinsic_is_helper_invocation which may be
produced by nir_lower_system_values.

Happens with SPIR-V 1.6 for which gl_HelperInvocation is translated into
"BuiltIn HelperInvocation" + "Volatile", which nir_lower_system_values
translates into is_helper_invocation.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19677>

nir/nir_lower_is_helper_invocation: Lower helper invocation if required

nir_lower_is_helper_invocation lowers intrinsic_is_helper_invocation
and uses load_helper_invocation (which is lowered by nir_lower_system_values).
While nir_lower_system_values may lower SYSTEM_VALUE_HELPER_INVOCATION
into intrinsic_is_helper_invocation.

So they depend on each other. Break the dependency by making
nir_lower_is_helper_invocation aware of lower_helper_invocation option
and emitting lowered load_helper_invocation when required.

Happens with SPIR-V 1.6 for which gl_HelperInvocation is translated into
"BuiltIn HelperInvocation" + "Volatile", which nir_lower_system_values
translates into is_helper_invocation.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19677>

anv: Ensure we clear ANV_PIPE_PSS_STALL_SYNC_BIT on flush

Add the PSS stall bit to ANV_PIPE_STALL_BITS so that it get's cleared on
flush.

Fixes: f3c62973 ("anv,iris: PSS Stall Sync around color fast clears")

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20317>

util: Fixes os_get_option_cached with bool options_tbl_exited

Fixes: cdad035cfd9 ("util: Add function debug_get_option_cached os_get_option_cached")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7922

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20386>

d3d12: Don't flush indiscriminately for query result accumulation

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20217>

d3d12: Fix race condition when getting query results

Before, when an application called into d3d12_query_result, and
the results were not ready to be read, a flush-and-wait would
be attempted via synchronized mapping of the query result resource.

This can end up calling close/execute on the command list while it is
already being executed by the driver thread.

With the current fence value attached to the query, we now wait
for completion if necessary and then map the resource unsynchronized, or
return false if the result is not ready and wait == false.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20217>

d3d12: Move query structs to header

Also adds `fence_value` to `d3d12_query` to track which batch of work
this query exists in and must be waited on.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20217>

vulkan: update headers/registry to 1.3.238 for video decode

This moves the video decoding to KHR and out of beta.

Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20384>

vulkan/util: handle LUNARG in the list of special prefixes

The latest headers update has a lunarg extension that needs this.

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20384>

vulkan/cmd_queue: update generator to handle guarded types.

The latest includes/registry have some pNext structs that need
guarding spearately to their initial structs, so we have to track
the define guards better and use them in the generated code

For example:
VkVideoEncodeRateControlInfoKHR extends VkVideoCodingControlInfoKHR

However the first struct is protected by BETA, but the second isn't
the generator was always generating unguarded code for all structs

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20384>

turnip: Lazily call tu6_emit_descriptor_sets() at draw time.

This lets us batch up the state changes from multiple
vkCmdBindDescriptorSets, which ANGLE and zink will both do in a single
draw.

Improves ANGLE (sysmem) driver_overhead perf by 5.18806% +/- 1.03444% (n=5).
Improves ANGLE aztec_ruins_high perf by ~.3%. (clear result in the graph,
but the screen went to sleep mid way through and so it was high variance)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20084>

lavapipe: Enable VK_KHR_shader_non_semantic_info.

Already implemented in common code.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7907

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20353>

ci: move the CI handling scripts into bin/ci

Any change in .gitlab-ci/ directory triggers an entire CI run,
which is unnecessary for just changing the developers' scripts.

Added symlink to `.gitlab-ci/bin` to keep original invocation compatibility.

Reviewed-by: Martin Roukala <martin.roukala@mupuf.org>
Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20371>

ci: ci_run_n_monitor.py: fix args.rev leftover

Fixes: a8b6b2367efc ("ci: allow omitting of --rev for ci_run_n_monitor.py")

Reviewed-by: Martin Roukala <martin.roukala@mupuf.org>
Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20371>

iris: Add BO_ALLOC_PLAIN flag

We had iris_bo_alloc() call with the wrong flags value, it was
mistaken by aligment, see commit 68652dca0c28.

To avoid such mistakes in future here adding BO_ALLOC_PLAIN so
iris_bo_alloc() calls have a more descriptive flag parameter when
there is no special allocation request.

While at it, also standardizing unsigned as the type for this flag.

No behavior changes here.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19857>

radv/bvh: Handle inactive triangles and AABBs

Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20325>

radv/bvh: Move leaf node initialization into separate functions

Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20325>

ac/llvm: remove deref image/texture code

They have been lowered to bindless ones in nir.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>

ac,radv,radeonsi: remove unused param of load_sampler_desc abi

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>

ac/llvm: remove samples_identical nir to llvm code

It has been lowered in nir.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>

ac/llvm: remove implicite ms texture fmask handling

It has been lowered to fragment_mask_load_amd in nir.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>

ac/llvm: remove image/texture descriptor_amd nir to llvm code

They have been lowered in nir.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>

radeonsi: replace llvm resource code with nir lower

Port from ac_nir_to_llvm.c and si_shader_llvm_resource.c.

Due to need waterfall of llvm backend, we can't get bind-texture
descriptor directly in nir. So we keep load_sampler_desc abi only
for bind-texture index to desc.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>

nir/divergence_analysis: add missing intrinsics

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Singed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>

ac/llvm: add disable_aniso_single_level abi

RADV use dri option to enabled this for some apps, but it's
done in nir lower currently. I'm afraid it still needs this
option to handle the non-uniform case as desc is loaded in
llvm.

radeonsi always enable this for bind-textures.

radeonsi will lower all bind-textures to bindless-textures,
and only bind-textures use desc index, so add this abi for
bindless desc index path.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>

nir: lower image add lower_to_fragment_mask_load_amd option

Like lower_to_fragment_fetch_amd option in lower tex,
this is for radeonsi to lower MS image ops.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>

nir: add image fragment mask load intrinsic

Like nir_texop_fragment_mask_fetch_amd, this is used to load multi
sample image fmask data for AMD GPU.

We will lower multi sample image load and samples_identical intrinsics
to use it latter for radeonsi. RADV does not need this because it
always expand fmask images before dispatch compute shader.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>

radeonsi: replace llvm load_ssbo abi with nir lower

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>

ac/llvm: check load_ssbo present before call it

radeonsi will remove it later.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>

radeonsi: add si_nir_lower_resource pass

Replace the load_ubo abi.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18666>

radv/rt: Refactor exiting PLOC

The previous approach was susceptible to sync hazards, causing hangs in Doom Eternal.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7897
Fixes: 271865373 ("radv: Add PLOC shader")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20377>

radv/rt: Execute memory barrier before updating the phase end count

We want to be sure that the values were updated before letting other invocations continue.

Fixes: 271865373 ("radv: Add PLOC shader")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20377>

radv/rt: PLOC fixes for active_leaf_count

Fixes: 271865373 ("radv: Add PLOC shader")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20377>

util/tools: add the tool that generates perfect hash functions for GLenums

The big comment explains it.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20287>

mesa: optimize _mesa_bytes_per_vertex_attrib using a hash-based translation

This reduces time spent in gl*Pointer for viewperf.

Generated by find_hash_func.c.

Reviewed-by: Rob Clark <robclark@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20287>

mesa: compute _PipeFormat and _ElementSize after checking if the format changed

Split _mesa_set_vertex_format into 2 functions and set the derived fields
after we know that the format is different.

This skips _PipeFormat and _ElementSize recomputation every time we get
gl*Pointer with the same format.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20287>

mesa: move user-specified vertex format fields into gl_vertex_format_user

to be used in the next commit

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20287>