platform/upstream/llvm.git
7 years ago[clang-tidy] Format code around applied fixes
Alexander Kornienko [Fri, 3 Mar 2017 11:16:34 +0000 (11:16 +0000)]
[clang-tidy] Format code around applied fixes

Summary:
Add -format option (disabled by default for now) to trigger formatting
of replacements.

Reviewers: ioeric

Reviewed By: ioeric

Subscribers: kimgr, malcolm.parsons, JDevlieghere, cfe-commits

Differential Revision: https://reviews.llvm.org/D30564

llvm-svn: 296864

7 years ago[SLP] Fixes the bug due to absence of in order uses of scalars which needs to be...
Mohammad Shahid [Fri, 3 Mar 2017 10:02:47 +0000 (10:02 +0000)]
[SLP] Fixes the bug due to absence of in order uses of scalars which needs to be available
for VectorizeTree() API.This API uses it for proper mask computation to be used in shufflevector IR.
The fix is to compute the mask for out of order memory accesses while building the vectorizable tree
instead of actual vectorization of vectorizable tree.It also needs to recompute the proper Lane for
external use of vectorizable scalars based on shuffle mask.

Reviewers: mkuper

Differential Revision: https://reviews.llvm.org/D30159

Change-Id: Ide8773ce0ad3562f3cf4d1a0ad0f487e2f60ce5d
llvm-svn: 296863

7 years ago[SDAG] Revert r296476 (and r296486, r296668, r296690).
Chandler Carruth [Fri, 3 Mar 2017 10:02:25 +0000 (10:02 +0000)]
[SDAG] Revert r296476 (and r296486, r296668, r296690).

This patch causes compile times for some patterns to explode. I have
a (large, unreduced) test case that slows down by more than 20x and
several test cases slow down by 2x. I'm sending some of the test cases
directly to Nirav and following up with more details in the review log,
but this should unblock anyone else hitting this.

llvm-svn: 296862

7 years ago[PowerPC] Enable -fomit-frame-pointer by default for PPC
Nemanja Ivanovic [Fri, 3 Mar 2017 09:49:17 +0000 (09:49 +0000)]
[PowerPC] Enable -fomit-frame-pointer by default for PPC

As is the case on platforms like Mips, X86 and SystemZ, the -fomit-frame-pointer
should be enabled by default on PPC when optimizing at -O1 and above. This
brings the behaviour of LLVM on PPC in line with GCC.

Committing on behalf of Hiroshi Inoue.

Differential Revision: https://reviews.llvm.org/D29750

llvm-svn: 296861

7 years agoFix a typo in the comments. Patch by marktwtn from https://github.com/llvm-mirror...
Sylvestre Ledru [Fri, 3 Mar 2017 09:36:04 +0000 (09:36 +0000)]
Fix a typo in the comments. Patch by marktwtn from https://github.com/llvm-mirror/llvm/pull/16/files

llvm-svn: 296860

7 years ago[X86] Generate VZEROUPPER for Skylake-avx512.
Amjad Aboud [Fri, 3 Mar 2017 09:03:24 +0000 (09:03 +0000)]
[X86] Generate VZEROUPPER for Skylake-avx512.
VZEROUPPER should not be issued on Knights Landing (KNL), but on Skylake-avx512 it should be.

Differential Revision: https://reviews.llvm.org/D29874

llvm-svn: 296859

7 years ago[clang-tidy] google-readability-casting: don't use constructor call syntax for const...
Alexander Kornienko [Fri, 3 Mar 2017 08:18:49 +0000 (08:18 +0000)]
[clang-tidy] google-readability-casting: don't use constructor call syntax for const types

llvm-svn: 296858

7 years ago[AArch64AsmParser] rewrite of function parseSysAlias
Sjoerd Meijer [Fri, 3 Mar 2017 08:12:47 +0000 (08:12 +0000)]
[AArch64AsmParser] rewrite of function parseSysAlias

This is a cleanup/rewrite of the parseSysAlias function. It was not using the
tablegen instruction descriptions, but was “manually” matching the mnemonics
and recreating the operands whereas all this information is already in
tablegen; all this code has been replaced with calls to lookupXYZByName
tablegen calls.

Differential Revision: https://reviews.llvm.org/D30491

llvm-svn: 296857

7 years ago[GlobalISel][X86] Support float/double and vector types.
Igor Breger [Fri, 3 Mar 2017 08:06:46 +0000 (08:06 +0000)]
[GlobalISel][X86] Support float/double and vector types.

Summary: [GlobalISel][X86] Add support for f32/f64 and vector types in RegisterBank and InstructionSelector.

Reviewers: delena, zvi

Reviewed By: zvi

Subscribers: dberris, rovka, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D30533

llvm-svn: 296856

7 years agoRemove some dead code in FileSpec.
Zachary Turner [Fri, 3 Mar 2017 06:14:38 +0000 (06:14 +0000)]
Remove some dead code in FileSpec.

This in turn triggered some fallout where other files had
been transitively picking up includes that they needed from
FileSpec.h, so I've fixed those up as well.

llvm-svn: 296855

7 years agoClean up more usages of _LIBCPP_HAS_NO_RVALUE_REFERENCES
Eric Fiselier [Fri, 3 Mar 2017 03:43:25 +0000 (03:43 +0000)]
Clean up more usages of _LIBCPP_HAS_NO_RVALUE_REFERENCES

llvm-svn: 296854

7 years ago[tests] Specify the dependence to NVPTX backend for Polly ACC test cases
Tobias Grosser [Fri, 3 Mar 2017 03:38:50 +0000 (03:38 +0000)]
[tests] Specify the dependence to NVPTX backend for Polly ACC test cases

Some Polly ACC test cases fail without a working NVPTX backend. We explicitly
specify this dependence in REQUIRES. Alternatively, we could have only marked
polly-acc as supported in case the NVPTX backend is available, but as we might
use other backends in the future, this does not seem to be the best choice.

For this to work, we also need to make the 'targets_to_build' information
available.

Suggested-by: Michael Kruse <llvm@meinersbur.de>
llvm-svn: 296853

7 years ago[test] Do not emit binary data to output
Tobias Grosser [Fri, 3 Mar 2017 03:24:34 +0000 (03:24 +0000)]
[test] Do not emit binary data to output

Suggested-by: Michael Kruse <llvm@meinersbur.de>
llvm-svn: 296852

7 years agoFix sign-compare warning in test; Oddly this only appears on OS X
Eric Fiselier [Fri, 3 Mar 2017 02:02:07 +0000 (02:02 +0000)]
Fix sign-compare warning in test; Oddly this only appears on OS X

llvm-svn: 296851

7 years agoRevert r296730, "cmake: Configure the ThinLTO cache directory when using ELF lld...
Peter Collingbourne [Fri, 3 Mar 2017 02:00:22 +0000 (02:00 +0000)]
Revert r296730, "cmake: Configure the ThinLTO cache directory when using ELF lld or gold."

Causes a build failure on the clang-with-thin-lto-ubuntu bot.
http://lab.llvm.org:8011/builders/clang-with-thin-lto-ubuntu/builds/2117/steps/build-stage3-compiler/logs/stdio

llvm-svn: 296850

7 years ago[msan] Test for _mm_getcsr and _mm_setcsr (r296848).
Evgeniy Stepanov [Fri, 3 Mar 2017 01:13:23 +0000 (01:13 +0000)]
[msan] Test for _mm_getcsr and _mm_setcsr (r296848).

llvm-svn: 296849

7 years ago[msan] Handle x86_sse_stmxcsr and x86_sse_ldmxcsr.
Evgeniy Stepanov [Fri, 3 Mar 2017 01:12:43 +0000 (01:12 +0000)]
[msan] Handle x86_sse_stmxcsr and x86_sse_ldmxcsr.

llvm-svn: 296848

7 years agoLiveDebugValues: Assume calls never clobber SP.
Adrian Prantl [Fri, 3 Mar 2017 01:08:25 +0000 (01:08 +0000)]
LiveDebugValues: Assume calls never clobber SP.

A call should never modify the stack pointer, but some backends are
not so sure about this and never list SP in the regmask. For the
purposes of LiveDebugValues we assume a call never clobbers SP. We
already have a similar workaround in DbgValueHistoryCalculator (which
we hopefully can retire soon).

This fixes the availabilty of local ASANified variables on AArch64.

rdar://problem/27757381

llvm-svn: 296847

7 years ago[ProfileData] Fix some Clang-tidy modernize and Include What You Use warnings; other...
Eugene Zelenko [Fri, 3 Mar 2017 01:07:34 +0000 (01:07 +0000)]
[ProfileData] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).

llvm-svn: 296846

7 years agoCodeGen: BlockPlacement: Precompute layout for chains of triangles.
Kyle Butt [Fri, 3 Mar 2017 01:00:22 +0000 (01:00 +0000)]
CodeGen: BlockPlacement: Precompute layout for chains of triangles.

For chains of triangles with small join blocks that can be tail duplicated, a
simple calculation of probabilities is insufficient. Tail duplication
can be profitable in 3 different ways for these cases:

1) The post-dominators marked 50% are actually taken 56% (This shrinks with
   longer chains)
2) The chains are statically correlated. Branch probabilities have a very
   U-shaped distribution.
   [http://nrs.harvard.edu/urn-3:HUL.InstRepos:24015805]
   If the branches in a chain are likely to be from the same side of the
   distribution as their predecessor, but are independent at runtime, this
   transformation is profitable. (Because the cost of being wrong is a small
   fixed cost, unlike the standard triangle layout where the cost of being
   wrong scales with the # of triangles.)
3) The chains are dynamically correlated. If the probability that a previous
   branch was taken positively influences whether the next branch will be
   taken
We believe that 2 and 3 are common enough to justify the small margin in 1.

The code pre-scans a function's CFG to identify this pattern and marks the edges
so that the standard layout algorithm can use the computed results.

llvm-svn: 296845

7 years ago[msan] Remove stale comments.
Evgeniy Stepanov [Fri, 3 Mar 2017 00:25:56 +0000 (00:25 +0000)]
[msan] Remove stale comments.

ClStoreCleanOrigin flag was removed back in 2014.

llvm-svn: 296844

7 years agoFix msc-version.c test to handle _MSC_VER=1910
Dave Bartolomeo [Fri, 3 Mar 2017 00:08:55 +0000 (00:08 +0000)]
Fix msc-version.c test to handle _MSC_VER=1910

Previously, VC++ has always set _MSC_VER to a four-digit value with the two least significant digits set to zero. Visual Studio 2017, however, sets _MSC_VER=1910, and we expect to update the least significant digit as we release major updates for VS 2017. This patch fixes the msc-version.c test to handle non-zero values in the two least significant digits of _MSC_VER.

llvm-svn: 296843

7 years agoAMDGPU: Fix missing dominator tree dependency
Matt Arsenault [Thu, 2 Mar 2017 23:50:51 +0000 (23:50 +0000)]
AMDGPU: Fix missing dominator tree dependency

llvm-svn: 296842

7 years agoRevert "Reland 3: [analyzer] NFC: Update test infrastructure to support multiple...
Dominic Chen [Thu, 2 Mar 2017 23:30:53 +0000 (23:30 +0000)]
Revert "Reland 3: [analyzer] NFC: Update test infrastructure to support multiple constraint managers"

This reverts commit ea36f1406e1f36bf456c3f3929839b024128e468.

llvm-svn: 296841

7 years agoWork around test failure on 32 bit OS X
Eric Fiselier [Thu, 2 Mar 2017 23:18:40 +0000 (23:18 +0000)]
Work around test failure on 32 bit OS X

llvm-svn: 296840

7 years agoThinLTOBitcodeWriter: Do not follow operand edges of type GlobalValue when looking...
Peter Collingbourne [Thu, 2 Mar 2017 23:10:17 +0000 (23:10 +0000)]
ThinLTOBitcodeWriter: Do not follow operand edges of type GlobalValue when looking for virtual functions.

Such edges may otherwise result in infinite recursion if a pointer to a vtable
is reachable from the vtable itself. This can happen in practice if a TU
defines the ABI types used to implement RTTI, and is itself compiled with RTTI.

Fixes PR32121.

llvm-svn: 296839

7 years agoMove defClobbersUseOrDef to being a protected member of a class since we don't want...
Daniel Berlin [Thu, 2 Mar 2017 23:06:46 +0000 (23:06 +0000)]
Move defClobbersUseOrDef to being a protected member of a class since we don't want anyone else using it

llvm-svn: 296838

7 years agoReland 3: [analyzer] NFC: Update test infrastructure to support multiple constraint...
Dominic Chen [Thu, 2 Mar 2017 23:05:45 +0000 (23:05 +0000)]
Reland 3: [analyzer] NFC: Update test infrastructure to support multiple constraint managers

Summary: Replace calls to %clang/%clang_cc1 with %clang_analyze_cc1 when invoking static analyzer, and perform runtime substitution to select the appropriate constraint manager, per D28952.

Reviewers: xazax.hun, NoQ, zaks.anna, dcoughlin

Subscribers: mgorny, rgov, mikhail.ramalho, a.sidorin, cfe-commits

Differential Revision: https://reviews.llvm.org/D30373

llvm-svn: 296837

7 years agoRevert "Reland 2: [analyzer] NFC: Update test infrastructure to support multiple...
Dominic Chen [Thu, 2 Mar 2017 22:58:06 +0000 (22:58 +0000)]
Revert "Reland 2: [analyzer] NFC: Update test infrastructure to support multiple constraint managers"

This reverts commit f93343c099fff646a2314cc7f4925833708298b1.

llvm-svn: 296836

7 years agoReland 2: [analyzer] NFC: Update test infrastructure to support multiple constraint...
Dominic Chen [Thu, 2 Mar 2017 22:45:24 +0000 (22:45 +0000)]
Reland 2: [analyzer] NFC: Update test infrastructure to support multiple constraint managers

Summary: Replace calls to %clang/%clang_cc1 with %clang_analyze_cc1 when invoking static analyzer, and perform runtime substitution to select the appropriate constraint manager, per D28952.

Reviewers: xazax.hun, NoQ, zaks.anna, dcoughlin

Subscribers: mgorny, rgov, mikhail.ramalho, a.sidorin, cfe-commits

Differential Revision: https://reviews.llvm.org/D30373

llvm-svn: 296835

7 years agoPython commands as first class citizens.
Jim Ingham [Thu, 2 Mar 2017 22:24:01 +0000 (22:24 +0000)]
Python commands as first class citizens.

This should be a necessary precursor to adding support
for any future extension languages.

llvm-svn: 296834

7 years agoMention fetching thread lists lazily.
Jim Ingham [Thu, 2 Mar 2017 22:13:45 +0000 (22:13 +0000)]
Mention fetching thread lists lazily.

llvm-svn: 296833

7 years ago[BypassSlowDivision] Use ValueTracking to simplify run-time checks
Nikolai Bozhenov [Thu, 2 Mar 2017 22:12:15 +0000 (22:12 +0000)]
[BypassSlowDivision] Use ValueTracking to simplify run-time checks

ValueTracking is used for more thorough analysis of operands. Based on the
analysis, either run-time checks can be simplified (e.g. check only one operand
instead of two) or the transformation can be avoided. For example, it is quite
often the case that a divisor is promoted from a shorter type and run-time
checks for it are redundant.

With additional compile-time analysis of values, two special cases naturally
arise and are addressed by the patch:

 1) Both operands are known to be short enough. Then, the long division can be
    simply replaced with a short one without CFG modification.

 2) If a division is unsigned and the dividend is known to be short then the
    long division is not needed at all. Because if the divisor is too big for
    short division then the quotient is obviously zero (and the remainder is
    equal to the dividend). Actually, the division is not needed when
    (divisor > dividend).

Differential Revision: https://reviews.llvm.org/D29897

llvm-svn: 296832

7 years agoremove max_size() extension from polymorphic_allocator. It is unneeded
Eric Fiselier [Thu, 2 Mar 2017 22:10:14 +0000 (22:10 +0000)]
remove max_size() extension from polymorphic_allocator. It is unneeded

llvm-svn: 296831

7 years agoFix libc++ test experimental/algorithms/alg.random.sample/sample.pass.cpp when ran...
Mehdi Amini [Thu, 2 Mar 2017 22:08:42 +0000 (22:08 +0000)]
Fix libc++ test experimental/algorithms/alg.random.sample/sample.pass.cpp when ran in c++11 mode 32 bits

llvm-svn: 296830

7 years agoCMake: Clean up VersionFromVCS.cmake
Tom Stellard [Thu, 2 Mar 2017 22:05:13 +0000 (22:05 +0000)]
CMake: Clean up VersionFromVCS.cmake

Summary:
Fix a few problems in VersionFromVCS.cmake to make it more reliable:

- Stop using git svn info to retrieve the svn revision.  I am unable to
  determine what the svn revision returned by this command means.
  During my testing this command returned a revision from a month
  ago which was not the HEAD of any of my local branches.

  Also, this revision was never actually added to the version string due
  to a typo in the script.  All it was used for was to reject the
  revision number returned by git svn find-rev HEAD when the revision
  numbers didn't match.

- Populate GIT_COMMIT even when we detect a git repo without any
  svn information.

Reviewers: mehdi_amini, beanz

Reviewed By: beanz

Subscribers: mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D30092

llvm-svn: 296829

7 years ago[BypassSlowDivision] Refactor fast division insertion logic (NFC)
Nikolai Bozhenov [Thu, 2 Mar 2017 22:05:07 +0000 (22:05 +0000)]
[BypassSlowDivision] Refactor fast division insertion logic (NFC)

The most important goal of the patch is to break large insertFastDiv function
into separate pieces, so that later a different fast insertion logic can be
implemented using some of these pieces.

Differential Revision: https://reviews.llvm.org/D29896

llvm-svn: 296828

7 years agoForgot about local variable lookup.
Jim Ingham [Thu, 2 Mar 2017 22:04:05 +0000 (22:04 +0000)]
Forgot about local variable lookup.

Yay for coffee lines.

llvm-svn: 296826

7 years ago[DAGCombiner] Fix DebugLoc propagation when folding !(x cc y) -> (x !cc y)
Taewook Oh [Thu, 2 Mar 2017 21:58:35 +0000 (21:58 +0000)]
[DAGCombiner] Fix DebugLoc propagation when folding !(x cc y) -> (x !cc y)

Summary:
Currently, when 't1: i1 = setcc t2, t3, cc' followed by 't4: i1 = xor t1, Constant:i1<-1>' is folded into 't5: i1 = setcc t2, t3 !cc', SDLoc of newly created SDValue 't5' follows SDLoc of 't4', not 't1'. However, as the opcode of newly created SDValue is 'setcc', it make more sense to take DebugLoc from 't1' than 't4'. For the code below

```
extern int bar();
extern int baz();

int foo(int x, int y) {
  if (x != y)
    return bar();
  else
    return baz();
}
```

, following is the bitcode representation of 'foo' at the end of llvm-ir level optimization:

```
define i32 @foo(i32 %x, i32 %y) !dbg !4 {
entry:
  tail call void @llvm.dbg.value(metadata i32 %x, i64 0, metadata !9, metadata !11), !dbg !12
  tail call void @llvm.dbg.value(metadata i32 %y, i64 0, metadata !10, metadata !11), !dbg !13
  %cmp = icmp ne i32 %x, %y, !dbg !14
  br i1 %cmp, label %if.then, label %if.else, !dbg !16

if.then:                                          ; preds = %entry
  %call = tail call i32 (...) @bar() #3, !dbg !17
  br label %return, !dbg !18

if.else:                                          ; preds = %entry
  %call1 = tail call i32 (...) @baz() #3, !dbg !19
  br label %return, !dbg !20

return:                                           ; preds = %if.else, %if.then
  %retval.0 = phi i32 [ %call, %if.then ], [ %call1, %if.else ]
  ret i32 %retval.0, !dbg !21
}

!14 = !DILocation(line: 5, column: 9, scope: !15)
!16 = !DILocation(line: 5, column: 7, scope: !4)

```

As you can see, in 'entry' block, 'icmp' instruction and 'br' instruction have different debug locations. However, with current implementation, there's no distinction between debug locations of these two when they are lowered to asm instructions. This is because 'icmp' and 'br' become 'setcc' 'xor' and 'brcond' in SelectionDAG, where SDLoc of 'setcc' follows the debug location of 'icmp' but SDLOC of 'xor' and 'brcond' follows the debug location of 'br' instruction, and SDLoc of 'xor' overwrites SDLoc of 'setcc' when they are folded. This patch addresses this issue.

Reviewers: atrick, bogner, andreadb, craig.topper, aprantl

Reviewed By: andreadb

Subscribers: jlebar, mkuper, jholewinski, andreadb, llvm-commits

Differential Revision: https://reviews.llvm.org/D29813

llvm-svn: 296825

7 years ago[DAG] early exit to improve readability and formatting of visitMemCmpCall(); NFCI
Sanjay Patel [Thu, 2 Mar 2017 21:56:43 +0000 (21:56 +0000)]
[DAG] early exit to improve readability and formatting of visitMemCmpCall(); NFCI

llvm-svn: 296824

7 years agoWork around GCC linking errors within libc++abi due to missing new/delete definitions
Eric Fiselier [Thu, 2 Mar 2017 21:55:17 +0000 (21:55 +0000)]
Work around GCC linking errors within libc++abi due to missing new/delete definitions

llvm-svn: 296823

7 years agoWork around GCC linking errors within libc++abi due to missing new/delete definitions
Eric Fiselier [Thu, 2 Mar 2017 21:55:03 +0000 (21:55 +0000)]
Work around GCC linking errors within libc++abi due to missing new/delete definitions

llvm-svn: 296822

7 years ago[Hexagon] Pick the right branch opcode depending on branch probabilities
Krzysztof Parzyszek [Thu, 2 Mar 2017 21:49:49 +0000 (21:49 +0000)]
[Hexagon] Pick the right branch opcode depending on branch probabilities

Specifically, pick the opcode with the correct branch prediction, i.e.
jump:t or jump:nt.

llvm-svn: 296821

7 years agoRevert "AMDGPU: Re-do update for branch-relaxation test"
Tobias Grosser [Thu, 2 Mar 2017 21:47:51 +0000 (21:47 +0000)]
Revert "AMDGPU: Re-do update for branch-relaxation test"

This commit also relied on r296812, which I just reverted. We should probably
apply it again, after the r296812 has been discussed and been reapplied in some
variant.

llvm-svn: 296820

7 years agoAdd a reference to the projects in the Get involved section.
Jim Ingham [Thu, 2 Mar 2017 21:45:39 +0000 (21:45 +0000)]
Add a reference to the projects in the Get involved section.

llvm-svn: 296819

7 years agoCodeGen: MachineBlockPlacement: Remove the unused outlining heuristic.
Kyle Butt [Thu, 2 Mar 2017 21:44:24 +0000 (21:44 +0000)]
CodeGen: MachineBlockPlacement: Remove the unused outlining heuristic.

Outlining optional branches isn't a good heuristic, and it's never been
on by default. Remove it to clean things up.

llvm-svn: 296818

7 years agoRevert "Currently broken by recent LLVM upstream changes"
Tobias Grosser [Thu, 2 Mar 2017 21:43:50 +0000 (21:43 +0000)]
Revert "Currently broken by recent LLVM upstream changes"

This reverts commit r296579, which is not needed anymore as the relevant changes
in trunk have been reverted.

llvm-svn: 296817

7 years agoGoals->Projects.
Jim Ingham [Thu, 2 Mar 2017 21:42:00 +0000 (21:42 +0000)]
Goals->Projects.

llvm-svn: 296816

7 years ago[ARM] Fix insert point for store rescheduling.
Eli Friedman [Thu, 2 Mar 2017 21:39:39 +0000 (21:39 +0000)]
[ARM] Fix insert point for store rescheduling.

In ARMPreAllocLoadStoreOpt::RescheduleOps, LastOp should be the last
operation which we want to merge. If we break out of the loop because
an operation has the wrong offset, we shouldn't use that operation
as LastOp.

This patch fixes some cases where we would move stores to the wrong
insert point.

Re-commit with a fix to increment NumMove in the right place.

Differential Revision: https://reviews.llvm.org/D30124

llvm-svn: 296815

7 years agoAdded a list of outstanding projects that would benefit lldb.
Jim Ingham [Thu, 2 Mar 2017 21:39:27 +0000 (21:39 +0000)]
Added a list of outstanding projects that would benefit lldb.

This was a list that I've had kicking around for a while, and would
add to whenever some hallway conversation would bring up another good
idea.  It's not doing any good on my desktop, but it might generate
some inspiration here.  Please add to this if you have any other
good ideas.

I apologize for the formatting, but if I wait to get it looking
nice it would probably stay on my desktop.

llvm-svn: 296814

7 years agoFix test failures caused by new/delete calls getting optimized away
Eric Fiselier [Thu, 2 Mar 2017 21:16:35 +0000 (21:16 +0000)]
Fix test failures caused by new/delete calls getting optimized away

llvm-svn: 296813

7 years agoRevert "Fix PR 24415 (at least), by making our post-dominator tree behavior sane."
Tobias Grosser [Thu, 2 Mar 2017 21:08:37 +0000 (21:08 +0000)]
Revert "Fix PR 24415 (at least), by making our post-dominator tree behavior sane."

and also "clang-format GenericDomTreeConstruction.h, since the current
formatting makes it look like their is a bug in the loop indentation, and there
is not"

This reverts commit r296535.

There are still some open design questions which I would like to discuss. I
revert this for Daniel (who gave the OK), as he is on vacation.

llvm-svn: 296812

7 years ago[PPC] Fix code generation for bswap(int32) followed by store16
Guozhi Wei [Thu, 2 Mar 2017 21:07:59 +0000 (21:07 +0000)]
[PPC] Fix code generation for bswap(int32) followed by store16

This patch fixes pr32063.

Current code in PPCTargetLowering::PerformDAGCombine can transform

bswap
store

into a single PPCISD::STBRX instruction. but it doesn't consider the case that the operand size of bswap may be larger than store size. When it occurs, we need 2 modifications,

1 For the last operand of PPCISD::STBRX, we should not use DAG.getValueType(N->getOperand(1).getValueType()), instead we should use cast<StoreSDNode>(N)->getMemoryVT().

2 Before PPCISD::STBRX, we need to shift the original operand of bswap to the right side.

Differential Revision: https://reviews.llvm.org/D30362

llvm-svn: 296811

7 years ago[Support] Move Stream library from MSF -> Support.
Zachary Turner [Thu, 2 Mar 2017 20:52:51 +0000 (20:52 +0000)]
[Support] Move Stream library from MSF -> Support.

After several smaller patches to get most of the core improvements
finished up, this patch is a straight move and header fixup of
the source.

Differential Revision: https://reviews.llvm.org/D30266

llvm-svn: 296810

7 years ago[AArch64] Extend redundant copy elimination pass to handle non-zero stores.
Chad Rosier [Thu, 2 Mar 2017 20:48:11 +0000 (20:48 +0000)]
[AArch64] Extend redundant copy elimination pass to handle non-zero stores.

This patch extends the current functionality of the AArch64 redundant copy
elimination pass to handle non-zero cases such as:

BB#0:
  cmp x0, #1
  b.eq .LBB0_1
.LBB0_1:
  orr x0, xzr, #0x1  ; <-- redundant copy; x0 known to hold #1.

Differential Revision: https://reviews.llvm.org/D29344

llvm-svn: 296809

7 years ago[DAG] improve documentation comments; NFC
Sanjay Patel [Thu, 2 Mar 2017 20:48:08 +0000 (20:48 +0000)]
[DAG] improve documentation comments; NFC

llvm-svn: 296808

7 years ago[MSP430] Add SRet support to MSP430 target
Vadzim Dambrouski [Thu, 2 Mar 2017 20:25:10 +0000 (20:25 +0000)]
[MSP430] Add SRet support to MSP430 target

This patch adds support for struct return values to the MSP430
target backend. It also reverses the order of argument and return
registers in the calling convention to bring it into closer
alignment with the published EABI from TI.

Patch by Andrew Wygle (awygle).

Differential Revision: https://reviews.llvm.org/D29069

llvm-svn: 296807

7 years agoPromote ConstantInitBuilder to be a public CodeGen API; it's
John McCall [Thu, 2 Mar 2017 20:04:19 +0000 (20:04 +0000)]
Promote ConstantInitBuilder to be a public CodeGen API; it's
a generally useful utility for other frontends.  NFC.

llvm-svn: 296806

7 years agoUpdate ABI list for 4.0 release
Eric Fiselier [Thu, 2 Mar 2017 19:59:53 +0000 (19:59 +0000)]
Update ABI list for 4.0 release

llvm-svn: 296805

7 years agoThe patch fixes r296770
Evgeny Stupachenko [Thu, 2 Mar 2017 19:41:38 +0000 (19:41 +0000)]
The patch fixes r296770
Summary:

Extend -unroll-partial-threshold to 200 for runtime-loop3.ll test
as epilogue unroll initially add 1 more IV to the loop.

From: Evgeny Stupachenko <evstupac@gmail.com>
llvm-svn: 296803

7 years ago[libc++] Add option to disable new/delete overloads when libc++abi provides them.
Eric Fiselier [Thu, 2 Mar 2017 19:35:33 +0000 (19:35 +0000)]
[libc++] Add option to disable new/delete overloads when libc++abi provides them.

Summary:
Currently both libc++ and libc++abi provide definitions for operator new/delete. However I believe this is incorrect and that one or the other should offer them.

This patch adds the CMake option `-DLIBCXX_ENABLE_NEW_DELETE_DEFINITIONS` which defaults no `ON` unless `-DLIBCXXABI_ENABLE_NEW_DELETE_DEFINITIONS=ON` is specified.

Reviewers: mclow.lists, mehdi_amini, dexonsmith, danalbert, smeenai, mgorny, rmaprath

Reviewed By: mehdi_amini

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D30516

llvm-svn: 296802

7 years ago[libc++abi] Add option to enable definitions for the new/delete overloads.
Eric Fiselier [Thu, 2 Mar 2017 19:34:35 +0000 (19:34 +0000)]
[libc++abi] Add option to enable definitions for the new/delete overloads.

Summary:
Currently both libc++ and libc++abi provide definitions for operator new/delete. However I believe this is incorrect and that one or the other should offer them.

This patch adds the CMake option `-DLIBCXXABI_ENABLE_NEW_DELETE_DEFINITIONS` which defaults to `OFF` unless otherwise specified. This means that by default
only libc++ provides the new/delete definitions.

Reviewers: mclow.lists, mehdi_amini, dexonsmith, beanz, jroelofs, danalbert, smeenai, rmaprath, mgorny

Reviewed By: mehdi_amini

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D30517

llvm-svn: 296801

7 years agoPass a callback to resolveReloc. NFC.
Rafael Espindola [Thu, 2 Mar 2017 19:29:28 +0000 (19:29 +0000)]
Pass a callback to resolveReloc. NFC.

This is consistent with rest of the file and opens the way for a
relocation keeping multiple sections alive.

llvm-svn: 296788

7 years ago[libc++abi] Update new/delete definitions to match libc++
Eric Fiselier [Thu, 2 Mar 2017 19:25:53 +0000 (19:25 +0000)]
[libc++abi] Update new/delete definitions to match libc++

Summary:
Currently both libc++ and libc++abi provide definitions for new/delete. However libc++abi's definitions haven't been updated to include aligned new/delete or sized deallocation.
I don't see any reason why libc++abi shouldn't provide these newer overloads.

This patch copies libc++'s implementation of `new/delete` into libc++abi so that it's now up to date.

After applying this patch I plan to fix a longstanding bug where both libc++ and libc++abi provide definitions for new/delete.

Reviewers: mclow.lists, mehdi_amini, dexonsmith, danalbert, smeenai, rmaprath, jroelofs

Reviewed By: mehdi_amini

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D30514

llvm-svn: 296787

7 years agoSimplify test by producing an executable.
Rafael Espindola [Thu, 2 Mar 2017 19:19:59 +0000 (19:19 +0000)]
Simplify test by producing an executable.

llvm-svn: 296786

7 years ago[NVPTX] Reduce amount of boilerplate code used to select load instruction opcode.
Artem Belevich [Thu, 2 Mar 2017 19:14:14 +0000 (19:14 +0000)]
[NVPTX] Reduce amount of boilerplate code used to select load instruction opcode.

Make opcode selection code for the load instruction a bit easier
to read and maintain.

This patch also catches number of f16 load/store variants that were
not handled before.

Differential Revision: https://reviews.llvm.org/D30513

llvm-svn: 296785

7 years ago[NVPTX] Added missing LDU/LDG intrinsics for f16.
Artem Belevich [Thu, 2 Mar 2017 19:14:10 +0000 (19:14 +0000)]
[NVPTX] Added missing LDU/LDG intrinsics for f16.

Differential Revision: https://reviews.llvm.org/D30512

llvm-svn: 296784

7 years agoFix some Wdocumentation warnings
Simon Pilgrim [Thu, 2 Mar 2017 18:59:07 +0000 (18:59 +0000)]
Fix some Wdocumentation warnings

llvm-svn: 296783

7 years ago[X86][MMX] Fixed i32 extraction on 32-bit targets
Simon Pilgrim [Thu, 2 Mar 2017 18:56:06 +0000 (18:56 +0000)]
[X86][MMX] Fixed i32 extraction on 32-bit targets

MMX extraction often ends up as extract_i32(bitcast_v2i32(extract_i64(bitcast_v1i64(x86mmx v), 0)), 0) which fails to simplify on 32-bit targets as i64 isn't legal

llvm-svn: 296782

7 years agoAdd coding and shebang.
Vassil Vassilev [Thu, 2 Mar 2017 18:47:22 +0000 (18:47 +0000)]
Add coding and shebang.

Reviewed by Artem Dergachev (D26030)!

llvm-svn: 296781

7 years agoMark function as llvm dump method.
Vassil Vassilev [Thu, 2 Mar 2017 18:13:19 +0000 (18:13 +0000)]
Mark function as llvm dump method.

llvm-svn: 296779

7 years agoCast to the right type on Windows.
Vassil Vassilev [Thu, 2 Mar 2017 18:12:59 +0000 (18:12 +0000)]
Cast to the right type on Windows.

llvm-svn: 296778

7 years ago[Hexagon] Skip blocks that define vector predicate registers in early-if
Krzysztof Parzyszek [Thu, 2 Mar 2017 18:10:59 +0000 (18:10 +0000)]
[Hexagon] Skip blocks that define vector predicate registers in early-if

llvm-svn: 296777

7 years agoDocument that code inlined into a nodebug function also won't get any
Adrian Prantl [Thu, 2 Mar 2017 18:06:51 +0000 (18:06 +0000)]
Document that code inlined into a nodebug function also won't get any
debug info.

Suggested by Paul Robinson in feedback on r296488, thanks!

llvm-svn: 296776

7 years agoRemove redundant include.
Vassil Vassilev [Thu, 2 Mar 2017 18:04:44 +0000 (18:04 +0000)]
Remove redundant include.

llvm-svn: 296775

7 years agoReland r296442 with modifications reverted in r296463.
Vassil Vassilev [Thu, 2 Mar 2017 17:56:45 +0000 (17:56 +0000)]
Reland r296442 with modifications reverted in r296463.

Original commit message:

"Allow externally dlopen-ed libraries to be registered as permanent libraries.

This is also useful in cases when llvm is in a shared library. First we dlopen
the llvm shared library and then we register it as a permanent library in order
to keep the JIT and other services working.

Patch reviewed by Vedant Kumar (D29955)!"

llvm-svn: 296774

7 years agoSimplify. NFC.
Rui Ueyama [Thu, 2 Mar 2017 17:55:29 +0000 (17:55 +0000)]
Simplify. NFC.

llvm-svn: 296773

7 years ago[Hexagon] Properly handle 'q' constraint in 128-byte vector mode
Krzysztof Parzyszek [Thu, 2 Mar 2017 17:50:24 +0000 (17:50 +0000)]
[Hexagon] Properly handle 'q' constraint in 128-byte vector mode

llvm-svn: 296772

7 years ago[PowerPC][ELFv2ABI] Allocate parameter area on-demand to reduce stack frame size
Nemanja Ivanovic [Thu, 2 Mar 2017 17:38:59 +0000 (17:38 +0000)]
[PowerPC][ELFv2ABI] Allocate parameter area on-demand to reduce stack frame size

This patch reduces the stack frame size by not allocating the parameter area if
it is not required. In the current implementation LowerFormalArguments_64SVR4
already handles the parameter area, but LowerCall_64SVR4 does not
(when calculating the stack frame size). What this patch does is make
LowerCall_64SVR4 consistent with LowerFormalArguments_64SVR4.

Committing on behalf of Hiroshi Inoue.

Differential Revision: https://reviews.llvm.org/D29881

llvm-svn: 296771

7 years agoThe patch turns on epilogue unroll for loops with constant recurency start.
Evgeny Stupachenko [Thu, 2 Mar 2017 17:38:46 +0000 (17:38 +0000)]
The patch turns on epilogue unroll for loops with constant recurency start.
Summary:

Set unroll remainder to epilog if a loop contains a phi with constant parameter:

  loop:
  pn = phi [Const, PreHeader], [pn.next, Latch]
  ...

Reviewer: hfinkel

Differential Revision: http://reviews.llvm.org/D27004

From: Evgeny Stupachenko <evstupac@gmail.com>
llvm-svn: 296770

7 years agoSerialization: use the PCH chain to check PCH mode
Saleem Abdulrasool [Thu, 2 Mar 2017 17:37:11 +0000 (17:37 +0000)]
Serialization: use the PCH chain to check PCH mode

When we are deciding whether we are creating a PCH or a module, we would
check if the ModuleMgr had any elements to switch into PCH mode.
However, when creating a module, the size may be 1.  This would result
in us going down the wrong path.

This was found by cross-compiling the swift standard library.  Use the
PCH chain length instead to identify the PCH mode.

Unfortunately, I have not yet been able to create a simple test case for
this, but have verified that this fixes the swift standard library
construction.

Thanks to Adrian Prantl for help and discussions with this change!

llvm-svn: 296769

7 years ago[DAGCombiner] avoid assertion when folding binops with opaque constants
Sanjay Patel [Thu, 2 Mar 2017 17:18:56 +0000 (17:18 +0000)]
[DAGCombiner] avoid assertion when folding binops with opaque constants

This bug was introduced with:
https://reviews.llvm.org/rL296699

There may be a way to loosen the restriction, but for now just bail out
on any opaque constant.

The tests show that opacity is target-specific. This goes back to cost
calculations in ConstantHoisting based on TTI->getIntImmCost().

llvm-svn: 296768

7 years agoNew tool: opt-diff.py
Adam Nemet [Thu, 2 Mar 2017 17:00:59 +0000 (17:00 +0000)]
New tool: opt-diff.py

This tool allows generating the different between two optimization record
files.  The result is a YAML file too that can be visualized with opt-viewer.

This is very useful to see what optimization were added and removed by a
change.

llvm-svn: 296767

7 years ago[opt-viewer] Treat remarks with different attributes as different
Adam Nemet [Thu, 2 Mar 2017 17:00:56 +0000 (17:00 +0000)]
[opt-viewer] Treat remarks with different attributes as different

We used to exclude arguments but for a diffed YAML file, it's interesting to
show these as changes.

Turns out this also affects gvn/LoadClobbered because we used to squash
multiple entries of this on the same line even if they reported clobbers
by *different* instructions.  This increases the number of unique entries now
and the share of gvn/LoadClobbered.

Total number of remarks      902287

Top 10 remarks by pass:
  inline                         43%
  gvn                            37%
  licm                           11%
  loop-vectorize                  4%
  asm-printer                     3%
  regalloc                        1%
  loop-unroll                     1%
  inline-cost                     0%
  slp-vectorizer                  0%
  loop-delete                     0%

Top 10 remarks:
  gvn/LoadClobbered              33%
  inline/Inlined                 16%
  inline/CanBeInlined            14%
  inline/NoDefinition             7%
  licm/Hoisted                    6%
  licm/LoadWithLoopInvariantAddressInvalidated  5%
  gvn/LoadElim                    3%
  asm-printer/InstructionCount    3%
  inline/TooCostly                2%
  loop-vectorize/MissedDetails    2%

llvm-svn: 296766

7 years ago[opt-viewer] Don't use __getattr__ for missing YAML attributes
Adam Nemet [Thu, 2 Mar 2017 17:00:53 +0000 (17:00 +0000)]
[opt-viewer] Don't use __getattr__ for missing YAML attributes

__getattr__ does not work well with debugging.  If the attribute function has
a run-time error, a missing attribute is reported instead.

llvm-svn: 296765

7 years ago[opt-viewer] Sort entries with identical hotness by source line
Adam Nemet [Thu, 2 Mar 2017 17:00:49 +0000 (17:00 +0000)]
[opt-viewer] Sort entries with identical hotness by source line

We want entries that are close to each other in the source appear next to each
other.

llvm-svn: 296764

7 years agoAllow use of spaces in Bugpoint ‘--compile-command’ argument
David Bozier [Thu, 2 Mar 2017 16:50:48 +0000 (16:50 +0000)]
Allow use of spaces in Bugpoint ‘--compile-command’ argument

Bug-Point functionality needs extending due to the patch D29185 by bd1976llvm (Allow llvm's build and test systems to support paths with spaces ). It requires Bugpoint to accept the use of spaces within ‘--compile-command’ tokens.

Details
Bugpoint uses the argument ‘--compile-command’ to pass in a command line argument as a string, the string is tokenized by the ‘lexCommand’ function using spaces as a delimiter. Patch D29185 will cause the unit test compile-custom.ll to fail as spaces are now required within tokens and as a delimiter. This patch allows the use of escape characters as below:

Two consecutive '\' evaluate to a single '\'.
A space after a '\' evaluates to a space that is not interpreted as a delimiter.
Any other instances of the '\' character are removed.

Committed on behalf of Owen Reynolds

Differential revision: https://reviews.llvm.org/D29940

llvm-svn: 296763

7 years agofix typo in comment; NFC
Sanjay Patel [Thu, 2 Mar 2017 16:37:24 +0000 (16:37 +0000)]
fix typo in comment; NFC

llvm-svn: 296760

7 years agoRe-apply "[GVNHoist] Move GVNHoist to function simplification part of pipeline."
Geoff Berry [Thu, 2 Mar 2017 16:16:47 +0000 (16:16 +0000)]
Re-apply "[GVNHoist] Move GVNHoist to function simplification part of pipeline."

This re-applies r289696, which caused TSan perf regression, which has
since been addressed in separate changes (see PR for details).

See PR31382.

llvm-svn: 296759

7 years ago[clang-tidy] google-readability-casting: detect redundant casts with top-level const
Alexander Kornienko [Thu, 2 Mar 2017 15:47:28 +0000 (15:47 +0000)]
[clang-tidy] google-readability-casting: detect redundant casts with top-level const

llvm-svn: 296755

7 years agoGlobalISel: record correct stack usage for signext parameters.
Tim Northover [Thu, 2 Mar 2017 15:34:18 +0000 (15:34 +0000)]
GlobalISel: record correct stack usage for signext parameters.

The CallingConv.td rules allocate 8 bytes for these kinds of arguments
on AAPCS targets, but we were only recording the smaller amount. The
difference is theoretical on AArch64 because we don't actually store
more than the smaller amount, but it's still much better to have these
two components in agreement.

Based on Diana Picus's ARM equivalent patch (where it matters a lot
more).

llvm-svn: 296754

7 years ago[clang-tidy] Fix a few more issues in google-readability-casting
Alexander Kornienko [Thu, 2 Mar 2017 15:27:34 +0000 (15:27 +0000)]
[clang-tidy] Fix a few more issues in google-readability-casting

* suggest static_cast instead of reinterpret_cast for casts from void*
* top-level const doesn't need a const_cast
* don't emit a separate "possibly redundant cast" warning, instead suggest
  static_cast (in C++ only) and add a little hint to consider removing the cast

llvm-svn: 296753

7 years ago[InstCombine] Avoid faulty combines of select-cmp-br
Bjorn Pettersson [Thu, 2 Mar 2017 15:18:58 +0000 (15:18 +0000)]
[InstCombine] Avoid faulty combines of select-cmp-br

Summary:
When InstCombine is optimizing certain select-cmp-br patterns
it replaces the result of the select in uses outside of the
basic block containing the select. This is only legal if the
path from the select to the outside use is disjoint from all
other paths out from the originating basic block.

The problem found was that InstCombiner::replacedSelectWithOperand
did not consider the case when both edges out from the br pointed
to the same label. In that case the paths aren't disjoint and the
transformation is illegal. This patch avoids the faulty rewrites
by verifying that there is a single flow to the successor where
we want to replace uses.

Reviewers: llvm-commits, spatel, majnemer

Differential Revision: https://reviews.llvm.org/D30455

llvm-svn: 296752

7 years ago[ARM/AArch64] Update costs for interleaved accesses with wide types
Matthew Simpson [Thu, 2 Mar 2017 15:15:35 +0000 (15:15 +0000)]
[ARM/AArch64] Update costs for interleaved accesses with wide types

After r296750, we're able to match interleaved accesses having types wider than
128 bits. This patch updates the associated TTI costs.

Differential Revision: https://reviews.llvm.org/D29675

llvm-svn: 296751

7 years ago[ARM/AArch64] Support wide interleaved accesses
Matthew Simpson [Thu, 2 Mar 2017 15:11:20 +0000 (15:11 +0000)]
[ARM/AArch64] Support wide interleaved accesses

This patch teaches (ARM|AArch64)ISelLowering.cpp to match illegal vector types
to interleaved access intrinsics as long as the types are multiples of the
vector register width. A "wide" access will now be mapped to multiple
interleave intrinsics similar to the way in which non-interleaved accesses with
illegal types are legalized into multiple accesses. I'll update the associated
TTI costs (in getInterleavedMemoryOpCost) as a follow-on.

Differential Revision: https://reviews.llvm.org/D29466

llvm-svn: 296750

7 years agoDon't write to LLVMStyle.JavaScriptQuotes twice. No behavior change.
Nico Weber [Thu, 2 Mar 2017 14:51:54 +0000 (14:51 +0000)]
Don't write to LLVMStyle.JavaScriptQuotes twice. No behavior change.

llvm-svn: 296749

7 years agoDo not leak OpenedHandles.
Vassil Vassilev [Thu, 2 Mar 2017 14:30:05 +0000 (14:30 +0000)]
Do not leak OpenedHandles.

llvm-svn: 296748

7 years ago[LV] Considier non-consecutive but vectorizable accesses for VF selection
Matthew Simpson [Thu, 2 Mar 2017 13:55:05 +0000 (13:55 +0000)]
[LV] Considier non-consecutive but vectorizable accesses for VF selection

When computing the smallest and largest types for selecting the maximum
vectorization factor, we currently ignore loads and stores of pointer types if
the memory access is non-consecutive. We do this because such accesses must be
scalarized regardless of vectorization factor, and thus shouldn't be considered
when determining the factor. This patch makes this check less aggressive by
also considering non-consecutive accesses that may be vectorized, such as
interleaved accesses. Because we don't know at the time of the check if an
accesses will certainly be vectorized (this is a cost model decision given a
particular VF), we consider all accesses that can potentially be vectorized.

Differential Revision: https://reviews.llvm.org/D30305

llvm-svn: 296747

7 years agoAdded special test covering a problem with PIC relocation model on SLM architecture...
Andrew V. Tischenko [Thu, 2 Mar 2017 13:47:03 +0000 (13:47 +0000)]
Added special test covering a problem with PIC relocation model on SLM architecture. The fix will come in D26855.

llvm-svn: 296746

7 years ago[ScopDetection] Do not allow required-invariant loads in non-affine region
Tobias Grosser [Thu, 2 Mar 2017 12:15:37 +0000 (12:15 +0000)]
[ScopDetection] Do not allow required-invariant loads in non-affine region

These loads cannot be savely hoisted as the condition guarding the
non-affine region cannot be duplicated to also protect the hoisted load
later on. Today they are dropped in ScopInfo. By checking for this early, we
do not even try to model them and possibly can still optimize smaller regions
not containing this specific required-invariant load.

llvm-svn: 296744