Simon Pilgrim [Sun, 8 Jul 2018 10:32:07 +0000 (10:32 +0000)]
[X86] Set scheduler classes to unsupported. NFCI.
While looking at PR36895 I noticed how much of the atom model was still setting schedules for unsupported SSE4+ instructions.
llvm-svn: 336512
Roman Lebedev [Sun, 8 Jul 2018 09:50:25 +0000 (09:50 +0000)]
[X86][Basically NFC] Sched: split WriteBitScan into WriteBSF/WriteBSR.
Summary:
Motivation: {
F6597954}
This only does the mechanical splitting, does not actually change
any numbers, as the tests added in previous revision show.
Reviewers: craig.topper, RKSimon, courbet
Reviewed By: craig.topper
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D48998
llvm-svn: 336511
Roman Lebedev [Sun, 8 Jul 2018 09:50:14 +0000 (09:50 +0000)]
[MCA][X86][NFC] Add BSF/BSR resource tests
Reviewers: RKSimon, andreadb, courbet
Reviewed By: RKSimon
Subscribers: gbedwell, llvm-commits
Differential Revision: https://reviews.llvm.org/D48997
llvm-svn: 336510
Craig Topper [Sun, 8 Jul 2018 01:45:47 +0000 (01:45 +0000)]
[LoopIdiomRecognize] Support for converting loops that use LSHR to CTLZ.
In the 'detectCTLZIdiom' function support for loops that use LSHR instruction instead of ASHR has been added.
This supports creating ctlz from the following code.
int lzcnt(int x) {
int count = 0;
while (x > 0) {
count++;
x = x >> 1;
}
return count;
}
Patch by Olga Moldovanova
Differential Revision: https://reviews.llvm.org/D48354
llvm-svn: 336509
Craig Topper [Sun, 8 Jul 2018 01:23:49 +0000 (01:23 +0000)]
[X86] Add back some intrinsic table entries lost in r336506.
llvm-svn: 336508
Craig Topper [Sun, 8 Jul 2018 01:10:47 +0000 (01:10 +0000)]
[X86] Add new scalar fma intrinsics with rounding mode that use f32/f64 types.
This allows us to handle masking in a very similar way to the default rounding version that uses llvm.fma
llvm-svn: 336507
Craig Topper [Sun, 8 Jul 2018 01:10:43 +0000 (01:10 +0000)]
[X86] Add new scalar fma intrinsics with rounding mode that use f32/f64 types.
This allows us to handle masking in a very similar way to the default rounding version that uses llvm.fma.
I had to add new rounding mode CodeGenOnly instructions to support isel when we can't find a movss to grab the upper bits from to use the b_Int instruction.
Fast-isel tests have been updated to match new clang codegen.
We are currently having trouble folding fneg into the new intrinsic. I'm going to correct that in a follow up patch to keep the size of this one down.
A future patch will also remove the old intrinsics.
llvm-svn: 336506
Craig Topper [Sun, 8 Jul 2018 00:32:56 +0000 (00:32 +0000)]
[X86] Use a rounding mode other than 4 in the scalar fma intrinsic fast-isel tests to match clang test cases.
llvm-svn: 336505
Casey Carter [Sun, 8 Jul 2018 00:06:27 +0000 (00:06 +0000)]
type_traits: aligned_union is NOT the same as __uncvref [NFC]
llvm-svn: 336502
Craig Topper [Sat, 7 Jul 2018 22:03:20 +0000 (22:03 +0000)]
[X86] Remove __builtin_ia32_vfnmsubsd3_mask3 and __builtin_ia32_vfnmsubss3_mask3 from clang.
They are no longer used by clang.
llvm-svn: 336500
Craig Topper [Sat, 7 Jul 2018 22:03:19 +0000 (22:03 +0000)]
[X86] Remove some unnecessarily escaped new lines from avx512fintrin.h
llvm-svn: 336499
Craig Topper [Sat, 7 Jul 2018 22:03:16 +0000 (22:03 +0000)]
[X86] Fix a few intrinsics that were ignoring their rounding mode argument and hardcoded _MM_FROUND_CUR_DIRECTION internally.
I believe these have been broken since their introduction into clang.
I've enhanced the tests for these intrinsics to using a real rounding mode and checking all the intrinsic arguments instead of just the name.
llvm-svn: 336498
Reka Kovacs [Sat, 7 Jul 2018 20:29:24 +0000 (20:29 +0000)]
[analyzer] Add support for data() in DanglingInternalBufferChecker.
DanglingInternalBufferChecker now tracks use-after-free problems related
to the incorrect usage of std::basic_string::data().
Differential Revision: https://reviews.llvm.org/D48532
llvm-svn: 336497
Simon Pilgrim [Sat, 7 Jul 2018 20:08:27 +0000 (20:08 +0000)]
[X86] Regenerate PR14088 test. NFCI.
llvm-svn: 336496
Reka Kovacs [Sat, 7 Jul 2018 19:27:18 +0000 (19:27 +0000)]
[analyzer] Highlight c_str() call in DanglingInternalBufferChecker.
Add a bug visitor to DanglingInternalBufferChecker that places a note
at the point where the dangling pointer was obtained. The visitor is
handed over to MallocChecker and attached to the report there.
Differential Revision: https://reviews.llvm.org/D48522
llvm-svn: 336495
Alexander Polyakov [Sat, 7 Jul 2018 18:54:44 +0000 (18:54 +0000)]
Add LLDB_API to SBAddress's operator==.
Summary: Add LLDB_API to SBAddress's operator== to fix lldb-mi build on Windows.
Patch by Aleksandr Urakov!
Differential Revision: https://reviews.llvm.org/D49006
llvm-svn: 336494
Reka Kovacs [Sat, 7 Jul 2018 18:37:37 +0000 (18:37 +0000)]
[analyzer] Fix -Wcovered-switch-default warning in MallocChecker.
Remove unnecessary default case that caused buildbot failures.
llvm-svn: 336493
Simon Pilgrim [Sat, 7 Jul 2018 18:17:14 +0000 (18:17 +0000)]
[SelectionDAG] Split float and integer isKnownNeverZero tests
Splits off isKnownNeverZeroFloat to handle +/- 0 float cases.
This will make it easier to be more aggressive with the integer isKnownNeverZero tests (similar to ValueTracking), use computeKnownBits etc.
Differential Revision: https://reviews.llvm.org/D48969
llvm-svn: 336492
Simon Pilgrim [Sat, 7 Jul 2018 17:33:48 +0000 (17:33 +0000)]
Use const APInt& to avoid extra copy. NFCI.
As discussed on D48825.
llvm-svn: 336491
Simon Pilgrim [Sat, 7 Jul 2018 17:30:06 +0000 (17:30 +0000)]
[DAGCombiner] Add EXTRACT_SUBVECTOR to SimplifyDemandedVectorElts
As discussed on PR37989, this patch adds EXTRACT_SUBVECTOR handling to TargetLowering::SimplifyDemandedVectorElts and calls it from DAGCombiner::visitEXTRACT_SUBVECTOR.
Differential Revision: https://reviews.llvm.org/D48825
llvm-svn: 336490
Reka Kovacs [Sat, 7 Jul 2018 17:22:45 +0000 (17:22 +0000)]
[analyzer] Highlight container object destruction in MallocChecker.
Extend MallocBugVisitor to place a note at the point where objects with
AF_InternalBuffer allocation family are destroyed.
Differential Revision: https://reviews.llvm.org/D48521
llvm-svn: 336489
Craig Topper [Sat, 7 Jul 2018 17:03:34 +0000 (17:03 +0000)]
[X86] Change _mm512_shuffle_pd and _mm512_shuffle_ps to use target specific shuffle builtins instead of generic __builtin_shufflevector.
I added the builtins for 128, 256, and 512 bits recently but looks like I failed to convert to using the 512 bit one.
llvm-svn: 336488
Craig Topper [Sat, 7 Jul 2018 17:03:32 +0000 (17:03 +0000)]
[X86] Fix various type mismatches in intrinsic headers and intrinsic tests that cause extra bitcasts to be emitted in the IR.
Found via imprecise grepping of the -O0 IR. There could still be more bugs out there.
llvm-svn: 336487
Simon Pilgrim [Sat, 7 Jul 2018 16:53:30 +0000 (16:53 +0000)]
[CostModel][X86] Add SREM/UREM general and constant costs (PR38056)
We penalize general SDIV/UDIV costs but don't do the same for SREM/UREM.
This patch makes general vector SREM/UREM x20 as costly as scalar, the same approach as we do for SDIV/UDIV. The patch also extends the existing SDIV/UDIV constant costs for SREM/UREM - at the moment this means the additional cost of a MUL+SUB (see D48975).
Differential Revision: https://reviews.llvm.org/D48980
llvm-svn: 336486
Chijun Sima [Sat, 7 Jul 2018 16:22:22 +0000 (16:22 +0000)]
Test commit
llvm-svn: 336485
Gabor Buella [Sat, 7 Jul 2018 16:09:15 +0000 (16:09 +0000)]
NFC - Typo fixes in X86 flags-copy-lowering.mir test
Differential Revision: https://reviews.llvm.org/D48934
llvm-svn: 336484
Tatyana Krasnukha [Sat, 7 Jul 2018 14:58:13 +0000 (14:58 +0000)]
Fix build on Windows with SDK build version >= 17134.
Platform.h doesn't define signal() and SIGINT since commit r263858. Code was compiled successfully because signal.h didn't have "ifndef" include guard in previous versions of Windows SDK. Now it does.
llvm-svn: 336483
Yvan Roux [Sat, 7 Jul 2018 08:42:31 +0000 (08:42 +0000)]
[MachineOutliner] Add missing liveness tracking info in MIR test.
This should bring the bots back to green state.
llvm-svn: 336482
Yvan Roux [Sat, 7 Jul 2018 08:02:19 +0000 (08:02 +0000)]
[MachineOutliner] Assert that Liveness tracking is accurate (NFC)
The checking is done deeper inside MachineBasicBlock, but this will
hopefully help to find issues when porting the machine outliner to a
target where Liveness tracking is broken (like ARM).
Differential Revision: https://reviews.llvm.org/D49023
llvm-svn: 336481
Richard Smith [Sat, 7 Jul 2018 05:58:48 +0000 (05:58 +0000)]
P0806R2 Implicit capture of this with a capture-default of [=] is
deprecated.
Add a -Wdeprecated warning for this in C++2a onwards. (In C++17 and
before, there isn't a reasonable alternative because [=,this] is
ill-formed.)
llvm-svn: 336480
Chandler Carruth [Sat, 7 Jul 2018 02:46:12 +0000 (02:46 +0000)]
[Support] Clear errno before calling the function in RetryAfterSignal.
For certain APIs, the return value of the function does not distinguish
between failure (which populates errno) and other non-error conditions
(which do not set errno).
For example, `fgets` returns `NULL` both when an error has occurred, or
upon EOF. If `errno` is already `EINTR` for whatever reason, then
```
RetryAfterSignal(nullptr, fgets, ...);
```
on a stream that has reached EOF would infinite loop.
Fix this by setting `errno` to `0` before each attempt in
`RetryAfterSignal`.
Patch by Ricky Zhou!
Differential Revision: https://reviews.llvm.org/D48755
llvm-svn: 336479
Erik Pilkington [Sat, 7 Jul 2018 01:50:20 +0000 (01:50 +0000)]
[Sema] Emit -Wincomplete-implementation for partial methods.
Fixes rdar://
40634455
llvm-svn: 336478
Chandler Carruth [Sat, 7 Jul 2018 01:12:56 +0000 (01:12 +0000)]
[PM/LoopUnswitch] Fix PR37889, producing the correct loop nest structure
after trivial unswitching.
This PR illustrates that a fundamental analysis update was not performed
with the new loop unswitch. This update is also somewhat fundamental to
the core idea of the new loop unswitch -- we actually *update* the CFG
based on the unswitching. In order to do that, we need to update the
loop nest in addition to the domtree.
For some reason, when writing trivial unswitching, I thought that the
loop nest structure cannot be changed by the transformation. But the PR
helps illustrate that it clearly can. I've expanded this to a number of
different test cases that try to cover the different cases of this. When
we unswitch, we move an exit edge of a loop out of the loop. If this
exit edge changes which loop reached by an exit is the innermost loop,
it changes the parent of the loop. Essentially, this transformation may
hoist the inner loop up the nest. I've added the simple logic to handle
this reliably in the trivial unswitching case. This just requires
updating LoopInfo and rebuilding LCSSA on the impacted loops. In the
trivial case, we don't even need to handle dedicated exits because we're
only hoisting the one loop and we just split its preheader.
I've also ported all of these tests to non-trivial unswitching and
verified that the logic already there correctly handles the loop nest
updates necessary.
Differential Revision: https://reviews.llvm.org/D48851
llvm-svn: 336477
Craig Topper [Sat, 7 Jul 2018 01:04:22 +0000 (01:04 +0000)]
[X86] Merge INTR_TYPE_3OP_RM with INTR_TYPE_3OP. Remove unused INTR_TYPE_1OP_RM.
llvm-svn: 336476
Richard Trieu [Sat, 7 Jul 2018 00:17:25 +0000 (00:17 +0000)]
Check returned type is valid before using it.
Add a .isNull() check to returned QualType. Fixes PR38077
llvm-svn: 336475
Michael Zolotukhin [Sat, 7 Jul 2018 00:07:00 +0000 (00:07 +0000)]
Revert "Make __gcov_flush flush counters for all shared libraries"
This reverts r336365: the added tests are failing on various
configurations (e.g. on green-dragon).
llvm-svn: 336474
Tim Shen [Fri, 6 Jul 2018 23:20:35 +0000 (23:20 +0000)]
Revert "[SCEV] Strengthen StrengthenNoWrapFlags (reapply r334428)."
This reverts commit r336140. Our tests shows that LSR assert fails with it.
llvm-svn: 336473
Craig Topper [Fri, 6 Jul 2018 22:46:52 +0000 (22:46 +0000)]
[X86] When creating a select for scalar masked sqrt and div builtins make sure we optimize the all ones mask case.
This case occurs in the intrinsic headers so we should avoid emitting the mask in those cases.
Factor the code into a helper function to make this easy.
llvm-svn: 336472
Jessica Paquette [Fri, 6 Jul 2018 22:24:56 +0000 (22:24 +0000)]
[MachineOutliner] Properly pass -moutline along to the toolchain
This moves the LTO-specific code for outlining from ToolChains/Clang.cpp to
ToolChains/Darwin.cpp. Passing -mllvm flags isn't sufficient for making sure
that the specified pass will actually run in LTO. This makes sure that when
-moutline is passed, the MachineOutliner will actually be added to the LTO
pass pipeline as expected.
llvm-svn: 336471
Craig Topper [Fri, 6 Jul 2018 22:08:43 +0000 (22:08 +0000)]
[X86] Add missing scalar fma intrinsics with rounding, but no mask.
We had the mask versions of the rounding intrinsics, but not one without masking.
Also change the rounding tests to not use the CUR_DIRECTION rounding mode.
llvm-svn: 336470
Benjamin Kramer [Fri, 6 Jul 2018 21:56:57 +0000 (21:56 +0000)]
[PDB] memicmp only exists on Windows, use StringRef::compare_lower instead
llvm-svn: 336469
George Karpenkov [Fri, 6 Jul 2018 21:36:04 +0000 (21:36 +0000)]
[ASTMatchers] A matcher for Objective-C @autoreleasepool
Differential Revision: https://reviews.llvm.org/D48910
llvm-svn: 336468
Alexey Bataev [Fri, 6 Jul 2018 21:13:41 +0000 (21:13 +0000)]
[OPENMP] Fix PR38026: Link -latomic when -fopenmp is used.
On Linux atomic constructs in OpenMP require libatomic library. Patch
links libatomic when -fopenmp is used.
llvm-svn: 336467
Vedant Kumar [Fri, 6 Jul 2018 21:06:21 +0000 (21:06 +0000)]
Fix DIExpression::ExprOperand::appendToVector
appendToVector used the wrong overload of SmallVector::append, resulting
in it appending the same element to a vector `getSize()` times. This did
not cause a problem when initially committed because appendToVector was
only used to append 1-element operands.
This changes appendToVector to use the correct overload of append().
Testing: ./unittests/IR/IRTests --gtest_filter='*DIExpressionTest*'
llvm-svn: 336466
Vedant Kumar [Fri, 6 Jul 2018 21:06:20 +0000 (21:06 +0000)]
Remove a redundant null-check in DIExpression::prepend, NFC
Code outside of an `if (Expr)` block dereferenced `Expr`, so the null
check was redundant.
llvm-svn: 336465
Zachary Turner [Fri, 6 Jul 2018 21:01:42 +0000 (21:01 +0000)]
[PDB] One more fix for hasing GSI records.
The reference implementation uses a case-insensitive string
comparison for strings of equal length. This will cause the
string "tEo" to compare less than "VUo". However we were using
a case sensitive comparison, which would generate the opposite
outcome. Switch to a case insensitive comparison. Also, when
one of the strings contains non-ascii characters, fallback to
a straight memcmp.
The only way to really test this is with a DIA test. Before this
patch, the test will fail (but succeed if link.exe is used instead
of lld-link). After the patch, it succeeds even with lld-link.
llvm-svn: 336464
Davide Italiano [Fri, 6 Jul 2018 20:40:00 +0000 (20:40 +0000)]
[test-suite] Add a decorator for the lack of libstdcxx on the system.
This generalizes a bunch of target-specific tests. MacOS has no
libstdcxx anymore, and neither does FreeBSD (or Windows).
<rdar://problem/
41896105>
llvm-svn: 336463
Vedant Kumar [Fri, 6 Jul 2018 20:17:42 +0000 (20:17 +0000)]
Use Type::isIntOrPtrTy where possible, NFC
It's a bit neater to write T.isIntOrPtrTy() over `T.isIntegerTy() ||
T.isPointerTy()`.
I used Python's re.sub with this regex to update users:
r'([\w.\->()]+)isIntegerTy\(\)\s*\|\|\s*\1isPointerTy\(\)'
llvm-svn: 336462
Kostya Serebryany [Fri, 6 Jul 2018 19:47:00 +0000 (19:47 +0000)]
libFuzzer: always print line-break for NEW_FUNC/PC output
Summary: This is a minor cosmetic change. When function/path exceed ~1000 characters, the output is truncated before the line-break. I noticed this for NEW_FUNC.
Reviewers: kcc
Reviewed By: kcc
Subscribers: llvm-commits, #sanitizers
Differential Revision: https://reviews.llvm.org/D48799
llvm-svn: 336461
Alexey Bataev [Fri, 6 Jul 2018 19:35:42 +0000 (19:35 +0000)]
[OPENMP] Make clauses closing loc point to right bracket.
For some of the clauses the closing location erroneously points to the
beginning of the next clause rather than on the location of the closing
bracket of the clause.
llvm-svn: 336460
Fangrui Song [Fri, 6 Jul 2018 19:26:00 +0000 (19:26 +0000)]
[IR] Fix inconsistent declaration parameter name
llvm-svn: 336459
Craig Topper [Fri, 6 Jul 2018 18:47:57 +0000 (18:47 +0000)]
[X86] Remove patterns for MOVLPD/MOVLPS nodes with integer types.
Lowering shouldn't generate these. If we need to use them for integer types, it should use a bitcast.
llvm-svn: 336458
Craig Topper [Fri, 6 Jul 2018 18:47:55 +0000 (18:47 +0000)]
[X86] Add more FMA3 memory folding patterns. Remove patterns that are no longer needed.
We've removed the legacy FMA3 intrinsics and are now using llvm.fma and extractelement/insertelement. So we don't need patterns for the nodes that could only be created by the old intrinscis. Those ISD opcodes still exist because we haven't dropped the AVX512 intrinsics yet, but those should go to EVEX instructions.
llvm-svn: 336457
Matt Davis [Fri, 6 Jul 2018 18:03:14 +0000 (18:03 +0000)]
[llvm-mca] Add HardwareUnit and Context classes.
This patch moves the construction of the default backend from llvm-mca.cpp and
into mca::Context. The Context class is responsible for holding ownership of
the simulated hardware components. These components are subclasses of
HardwareUnit. Right now the HardwareUnit is pretty bare-bones, but eventually
we might want to add some common functionality across all hardware components,
such as isReady() or something similar.
I have a feeling this patch will probably need some updates, but it's a start.
One thing I am not particularly fond of is the rather large interface for
createDefaultPipeline. That convenience routine takes a rather large set of
inputs from the llvm-mca driver, where many of those inputs are generated via
command line options.
One item I think we might want to change is the separating of ownership of
hardware components (owned by the context) and the pipeline (which owns
Stages). In short, a Pipeline owns Stages, a Context (currently) owns hardware.
The Pipeline's Stages make use of the components, and thus there is a lifetime
dependency generated. The components must outlive the pipeline. We could solve
this by having the Context also own the Pipeline, and not return a
unique_ptr<Pipeline>. Now that I think about it, I like that idea more.
Differential Revision: https://reviews.llvm.org/D48691
llvm-svn: 336456
Alexander Shaposhnikov [Fri, 6 Jul 2018 17:51:03 +0000 (17:51 +0000)]
[llvm-objcopy] Add support for static libraries
This diff adds support for handling static libraries
to llvm-objcopy and llvm-strip.
Test plan: make check-all
Differential revision: https://reviews.llvm.org/D48413
llvm-svn: 336455
Sanjay Patel [Fri, 6 Jul 2018 17:44:57 +0000 (17:44 +0000)]
[InstCombine] add more tests for potentially poisonous shifts; NFC
llvm-svn: 336454
Nico Weber [Fri, 6 Jul 2018 17:37:24 +0000 (17:37 +0000)]
Revert 336426 (and follow-ups 428, 440), it very likely caused PR38084.
llvm-svn: 336453
Vedant Kumar [Fri, 6 Jul 2018 17:32:40 +0000 (17:32 +0000)]
[Debugify] Allow unsigned values narrower than their variables
Suppress the diagnostic for mis-sized dbg.values when a value operand is
narrower than the unsigned variable it describes. Assume that a debugger
would implicitly zero-extend these values.
llvm-svn: 336452
Vedant Kumar [Fri, 6 Jul 2018 17:32:39 +0000 (17:32 +0000)]
[Local] replaceAllDbgUsesWith: Update debug values before RAUW
The replaceAllDbgUsesWith utility helps passes preserve debug info when
replacing one value with another.
This improves upon the existing insertReplacementDbgValues API by:
- Updating debug intrinsics in-place, while preventing use-before-def of
the replacement value.
- Falling back to salvageDebugInfo when a replacement can't be made.
- Moving the responsibiliy for rewriting llvm.dbg.* DIExpressions into
common utility code.
Along with the API change, this teaches replaceAllDbgUsesWith how to
create DIExpressions for three basic integer and pointer conversions:
- The no-op conversion. Applies when the values have the same width, or
have bit-for-bit compatible pointer representations.
- Truncation. Applies when the new value is wider than the old one.
- Zero/sign extension. Applies when the new value is narrower than the
old one.
Testing:
- check-llvm, check-clang, a stage2 `-g -O3` build of clang,
regression/unit testing.
- This resolves a number of mis-sized dbg.value diagnostics from
Debugify.
Differential Revision: https://reviews.llvm.org/D48676
llvm-svn: 336451
Sanjay Patel [Fri, 6 Jul 2018 17:24:32 +0000 (17:24 +0000)]
[InstCombine] add more tests with poison and undef; NFC
As discussed in D48987 and D48893, there are many different
ways to go wrong depending on the binop (and as shown here
we already do go wrong in some cases).
llvm-svn: 336450
Yvan Roux [Fri, 6 Jul 2018 17:22:02 +0000 (17:22 +0000)]
Recommit "[CMake] Run libFuzzer tests with check-all."
Since problematic tests on AArch64 were disabled at r336446.
llvm-svn: 336449
Tom Stellard [Fri, 6 Jul 2018 17:16:17 +0000 (17:16 +0000)]
AMDGPU: Fix UBSan error caused by r335942
Summary: Fixes PR38071.
Reviewers: arsenm, dstenb
Reviewed By: arsenm
Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits
Differential Revision: https://reviews.llvm.org/D48979
llvm-svn: 336448
Matt Morehouse [Fri, 6 Jul 2018 17:10:51 +0000 (17:10 +0000)]
[MSan] Add functions to enable/disable interceptor checks.
Summary:
The motivation for this change is to make libFuzzer+MSan possible
without instrumenting libFuzzer.
See https://github.com/google/sanitizers/issues/958.
Reviewers: eugenis
Reviewed By: eugenis
Subscribers: llvm-commits, kcc
Differential Revision: https://reviews.llvm.org/D48890
llvm-svn: 336447
Yvan Roux [Fri, 6 Jul 2018 17:06:01 +0000 (17:06 +0000)]
[libFuzzer] Disable hanging tests on AArch64
Disable problematic tests which broke AArch64 bots.
Details available in Bugzilla: https://bugs.llvm.org/show_bug.cgi?id=38034
Differential Revision: https://reviews.llvm.org/D49011
llvm-svn: 336446
Kostya Kortchinsky [Fri, 6 Jul 2018 16:50:12 +0000 (16:50 +0000)]
[scudo] Add some logs for Android
Summary:
Namely, set the abort message, and allow to write the message to syslog if the
option is enabled.
Reviewers: alekseyshl
Reviewed By: alekseyshl
Subscribers: delcypher, #sanitizers, llvm-commits
Differential Revision: https://reviews.llvm.org/D48902
llvm-svn: 336445
Sanjay Patel [Fri, 6 Jul 2018 15:18:58 +0000 (15:18 +0000)]
[Constants] extend getBinOpIdentity(); NFC
The enhanced version will be used in D48893 and related patches
and an almost identical (fadd is different) version is proposed
in D28907, so adding this as a preliminary step.
llvm-svn: 336444
George Rimar [Fri, 6 Jul 2018 15:03:53 +0000 (15:03 +0000)]
[ELF] - Add test for empty version in a symbol name.
This covers the following line which was untested:
https://github.com/llvm-mirror/lld/blob/master/ELF/Symbols.cpp#L170
llvm-svn: 336443
Sanjay Patel [Fri, 6 Jul 2018 14:52:36 +0000 (14:52 +0000)]
[Constant] add undef element query for vector constants; NFC
This is likely to be used in D48987 and similar patches,
so adding it as an NFC preliminary step.
llvm-svn: 336442
Sjoerd Meijer [Fri, 6 Jul 2018 14:47:09 +0000 (14:47 +0000)]
[ARM] ParallelDSP: added statistics, NFC.
Added statistics for the number of SMLAD instructions created, and
als renamed the pass name to -arm-parallel-dsp.
Differential Revision: https://reviews.llvm.org/D48971
llvm-svn: 336441
Diogo N. Sampaio [Fri, 6 Jul 2018 14:41:09 +0000 (14:41 +0000)]
Commit rL336426 cause buildbot failures
http://green.lab.llvm.org/green/job/clang-stage1-cmake-RA-incremental/50537/testReport/junit/LLVM/CodeGen_AArch64/FoldRedundantShiftedMasking_ll/
This removes the comments of the function label causing this error.
llvm-svn: 336440
Benjamin Kramer [Fri, 6 Jul 2018 14:20:58 +0000 (14:20 +0000)]
[LoopSink] Make the enforcement of determinism deterministic.
LoopBlockNumber is a DenseMap<BasicBlock*, int>, comparing the result of
find() will compare a pair<BasicBlock*, int>. That's of course depending
on pointer ordering which varies from run to run. Reverse iteration
doesn't find this because we're copying to a vector first.
This bug has been there since 2016 but only recently showed up on clang
selfhost with FDO and ThinLTO, which is also why I didn't manage to get
a reasonable test case for this. Add an assert that would've caught
this.
llvm-svn: 336439
Kelvin Li [Fri, 6 Jul 2018 14:15:59 +0000 (14:15 +0000)]
Define the __STDC_FORMAT_MACROS to avoid test failure on some platforms.
ompt/misc/api_calls_from_other_thread.cpp
ompt/misc/interoperability.cpp
Differential Revision: https://reviews.llvm.org/D48984
llvm-svn: 336438
Andrea Di Biagio [Fri, 6 Jul 2018 13:46:10 +0000 (13:46 +0000)]
[llvm-mca] A write latency cannot be a negative value. NFC
llvm-svn: 336437
George Rimar [Fri, 6 Jul 2018 13:30:50 +0000 (13:30 +0000)]
[ELF] - Remove dead code #2.
'Pos' is never can be 0 here.
llvm-svn: 336436
George Rimar [Fri, 6 Jul 2018 13:23:49 +0000 (13:23 +0000)]
[ELF] - Remove dead code. NFC.
'Pos' can never be 0.
llvm-svn: 336435
Sjoerd Meijer [Fri, 6 Jul 2018 13:00:16 +0000 (13:00 +0000)]
[AArch64] Armv8.4-A: TLB support
This adds:
- outer shareable TLB Maintenance instructions, and
- TLB range maintenance instructions.
llvm-svn: 336434
Jonas Devlieghere [Fri, 6 Jul 2018 12:49:54 +0000 (12:49 +0000)]
[dsymutil] Emit label at the begin of a CU
When emitting a CU, store the MCSymbol pointing to the beginning of the
CU. We'll need this information later when emitting the .debug_names
section (DWARF5 accelerator table).
llvm-svn: 336433
Sjoerd Meijer [Fri, 6 Jul 2018 12:32:33 +0000 (12:32 +0000)]
Recommit: [AArch64] Armv8.4-A: Flag manipulation instructions
Now with the asm operand definition included.
llvm-svn: 336432
Sam McCall [Fri, 6 Jul 2018 11:50:49 +0000 (11:50 +0000)]
[clangd] Make SymbolOrigin an enum class, rather than a plain enum.
I never intended to define namespace pollution like clangd::AST, clangd::Unknown
etc. Oops!
llvm-svn: 336431
Philip Pfaffe [Fri, 6 Jul 2018 11:33:35 +0000 (11:33 +0000)]
Add a file that was missing in r336425
llvm-svn: 336430
Florian Hahn [Fri, 6 Jul 2018 10:49:59 +0000 (10:49 +0000)]
[Driver,AArch64] Add support for -mcpu=native.
This patches adds support for passing -mcpu=native for AArch64. It will
get turned into the host CPU name, before we get the target features.
CPU = native is handled in a similar fashion in
getAArch64MicroArchFetauresFromMtune and getAArch64TargetCPU already.
Having a good test case for this is hard, as it depends on the host CPU
of the machine running the test. But we can check that native has been
replaced with something else.
When cross-compiling, we will get a CPU name from the host architecture
and get ` the clang compiler does not support '-mcpu=native'` as error
message, which seems reasonable to me.
Reviewers: rengolin, peter.smith, dlj, javed.absar, t.p.northover
Reviewed By: peter.smith
Tags: #clang
Differential Revision: https://reviews.llvm.org/D48931
llvm-svn: 336429
Diogo N. Sampaio [Fri, 6 Jul 2018 10:09:04 +0000 (10:09 +0000)]
Added missing semicolon
llvm-svn: 336428
Eric Liu [Fri, 6 Jul 2018 09:43:57 +0000 (09:43 +0000)]
[SemaCodeComplete] Expose a method to create CodeCompletionString for macros.
Summary:
The method only takes PPreprocessor and don't require structures that
might not be available (e.g. Sema and ASTContext) when CodeCompletionString
needs to be generated for macros.
Reviewers: sammccall
Reviewed By: sammccall
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D48973
llvm-svn: 336427
Diogo N. Sampaio [Fri, 6 Jul 2018 09:42:25 +0000 (09:42 +0000)]
[SelectionDAG] https://reviews.llvm.org/D48278
D48278
Allow to reduce redundant shift masks.
For example:
x1 = x & 0xAB00
x2 = (x >> 8) & 0xAB
can be reduced to:
x1 = x & 0xAB00
x2 = x1 >> 8
It only allows folding when the masks and shift values are constants.
llvm-svn: 336426
Tobias Grosser [Fri, 6 Jul 2018 09:00:26 +0000 (09:00 +0000)]
Update isl to isl-0.19-224-gce84a511
This is a maintenance update. Besides many minor changes it ships two
functions "isl_*_list_size" and "isl_*_list_get_at" which will allow us
to simplify the iterator implementation in Polly.
llvm-svn: 336425
Hans Wennborg [Fri, 6 Jul 2018 08:44:08 +0000 (08:44 +0000)]
Relax filechecks in r336405 tests
They were failing in Chromium's packaging builds with:
C:\b\rr\tmphqfaff\w\src\third_party\llvm\tools\lld\test\COFF\pdb-globals-dia-vfunc-collision2.test:24:8:
error: expected string not found in input
CHECK: func [0x00001060+ 0 - 0x0000106c-12 | sizeof= 12] (FPO) virtual int __cdecl A132()
^
<stdin>:8:11: note: scanning from here
struct S [sizeof = 8] {
^
<stdin>:9:2: note: possible intended match here
func [0x00001060+ 0 - 0x0000106c-12 | sizeof= 12] (FPO) virtual int __cdecl S::A132()
^
Maybe due to different DIA versions.
llvm-svn: 336424
Hans Wennborg [Fri, 6 Jul 2018 08:44:04 +0000 (08:44 +0000)]
dos2unix
llvm-svn: 336423
Sjoerd Meijer [Fri, 6 Jul 2018 08:39:43 +0000 (08:39 +0000)]
Revert [AArch64] Armv8.4-A: Flag manipulation instructions
It's causing build errors.
llvm-svn: 336422
Sjoerd Meijer [Fri, 6 Jul 2018 08:12:20 +0000 (08:12 +0000)]
[AArch64] Armv8.4-A: Flag manipulation instructions
These instructions are added to AArch64 only.
Differential Revision: https://reviews.llvm.org/D48926
llvm-svn: 336421
Andrea Di Biagio [Fri, 6 Jul 2018 08:08:30 +0000 (08:08 +0000)]
[llvm-mca] improve the instruction issue logic implemented by the Scheduler.
This patch modifies the Scheduler heuristic used to select the next instruction
to issue to the pipelines.
The motivating example is test X86/BtVer2/add-sequence.s, for which llvm-mca
wrongly reported an estimated IPC of 1.50. According to perf, the actual IPC for
that test should have been ~2.00.
It turns out that an IPC of 2.00 for test add-sequence.s cannot possibly be
predicted by a Scheduler that only prioritizes instructions based on their
"age". A similar issue also affected test X86/BtVer2/dependent-pmuld-paddd.s,
for which llvm-mca wrongly estimated an IPC of 0.84 instead of an IPC of 1.00.
Instructions in the ReadyQueue are now ranked based on two factors:
- The "age" of an instruction.
- The number of unique users of writes associated with an instruction.
The new logic still prioritizes older instructions over younger instructions to
minimize the pressure on the reorder buffer. However, the number of users of an
instruction now also affects the overall rank. This potentially increases the
ability of the Scheduler to extract instruction level parallelism. This patch
fixes the problem with the wrong IPC reported for test add-sequence.s and test
dependent-pmuld-paddd.s.
llvm-svn: 336420
Tim Northover [Fri, 6 Jul 2018 08:04:47 +0000 (08:04 +0000)]
CallGraphSCCPass: iterate over all functions.
Previously we only iterated over functions reachable from the set of
external functions in the module. But since some of the passes under
this (notably the always-inliner and coroutine lowerer) are required for
correctness, they need to run over everything.
This just adds an extra layer of iteration over the CallGraph to keep
track of which functions we've already visited and get the next batch of
SCCs.
Should fix PR38029.
llvm-svn: 336419
Sjoerd Meijer [Fri, 6 Jul 2018 08:03:12 +0000 (08:03 +0000)]
[AArch64][ARM] Armv8.4-A: Trace synchronization barrier instruction
This adds the Armv8.4-A Trace synchronization barrier (TSB) instruction.
Differential Revision: https://reviews.llvm.org/D48918
llvm-svn: 336418
Craig Topper [Fri, 6 Jul 2018 07:14:47 +0000 (07:14 +0000)]
[X86] Implement _builtin_ia32_vfmaddss and _builtin_ia32_vfmaddsd with native IR using llvm.fma intrinsic.
This generates some extra zeroing currently, but we should be able to quickly address that with some isel patterns.
llvm-svn: 336417
Craig Topper [Fri, 6 Jul 2018 07:14:41 +0000 (07:14 +0000)]
[X86] Remove FMA4 scalar intrinsics. Use llvm.fma intrinsic instead.
The intrinsics can be implemented with a f32/f64 llvm.fma intrinsic and an insert into a zero vector.
There are a couple regressions here due to SelectionDAG not being able to pull an fneg through an extract_vector_elt. I'm not super worried about this though as InstCombine should be able to do it before we get to SelectionDAG.
llvm-svn: 336416
Hans Wennborg [Fri, 6 Jul 2018 06:54:16 +0000 (06:54 +0000)]
[ms] Fix mangling of string literals used to initialize arrays larger or smaller than the literal
A Chromium developer reported a bug which turned out to be a mangling
collision between these two literals:
char s[] = "foo";
char t[32] = "foo";
They may look the same, but for the initialization of t we will (under
some circumstances) use a literal that's extended with zeros, and
both the length and those zeros should be accounted for by the mangling.
This actually makes the mangling code simpler: where it previously had
special logic for null terminators, which are not part of the
StringLiteral, that is now covered by the general algorithm.
(The problem was reported at https://crbug.com/857442)
Differential Revision: https://reviews.llvm.org/D48928
llvm-svn: 336415
Simon Atanasyan [Fri, 6 Jul 2018 05:50:46 +0000 (05:50 +0000)]
[ELF][MIPS] Simplify `checkFlags` routine and inline `rejectMicroMips64`. NFC
llvm-svn: 336414
Simon Atanasyan [Fri, 6 Jul 2018 05:50:41 +0000 (05:50 +0000)]
[ELF][MIPS] Remove support for linking microMIPS 64-bit code
Remove support for linking microMIPS 64-bit code because this kind of
ISA is rarely used and unsupported by LLVM.
Differential revision: https://reviews.llvm.org/D48949
llvm-svn: 336413
Sam McCall [Fri, 6 Jul 2018 05:45:45 +0000 (05:45 +0000)]
[Support] Make support types more easily printable.
Summary:
Error's new operator<< is the first way to print an error without consuming it.
formatv() can now print objects with an operator<< that works with raw_ostream.
Reviewers: bkramer
Subscribers: mgorny, llvm-commits
Differential Revision: https://reviews.llvm.org/D48966
llvm-svn: 336412
Dave Lee [Fri, 6 Jul 2018 05:11:35 +0000 (05:11 +0000)]
Reapply: "objdump: Support newer ObjC image info flags"
Summary:
Add support for two additional ObjC image info flags: `IS_SIMULATED` and
`HAS_CATEGORY_CLASS_PROPERTIES`.
`IS_SIMULATED` indicates a Mach-O binary built for iOS simulator.
`HAS_CATEGORY_CLASS_PROPERTIES` indicates a Mach-O binary built by a compiler
that supports class properties in categories.
Reviewers: enderby, compnerd
Reviewed By: compnerd
Subscribers: keith, llvm-commits
Differential Revision: https://reviews.llvm.org/D48568
llvm-svn: 336411
Max Kazantsev [Fri, 6 Jul 2018 04:04:13 +0000 (04:04 +0000)]
Revert "[InstCombine] Delay foldICmpUsingKnownBits until simple transforms are done"
llvm-svn: 336410