platform/kernel/u-boot.git
3 years agobinman: Support adding sections to FMAPs
Simon Glass [Fri, 2 Apr 2021 22:05:10 +0000 (11:05 +1300)]
binman: Support adding sections to FMAPs

When used with hierarchical images, use the Chromium OS convention of
adding a section before all the subentries it contains.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agobinman: Tweak implementation of fmap
Simon Glass [Fri, 2 Apr 2021 22:05:09 +0000 (11:05 +1300)]
binman: Tweak implementation of fmap

Use an interator in two of the fmap tests so it is easier to add new
items. Also check the name first since that is the first indication
that something is wrong. Use a variable for the expected size of the
fmap to avoid repeating the code.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agopatman: Parse checkpatch by message instead of by line
Evan Benn [Thu, 1 Apr 2021 02:49:30 +0000 (13:49 +1100)]
patman: Parse checkpatch by message instead of by line

Parse each empty-line-delimited message separately. This saves having to
deal with all the different line content styles, we only care about the
header ERROR | WARNING | NOTE...

Also make checkpatch print line information for a uboot specific
warning.

Signed-off-by: Evan Benn <evanbenn@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agopatman: Assume we always have pygit2 for tests
Tom Rini [Fri, 26 Feb 2021 12:52:31 +0000 (07:52 -0500)]
patman: Assume we always have pygit2 for tests

Given that we have tests that require pygit2 and it can be installed
like any other python module, fail much more loudly if it is missing.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agotests: patman: Add requests to the module list
Tom Rini [Fri, 26 Feb 2021 12:52:30 +0000 (07:52 -0500)]
tests: patman: Add requests to the module list

The patman tests require the requests module, add it.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agoAzure/GitLab: Ensure we use requirements.txt for testsuites
Tom Rini [Fri, 26 Feb 2021 12:52:29 +0000 (07:52 -0500)]
Azure/GitLab: Ensure we use requirements.txt for testsuites

Given that test/py/requirements.txt has all required test modules, make
use of that rather than a manual pip install list before running our
assorted tool testsuites.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 years agotest: Use positive conditional in test_matches()
Andy Shevchenko [Thu, 11 Feb 2021 14:40:11 +0000 (16:40 +0200)]
test: Use positive conditional in test_matches()

It is easier to read the positive conditional.

While at it, convert hard coded length of "_test_" to strlen("_test_")
which will be converted to a constant bu optimizing compiler.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agotest: Allow simple glob pattern in the test name
Andy Shevchenko [Thu, 11 Feb 2021 14:40:10 +0000 (16:40 +0200)]
test: Allow simple glob pattern in the test name

When run `ut dm [test name]` allow to use simple pattern to run all tests
started with given prefix. For example, to run all ACPI test cases:
ut dm acpi*

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 years agodtoc: Correct dtoc output when testing
Simon Glass [Mon, 26 Apr 2021 20:19:48 +0000 (08:19 +1200)]
dtoc: Correct dtoc output when testing

At present each invocation of run_steps() updates OUTPUT_FILES_COMMON,
since it does not make a copy of the dict. This is fine for a single
invocation, but for tests, run_steps() is invoked many times.

As a result it may include unwanted items from the previous run, if it
happens that a test runs twice on the same CPU. The problem has not been
noticied previously, as there are few enough tests and enough CPUs that
is is rare for the 'wrong' combination of tests to run together.

Fix this by making a copy of the dict, before updating it. Update the
tests to suit, taking account of the files that are no-longer generated.

With this fix, we no-longer generate files which are not needed for a
particular state of OF_PLATDATA_INST, so the check_instantiate() function
is not needed anymore. It has become dead code and so fails the
code-coverage test (dtoc -T). Remove it.

Signed-off-by: Simon Glass <sjg@chromium.org>
3 years agobinman: Correct testSplNoDtb() and Tpl also
Simon Glass [Sat, 24 Apr 2021 20:39:32 +0000 (08:39 +1200)]
binman: Correct testSplNoDtb() and Tpl also

These two tests require an ELF image so that symbol information can be
written into the SPL/TPL binary. At present they rely on other tests
having set it up first, but every test must run independently. This can
cause occasional errors in CI.

Fix this by setting up the required files, as other tests do.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
3 years agoconfigs: Resync with savedefconfig
Tom Rini [Tue, 27 Apr 2021 12:28:38 +0000 (08:28 -0400)]
configs: Resync with savedefconfig

Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agoMerge branch '2021-04-27-assorted-fixes'
Tom Rini [Tue, 27 Apr 2021 12:24:10 +0000 (08:24 -0400)]
Merge branch '2021-04-27-assorted-fixes'

- An assortment of bug fixes

3 years agoreset: fix reset_get_by_index_nodev index handling
Neil Armstrong [Tue, 20 Apr 2021 08:42:26 +0000 (10:42 +0200)]
reset: fix reset_get_by_index_nodev index handling

This fixes an issue getting resets index 1 and 3+, the spurius "> 0"
made it return the index 0 or 1, whatever index was passed.

The dm_test_reset_base() did not catch it, but the dm_test_reset_base() extension
catches it and this fixes the regression.

This also fixes a reggression on Amlogic G12A/G12B SoCs, where HDMI output was disable
even when Linux was booting.

Fixes: ea9dc35aab ("reset: Get the RESET by index without device")
Reported-by: B1oHazard <ty3uk@mail.ua>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
3 years agotest: reset: Extend base reset test to catch error
Neil Armstrong [Tue, 20 Apr 2021 08:42:25 +0000 (10:42 +0200)]
test: reset: Extend base reset test to catch error

With this extended test, we get the following failure :

=> ut dm reset_base
Test: dm_test_reset_base: reset.c
test/dm/reset.c:52, dm_test_reset_base(): reset_method3.id == reset_method3_1.id: Expected 0x14 (20), got 0x2 (2)
Test: dm_test_reset_base: reset.c (flat tree)
test/dm/reset.c:52, dm_test_reset_base(): reset_method3.id == reset_method3_1.id: Expected 0x14 (20), got 0x2 (2)
Failures: 2

A fix is needed in reset_get_by_index_nodev() when introduced in [1].

[1] ea9dc35aab ("reset: Get the RESET by index without device")

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
3 years agoIOMUX: Fix buffer overflow in iomux_replace_device()
Yuichiro Goto [Sun, 25 Apr 2021 23:08:03 +0000 (08:08 +0900)]
IOMUX: Fix buffer overflow in iomux_replace_device()

Use of strcat() against an uninitialized buffer would lead
to buffer overflow. This patch fixes it.

Fixes: 694cd5618c ("IOMUX: Introduce iomux_replace_device()")
Signed-off-by: Yuichiro Goto <goto@k-tech.co.jp>
Cc: Peter Robinson <pbrobinson@gmail.com>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
3 years agopinctrl: single: fix a never true comparison
Dario Binacchi [Thu, 22 Apr 2021 20:28:56 +0000 (22:28 +0200)]
pinctrl: single: fix a never true comparison

As reported by Coverity Scan for Das U-Boot, the 'less-than-zero'
comparison of an unsigned value is never true.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
3 years agopinctrl: single: check function mask to be non-zero
Dario Binacchi [Thu, 22 Apr 2021 16:35:58 +0000 (18:35 +0200)]
pinctrl: single: check function mask to be non-zero

Otherwise it can generate a division by zero, which has an undefined
behavior.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
3 years agoMakefile: fix generation of defaultenv.h from empty initial file
Rasmus Villemoes [Thu, 22 Apr 2021 07:44:18 +0000 (09:44 +0200)]
Makefile: fix generation of defaultenv.h from empty initial file

When CONFIG_USE_DEFAULT_ENV_FILE=y and the file
CONFIG_DEFAULT_ENV_FILE is empty (or at least doesn't contain any
non-comment, non-empty lines), we end up feeding nothing into xxd,
which in turn then outputs nothing. Then blindly appending ", 0x00"
means that we end up trying to compile (roughly)

const char defaultenv[] = { , 0x00 }

which is of course broken.

To fix that, change the frobbing of the text file so that we always
end up printing an extra empty line (which gets turned into that extra
nul byte we need) - that corresponds better to the binary format
consisting of a series of key=val nul terminated strings, terminated
by an empty string.

Reported-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
3 years agofs: btrfs: fix the false alert of decompression failure
Qu Wenruo [Sat, 17 Apr 2021 12:52:13 +0000 (20:52 +0800)]
fs: btrfs: fix the false alert of decompression failure

There are some cases where decompressed sectors can have padding zeros.

In kernel code, we have lines to address such situation:

        /*
         * btrfs_getblock is doing a zero on the tail of the page too,
         * but this will cover anything missing from the decompressed
         * data.
         */
        if (bytes < destlen)
                memset(kaddr+bytes, 0, destlen-bytes);
        kunmap_local(kaddr);

But not in U-boot code, thus we have some reports of U-boot failed to
read compressed files in btrfs.

Fix it by doing the same thing of the kernel, for both inline and
regular compressed extents.

Reported-by: Matwey Kornilov <matwey.kornilov@gmail.com>
Link: https://bugzilla.suse.com/show_bug.cgi?id=1183717
Fixes: a26a6bedafcf ("fs: btrfs: Introduce btrfs_read_extent_inline() and btrfs_read_extent_reg()")
Signed-off-by: Qu Wenruo <wqu@suse.com>
3 years agoarm: zimage: Use correct symbol to hide messages in SPL
Samuel Holland [Sat, 17 Apr 2021 14:34:37 +0000 (09:34 -0500)]
arm: zimage: Use correct symbol to hide messages in SPL

When zImage support was added to SPL, the messages were hidden to reduce
code size. However, the wrong config symbol was used. Since this file is
only built when CONFIG_SPL_FRAMEWORK=y, the messages were always hidden.

Use the correct symbol so the messages are printed in U-Boot proper.
Also use IS_ENABLED to drop the #ifdef.

Fixes: 431889d6ad9a ("spl: zImage support in Falcon mode")
Signed-off-by: Samuel Holland <samuel@sholland.org>
3 years agoMerge https://source.denx.de/u-boot/custodians/u-boot-marvell
Tom Rini [Tue, 27 Apr 2021 11:32:09 +0000 (07:32 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-marvell

- WDT: Enable use of hw_margin_ms=0
- PowerPC: Introduce CONFIG_CACHE_FLUSH_WATCHDOG_THRESHOLD
- PowerPC: Misc changes and fixes to the WDT handling

3 years agopowerpc: introduce CONFIG_CACHE_FLUSH_WATCHDOG_THRESHOLD
Rasmus Villemoes [Wed, 21 Apr 2021 09:16:03 +0000 (11:16 +0200)]
powerpc: introduce CONFIG_CACHE_FLUSH_WATCHDOG_THRESHOLD

When flush_cache() is called during boot on our ~7M kernel image, the
hundreds of thousands of WATCHDOG_RESET calls end up adding
significantly to boottime. Flushing a single cache line doesn't take
many microseconds, so doing these calls for every cache line is
complete overkill.

The generic watchdog_reset() provided by wdt-uclass.c actually
contains some rate-limiting logic that should in theory mitigate this,
but alas, that rate-limiting must be disabled on powerpc because of
its get_timer() implementation - get_timer() works just fine until
interrupts are disabled, but it just so happens that the "big"
flush_cache() call happens in the part of bootm where interrupts are
indeed disabled. [1] [2] [3]

I have checked with objdump that the generated code doesn't change
when this option is left at its default value of 0: gcc is smart
enough to see that the ">=" comparison is tautologically true, hence
all assignments to "flushed" are eliminated as dead stores.

On our board, setting the option to something like 65536 ends up
reducing total boottime by about 0.8 seconds.

[1] https://patchwork.ozlabs.org/project/uboot/patch/20200605111657.28773-1-rasmus.villemoes@prevas.dk/
[2] https://lists.denx.de/pipermail/u-boot/2021-April/446906.html
[3] https://lists.denx.de/pipermail/u-boot/2021-April/447280.html

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
3 years agopowerpc: lib: remove leftover CONFIG_5xx
Rasmus Villemoes [Wed, 21 Apr 2021 09:16:02 +0000 (11:16 +0200)]
powerpc: lib: remove leftover CONFIG_5xx

CONFIG_5xx hasn't existed since commit 502589777416 (powerpc, 5xx:
remove support for 5xx). Remove this last mention of it.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
3 years agoallow opting out of WATCHDOG_RESET() from timer interrupt
Rasmus Villemoes [Wed, 14 Apr 2021 07:18:22 +0000 (09:18 +0200)]
allow opting out of WATCHDOG_RESET() from timer interrupt

Having WATCHDOG_RESET() called automatically from the timer interrupt
runs counter to the idea of a watchdog device - if the board runs into
an infinite loops with interrupts still enabled, the watchdog will
never fire.

When using CONFIG_(SPL_)WDT, the watchdog_reset function is a lot more
complicated than just poking a few SOC-specific registers - it
involves accessing all kinds of global data, and if the interrupt
happens at the wrong time (say, in the middle of an WATCHDOG_RESET()
call from ordinary code), that can end up corrupting said global data.

Allow the board to opt out of calling WATCHDOG_RESET() from the timer
interrupt handler by setting CONFIG_SYS_WATCHDOG_FREQ to 0 - as that
setting is currently nonsensical (it would be compile-time
divide-by-zero), it cannot affect any existing boards.

Add documentation for both the existing and extended meaning of
CONFIG_SYS_WATCHDOG_FREQ.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
3 years agotimer: mpc83xx_timer: fix build with CONFIG_{HW_, }WATCHDOG
Rasmus Villemoes [Wed, 14 Apr 2021 07:18:21 +0000 (09:18 +0200)]
timer: mpc83xx_timer: fix build with CONFIG_{HW_, }WATCHDOG

The code, which is likely copied from arch/powerpc/lib/interrupts.c,
lacks a fallback definition of CONFIG_SYS_WATCHDOG_FREQ and refers to
a non-existing timestamp variable - obviously priv->timestamp is
meant.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
3 years agowatchdog: use time_after_eq() in watchdog_reset()
Rasmus Villemoes [Tue, 13 Apr 2021 14:43:20 +0000 (16:43 +0200)]
watchdog: use time_after_eq() in watchdog_reset()

Some boards don't work with the rate-limiting done in the generic
watchdog_reset() provided by wdt-uclass.

For example, on powerpc, get_timer() ceases working during bootm since
interrupts are disabled before the kernel image gets decompressed, and
when the decompression takes longer than the watchdog device
allows (or enough of the budget that the kernel doesn't get far enough
to assume responsibility for petting the watchdog), the result is a
non-booting board.

As a somewhat hacky workaround (because DT is supposed to describe
hardware), allow specifying hw_margin_ms=0 in device tree to
effectively disable the ratelimiting and actually ping the watchdog
every time watchdog_reset() is called. For that to work, the "has
enough time passed" check just needs to be tweaked a little to allow
the now==next_reset case as well.

Suggested-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Stefan Roese <sr@denx.de>
3 years agoPrepare v2021.07-rc1
Tom Rini [Tue, 27 Apr 2021 00:53:51 +0000 (20:53 -0400)]
Prepare v2021.07-rc1

Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agoMerge https://source.denx.de/u-boot/custodians/u-boot-sh
Tom Rini [Mon, 26 Apr 2021 15:04:24 +0000 (11:04 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-sh

- RCar3 improvements

3 years agoMerge https://source.denx.de/u-boot/custodians/u-boot-sunxi
Tom Rini [Mon, 26 Apr 2021 11:44:09 +0000 (07:44 -0400)]
Merge https://source.denx.de/u-boot/custodians/u-boot-sunxi

This fixes the broken H5 Ethernet and updates the R40 and A64 DT files,
so nothing really critical.

3 years agosunxi: DT: A64: Update devicetree files from Linux 5.12
Andre Przywara [Sat, 17 Apr 2021 21:55:19 +0000 (22:55 +0100)]
sunxi: DT: A64: Update devicetree files from Linux 5.12

Import updated devicetree files from the Linux v5.12 release.

Besides some node and audio port renames this changes the PHY modes to
either rgmii-id or rgmii-txid. From the board files the Pinephone sees
a lot of updates.

This also adds the long missing USB PHY property for controller 0, which
allows the U-Boot PHY driver to eventually use port 0 in host mode
(pending another U-Boot patch).

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
3 years agosunxi: DT: R40: Update device tree files from Linux 5.12
Ivan Uvarov [Mon, 19 Apr 2021 09:30:57 +0000 (12:30 +0300)]
sunxi: DT: R40: Update device tree files from Linux 5.12

Update R40 .dts{,i} and dt-binding headers to current version from kernel.

Files taken from Linux 5.12-rc1 release
(commit fe07bfda2fb9cdef8a4d4008a409bb02f35f1bd8)

Signed-off-by: Ivan Uvarov <i.uvarov@cognitivepilot.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
3 years agonet: sun8i-emac: Fix pinmux setup for Allwinner H5
Andre Przywara [Thu, 15 Apr 2021 23:53:17 +0000 (00:53 +0100)]
net: sun8i-emac: Fix pinmux setup for Allwinner H5

Commit eb5a2b671075 ("net: sun8i-emac: Determine pinmux based on SoC,
not EMAC type") switched the pinmux setup over to look at
CONFIG_MACH_SUN* symbols, to find the appropriate mux value.
Unfortunately this patch missed to check for the H5, which is
pin-compatible to the H3, but uses a different Kconfig symbol (because
it has ARMv8 vs. ARMv7 cores).

Replace the pure SUN8I_H3 symbol with the joint SUNXI_H3_H5 one, which is
there to cover the peripherals common to both SoCs.
Also explicitly list each supported SoC, and have an error message in the
fallback case, to avoid those problems in the future.

This fixes Ethernet support on all H5 boards.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Samuel Holland <samuel@sholland.org> # Orange Pi PC2
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
3 years agoARM: rmobile: Enable NVMe support on RCar3
Marek Vasut [Fri, 15 Jan 2021 23:33:02 +0000 (00:33 +0100)]
ARM: rmobile: Enable NVMe support on RCar3

Enable support for PCIe NVMe devices.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
3 years agoARM: rmobile: Enable CONFIG_SYS_FLASH_PROTECTION
Marek Vasut [Sat, 3 Apr 2021 23:10:15 +0000 (01:10 +0200)]
ARM: rmobile: Enable CONFIG_SYS_FLASH_PROTECTION

Enable CONFIG_SYS_FLASH_PROTECTION on Salvator-X(S), ULCB, Ebisu,
which means the Spansion HF PPB protection bits can be operated
using the 'protect' U-Boot command.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
3 years agoclk: renesas: Synchronize Gen2 MSTP teardown tables
Marek Vasut [Sat, 6 Jun 2020 13:26:14 +0000 (15:26 +0200)]
clk: renesas: Synchronize Gen2 MSTP teardown tables

Synchronize Gen2 MSTP teardown tables with datasheet Rev.2.00
Feb 01, 2016. This corrects the following bits:
  - added H2 MSTP3[10] SCIF2
  - added H2/M2/E2 MSTP7[29] TCON
  - removed E2 MSTP5[22] Thermal Sensor
  - removed E2 MSTP10[31,24:22] SRC0, SRC7:9

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
3 years agoclk: renesas: Only ever access documented bits in clock driver teardown
Marek Vasut [Sat, 25 Apr 2020 12:57:45 +0000 (14:57 +0200)]
clk: renesas: Only ever access documented bits in clock driver teardown

The clock driver used a heavy-handed approach where it turned off
all available clocks, while also possibly setting bits which are not
documented in the R-Car datasheet. Update the tables so that only
the bits which are documented are set or cleared when tearing down
the clock driver.

Note that the only clock left running before booting Linux are now
MFIC, INTC-AP, INTC-EX and SCIF2 / SCIF0 on V3x.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
3 years agoMerge tag 'mips-pull-2021-04-24' of https://source.denx.de/u-boot/custodians/u-boot...
Tom Rini [Sat, 24 Apr 2021 23:39:14 +0000 (19:39 -0400)]
Merge tag 'mips-pull-2021-04-24' of https://source.denx.de/u-boot/custodians/u-boot-mips

- MIPS: octeon: fix minor bugs of initial merge
- MIPS: octeon: add support for QLM and PCI-E controller
- MIPS: octeon: add support for AHCI and SATA
- MIPS: octeon: add E1000 ethernet support
- MIPS: octeon: add Octeon III NIC23 board
- ata/scsi: add support for Big Endian platforms

3 years agotest/py: Bump py to 1.10.0 for CVE-2020-29651
Tom Rini [Wed, 21 Apr 2021 14:22:01 +0000 (10:22 -0400)]
test/py: Bump py to 1.10.0 for CVE-2020-29651

Bump our py version to 1.10.0 to address CVE-2020-29651.

Reported-by: GitHub dependabot
Reported-by: Ley Foon Tan <ley.foon.tan@intel.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
3 years agoMerge tag 'video-2021-07-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot...
Tom Rini [Sat, 24 Apr 2021 17:30:57 +0000 (13:30 -0400)]
Merge tag 'video-2021-07-rc1-2' of https://source.denx.de/u-boot/custodians/u-boot-video

 - search for additional detailed timings in the EDID extension block
 - rework sunxi DE2 driver and accompanying DW-HDMI platform driver
   to drop redundant device specific code, and later use the DT as a
   source of information

3 years agoMerge tag 'efi-2021-07-rc1-3' of https://source.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Sat, 24 Apr 2021 13:27:49 +0000 (09:27 -0400)]
Merge tag 'efi-2021-07-rc1-3' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request for efi-2021-07-rc1-3

Documentation fixes

UEFI bug fixes:

* error handling for capsule updates

3 years agovideo: sunxi: de2: switch to public uclass functions
Jernej Skrabec [Thu, 22 Apr 2021 00:14:34 +0000 (01:14 +0100)]
video: sunxi: de2: switch to public uclass functions

Currently DE2 driver uses functions which are defined in internal
headers. They are not meant to be used outside of uclass framework.
Switch DE2 driver to public ones. This has additional benefit that
device_probe doesn't need to be called manually.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
3 years agovideo: sunxi: dw-hdmi: read source_id later
Jernej Skrabec [Thu, 22 Apr 2021 00:14:33 +0000 (01:14 +0100)]
video: sunxi: dw-hdmi: read source_id later

There is no real need to read source_id at probe time. It also doesn't
make sense to store it in driver private data since it's already stored
in class platform data. While this looks like cleanup (and it is), it's
also important for DE2 driver rework because this info will be filled
later (after probe is already executed).

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
3 years agovideo: sunxi: Remove TV probe from DE2
Jernej Skrabec [Thu, 22 Apr 2021 00:14:32 +0000 (01:14 +0100)]
video: sunxi: Remove TV probe from DE2

TV driver was never fully implemented. Remove search for it from DE2
driver.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
3 years agovideo: sunxi: Remove check for ddc-i2c-bus property
Jernej Skrabec [Thu, 22 Apr 2021 00:14:31 +0000 (01:14 +0100)]
video: sunxi: Remove check for ddc-i2c-bus property

No Allwinner board with DW-HDMI controller use separate I2C bus for
EDID read. Remove that check.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
3 years agovideo: sunxi: Use DW-HDMI hpd function
Jernej Skrabec [Thu, 22 Apr 2021 00:14:30 +0000 (01:14 +0100)]
video: sunxi: Use DW-HDMI hpd function

It turns out that there are two ways how hot plug detection can be done.
One is standard way for DW HDMI controller - checking bit 2 in 0x3004
register. Another way is applicable only to Allwinner custom PHY - by
checking bit 19 in register 0x10038. Both methods are equally good as
far as we know.

Use standard method in order to reduce amount of custom code.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
3 years agocommon: edid: Search for valid timing in extension block
Jernej Skrabec [Thu, 22 Apr 2021 00:14:29 +0000 (01:14 +0100)]
common: edid: Search for valid timing in extension block

One of my monitors have only 4k@60 timing in base EDID block which is
out of range for devices with HDMI 1.4. It turns out that it has
additional detailed timings in CTA-861 Extension Block and two of them
are appropriate for HDMI 1.4.

Add additional search for valid detailed timing in extension block.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
3 years agocommon: edid: extract code for detailed timing search
Jernej Skrabec [Thu, 22 Apr 2021 00:14:28 +0000 (01:14 +0100)]
common: edid: extract code for detailed timing search

Code which searches for valid detailed timing entry will be used in more
places. Extract it.

No functional change is made. However, descriptors are casted to
edid_detailed_timing instead of edid_monitor_descriptor. Descriptor can
be of either type, but since we're interested only in DTD, it is more
fitting to cast to edid_detailed_timing.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
3 years agocommon: edid: check for digital display earlier
Jernej Skrabec [Thu, 22 Apr 2021 00:14:27 +0000 (01:14 +0100)]
common: edid: check for digital display earlier

When searching for detailed timing in EDID, check for digital display
earlier. There is no point parsing other parameters if this flag is not
present.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
3 years agovideo: sunxi: Add mode_valid callback to sunxi_dw_hdmi
Jernej Skrabec [Thu, 22 Apr 2021 00:14:26 +0000 (01:14 +0100)]
video: sunxi: Add mode_valid callback to sunxi_dw_hdmi

Currently driver accepts all resolution which won't work on 4k screens.
Add validation callback which limits acceptable resolutions to 297 MHz.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
3 years agotest/py: Fix efidebug related tests
Ilias Apalodimas [Fri, 23 Apr 2021 13:24:13 +0000 (16:24 +0300)]
test/py: Fix efidebug related tests

commit cbea241e935e("efidebug: add multiple device path instances on Boot####")
slightly tweaked the efidebug syntax adding -b, -i and -s for the boot
image, initrd and optional data.
The pytests using this command were adapted as well. However I completely
missed the last "" argument, which at the time indicated the optional data
and needed conversion as well.  This patch is adding the missing -s flag
and the tests are back to normal.

Fixes: cbea241e935e("efidebug: add multiple device path instances on Boot####")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviwed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agoefi_loader: capsule: return a correct error code at find_boot_device()
AKASHI Takahiro [Tue, 20 Apr 2021 01:03:16 +0000 (10:03 +0900)]
efi_loader: capsule: return a correct error code at find_boot_device()

In case of failure at efi_get_variable_int("BootOrder"), we should
skip examining boot option variables and return an appropriate error
code which is the one the function returned.

Fixes: CID 331153 Code maintainability issues  (UNUSED_VALUE)
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agoefi: Fix ESRT refresh after Capsule update
Jose Marinho [Mon, 19 Apr 2021 13:54:33 +0000 (14:54 +0100)]
efi: Fix ESRT refresh after Capsule update

Indicated by Coverity Scan CID 331147

The ESRT was being refreshed in situations where the UpdateCapsule
procedure failed. In that scenario:

1) the ESRT refresh was superfluous.
2) a failed ESRT refresh return code overwrites the UpdateCapsule error
return code.

This commit ensures that the ESRT is only refreshed when the
UpdateCapsule performs successfully.

CC: Heinrich Schuchardt <xypron.glpk@gmx.de>
CC: Sughosh Ganu <sughosh.ganu@linaro.org>
CC: AKASHI Takahiro <takahiro.akashi@linaro.org>
CC: Tom Rini <trini@konsulko.com>
CC: Andre Przywara <andre.przywara@arm.com>
CC: nd@arm.com
Signed-off-by: Jose Marinho <jose.marinho@arm.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agoefi_loader: simplify tcg2_create_digest()
Ilias Apalodimas [Thu, 22 Apr 2021 11:32:14 +0000 (14:32 +0300)]
efi_loader: simplify tcg2_create_digest()

Bumping the digest list count, for all supported algorithms,  can be
calculated outside of the individual switch statements.  So let's do that
for every loop iteration instead and simplify the code a bit.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agoefi_loader: missing include in efi_string.c
Heinrich Schuchardt [Wed, 21 Apr 2021 10:39:15 +0000 (12:39 +0200)]
efi_loader: missing include in efi_string.c

To avoid diverging function definitions we need to include efi_loader.h.

Fixes: fe179d7fb5c1 ("efi_loader: Add size checks to efi_create_indexed_name()")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agodoc: imx: psb: Fix missing setexpr arguments
Marek Vasut [Sun, 11 Apr 2021 16:30:36 +0000 (18:30 +0200)]
doc: imx: psb: Fix missing setexpr arguments

Due to copy-paste error, two of the setexpr arguments were missing.
Add the missing arguments.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agodoc: fatinfo man-page
Heinrich Schuchardt [Mon, 19 Apr 2021 19:54:45 +0000 (21:54 +0200)]
doc: fatinfo man-page

Provide a man-page for the fatinfo command.

The .rst file was lost in patch 15d9694600fe ("doc: fatinfo man-page").

Fixes: 15d9694600fe ("doc: fatinfo man-page")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
3 years agomips: octeon: ebb7304: Add support for some I2C devices
Aaron Williams [Wed, 7 Apr 2021 07:12:40 +0000 (09:12 +0200)]
mips: octeon: ebb7304: Add support for some I2C devices

This patch adds support for the following I2C devices connected to
I2C bus 0 on the Octeon EBB7304:
- Dallas DS1337 RTC
- TLV EEPROM

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
3 years agomips: octeon: dts/dtsi: Change UART DT node to use clocks property
Aaron Williams [Wed, 7 Apr 2021 07:12:39 +0000 (09:12 +0200)]
mips: octeon: dts/dtsi: Change UART DT node to use clocks property

We already have a clock driver for MIPS Octeon. This patch changes the
Octeon DT nodes to supply the clock property via the clock driver
instead of using an hard-coded value, which is not correct in all cases.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
3 years agomips: octeon: Add Octeon III NIC23 board support
Stefan Roese [Wed, 7 Apr 2021 07:12:38 +0000 (09:12 +0200)]
mips: octeon: Add Octeon III NIC23 board support

This patch adds the basic support for the PCIe target board equipped
with the Octeon III CN2350 SoC.

Signed-off-by: Stefan Roese <sr@denx.de>
3 years agomips: octeon: mrvl, cn73xx.dtsi: Add AHCI/SATA DT node
Stefan Roese [Wed, 7 Apr 2021 07:12:37 +0000 (09:12 +0200)]
mips: octeon: mrvl, cn73xx.dtsi: Add AHCI/SATA DT node

Add the AHCI compatible SATA DT node to the Octeon CN73xx dtsi file.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
3 years agoscsi: Add ata_swap_buf_le16() to support big-endian platforms
Stefan Roese [Wed, 7 Apr 2021 07:12:36 +0000 (09:12 +0200)]
scsi: Add ata_swap_buf_le16() to support big-endian platforms

Otherwise the output will look like this on MIPS Octeon NIC23:

  Device 0: (0:0) Vendor: ATA Prod.: aSDnsi klUrt aII Rev: 4X11
            Type: Hard Disk
            Capacity: 457862.8 MB = 447.1 GB (937703088 x 512)

instead of this version:

  Device 0: (0:0) Vendor: TA Prod.: SanDisk Ultra II Rev: X411
            Type: Hard Disk
            Capacity: 457862.8 MB = 447.1 GB (937703088 x 512)

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
3 years agoata: ahci: Fix usage on big-endian platforms
Stefan Roese [Wed, 7 Apr 2021 07:12:35 +0000 (09:12 +0200)]
ata: ahci: Fix usage on big-endian platforms

This patch adds a few missing virt_to_phys() to use the correct physical
address for DMA operations in the common AHCI code. This is done to
support the big-endian MIPS Octeon platform.

Additionally the code a cleaned up a bit (remove some empty lines) and
made a bit better readable.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
3 years agosata: ahci_mvebu.c: Enable AHCI/SATA driver for MIPS Octeon
Stefan Roese [Wed, 7 Apr 2021 07:12:34 +0000 (09:12 +0200)]
sata: ahci_mvebu.c: Enable AHCI/SATA driver for MIPS Octeon

This patch enables the usage of the MVEBU AHCI/SATA driver. The only
changes necessary to support MIPS Octeon via DT based probing are, to
add the compatible DT property and the use of dev_remap_addr() so that
the correct mapped address is used in the Octeon case (phys != virt).

Please note that this driver supports the usage of the "scsi" command
and not the "sata" command, since it does not provide an own "scan"
function, which is needed for the "sata" cmd support.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
3 years agomips: octeon: cpu.c: Enable AHCI/SATA support
Stefan Roese [Wed, 7 Apr 2021 07:12:33 +0000 (09:12 +0200)]
mips: octeon: cpu.c: Enable AHCI/SATA support

For easy AHCI/ SATA integration, this patch adds board_ahci_enable()
for the MVEBU AHCI driver, which will be used by this platform. This
platform specific "enable" function will setup the proper endian
swapping in the AHCI controller so that it can be used by the common
AHCI code.

Additionally the endian swizzle entry for AHCI in
octeon_should_swizzle_table[] is removed, as this enabled the original
lowlevel code function, e.g. octeon_configure_qlm(), for the QLM setup
to work correctly.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
3 years agomips: octeon: cpu.c: Add arch_misc_init() for pci-console & pci-bootcmd
Stefan Roese [Wed, 7 Apr 2021 07:12:32 +0000 (09:12 +0200)]
mips: octeon: cpu.c: Add arch_misc_init() for pci-console & pci-bootcmd

This patch adds the necessary platform infrastructure code, so that the
MIPS Octeon drivers "serial_octeon_pcie_console" & "serial_bootcmd" can
be used. This is e.g. the bootmem initialization in a compatible way to
the Marvell 2013 U-Boot, so that the exisiting PC remote tools like
"oct-remote-console" & "oct-remote-load" can be used. This is be done in
the newly introduced arch_misc_init(), which calls the necessary init
functions when enabled.

These patches are in preparation for the MIPS Octeon NIC23 board
support, which is a desktop PCIe target board enabling these features.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
3 years agoserial: serial_octeon_bootcmd.c: Add PCI remote console support
Stefan Roese [Wed, 7 Apr 2021 07:12:31 +0000 (09:12 +0200)]
serial: serial_octeon_bootcmd.c: Add PCI remote console support

This patch adds the PCI bootcmd feature for MIPS Octeon, which will be
used by the upcoming Octeon III NIC23 board support. It enables the use
of the "oct-remote-load" and "oct-remote-bootcmd" on host PC's to
communicate with the PCIe target and load images into the onboard
memory and issue commands.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
3 years agoserial: serial_octeon_pcie_console.c: Add PCI remote console support
Stefan Roese [Wed, 7 Apr 2021 07:12:30 +0000 (09:12 +0200)]
serial: serial_octeon_pcie_console.c: Add PCI remote console support

This patch adds the PCI remote console feature for MIPS Octeon, which
will be used by the upcoming Octeon III NIC23 board support. It enables
the use of the "oct-remote-console" tool on host PC's to communicate
with the PCIe target.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
3 years agomips: octeon: cvmx-coremask.h: Fix cvmx_coremask_dprint() with DEBUG defined
Stefan Roese [Wed, 7 Apr 2021 07:12:29 +0000 (09:12 +0200)]
mips: octeon: cvmx-coremask.h: Fix cvmx_coremask_dprint() with DEBUG defined

As DEBUG is no Kconfig symbol, we can't use the IS_ENABLED() macros.
This patch switches to the unfortunately necessary #ifdef usage again
to make it work correctly.

Signed-off-by: Stefan Roese <sr@denx.de>
3 years agomips: octeon: cvmx-bootmem: Fix compare in "if" statement
Stefan Roese [Wed, 7 Apr 2021 07:12:28 +0000 (09:12 +0200)]
mips: octeon: cvmx-bootmem: Fix compare in "if" statement

While porting from the Marvell source, I introduced a bug by misplacing
the parenthesis. This patch fixes this issue.

Signed-off-by: Stefan Roese <sr@denx.de>
3 years agomips: octeon: Move CVMX_SYNC from octeon_ddr.h to cvmx-regs.h
Stefan Roese [Wed, 7 Apr 2021 07:12:27 +0000 (09:12 +0200)]
mips: octeon: Move CVMX_SYNC from octeon_ddr.h to cvmx-regs.h

This makes is easier to use this macro from non-DDR related files.

Signed-off-by: Stefan Roese <sr@denx.de>
3 years agomips: octeon: octeon_ebb7304_defconfig: Enable Octeon PCIe and E1000
Stefan Roese [Fri, 11 Dec 2020 16:06:12 +0000 (17:06 +0100)]
mips: octeon: octeon_ebb7304_defconfig: Enable Octeon PCIe and E1000

This patch changes the MIPS Octeon defconfig to enable some features
for PCIe enablement. This includes CONFIG_BOARD_LATE_INIT to call the
board specific serdes init code.

With these features enabled, the serdes and PCIe driver including the
Intel E1000 driver can be tested on the Octeon EBB7304.

Signed-off-by: Stefan Roese <sr@denx.de>
3 years agomips: octeon: Add Octeon PCIe host controller driver
Stefan Roese [Wed, 7 Apr 2021 06:43:35 +0000 (08:43 +0200)]
mips: octeon: Add Octeon PCIe host controller driver

This patch adds the PCIe host controller driver for MIPS Octeon II/III.
The driver mainly consist of the PCI config functions, as all of the
complex serdes related port / lane setup, is done in the serdes / pcie
code available in the "arch/mips/mach-octeon" directory.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
3 years agomips: octeon: octeon_ebb7304: Add board specific QLM init code
Aaron Williams [Fri, 11 Dec 2020 16:06:10 +0000 (17:06 +0100)]
mips: octeon: octeon_ebb7304: Add board specific QLM init code

This patch adds the board specific QLM/DLM init code to the Octeon 3
EBB7304 board. The configuration of each port is read from the
environment exactly as done in the 2013 U-Boot version to keep the
board and it's configuration compatible.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
3 years agomips: octeon: mrvl, cn73xx.dtsi: Add PCIe controller DT node
Stefan Roese [Fri, 11 Dec 2020 16:06:09 +0000 (17:06 +0100)]
mips: octeon: mrvl, cn73xx.dtsi: Add PCIe controller DT node

This patch adds the PCIe controller node to the MIPS Octeon 73xx dtsi
file.

Signed-off-by: Stefan Roese <sr@denx.de>
3 years agomips: octeon: Kconfig: Enable CONFIG_SYS_PCI_64BIT
Stefan Roese [Fri, 11 Dec 2020 16:06:08 +0000 (17:06 +0100)]
mips: octeon: Kconfig: Enable CONFIG_SYS_PCI_64BIT

Setting CONFIG_SYS_PCI_64BIT is needed for correct PCIe functionality on
MIPS Octeon.

Signed-off-by: Stefan Roese <sr@denx.de>
3 years agomips: octeon: Makefile: Enable building of the newly added C files
Stefan Roese [Fri, 11 Dec 2020 16:06:07 +0000 (17:06 +0100)]
mips: octeon: Makefile: Enable building of the newly added C files

This patch adds the newly added C files to the Makefile to enable
compilation. This is done in a separate step, to not introduce build
breakage while adding the single files with potentially missing
externals.

Signed-off-by: Stefan Roese <sr@denx.de>
3 years agomips: octeon: Add octeon_qlm.c
Aaron Williams [Fri, 11 Dec 2020 16:06:06 +0000 (17:06 +0100)]
mips: octeon: Add octeon_qlm.c

Import octeon_qlm.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
3 years agomips: octeon: Add octeon_fdt.c
Aaron Williams [Fri, 11 Dec 2020 16:06:05 +0000 (17:06 +0100)]
mips: octeon: Add octeon_fdt.c

Import octeon_fdt.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
3 years agomips: octeon: Add cvmx-qlm.c
Aaron Williams [Fri, 11 Dec 2020 16:06:04 +0000 (17:06 +0100)]
mips: octeon: Add cvmx-qlm.c

Import cvmx-qlm.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
3 years agomips: octeon: Add cvmx-pcie.c
Aaron Williams [Fri, 11 Dec 2020 16:06:03 +0000 (17:06 +0100)]
mips: octeon: Add cvmx-pcie.c

Import cvmx-pcie.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
3 years agomips: octeon: Add cvmx-helper.c
Aaron Williams [Fri, 11 Dec 2020 16:06:02 +0000 (17:06 +0100)]
mips: octeon: Add cvmx-helper.c

Import cvmx-helper.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
3 years agomips: octeon: Add cvmx-helper-util.c
Aaron Williams [Fri, 11 Dec 2020 16:06:01 +0000 (17:06 +0100)]
mips: octeon: Add cvmx-helper-util.c

Import cvmx-helper-util.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
3 years agomips: octeon: Add cvmx-helper-jtag.c
Aaron Williams [Fri, 11 Dec 2020 16:06:00 +0000 (17:06 +0100)]
mips: octeon: Add cvmx-helper-jtag.c

Import cvmx-helper-jtag.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
3 years agomips: octeon: Add cvmx-helper-fdt.c
Aaron Williams [Fri, 11 Dec 2020 16:05:59 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-helper-fdt.c

Import cvmx-helper-fdt.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
3 years agomips: octeon: Add cvmx-helper-cfg.c
Aaron Williams [Fri, 11 Dec 2020 16:05:58 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-helper-cfg.c

Import cvmx-helper-cfg.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
3 years agomips: octeon: Move cvmx-lmcx-defs.h from mach/cvmx to mach
Stefan Roese [Fri, 11 Dec 2020 16:05:57 +0000 (17:05 +0100)]
mips: octeon: Move cvmx-lmcx-defs.h from mach/cvmx to mach

To match all other cvmx-* header, this patch moves the already existing
cvmx-lmcx-defs.h header one directory up.

Signed-off-by: Stefan Roese <sr@denx.de>
3 years agomips: octeon: Misc changes required because of the newly added headers
Stefan Roese [Fri, 11 Dec 2020 16:05:56 +0000 (17:05 +0100)]
mips: octeon: Misc changes required because of the newly added headers

With the newly added headers and their restructuring (which macro is
defined where), some changes in the already existing Octeon files are
necessary. This patch makes the necessary changes.

Signed-off-by: Stefan Roese <sr@denx.de>
3 years agomips: octeon: Add misc remaining header files
Aaron Williams [Fri, 23 Apr 2021 17:56:32 +0000 (19:56 +0200)]
mips: octeon: Add misc remaining header files

Import misc remaining header files from 2013 U-Boot. These will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
3 years agomips: octeon: Add cvmx-sso-defs.h header file
Aaron Williams [Fri, 11 Dec 2020 16:05:54 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-sso-defs.h header file

Import cvmx-sso-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
3 years agomips: octeon: Add cvmx-sriox-defs.h header file
Aaron Williams [Fri, 11 Dec 2020 16:05:53 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-sriox-defs.h header file

Import cvmx-sriox-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
3 years agomips: octeon: Add cvmx-sriomaintx-defs.h header file
Aaron Williams [Fri, 11 Dec 2020 16:05:52 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-sriomaintx-defs.h header file

Import cvmx-sriomaintx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
3 years agomips: octeon: Add cvmx-smix-defs.h header file
Aaron Williams [Fri, 11 Dec 2020 16:05:51 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-smix-defs.h header file

Import cvmx-smix-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
3 years agomips: octeon: Add cvmx-sli-defs.h header file
Aaron Williams [Fri, 11 Dec 2020 16:05:50 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-sli-defs.h header file

Import cvmx-sli-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
3 years agomips: octeon: Add cvmx-sata-defs.h header file
Aaron Williams [Fri, 11 Dec 2020 16:05:49 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-sata-defs.h header file

Import cvmx-sata-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
3 years agomips: octeon: Add cvmx-rst-defs.h header file
Aaron Williams [Fri, 11 Dec 2020 16:05:48 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-rst-defs.h header file

Import cvmx-rst-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
3 years agomips: octeon: Add cvmx-pow-defs.h header file
Aaron Williams [Fri, 11 Dec 2020 16:05:47 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-pow-defs.h header file

Import cvmx-pow-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
3 years agomips: octeon: Add cvmx-pko-defs.h header file
Aaron Williams [Fri, 11 Dec 2020 16:05:46 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-pko-defs.h header file

Import cvmx-pko-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
3 years agomips: octeon: Add cvmx-pki-defs.h header file
Aaron Williams [Fri, 11 Dec 2020 16:05:45 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-pki-defs.h header file

Import cvmx-pki-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
3 years agomips: octeon: Add cvmx-pip-defs.h header file
Aaron Williams [Fri, 11 Dec 2020 16:05:44 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-pip-defs.h header file

Import cvmx-pip-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
3 years agomips: octeon: Add cvmx-pepx-defs.h header file
Aaron Williams [Fri, 11 Dec 2020 16:05:43 +0000 (17:05 +0100)]
mips: octeon: Add cvmx-pepx-defs.h header file

Import cvmx-pepx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>