Reid Kleckner [Tue, 2 Aug 2016 01:02:46 +0000 (01:02 +0000)]
[winasan] Try to fix LNK4099 warnings seen by users
/Zi creates a separate PDB that we're supposed to pass along with our
sanitizer libraries, but the object library compilation rules aren't set
up to handle that. Rather than set that up, put the debug info in the
object files the way every other platform does it with /Z7.
llvm-svn: 277406
Hans Wennborg [Mon, 1 Aug 2016 23:34:42 +0000 (23:34 +0000)]
Revert r276896 "Update Clang Parser test error message to match new parser errors"
This depended on r276895, which was reverted in r277402.
llvm-svn: 277405
JF Bastien [Mon, 1 Aug 2016 23:34:29 +0000 (23:34 +0000)]
NFC: fix typo
llvm-svn: 277404
Xinliang David Li [Mon, 1 Aug 2016 23:20:30 +0000 (23:20 +0000)]
improve test cases to fix bot failure
llvm-svn: 277403
Hans Wennborg [Mon, 1 Aug 2016 23:00:01 +0000 (23:00 +0000)]
Revert r276895 "[MC][X86] Fix Intel Operand assembly parsing for .set ids"
This caused PR28805. Adding a regression test.
llvm-svn: 277402
Chris Bieneman [Mon, 1 Aug 2016 22:54:00 +0000 (22:54 +0000)]
[Order Files] Fixing an error in the perf-helper script
Dtrace probemod needs to be based on the first argument of the command, not the first argument of the args. This error was introduced a while back when I added support for skipping the driver and invoking cc1 directly.
llvm-svn: 277401
Tim Shen [Mon, 1 Aug 2016 22:32:20 +0000 (22:32 +0000)]
[ADT] NFC: Generalize GraphTraits requirement of "NodeType *" in interfaces to "NodeRef", and migrate SCCIterator.h to use NodeRef
Summary: By generalize the interface, users are able to inject more flexible Node token into the algorithm, for example, a pair of vector<Node>* and index integer. Currently I only migrated SCCIterator to use NodeRef, but more is coming. It's a NFC.
Reviewers: dblaikie, chandlerc
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D22937
llvm-svn: 277399
Derek Schuff [Mon, 1 Aug 2016 22:25:02 +0000 (22:25 +0000)]
[WebAssembly] Support CFI for WebAssembly target
Summary: This patch implements CFI for WebAssembly. It modifies the
LowerTypeTest pass to pre-assign table indexes to functions that are
called indirectly, and lowers type checks to test against the
appropriate table indexes. It also modifies the WebAssembly backend to
support a special ".indidx" assembly directive that propagates the table
index assignments out to the linker.
Patch by Dominic Chen
Differential Revision: https://reviews.llvm.org/D21768
llvm-svn: 277398
Lang Hames [Mon, 1 Aug 2016 22:23:24 +0000 (22:23 +0000)]
[Orc] Fix common symbol support in ORC.
Common symbol support in ORC was broken in r270716 when the symbol resolution
rules in RuntimeDyld were changed. With the switch to lazily materialized
symbols in r277386, common symbols can be supported by having
RuntimeDyld::emitCommonSymbols search for (but not materialize!) definitions
elsewhere in the logical dylib.
This patch adds the 'Common' flag to JITSymbolFlags, and the necessary check
to RuntimeDyld::emitCommonSymbols.
llvm-svn: 277397
Paul Robinson [Mon, 1 Aug 2016 22:12:46 +0000 (22:12 +0000)]
Add FIXMEs for MSVC 2013 hacks in r277211. NFC.
llvm-svn: 277396
Evgeniy Stepanov [Mon, 1 Aug 2016 21:58:34 +0000 (21:58 +0000)]
[asan] Disable android-coverage test on anything other than arm.
llvm-svn: 277395
David Blaikie [Mon, 1 Aug 2016 21:50:43 +0000 (21:50 +0000)]
Simplify some code found when it was moved in r277177
llvm-svn: 277394
Michael Kuperstein [Mon, 1 Aug 2016 21:48:33 +0000 (21:48 +0000)]
[PM] Port SpeculativeExecution to the new PM
Differential Revision: https://reviews.llvm.org/D23033
llvm-svn: 277393
Derek Schuff [Mon, 1 Aug 2016 21:34:04 +0000 (21:34 +0000)]
[WebAssembly] Add asm.js-style exception handling support
Summary: This patch includes asm.js-style exception handling support for
WebAssembly. The WebAssembly MVP does not have any support for
unwinding or non-local control flow. In order to support C++ exceptions,
emscripten currently uses JavaScript exceptions along with some support
code (written in JavaScript) that is bundled by emscripten with the
generated code.
This scheme lowers exception-related instructions for wasm such that
wasm modules can be compatible with emscripten's existing scheme and
share the support code.
Patch by Heejin Ahn
Differential Revision: https://reviews.llvm.org/D22958
llvm-svn: 277391
Saleem Abdulrasool [Mon, 1 Aug 2016 21:31:24 +0000 (21:31 +0000)]
CodeGen: simplify the CC handling for TLS wrappers
Use the calling convention of the wrapper directly to set the calling convention
to ensure that the calling convention matches. Incorrectly setting the calling
convention results in the code path being entirely nullified as InstCombine +
SimplifyCFG will prune the mismatched CC calls.
llvm-svn: 277390
Sumanth Gundapaneni [Mon, 1 Aug 2016 21:28:03 +0000 (21:28 +0000)]
Build llvm with ccache if package is present
This patch has the following changes
The CMake variable LLVM_CCACHE_BUILD is set to OFF by default.
Set this to ON for a ccache enabled build
CCACHE_CPP2 is required to compile the source file directly instead
of compiling the preprocessed file. This will help WERROR is turned ON
for a host clang compiler
The below two options makes more sense in the context of a buildbot
CCACHE_HASHDIR is required to maintain the separate cached data across
builders. This will also help the debuggers to point to the correct source
location
CCACHE_SIZE is important in the perspective of buildbot to increase the
limit on the amount of data to hold in cache for faster compilation
CCACHE_DIR is used to save the cached data to a specific directory.
llvm-svn: 277389
Zachary Turner [Mon, 1 Aug 2016 21:19:45 +0000 (21:19 +0000)]
[msf] Teach LLVM to parse a split Fpm.
The FPM is split at regular intervals across the MSF file, as the MS code
suggests. It turns out that the value of the interval is precisely the
block size. If the block size is 4096, then there are two Fpm pages every
4096 blocks.
So here we teach the PDBFile class to parse a split FPM, and also add more
options when dumping the FPM to display some additional information such
as orphaned pages (pages which the FPM says are allocated, but which
nothing appears to use), use after free pages (pages which the FPM says
are not allocated, but which are referenced by a stream), and multiple use
pages (pages which the FPM says are allocated but are used more than
once).
Reviewed By: ruiu
Differential Revision: https://reviews.llvm.org/D23022
llvm-svn: 277388
Xinliang David Li [Mon, 1 Aug 2016 21:06:54 +0000 (21:06 +0000)]
Make test more robust with better matching
llvm-svn: 277387
Lang Hames [Mon, 1 Aug 2016 20:49:11 +0000 (20:49 +0000)]
[ExecutionEngine][MCJIT][Orc] Replace RuntimeDyld::SymbolInfo with JITSymbol.
This patch replaces RuntimeDyld::SymbolInfo with JITSymbol: A symbol class
that is capable of lazy materialization (i.e. the symbol definition needn't be
emitted until the address is requested). This can be used to support common
and weak symbols in the JIT (though this is not implemented in this patch).
For consistency, RuntimeDyld::SymbolResolver is renamed to JITSymbolResolver.
For space efficiency a new class, JITEvaluatedSymbol, is introduced that
behaves like the old RuntimeDyld::SymbolInfo - i.e. it is just a pair of an
address and symbol flags. Instances of JITEvaluatedSymbol can be used in
symbol-tables to avoid paying the space cost of the materializer.
llvm-svn: 277386
Krzysztof Parzyszek [Mon, 1 Aug 2016 20:31:50 +0000 (20:31 +0000)]
[Hexagon] Tidy up some code, NFC: reapply r277372 with a fix
llvm-svn: 277383
Xinliang David Li [Mon, 1 Aug 2016 20:28:26 +0000 (20:28 +0000)]
[Profile] Add new test case to cover comdat renaming
Test checks that context specific profiles for comdat functions
are not lost.
llvm-svn: 277381
JF Bastien [Mon, 1 Aug 2016 20:28:13 +0000 (20:28 +0000)]
atomics.align: XFAIL GCC
It currently fails because GCC changed the mangling of templates, which affects std::atomic using __attribute__((vector(X))). The bot using GCC 4.9 generates the following message:
In file included from /home/llvm-builder/llvm-buildslave-root/libcxx-libcxxabi-x86_64-linux-ubuntu-gcc49-cxx11/llvm/projects/libcxx/test/libcxx/atomics/atomics.align/align.pass.sh.cpp:24:0:
/home/llvm-builder/llvm-buildslave-root/libcxx-libcxxabi-x86_64-linux-ubuntu-gcc49-cxx11/llvm/projects/libcxx/include/atomic: In instantiation of 'atomic_test<T>::atomic_test() [with T = __vector(2) int]':
/home/llvm-builder/llvm-buildslave-root/libcxx-libcxxabi-x86_64-linux-ubuntu-gcc49-cxx11/llvm/projects/libcxx/test/libcxx/atomics/atomics.align/align.pass.sh.cpp:66:3: required from here
/home/llvm-builder/llvm-buildslave-root/libcxx-libcxxabi-x86_64-linux-ubuntu-gcc49-cxx11/llvm/projects/libcxx/include/atomic:583:5: error: 'std::__1::__gcc_atomic::__gcc_atomic_t<_Tp>::__gcc_atomic_t() [with _Tp = __vector(2) int]' conflicts with a previous declaration
__gcc_atomic_t() _NOEXCEPT = default;
^
/home/llvm-builder/llvm-buildslave-root/libcxx-libcxxabi-x86_64-linux-ubuntu-gcc49-cxx11/llvm/projects/libcxx/include/atomic:583:5: note: previous declaration 'std::__1::__gcc_atomic::__gcc_atomic_t<_Tp>::__gcc_atomic_t() [with _Tp = __vector(1) int]'
/home/llvm-builder/llvm-buildslave-root/libcxx-libcxxabi-x86_64-linux-ubuntu-gcc49-cxx11/llvm/projects/libcxx/include/atomic:583:5: note: -fabi-version=6 (or =0) avoids this error with a change in mangling
/home/llvm-builder/llvm-buildslave-root/libcxx-libcxxabi-x86_64-linux-ubuntu-gcc49-cxx11/llvm/projects/libcxx/include/atomic:583:5: error: 'std::__1::__gcc_atomic::__gcc_atomic_t<_Tp>::__gcc_atomic_t() [with _Tp = __vector(2) int]' conflicts with a previous declaration
/home/llvm-builder/llvm-buildslave-root/libcxx-libcxxabi-x86_64-linux-ubuntu-gcc49-cxx11/llvm/projects/libcxx/include/atomic:583:5: note: previous declaration 'std::__1::__gcc_atomic::__gcc_atomic_t<_Tp>::__gcc_atomic_t() [with _Tp = __vector(1) int]'
/home/llvm-builder/llvm-buildslave-root/libcxx-libcxxabi-x86_64-linux-ubuntu-gcc49-cxx11/llvm/projects/libcxx/include/atomic:583:5: note: -fabi-version=6 (or =0) avoids this error with a change in mangling
/home/llvm-builder/llvm-buildslave-root/libcxx-libcxxabi-x86_64-linux-ubuntu-gcc49-cxx11/llvm/projects/libcxx/include/atomic:939:5: note: synthesized method 'std::__1::__gcc_atomic::__gcc_atomic_t<_Tp>::__gcc_atomic_t() [with _Tp = __vector(2) int]' first required here
__atomic_base() _NOEXCEPT = default;
^
GCC's docs say the following about ABI version 6:
Version 6, which first appeared in G++ 4.7, corrects the promotion behavior of C++11 scoped enums and the mangling of template argument packs, const/static_cast, prefix ++ and –, and a class scope function used as a template argument.
llvm-svn: 277380
Xinliang David Li [Mon, 1 Aug 2016 20:25:06 +0000 (20:25 +0000)]
[Profile] IR profiling minor cleanup /nfc
Differential Revision: http://reviews.llvm.org/D22995
llvm-svn: 277379
Erik Pilkington [Mon, 1 Aug 2016 20:19:49 +0000 (20:19 +0000)]
[ObjC Availability] Fix partial-availability false positive introduced in r277058
Thanks to Nico Weber for pointing this out!
Differential revision: https://reviews.llvm.org/D23024
llvm-svn: 277378
Chris Bieneman [Mon, 1 Aug 2016 20:18:18 +0000 (20:18 +0000)]
[CMake] Don't trust compiler error code, also check for errors
Summary: rnk reported that MSVC ignores unknown flags and still returns 0. This should cause unknown flags to be an error during the compiler check.
Reviewers: rnk
Subscribers: brad.king, llvm-commits
Differential Revision: https://reviews.llvm.org/D23030
llvm-svn: 277377
Matthew Simpson [Mon, 1 Aug 2016 20:11:25 +0000 (20:11 +0000)]
[LV] Move isGatherOrScatterLegal into LoopVectorizationLegality (NFC)
llvm-svn: 277376
Matthew Simpson [Mon, 1 Aug 2016 20:08:09 +0000 (20:08 +0000)]
[LV] Use getPointerOperand helper where appropriate (NFC)
llvm-svn: 277375
Krzysztof Parzyszek [Mon, 1 Aug 2016 20:00:33 +0000 (20:00 +0000)]
Revert r277372, it is causing buildbot failures
llvm-svn: 277374
Ben Craig [Mon, 1 Aug 2016 19:56:39 +0000 (19:56 +0000)]
Adding smart_ptr benchmark
Initial draft here:
https://reviews.llvm.org/D22470
... though this is Eric Fiselier's rewrite to fit in with Google
Benchmark.
llvm-svn: 277373
Krzysztof Parzyszek [Mon, 1 Aug 2016 19:46:21 +0000 (19:46 +0000)]
[Hexagon] Tidy up some code, NFC
llvm-svn: 277372
Michael Kuperstein [Mon, 1 Aug 2016 19:39:49 +0000 (19:39 +0000)]
[DAGCombine] Make sext(setcc) combine respect getBooleanContents
We used to combine "sext(setcc x, y, cc) -> (select (setcc x, y, cc), -1, 0)"
Instead, we should combine to (select (setcc x, y, cc), T, 0) where the value
of T is 1 or -1, depending on the type of the setcc, and getBooleanContents()
for the type if it is not i1.
This fixes PR28504.
llvm-svn: 277371
Ron Lieberman [Mon, 1 Aug 2016 19:36:39 +0000 (19:36 +0000)]
[Hexagon] Generate vector printing instructions
llvm-svn: 277370
Davide Italiano [Mon, 1 Aug 2016 19:28:13 +0000 (19:28 +0000)]
[ELF/ARM] Add support for R_ARM_TARGET1 relocation.
Differential Revision: https://reviews.llvm.org/D22990
llvm-svn: 277369
JF Bastien [Mon, 1 Aug 2016 19:27:08 +0000 (19:27 +0000)]
libc++: test lock-free atomic alignment
Summary:
libc++ implements std::atomic<_Tp> using __atomic_base<_Tp> with
`mutable _Atomic(_Tp) __a_`. That member must be suitably aligned on
relevant ISAs for instructions such as cmpxchg to work properly, but
this alignment isn't checked anywhere. __atomic_base's implementation
relies on _Atomic doing "the right thing" since it's under the
compiler's control, and only the compiler knows about lock-freedom and
instruction generation. This test makes sure that the compiler isn't
breaking libc++'s expectations.
I'm looking at a few odd things in the C++ standard, and will have a few
other fixes around this area in the future.
This requires building with `-DLIBCXX_HAS_ATOMIC_LIB=True`, the test
marks the dependency as REQUIRES and won't be run without.
Reviewers: cfe-commits
Subscribers: EricWF, mclow.lists
Differential Revision: http://reviews.llvm.org/D22073
llvm-svn: 277368
Reid Kleckner [Mon, 1 Aug 2016 18:56:13 +0000 (18:56 +0000)]
[codeview] Skip injected class names in nested record emission
We were already trying to do this, but our check wasn't quite right.
Fixes PR28790
llvm-svn: 277367
George Burgess IV [Mon, 1 Aug 2016 18:47:28 +0000 (18:47 +0000)]
[CFLAA] Remove modref queries from CFLAA.
As it turns out, modref queries are broken with CFLAA. Specifically,
the data source we were using for determining modref behaviors
explicitly ignores operations on non-pointer values. So, it wouldn't
note e.g. storing an i32 to an i32* (or loading an i64 from an i64*).
It also ignores external function calls, rather than acting
conservatively for them.
(N.B. These operations, where necessary, *are* tracked by CFLAA; we just
use a different mechanism to do so. Said mechanism is relatively
imprecise, so it's unlikely that we can provide reasonably good modref
answers with it as implemented.)
Patch by Jia Chen.
Differential Revision: https://reviews.llvm.org/D22978
llvm-svn: 277366
Evandro Menezes [Mon, 1 Aug 2016 18:39:55 +0000 (18:39 +0000)]
[AArch64] Add support for Samsung Exynos M2 (NFC).
llvm-svn: 277365
Evandro Menezes [Mon, 1 Aug 2016 18:39:45 +0000 (18:39 +0000)]
[AArch64] Add support for Samsung Exynos M2 (NFC).
llvm-svn: 277364
Reid Kleckner [Mon, 1 Aug 2016 18:39:27 +0000 (18:39 +0000)]
Use 'unsigned long' to match the APIs of the MS bitscan intrinsics
We were getting warnings about how 'uint32_t*' is different from
'unsigned long*' even though they are effectively the same on Windows.
llvm-svn: 277363
George Burgess IV [Mon, 1 Aug 2016 18:27:33 +0000 (18:27 +0000)]
[CFLAA] Make CFLAnders more conservative with new Values.
Currently, CFLAnders assumes that values it hasn't seen don't alias
anything. This patch fixes that. Given that the only way for this to
happen is to query AA, rely on specific transformations happening, then
query AA again (looking for a specific set of queries), lit testing is a
bit difficult. If someone really wants a test, I'm happy to add one.
Patch by Jia Chen.
Differential Revision: https://reviews.llvm.org/D22981
llvm-svn: 277362
David Majnemer [Mon, 1 Aug 2016 18:07:19 +0000 (18:07 +0000)]
Included test for r277360.
llvm-svn: 277361
David Majnemer [Mon, 1 Aug 2016 18:06:34 +0000 (18:06 +0000)]
[Verifier] Resume instructions can only be in functions w/ a personality
This fixes PR28799.
llvm-svn: 277360
Vedant Kumar [Mon, 1 Aug 2016 18:02:56 +0000 (18:02 +0000)]
[asan] Remove unused #include (NFC)
llvm-svn: 277359
Krzysztof Parzyszek [Mon, 1 Aug 2016 17:55:48 +0000 (17:55 +0000)]
Replace MachineInstr* with MachineInstr& in TargetInstrInfo, NFC
There were a few cases introduced with the modulo scheduler.
llvm-svn: 277358
Ben Craig [Mon, 1 Aug 2016 17:51:26 +0000 (17:51 +0000)]
Improve shared_ptr dtor performance
If the last destruction is uncontended, skip the atomic store on
__shared_weak_owners_. This shifts some costs from normal
shared_ptr usage to weak_ptr uses.
https://reviews.llvm.org/D22470
llvm-svn: 277357
Kirill Bobyrev [Mon, 1 Aug 2016 17:15:57 +0000 (17:15 +0000)]
[clang-rename] handle overridden functions correctly
1. Renaming overridden functions only works for two levels of "overriding
hierarchy". clang-rename should recursively add overridden methods.
2. Make use of forEachOverridden AST Matcher.
3. Fix two tests.
Reviewers: alexfh
Differential Revision: https://reviews.llvm.org/D23009
llvm-svn: 277356
Krzysztof Parzyszek [Mon, 1 Aug 2016 17:15:30 +0000 (17:15 +0000)]
[Hexagon] Check for offset overflow when reserving scavenging slots
Scavenging slots were only reserved when pseudo-instruction expansion in
frame lowering created new virtual registers. It is possible to still
need a scavenging slot even if no virtual registers were created, in cases
where the stack is large enough to overflow instruction offsets.
llvm-svn: 277355
Kirill Bobyrev [Mon, 1 Aug 2016 16:48:33 +0000 (16:48 +0000)]
[clang-rename] revert r276836
Revert r276836, which resulted in tests passing regardless of the actual tool
replacements.
llvm-svn: 277354
David Majnemer [Mon, 1 Aug 2016 16:39:29 +0000 (16:39 +0000)]
[Parse] Let declarations follow labels in -fms-extensions mode
MSVC permits declarations in these places as conforming extension (it is
a constraint violation otherwise).
This fixes PR28782.
llvm-svn: 277352
Vedant Kumar [Mon, 1 Aug 2016 16:37:42 +0000 (16:37 +0000)]
[lldb] Delete dead, infinitely-recursive code (NFC)
Differential Revision: https://reviews.llvm.org/D22985
llvm-svn: 277351
Vedant Kumar [Mon, 1 Aug 2016 16:37:37 +0000 (16:37 +0000)]
[lldb][tsan] Perform one map lookup instead of two (NFC)
Differential Revision: https://reviews.llvm.org/D22983
llvm-svn: 277350
Nirav Dave [Mon, 1 Aug 2016 15:36:10 +0000 (15:36 +0000)]
Add removed inline-assembly-comment test from r277146
llvm-svn: 277349
Daniel Sanders [Mon, 1 Aug 2016 15:32:51 +0000 (15:32 +0000)]
[mips][fastisel] Correct argument lowering for (f64, f64, i32) and similar.
Summary:
Allocating an AFGR64 shadows two GPR32's instead of just one.
This fixes an LNT regression detected by our internal buildbots.
Reviewers: sdardis
Subscribers: dsanders, sdardis, llvm-commits
Differential Revision: https://reviews.llvm.org/D23012
llvm-svn: 277348
Vedant Kumar [Mon, 1 Aug 2016 15:15:49 +0000 (15:15 +0000)]
[lldb][tsan] Avoid a string copy (NFC)
Differential Revision: https://reviews.llvm.org/D22984
llvm-svn: 277347
Vedant Kumar [Mon, 1 Aug 2016 15:15:46 +0000 (15:15 +0000)]
[lldb] Ignore various test artifacts (NFCI)
Differential Revision: https://reviews.llvm.org/D22988
llvm-svn: 277346
Etienne Bergeron [Mon, 1 Aug 2016 15:08:12 +0000 (15:08 +0000)]
[compiler-rt] Fix various typos in asan dll [NFC]
llvm-svn: 277345
Valery Pykhtin [Mon, 1 Aug 2016 14:21:30 +0000 (14:21 +0000)]
[AMDGPU] refactor DS instruction definitions. NFC.
Differential revision: https://reviews.llvm.org/D22522
llvm-svn: 277344
Nitesh Jain [Mon, 1 Aug 2016 13:45:51 +0000 (13:45 +0000)]
[LLVM][MIPS] Fix FPU Size Based on Dynamic FR.
Reviewers: jingham, clayborg
Subscribers: jaydeep, bhushan, mohit.bhakkad, slthakur, lldb-commits, emaste, nemanjai, labath, sdardis
Differential Revision: https://reviews.llvm.org/D20357
llvm-svn: 277343
Martin Bohme [Mon, 1 Aug 2016 12:15:46 +0000 (12:15 +0000)]
Make RecursiveASTVisitor visit lambda capture initialization expressions
Summary:
Lambda capture initializations are part of the explicit source code and
therefore should be visited by default but, so far, RecursiveASTVisitor does not
visit them.
This appears to be an oversight. Because the lambda body needs custom handling
(calling TraverseLambdaBody()), the DEF_TRAVERSE_STMT for LambdaExpr sets
ShouldVisitChildren to false but then neglects to visit the lambda capture
initializations. This patch adds code to visit the expressions associated with
lambda capture initializations.
Reviewers: klimek
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D22566
llvm-svn: 277342
Simon Pilgrim [Mon, 1 Aug 2016 12:11:43 +0000 (12:11 +0000)]
[X86] Use implicit masking of SHLD/SHRD shift double instructions
Similar to the regular shift instructions, SHLD/SHRD only use the bottom bits of the shift value
llvm-svn: 277341
Kirill Bobyrev [Mon, 1 Aug 2016 12:06:18 +0000 (12:06 +0000)]
[clang-tidy] remove trailing whitespaces and retab
llvm-svn: 277340
Martin Bohme [Mon, 1 Aug 2016 11:29:17 +0000 (11:29 +0000)]
[clang-tidy] Prepare modernize-loop-convert for upcoming changes in D22566
Summary:
D22566 will change RecursiveASTVisitor so that it descends into the initialization expressions for lambda captures.
modernize-loop-convert needs to be prepared for this so that it does not interpret these initialization expressions as invalid uses of the loop variable. The change has no ill effects without D22566 in place, i.e. the change does not depend on D22566.
Reviewers: klimek
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D22903
llvm-svn: 277339
Artem Dergachev [Mon, 1 Aug 2016 10:55:59 +0000 (10:55 +0000)]
[analyzer] Fix execution permissions for the scan-build-py scripts.
Differential Revision: https://reviews.llvm.org/D22969
llvm-svn: 277338
Simon Pilgrim [Mon, 1 Aug 2016 10:40:15 +0000 (10:40 +0000)]
Fixed test check ordering issue on windows buildbots
llvm-svn: 277337
Eric Liu [Mon, 1 Aug 2016 10:16:39 +0000 (10:16 +0000)]
Changes related to new implementation of tooling::Replacements as class.
Summary: See http://reviews.llvm.org/D21748 for details.
Reviewers: djasper, klimek
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D21749
llvm-svn: 277336
Eric Liu [Mon, 1 Aug 2016 10:16:37 +0000 (10:16 +0000)]
Implement tooling::Replacements as a class.
Summary:
- Implement clang::tooling::Replacements as a class to provide interfaces to
control how replacements for a single file are combined and provide guarantee
on the order of replacements being applied.
- tooling::Replacements only contains replacements for the same file now.
Use std::map<std::string, tooling::Replacements> to represent multi-file
replacements.
- Error handling for the interface change will be improved in followup patches.
Reviewers: djasper, klimek
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D21748
llvm-svn: 277335
Yaron Keren [Mon, 1 Aug 2016 10:14:54 +0000 (10:14 +0000)]
Allow .exe extension to ld to fix test with mingw.
llvm-svn: 277334
Simon Pilgrim [Mon, 1 Aug 2016 09:40:38 +0000 (09:40 +0000)]
Fixed MSVC out of range shift warning
llvm-svn: 277333
James Molloy [Mon, 1 Aug 2016 09:34:48 +0000 (09:34 +0000)]
[SimplifyCFG] Fix nasty RAUW bug from r277325
Using RAUW was wrong here; if we have a switch transform such as:
18 -> 6 then
6 -> 0
If we use RAUW, while performing the second transform the *transformed* 6
from the first will be also replaced, so we end up with:
18 -> 0
6 -> 0
Found by clang stage2 bootstrap; testcase added.
llvm-svn: 277332
Diana Picus [Mon, 1 Aug 2016 08:38:49 +0000 (08:38 +0000)]
[AArch64] Return the correct size for TLSDESC_CALLSEQ
The branch relaxation pass is computing the wrong offsets because it assumes
TLSDESC_CALLSEQ eats up 4 bytes, when in fact it is lowered to an instruction
sequence taking up 16 bytes. This can become a problem in huge files with lots
of TLS accesses, as it may slowly move branch targets out of the range computed
by the branch relaxation pass.
Fixes PR24234 https://llvm.org/bugs/show_bug.cgi?id=24234
Differential Revision: https://reviews.llvm.org/D22870
llvm-svn: 277331
Craig Topper [Mon, 1 Aug 2016 08:15:30 +0000 (08:15 +0000)]
[AVX-512] Fix a test missed in r277327.
llvm-svn: 277330
James Molloy [Mon, 1 Aug 2016 08:09:55 +0000 (08:09 +0000)]
[SimplifyCFG] Try and pacify buildbots after r277325
It looks like the two independent parts of the rotate operation (a lshr and shl) are being reordered on some bots. Add CHECK-DAGs to account for this.
llvm-svn: 277329
Sylvestre Ledru [Mon, 1 Aug 2016 08:04:45 +0000 (08:04 +0000)]
scan-build: Add an option to show the description in the list of defect
Summary:
This patch adds an option //--show-description// to add the defect description to the list of defect. This helps to get a better understanding of the defect without opening the page.
For example, this is used for Firefox:
https://people.mozilla.org/~sledru/reports/fx-scan-build/
Reviewers: rizsotto.mailinglist, zaks.anna
Subscribers: cfe-commits
Differential Revision: https://reviews.llvm.org/D22810
llvm-svn: 277328
Craig Topper [Mon, 1 Aug 2016 07:55:33 +0000 (07:55 +0000)]
[AVX-512] Fix duplicate column in AVX512 execution dependency table that was preventing VMOVDQU32/VMOVDQA32 from being recognized. Fix a bug in the code that stops execution dependency fix from turning operations on 32-bit integer element types into operations on 64-bit integer element types.
llvm-svn: 277327
Craig Topper [Mon, 1 Aug 2016 07:55:24 +0000 (07:55 +0000)]
[X86] Regenerate a test to pick up shuffle comments that were added at some point.
llvm-svn: 277326
James Molloy [Mon, 1 Aug 2016 07:45:11 +0000 (07:45 +0000)]
[SimplifyCFG] Range reduce switches
If a switch is sparse and all the cases (once sorted) are in arithmetic progression, we can extract the common factor out of the switch and create a dense switch. For example:
switch (i) {
case 5: ...
case 9: ...
case 13: ...
case 17: ...
}
can become:
if ( (i - 5) % 4 ) goto default;
switch ((i - 5) / 4) {
case 0: ...
case 1: ...
case 2: ...
case 3: ...
}
or even better:
switch ( ROTR(i - 5, 2) {
case 0: ...
case 1: ...
case 2: ...
case 3: ...
}
The division and remainder operations could be costly so we only do this if the factor is a power of two, and emit a right-rotate instead of a divide/remainder sequence. Dense switches can be lowered significantly better than sparse switches and can even be transformed into lookup tables.
llvm-svn: 277325
Maxim Ostapenko [Mon, 1 Aug 2016 07:24:36 +0000 (07:24 +0000)]
[asan] Reduce flakiness of heavy recovery mode tests.
When we run halt_on_error-torture.cc with 10 threads and 20 iterations with halt_on_error=false:suppress_equal_pcs=false, we write 200 reports to 10.txt file and sometimes have collisions.
We have CHECK-COLLISION check that greps 'AddressSanitizer: nested bug in the same thread, aborting' message in 10.txt, but it doesn't contain this line.
If I don't redirect stderr > 10.txt 'AddressSanitizer: nested bug in the same thread, aborting' is printed to my screen as expected.
Same happens for halt_on_error_suppress_equal_pcs.cc and halt_on_error-torture.cc. This happens because of kernel bug: https://lkml.org/lkml/2014/2/17/324
Furtunately, we can fix these tests by implicitly setting O_APPEND for opened files (use >> instead of > for stderr redirection).
Differential Revision: https://reviews.llvm.org/D22921
llvm-svn: 277324
Hrvoje Varga [Mon, 1 Aug 2016 06:46:20 +0000 (06:46 +0000)]
[mips] Clang generates unaligned offset for MSA instruction st.d
Differential Revision: https://reviews.llvm.org/D19475
llvm-svn: 277323
Diana Picus [Mon, 1 Aug 2016 05:56:57 +0000 (05:56 +0000)]
[AArch64] Register passes so they can be run by llc
Initialize all AArch64-specific passes in the TargetMachine so they can be run
by llc. This can lead to conflicts in opt with some command line options that
share the same name as the pass, so I took this opportunity to do some cleanups:
* rename all relevant command line options from "aarch64-blah" to
"aarch64-enable-blah" and update the tests accordingly
* run clang-format on their declarations
* move all these declarations to a common place (the TargetMachine) as opposed
to having them scattered around (AArch64BranchRelaxation and
AArch64AddressTypePromotion were the only offenders)
llvm-svn: 277322
Craig Topper [Mon, 1 Aug 2016 05:31:50 +0000 (05:31 +0000)]
[AVX-512] Teach X86InstrInfo::getLargestLegalSuperClass to inflate to FR32X/FR64X if AVX512 is supported and VR128X/VR256X if VLX is supported.
Had to update a stack folding test to clobber the other 16 registers since this now made them get used instead of spilling.
llvm-svn: 277321
Craig Topper [Mon, 1 Aug 2016 04:29:16 +0000 (04:29 +0000)]
[AVX512] Replace scalar fp arithmetic intrinsics with native IR in an AVX512 test. The intrinsics aren't lowered to AVX512 instructions.
The intrinsics really should be removed and autoupgraded.
llvm-svn: 277320
Craig Topper [Mon, 1 Aug 2016 04:29:13 +0000 (04:29 +0000)]
[AVX-512] Use FR32X/FR64X/VR128X/VR256X register classes in addRegisterClass if AVX512(for FR32X/FR64) or VLX(for VR128X/VR256) is supported. This is a minimal requirement to be able to allocate all 32 registers.
llvm-svn: 277319
Craig Topper [Mon, 1 Aug 2016 04:29:11 +0000 (04:29 +0000)]
[X86] Move mask register handling into the main switch of getLoadStoreRegOpcode. No functional change intended.
llvm-svn: 277318
Sean Silva [Mon, 1 Aug 2016 04:16:09 +0000 (04:16 +0000)]
Revert r277313 and r277314.
They seem to trigger an LSan failure:
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/15140/steps/check-llvm%20asan/logs/stdio
Revert "Add the tests for r277313"
This reverts commit r277314.
Revert "CodeExtractor : Add ability to preserve profile data."
This reverts commit r277313.
llvm-svn: 277317
Sean Silva [Mon, 1 Aug 2016 03:22:05 +0000 (03:22 +0000)]
Move this test to x86-specific directory.
No bots have yelled yet, but this test references an x86 intrinsic.
Also, it invokes llc on x86 IR.
Fixup to r277315.
llvm-svn: 277316
Sean Silva [Mon, 1 Aug 2016 03:15:32 +0000 (03:15 +0000)]
Fix - CodeExtractor : Inherit Target Dependent Attributes from the parent function.
When extracting a set of blocks make sure to inherit all of the target
dependent attributes to make sure that the function will be valid for
lowering. One example is the "target-features" attribute for x86, if the
extracted region has functionality that relies on a specific feature it
will fail to be lowered.
This also allows for extracted functions to be valid for inlining, at
least back into the parent function, as the target attributes are tested
when inlining for compatibility.
Patch by River Riddle!
Differential Revision: https://reviews.llvm.org/D22713
llvm-svn: 277315
Sean Silva [Mon, 1 Aug 2016 03:04:34 +0000 (03:04 +0000)]
Add the tests for r277313
Forgot to `git add` them.
llvm-svn: 277314
Sean Silva [Mon, 1 Aug 2016 02:59:26 +0000 (02:59 +0000)]
CodeExtractor : Add ability to preserve profile data.
Added ability to estimate the entry count of the extracted function and
the branch probabilities of the exit branches.
Patch by River Riddle!
Differential Revision: https://reviews.llvm.org/D22744
llvm-svn: 277313
Xinliang David Li [Mon, 1 Aug 2016 01:54:40 +0000 (01:54 +0000)]
Fix a bug in lit var def: remove extra space
llvm-svn: 277312
Simon Pilgrim [Sun, 31 Jul 2016 21:59:23 +0000 (21:59 +0000)]
[X86][SSE] Regenerate frem tests
llvm-svn: 277311
Simon Pilgrim [Sun, 31 Jul 2016 21:55:33 +0000 (21:55 +0000)]
[X86][SSE] Regenerate fpext tests
llvm-svn: 277310
Daniel Berlin [Sun, 31 Jul 2016 21:08:20 +0000 (21:08 +0000)]
Fix the MemorySSA updating API to enable people to create memory accesses before removing old ones
llvm-svn: 277309
Daniel Berlin [Sun, 31 Jul 2016 21:08:10 +0000 (21:08 +0000)]
Comment fixes to MemorySSA.h
llvm-svn: 277308
Dimitry Andric [Sun, 31 Jul 2016 20:23:23 +0000 (20:23 +0000)]
Add more gcc compatibility names to clang's cpuid.h
Summary:
Some cpuid bit defines are named slightly different from how gcc's
cpuid.h calls them.
Define a few more compatibility names to appease software built for gcc:
* `bit_PCLMUL` alias of `bit_PCLMULQDQ`
* `bit_SSE4_1` alias of `bit_SSE41`
* `bit_SSE4_2` alias of `bit_SSE42`
* `bit_AES` alias of `bit_AESNI`
* `bit_CMPXCHG8B` alias of `bit_CX8`
While here, add the misssing 29th bit, `bit_F16C` (which is how gcc
calls this bit).
Reviewers: joerg, rsmith
Subscribers: bruno, cfe-commits
Differential Revision: https://reviews.llvm.org/D22010
llvm-svn: 277307
Craig Topper [Sun, 31 Jul 2016 20:20:08 +0000 (20:20 +0000)]
[X86] Simplify code for determing GR or FR reg classes by querying for super classes instead of manually listing individual classes.
llvm-svn: 277306
Craig Topper [Sun, 31 Jul 2016 20:20:05 +0000 (20:20 +0000)]
[AVX512] Always use EVEX encodings for 128/256-bit move instructions in getLoadStoreRegOpcode if VLX is supported.
llvm-svn: 277305
Craig Topper [Sun, 31 Jul 2016 20:20:01 +0000 (20:20 +0000)]
[AVX512] Add VLX packed move instructions to the execution dependency fix pass and update tests.
llvm-svn: 277304
Craig Topper [Sun, 31 Jul 2016 20:19:55 +0000 (20:19 +0000)]
[AVX512] Move FR32X/FR64X handling in getLoadStoreRegOpcode into the main switch. No functional change intended.
llvm-svn: 277303
Craig Topper [Sun, 31 Jul 2016 20:19:53 +0000 (20:19 +0000)]
[AVX512] Stop treating VR512 specially in getLoadStoreRegOpcode and use the regular switch which already tried to handle it, but was unreachable. This has the added benefit of enabling aligned loads/stores if the stack is aligned.
llvm-svn: 277302
Craig Topper [Sun, 31 Jul 2016 20:19:50 +0000 (20:19 +0000)]
[AVX512] Add X86::VR512RegClassID to X86RegisterInfo::getLargestLegalSuperClass.
llvm-svn: 277301