Joe Hershberger [Fri, 30 Mar 2018 16:52:16 +0000 (11:52 -0500)]
net: phy: Don't limit phy addresses by default
Some boards expect to find more than one phy while other boards are old
and need to be limited to a specific phy address. Only limit the phy
address for boards that opt in.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Joe Hershberger [Fri, 13 Apr 2018 20:26:40 +0000 (15:26 -0500)]
xilinx: Only enable dist boot pxe when DHCP is enabled
Otherwise, we see this:
In file included from include/configs/zynq-common.h:183:0,
from include/config.h:5,
from include/common.h:21,
from env/common.c:11:
include/config_distro_bootcmd.h:319:2: error: expected ?}? before ?BOOT_TARGET_DEVICES_references_PXE_without_CONFIG_CMD_DHCP_or_PXE?
BOOT_TARGET_DEVICES_references_PXE_without_CONFIG_CMD_DHCP_or_PXE
^
include/config_distro_bootcmd.h:319:2: note: in definition of macro ?BOOTENV_DEV_NAME_PXE?
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Joe Hershberger [Fri, 13 Apr 2018 20:26:39 +0000 (15:26 -0500)]
Revert "Kconfig: cmd: Make networking command dependent on NET"
This reverts the parts of commit
3b3ea2c56ec4bc5588281fd103c744e608f8b25c
where it changed the EFI dependency on NET.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Duncan Hare <dh@synoia.com>
Joe Hershberger [Fri, 13 Apr 2018 20:26:38 +0000 (15:26 -0500)]
net: Make core net code depend on NET instead of CMD_NET
No commands are necessary to have a network stack.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Duncan Hare <dh@synoia.com>
Joe Hershberger [Fri, 13 Apr 2018 20:26:37 +0000 (15:26 -0500)]
net: Make the BOOTP options default
The BOOTP options used to be and should still be default for all boards
with CMD_NET enabled. One should not be forced to use DISTRO_DEFAULTS to
get them.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Duncan Hare <dh@synoia.com>
Joe Hershberger [Fri, 13 Apr 2018 20:26:36 +0000 (15:26 -0500)]
net: Improve BOOTP PXE config option
Improve the documentation and correct the listed dependencies.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Duncan Hare <dh@synoia.com>
Joe Hershberger [Fri, 13 Apr 2018 20:26:35 +0000 (15:26 -0500)]
net: Add the BOOTP_DNS2 option to Kconfig
Commit
3b3ea2c56ec4bc5 ("Kconfig: cmd: Make networking command dependent on NET")
removed the help documentation from the README but didn't add it back to Kconfig.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Duncan Hare <dh@synoia.com>
Joe Hershberger [Fri, 13 Apr 2018 20:26:34 +0000 (15:26 -0500)]
net: Improve menu options and help for BOOTP options
The options were pretty unhelpful, so improve them some.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Joe Hershberger [Fri, 13 Apr 2018 20:26:33 +0000 (15:26 -0500)]
net: Move the DHCP command below the BOOTP command
Move DHCP to directly follow BOOTP so that Kconfig can show the
dependency as a hierarchy.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Duncan Hare <dh@synoia.com>
Joe Hershberger [Fri, 13 Apr 2018 20:26:32 +0000 (15:26 -0500)]
net: Move net command options to the cmd menu
Options that controlled the tftp and bootp commands depended on their
commands, but lived in the net menu.
Move them so they are in a consistent location.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Joe Hershberger [Fri, 13 Apr 2018 20:26:31 +0000 (15:26 -0500)]
net: Fix distro default dependencies
PING requires CMD_NET, not NET.
Also, CMD_NET already depends on NET, so no need to directly depend
on it.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Joe Hershberger [Fri, 13 Apr 2018 20:26:30 +0000 (15:26 -0500)]
net: Make CMD_NET a menuconfig
Previously, CMD_NET was an alias for 2 commands (bootp and tftpboot) and
they we not able to be disabled. Separate out those 2 commands and move
CMD_NET up to the menu level, which more accurately represents the code.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Duncan Hare <dh@synoia.com>
Marek Vasut [Thu, 12 Apr 2018 19:54:37 +0000 (21:54 +0200)]
net: sh_eth: Add remaining Gen2 DT compatible
Add compatible strings for R8A7790, R8A7793 and R8A7794, since the
contemporary DTs use those don't have a generic match value.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Siva Durga Prasad Paladugu [Thu, 12 Apr 2018 10:22:17 +0000 (12:22 +0200)]
net: zynq_gem: Use max-speed property from dt
Add support to use max-speed property from dt for
determining the supported speed. Use 1000Mbps as
default.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Ye Li [Wed, 28 Mar 2018 12:54:16 +0000 (20:54 +0800)]
net: fec: Fix issue in DM probe timeout
Since the probe function has changed to reset FEC controller prior than
setup PHY. If reset FEC controller timeout, the priv->phydev is not
initialized, so can't free it.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Peng Fan [Wed, 28 Mar 2018 12:54:15 +0000 (20:54 +0800)]
net: fex_mxc: add i.MX6UL/SX/SL compatible
Add i.MX6UL/SX/SL compatible.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Peng Fan [Wed, 28 Mar 2018 12:54:14 +0000 (20:54 +0800)]
net: fec: sharing MDIO for two enet controllers
On i.MX6SX, 6UL and 7D, there are two enet controllers each has a
MDIO port. But Some boards share one MDIO port for the two enets. So
introduce a configuration CONFIG_FEC_MXC_MDIO_BASE to indicate
the MDIO port for sharing.
In Kconfig, user needs enable CONFIG_FEC_MXC_SHARE_MDIO first to enter
the CONFIG_FEC_MXC_MDIO_BASE.
To i.MX28, adapt to use the new config
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Peng Fan [Wed, 28 Mar 2018 12:54:13 +0000 (20:54 +0800)]
net: fec: set dev->seq to priv->dev_id
To platforms has two enet interface, using dev->seq could
avoid conflict.
i.MX6UL/ULL evk board net get the wrong MAC address from fuse,
eth1 get MAC0 address, eth0 get MAC1 address from fuse. Set the
priv->dev_id to device->seq as the real net interface alias id then
.fec_get_hwaddr() read the related MAC address from fuse.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Peng Fan [Wed, 28 Mar 2018 12:54:12 +0000 (20:54 +0800)]
net: fec_mxc: simplify fec_get_miibus
No need to provide two prototype for this function.
Use ulong for the first parameter, then this function
could be shared for DM/non DM case.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Ye Li [Wed, 28 Mar 2018 12:54:11 +0000 (20:54 +0800)]
net: fec_mxc: Fix DM driver issue in recv
When using ethernet DM driver, the recv interface has a
change with non-DM interface, that driver needs to set
the packet pointer and provide it to upper layer to process.
In fec driver, the fecmxc_recv functions does not handle the
packet pointer parameter. This may cause crash in upper layer
processing because the packet pointer is not set.
This patch allocates a buffer for the packet pointer and free it
through free_pkt interface.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Matt Pelland [Tue, 27 Mar 2018 17:18:25 +0000 (13:18 -0400)]
net: mvneta: support setting hardware address
mvneta already supports setting the MAC address but this was only done
internally when some other part of U-Boot tries to actually use the
interface. This commit exposes this functionality to the ethernet core
code so that the MAC addresses of all interfaces are configured
correctly even if they are not used before loading Linux.
Signed-off-by: Matt Pelland <mpelland@starry.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Tom Rini [Fri, 13 Apr 2018 13:23:53 +0000 (09:23 -0400)]
Merge git://git.denx.de/u-boot-sh
Tom Rini [Fri, 13 Apr 2018 13:22:56 +0000 (09:22 -0400)]
Merge git://git.denx.de/u-boot-usb
Marek Vasut [Tue, 10 Apr 2018 14:06:40 +0000 (16:06 +0200)]
ARM: rmobile: Set maximum kernel size to 64 MiB on Gen3
The Gen3 kernel images are often above 8 MiB, increase the
maximum kernel size to 64 MiB to future-proof it, just like
many other ARM64 boards do.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Thu, 15 Feb 2018 12:19:33 +0000 (13:19 +0100)]
ARM: rmobile: Fix the memory map on Gen3
Fix up the memory map on Gen3 to match datasheet properly.
This simplifies the memory map setup as well, since we do
no longer need this massive complexity.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Tue, 10 Apr 2018 14:43:47 +0000 (16:43 +0200)]
spi: sh_qspi: Make use of the 32byte FIFO
The QSPI controller on RCar Gen2 has 32byte FIFO. Instead of doing
the SPI transmission 1 byte at time, if there is a 32byte chunk of
data to be transferred, fill the FIFO completely and then transfer
the data to/from the FIFO. This increases the SPI NOR access speed
significantly.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Marek Vasut [Tue, 10 Apr 2018 14:58:46 +0000 (16:58 +0200)]
spi: sh_qspi: Replace ad hoc waiting with wait_for_bit
Replace the ad-hoc endless loops with wait_for_bit() with
reasonable timeout. Note that the loops had internal 10uS
delays, although there is no reason for those on this HW,
so they are dropped.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Marek Vasut [Tue, 10 Apr 2018 14:54:38 +0000 (16:54 +0200)]
spi: sh_qspi: Drop SPBDCR wait
Waiting for SPBDCR == 1 is not required and is covered by the
subsequent wait for SPSR_SPRFF, so drop this.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Marek Vasut [Tue, 10 Apr 2018 14:47:38 +0000 (16:47 +0200)]
spi: sh_qspi: Replace data types with short ones
Just replace unsigned {char,short,long} with u{8,16,32},
no functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Marek Vasut [Wed, 29 Nov 2017 05:29:46 +0000 (06:29 +0100)]
mtd: spi: Add Renesas RPC SPI-flash driver
Add driver for the RPC block in SPI-flash mode. This driver allows
access to a SPI NOR flash attached to the RPC block and does not
support RPC in Hyperflash mode. Note that this block is extremely
selective when communicating with the SPI NOR.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Sat, 19 Aug 2017 21:24:08 +0000 (23:24 +0200)]
mtd: rpc: Add Renesas RPC Hyperflash driver
Add driver for the RPC block in Hyperflash mode. This driver allows
access to a CFI Hyperflash attached to the RPC block and does not
support RPC in SPI mode.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Mon, 9 Apr 2018 18:47:31 +0000 (20:47 +0200)]
mmc: renesas-sdhi: Wait after reconfiguring pins
The IP requires some time to recuperate after the IO pin
properties were changed. Add a delay to assure this.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Mon, 9 Apr 2018 23:44:23 +0000 (01:44 +0200)]
mmc: matsushita-common: Add missing else
Fix minor rebase omission, the else was missing which triggered
two accesses to the register on 64bit variant of the IP.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Mon, 9 Apr 2018 18:47:31 +0000 (20:47 +0200)]
mmc: matsushita-common: Wait for command completion
Make sure to wait for the command to complete altogether, including
the trailing 8 clock cycles. This prevents the driver for accidentally
writing the CMD register too fast before the previous command fully
completed.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Mon, 9 Apr 2018 18:47:31 +0000 (20:47 +0200)]
mmc: matsushita-common: Correctly set mode in 16bit
The HOST_MODE register must be set to 0 when the IP is operated in 16bit
mode, otherwise 16bit access to the data FIFO may fail.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Mon, 9 Apr 2018 18:47:31 +0000 (20:47 +0200)]
mmc: matsushita-common: Special case only select registers in 16bit
There are only a few registerse used in the 16bit mode which are
32bit internally. Special-case only those in the IO accessors and
always write both halves. Any other register access is protected
from accidentally overwriting neighboring register.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Fri, 22 Dec 2017 08:37:04 +0000 (09:37 +0100)]
ARM: rmobile: Enable HS200 mode on RCar Gen3
Enable the HS200 on RCar Gen3 platforms, since the SDHI core supports it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Sun, 8 Apr 2018 17:09:17 +0000 (19:09 +0200)]
mmc: renesas-sdhi: Add Renesas SDR104/HS200 tuning support
Add code for PHY tuning required for SDR104/HS200 support on Renesas RCar.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Sun, 8 Apr 2018 17:56:46 +0000 (19:56 +0200)]
mmc: matsushita-common: Export register access functions
Export the matsu_sd_{read,write}l() common register access
functions, so that they can be used by other drivers sharing
the common code.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Mon, 25 Sep 2017 21:06:22 +0000 (23:06 +0200)]
mmc: matsushita-common: Properly handle pin voltage configuration
Factor out the regulator handling into set_ios and add support for
selecting pin configuration based on the voltage to support UHS modes.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Sat, 23 Sep 2017 11:01:20 +0000 (13:01 +0200)]
mmc: matsushita-common: Always check controller version
Handle the controller version even if quirks are set. The controller in
Renesas Gen3 SoCs does provide the version register, which indicates a
controller v10 and the controller does support internal DMA and /1024
divider.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Mon, 29 Jan 2018 23:41:42 +0000 (00:41 +0100)]
mmc: matsushita-common: Handle bus width 0
Handle bus width 0 as 1-bit bus to assure valid content of
MATSU_SD_OPTION register WIDTH field.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Tue, 2 Jan 2018 18:40:49 +0000 (19:40 +0100)]
mmc: matsushita-common: Handle DMA completion flag differences
The DMA READ completion flag position differs on Socionext and Renesas
SoCs. It is bit 20 on Socionext SoCs and using bit 17 is a hardware bug
and forbidden. It is bit 17 on Renesas SoCs and bit 20 does not work on
them.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Tue, 26 Sep 2017 18:34:35 +0000 (20:34 +0200)]
mmc: matsushita-common: Handle Renesas div-by-1
On the Renesas version of the IP, the /1 divider is realized by
setting the clock register [7:0] to 0xff instead of setting bit
10 of the register. Check the quirk and handle accordingly.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Sun, 8 Apr 2018 16:49:52 +0000 (18:49 +0200)]
mmc: matsushita-common: Add Renesas RCar quirks
Add a quirk to identify that the controller is Renesas RCar variant
of the Matsushita SD IP and another quirk indicating it can support
Renesas RCar HS200/HS400/SDR104 modes.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Sat, 23 Sep 2017 11:22:14 +0000 (13:22 +0200)]
mmc: matsushita-common: Use mmc_of_parse()
Drop the ad-hoc DT caps parsing in favor of common framework function.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Sun, 8 Apr 2018 16:14:22 +0000 (18:14 +0200)]
mmc: renesas-sdhi: Handle 16bit IP
The Renesas RCar Gen2 chips have a mix of 32bit and 16bit variants
of the IP. There is no DT property which allows discerning those,
so what Linux does is it checks the size of the register area and
if it is 0x100, the IP is 16bit, otherwise the IP is 32bit. Handle
the distinction the same way.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Sun, 8 Apr 2018 15:45:23 +0000 (17:45 +0200)]
mmc: uniphier: Allow passing quirks to the probe function
Certain instances of the SD IP require more elaborate digging
in the DT to figure out which variant of the SD IP is in use.
Allow explicit passing of the quirks into the probe function.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Sun, 8 Apr 2018 15:41:14 +0000 (17:41 +0200)]
mmc: uniphier: Add support for 16bit variant
Add support for 16bit mutation of the Matsushita SD IP. Since some
registers are internally 32bit, the matsu_sd_{read,write}l() has
to special-case this 16bit variant a bit.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Sun, 8 Apr 2018 15:25:49 +0000 (17:25 +0200)]
mmc: uniphier: Drop useless check
Drop useless check in matsu_sd_{read,write}q(), this is only ever
called to read the data from FIFO and only when 64bit variant of
the block is used anyway.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Sun, 8 Apr 2018 15:14:42 +0000 (17:14 +0200)]
mmc: uniphier: Factor out FIFO accessors
Add macros to generate the FIFO accessors, since the code is almost
the same with only minor differences. This is done in preparation
for adding 16bit variant of the IP.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Sun, 8 Apr 2018 17:17:55 +0000 (19:17 +0200)]
ARM: rmobile: Switch to CONFIG_RENESAS_SDHI
Since the Renesas SDHI has it's own custom driver sharing the
common code with Uniphier one, adjust the Kconfig entries.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Sat, 23 Sep 2017 11:30:30 +0000 (13:30 +0200)]
mmc: renesas-sdhi: Add Renesas SDHI Kconfig entry
Add Kconfig entry for the Renesas SDHI variant of the controller
and split the Makefile entries accordingly.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Sun, 8 Apr 2018 13:22:58 +0000 (15:22 +0200)]
mmc: uniphier: Split out SoC specific bits from the driver
Factor out common code from the uniphier SD driver, change the prefix
of the functions from uniphier_sd_ to matsu_sd_ and create separate
renesas-sdhi.c driver. Thus far, all the code is still compiled when
CONFIG_UNIPHIER_MMC is selected and there is no functional change.
This patch is a preparation for further split of the SoC specific
parts of the Matsushita SD driver, used both on Uniphier and R-Car.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Marek Vasut [Sat, 7 Apr 2018 15:15:00 +0000 (17:15 +0200)]
ARM: rmobile: Enable HUSH on M2 Porter
Enable the HUSH shell, since it is far more capable.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Sat, 7 Apr 2018 14:16:30 +0000 (16:16 +0200)]
ARM: rmobile: Add JTAG recovery support for M2 Porter
Add JTAG recovery support into the M2 Porter TPL. This allows the
TPL to be loaded over JTAG, initialize the system, wait for the
JTAG debugger to load U-Boot image into RAM and then resume and
start U-Boot from RAM.
The procedure is as follows:
1) Load u-boot-tpl.bin to 0xe6300000
2) Write magic number 0x1337c0de to 0xe6300020
TPL checks for this particular magic and starts JTAG recovery
if this number is present. This is not present by default.
3) Start U-Boot TPL from 0xe6300000
4) Wait for a message from TPL on UART indicating JTAG boot:
"JTAG boot detected!"
5) Halt the system in JTAG debugger
6) Load U-Boot image (u-boot.img) to 0x4fffffc0
7) Write magic number 0xb33fc0de to 0xe6300024
TPL checks for this particular magic to verify that the U-Boot
image was loaded into DRAM by the JTAG debugger.
8) Resume the system in JTAG debugger
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Tue, 3 Apr 2018 10:52:48 +0000 (12:52 +0200)]
ARM: rmobile: Add TPL support on R8A7791 M2 Porter
Add and enable TPL on M2 Porter. The TPL must fit into 16 kiB due
to the Gen2 BootROM restriction. The TPL is running from MERAM and
is capable of performing the initial initialization of PFC, Clock,
GPIO, LBSC, DBSC and QSPI NOR. DBSC is responsible for bringing up
the DDR DRAM access. The TPL is capable of loading the next stage,
U-Boot, from either SPI NOR or UART as a fallback. If either does
provide a valid U-Boot uImage, the system stops, which allows the
operator to load U-Boot ie. via JTAG and start it manually.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Wed, 4 Apr 2018 21:32:44 +0000 (23:32 +0200)]
ARM: rmobile: Do not init caches in TPL before DRAM
Skip the cache initialization, which can be done later on in U-Boot
proper, since this interferes with early DRAM initialization in TPL.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Marek Vasut [Wed, 4 Apr 2018 11:34:40 +0000 (13:34 +0200)]
ARM: rmobile: Split U-Boot and SPL sources on Porter
Pull the SPL code from porter.c into a separate file in
preparation for the addition of system initialization code.
No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Tom Rini [Wed, 11 Apr 2018 21:00:52 +0000 (17:00 -0400)]
Merge git://git.denx.de/u-boot-i2c
Marek Vasut [Sat, 7 Apr 2018 15:03:45 +0000 (17:03 +0200)]
spl: ram: Add TPL Kconfig symbols
Add TPL config symbols for RAM loading matching the SPL ones.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Marek Vasut [Sat, 7 Apr 2018 15:03:28 +0000 (17:03 +0200)]
spl: ram: Convert to CONFIG_IS_ENABLED
This patch is a preparation for adding TPL support for RAM loading.
CONFIG_IS_ENABLED allows for proper handling of the U-Boot/SPL/TPL
differences in config symbol names.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Marek Vasut [Sat, 7 Apr 2018 14:06:36 +0000 (16:06 +0200)]
ARM: Fix Makefile during SPL and TPL build
The tiny variants of memset and memcpy implementations can be
built for TPL as well, check whether a TPL build is in progress
and avoid including the default variants.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Marek Vasut [Sat, 7 Apr 2018 14:06:22 +0000 (16:06 +0200)]
serial: Fix Makefile during SPL and TPL build
This patch fixes a situation where CONFIG_DM_SERIAL is enabled for
regular U-Boot and SPL, but not for TPL. In that case, the build
will try to include serial-uclass into the TPL nonetheless, because
CONFIG_DM_SERIAL is set.
The solution is to check if the build is for SPL or TPL and in that
case, check if CONFIG_$(SPL_TPL_)DM_SERIAL is also set. Only in that
case, include serial-uclass.c . If the build is for regular U-Boot,
CONFIG_BUILD is not set, so only check if CONFIG_DM_SERIAL is set
and if so, include serial-uclass.c
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Marek Vasut [Sat, 7 Apr 2018 14:06:11 +0000 (16:06 +0200)]
tpl: ymodem: Add CONFIG_TPL_YMODEM_SUPPORT to Kconfig
Add Kconfig entry for CONFIG_TPL_YMODEM_SUPPORT symbol to match the SPL one.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Marek Vasut [Sat, 7 Apr 2018 14:05:46 +0000 (16:05 +0200)]
tpl: spi: Add CONFIG_TPL_SPI_LOAD to Kconfig
Add Kconfig entry for CONFIG_TPL_SPI_LOAD symbol to match the SPL one.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Marek Vasut [Sat, 7 Apr 2018 14:05:27 +0000 (16:05 +0200)]
spl: spi: Move CONFIG_SPL_SPI_LOAD to Kconfig
Add Kconfig entry for CONFIG_SPL_SPI_LOAD symbol and move all
configurations using it to Kconfig.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Neil Armstrong [Wed, 11 Apr 2018 15:08:02 +0000 (17:08 +0200)]
phy: Add Amlogic Meson USB2 & USB3 Generic PHY drivers
The Amlogic Meson GXL and GXM (simple variant) embeds up to 3 USB2 PHYs
and an USB3 PHY. This patch adds drivers for these for the standard generic
PHY interface and supports the power-on/off calls and set the Host mode by
default.
They are based on the excellent work from Martin Blumenstingl merged in linux.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Wed, 11 Apr 2018 15:08:01 +0000 (17:08 +0200)]
usb: host: dwc3: Add support for multiple PHYs
DWC3 Ips can have more than 1 PHY for USB2 and 1 PHY for USB3, add support
for a generic number of PHYs and adapt the code to handle a generic
number of PHYs.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong [Wed, 11 Apr 2018 15:08:00 +0000 (17:08 +0200)]
usb: host: Add simple of glue driver for DWC3 USB Controllers integration
This is a port of the dwc3-of-simple driver from Linux to enable/deassert
clock and resets of a simple DWC3 Controller HW glue.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tom Rini [Wed, 11 Apr 2018 14:05:41 +0000 (10:05 -0400)]
Merge git://git.denx.de/u-boot-ubi
Mario Six [Wed, 28 Mar 2018 12:37:44 +0000 (14:37 +0200)]
i2c: fsl: Add option to get clock from DT
Add an option to get the clock speed from the device tree, hence adding
compatibility with DM clock drivers.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Wed, 28 Mar 2018 12:37:43 +0000 (14:37 +0200)]
i2c: fsl: Use dev_read_addr
Since bus translations are now fully supported, use a plain
"dev_read_addr" to get the device address from the device tree.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Mario Six [Wed, 28 Mar 2018 12:37:42 +0000 (14:37 +0200)]
i2c: ihs_i2c: Use new fpgamap interface
The fpgamap interface has been switched to a "single function + data
size" interface. Reflect this change in the IHS I2C driver.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Alexander Kochetkov [Tue, 27 Mar 2018 14:52:27 +0000 (17:52 +0300)]
dm: i2c: implement gpio-based I2C deblock
The commit implement a gpio-based software deblocking. The code
extract I2C pins description from device tree, switch pins to GPIO
mode, toggle SCL until slave release SDA, send I2C stop and switch
I2C pins back to I2C mode.
Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Alexander Kochetkov [Tue, 27 Mar 2018 14:52:26 +0000 (17:52 +0300)]
dm: i2c: dts: Add gpios and pinctrl device tree properties
The commit describe usage of gpios and pinctrl device tree
properties in order to enable gpio-based software deblocking.
Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
Bradley Bolen [Wed, 4 Apr 2018 16:42:16 +0000 (12:42 -0400)]
ubifs: Change value of mutex_is_locked()
The mutex lock and unlock functions are stubbed out and mutex_is_locked
was 0. This caused asserts to fail in ubifs code when checking that the
mutex was locked. For example,
UBIFS assert failed in ubifs_change_lp at 540
UBIFS assert failed in ubifs_release_lprops at 278
Assume that the "mutex" is locked since that is the normal case when it
is checked in the ubifs code.
Signed-off-by: Bradley Bolen <bradleybolen@gmail.com>
Heinrich Schuchardt [Wed, 4 Apr 2018 13:39:20 +0000 (15:39 +0200)]
checkpatch.pl: update from Linux kernel v4.16
Update scripts/checkpatch.pl from upstream.
One of the many corrections is not creating an error for cover-letters.
Reintroduce U-Boot's
5c761ce58666b3a1695697498598f8bf3484a0c7
checkpatch.pl: Add warning for new __packed additions
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Kristian Amlie [Wed, 4 Apr 2018 08:09:57 +0000 (10:09 +0200)]
fw_printenv: Fix crash due to incorrect size for malloc'ed string.
Using sizeof gives the size of the pointer only, not the string. This
could easily lead to crashes when using -l argument.
Signed-off-by: Kristian Amlie <kristian.amlie@northern.tech>
Heinrich Schuchardt [Tue, 3 Apr 2018 23:54:26 +0000 (01:54 +0200)]
get_maintainer.pl: update from Linux kernel v4.16
The most significant change is the addition of the --self-test option
which allows to run a consistency check on all MAINTAINERS files.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Heinrich Schuchardt [Tue, 3 Apr 2018 23:16:08 +0000 (01:16 +0200)]
MAINTAINERS: ARM STM STM32MP: correct file paths
Provide correct file paths.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Neil Armstrong [Tue, 3 Apr 2018 09:44:19 +0000 (11:44 +0200)]
clk: add sandbox test for bulk API
This patch adds the bulk clock API tests for the sandbox test suite.
It's very similar to the main test but only uses the _bulk() API and
checks if the clocks are correctly enabled/disabled.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Neil Armstrong [Tue, 3 Apr 2018 09:44:18 +0000 (11:44 +0200)]
clk: Add get/enable/disable/release for a bulk of clocks
This patch adds a "bulk" API to the clock API in order to get/enable/disable
/release a group of clocks associated with a device.
This bulk API will avoid adding a copy of the same code to manage
a group of clocks in drivers.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Neil Armstrong [Tue, 3 Apr 2018 09:40:51 +0000 (11:40 +0200)]
reset: add sandbox test for bulk API
This patch adds the bulk reset API tests for the sandbox test suite.
Unlike the main test, it also check the "other" reset signal using the bulk API
and checks if the resets are correctly asserted/deasserted.
To allow the bulk API to work, and avoid changing the DT, the number of resets
of the sandbox reset controller has been bumped to 101 for the "other" reset
line to be valid.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Neil Armstrong [Tue, 3 Apr 2018 09:40:50 +0000 (11:40 +0200)]
reset: Add get/assert/deassert/release for bulk of reset signals
This patch adds a "bulk" API to the reset API in order to get/deassert/
assert/release a group of reset signals associated with a device.
This bulk API will avoid adding a copy of the same code to manage
a group of reset signals in drivers.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 2 Apr 2018 08:42:53 +0000 (02:42 -0600)]
log: Add units to code-size stats in README.log
Without the units these numbers are confusing. Add a comment about the
unit being 'bytes' and mention 'buildman' as the source.
Suggested-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Mon, 2 Apr 2018 08:42:39 +0000 (02:42 -0600)]
log: Correct missing free() on error in log_add_filter()
If there is a problem with the parameters to log_add_filter(), the memory
allocated is currently not freed. Fix this.
Reported-by: Coverity (CID: 171962)
Signed-off-by: Simon Glass <sjg@chromium.org>
Guillaume GARDET [Fri, 30 Mar 2018 08:28:19 +0000 (10:28 +0200)]
mkimage: do not fail if there is no print_header function
Commit 253c60a breaks the exit value of 'mkimage -T rkimage'
and print the following error:
mkimage: Can't print header for Rockchip Boot Image support: Success
It is not a failure to not print headers, so just display the warning message,
and finish the function properly.
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Patrice Chotard [Fri, 30 Mar 2018 07:22:40 +0000 (09:22 +0200)]
armv7m: disable icache before linux booting
Similarly to ARMV7, on ARMV7M instruction cache memory needs
to be disabled before running linux kernel to avoid kernel to
be stuck.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Neil Armstrong [Thu, 29 Mar 2018 12:56:02 +0000 (14:56 +0200)]
serial: meson: Update compatible with new Linux bindings
The Amlogic Meson SoCs serial bindings were not written when serial
support was pushed into Linux and U-Boot.
A clean bindings document has been merged into Linux tree to correctly
handle the multiple clocks feeding the serial peripheral.
This update the U-Boot serial_meson driver with the new compatible
string for Amlogic Meson GX Socs.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Neil Armstrong [Thu, 29 Mar 2018 12:55:25 +0000 (14:55 +0200)]
reset: Add Amlogic Meson Reset Controller
The Amlogic Meson SoCs embeds up to 256 reset lines, add the corresponding
driver.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Álvaro Fernández Rojas [Sat, 17 Mar 2018 11:22:24 +0000 (12:22 +0100)]
sysreset: syscon: convert to use live dt
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Tom Rini [Mon, 9 Apr 2018 15:06:21 +0000 (11:06 -0400)]
Merge tag 'xilinx-for-v2018.05-rc2' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.05-rc2
- Various DT changes and sync with mainline kernel
- Various defconfig updates
- Add SPL init for zcu102 revA
- Add new zynqmp boards zcu100/zcu104/zcu106/zcu111/zc12XX
and zc1751-dc3
- Net fixes - xlnx,phy-type
- 64bit axi ethernet support
- arasan: Fix nand write issue
- fpga fixes
- Maintainer file updates
Tom Rini [Mon, 9 Apr 2018 15:05:44 +0000 (11:05 -0400)]
Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot
Patch queue for efi - 2018-04-09
Highlights this time around:
- Lots of minor spec compliance fixes
- Support full range of GOP BLT commands
- More fine grained error checking
- Network fixes (init, DP)
- Lots of other bug fixes...
Michal Simek [Wed, 28 Mar 2018 13:55:27 +0000 (15:55 +0200)]
arm64: zynqmp: Add support for Xilinx zcu111-revA
Xilinx zcu111 is a customer board. It is reusing some parts from zcu102.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 28 Mar 2018 13:43:51 +0000 (15:43 +0200)]
arm64: zynqmp: Add support for Xilinx zcu106-revA
Xilinx zcu106 is a customer board. It is reusing some parts from zcu102.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 28 Mar 2018 13:36:36 +0000 (15:36 +0200)]
arm64: zynqmp: Add support for zcu104 customer board
Xilinx zcu104 is another customer board. It is sort of zcu102 clone with
some differences.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 28 Mar 2018 13:09:32 +0000 (15:09 +0200)]
arm64: zynqmp: Add support for zc12xx boards
Add support for zc12xx boards. All of them are internal boards for
silicon validation and share very similar base platforms.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 28 Mar 2018 13:00:25 +0000 (15:00 +0200)]
arm64: zynqmp: Add support for zc1751 dc3
zc1751 is based board with dc3 extenstion card which is used for silicon
validation.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 28 Mar 2018 12:37:47 +0000 (14:37 +0200)]
arm64: zynqmp: Add support for zcu100 aka Ultra96 board
Add support for Xilinx zcu100.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>